25161 lines
1.4 MiB
25161 lines
1.4 MiB
; --------------------------------------------------------------------------------
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; @Title: PIC32CXBZ On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2024-01-17 NEJ
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; @Manufacturer: MICROCHIP - Microchip Technology Inc.
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; @Doc: Generated (TRACE32, build: 165992.), based on:
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; PIC32CX1012BZ24032.svd (Ver. 0), PIC32CX1012BZ25048.svd (Ver. 0),
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; PIC32CX5109BZ31032.svd (Ver. 0), PIC32CX5109BZ31048.svd (Ver. 0)
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; @Core: Cortex-M4F
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; @Chip: PIC32CX1012BZ24032, PIC32CX1012BZ25048, PIC32CX5109BZ31032,
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; PIC32CX5109BZ31048
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; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpic32cxbz.per 17367 2024-01-22 12:14:37Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "AC (Analog Comparator)"
|
|
base ad:0x42001C00
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "CTRLA,Control A"
|
|
bitfld.byte 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1"
|
|
wgroup.byte 0x1++0x0
|
|
line.byte 0x0 "CTRLB,Control B"
|
|
bitfld.byte 0x0 1. "START1,Comparator 1 Start Comparison" "0,1"
|
|
bitfld.byte 0x0 0. "START0,Comparator 0 Start Comparison" "0,1"
|
|
group.word 0x2++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "INVEI1,Comparator 1 Input Event Invert Enable" "0,1"
|
|
bitfld.word 0x0 12. "INVEI0,Comparator 0 Input Event Invert Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "COMPEI1,Comparator 1 Event Input Enable" "0,1"
|
|
bitfld.word 0x0 8. "COMPEI0,Comparator 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "WINEO0,Window 0 Event Output Enable" "0,1"
|
|
bitfld.word 0x0 1. "COMPEO1,Comparator 1 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "COMPEO0,Comparator 0 Event Output Enable" "0,1"
|
|
group.byte 0x4++0x2
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 4. "WIN0,Window 0 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "COMP1,Comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "COMP0,Comparator 0 Interrupt Enable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 4. "WIN0,Window 0 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 1. "COMP1,Comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "COMP0,Comparator 0 Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 4. "WIN0,Window 0" "0,1"
|
|
bitfld.byte 0x2 1. "COMP1,Comparator 1" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 0. "COMP0,Comparator 0" "0,1"
|
|
rgroup.byte 0x7++0x1
|
|
line.byte 0x0 "STATUSA,Status A"
|
|
bitfld.byte 0x0 4.--5. "WSTATE0,Window 0 Current State" "0: Signal is above window,1: Signal is inside window,2: Signal is below window,?"
|
|
bitfld.byte 0x0 1. "STATE1,Comparator 1 Current State" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "STATE0,Comparator 0 Current State" "0,1"
|
|
line.byte 0x1 "STATUSB,Status B"
|
|
bitfld.byte 0x1 1. "READY1,Comparator 1 Ready" "0,1"
|
|
bitfld.byte 0x1 0. "READY0,Comparator 0 Ready" "0,1"
|
|
group.byte 0x9++0x1
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Run" "0,1"
|
|
line.byte 0x1 "WINCTRL,Window Control"
|
|
bitfld.byte 0x1 1.--2. "WINTSEL0,Window 0 Interrupt Selection" "0: Interrupt on signal above window,1: Interrupt on signal inside window,2: Interrupt on signal below window,3: Interrupt on signal outside window"
|
|
bitfld.byte 0x1 0. "WEN0,Window 0 Mode Enable" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0xC)++0x0
|
|
line.byte 0x0 "SCALER[$1],Scaler n"
|
|
hexmask.byte 0x0 0.--3. 1. "VALUE,Scaler Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "COMPCTRL[$1],Comparator Control n"
|
|
bitfld.long 0x0 28.--29. "OUT,Output" "0: The output of COMPn is not routed to the COMPn..,1: The asynchronous output of COMPn is routed to..,2: The synchronous output (including filtering) of..,?"
|
|
bitfld.long 0x0 24.--26. "FLEN,Filter Length" "0: No filtering,1: 3-bit majority function (2 of 3),2: 5-bit majority function (3 of 5),?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 15. "SWAP,Swap Inputs and Invert" "0,1"
|
|
bitfld.long 0x0 12.--14. "MUXPOS,Positive Input Mux Selection" "0: I/O pin 0,1: I/O pin 1,2: I/O pin 2,3: I/O pin 3,4: VDD Scaler,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "MUXNEG,Negative Input Mux Selection" "0: I/O pin 0,1: I/O pin 1,2: I/O pin 2,3: I/O pin 3,4: Ground,5: VDD scaler,6: Internal bandgap voltage,7: DAC output"
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "INTSEL,Interrupt Selection" "0: Interrupt on comparator output toggle,1: Interrupt on comparator output rising,2: Interrupt on comparator output falling,3: Interrupt on end of comparison (single-shot mode.."
|
|
bitfld.long 0x0 2. "SINGLE,Single-Shot Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
repeat.end
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 4. "COMPCTRL1,COMPCTRL 1 Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "COMPCTRL0,COMPCTRL 0 Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WINCTRL,WINCTRL Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "CALIB,Calibration"
|
|
bitfld.word 0x0 0.--1. "BIAS0,COMP0/1 Bias Scaling" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0xC)++0x0
|
|
line.byte 0x0 "SCALER[$1],Scaler n"
|
|
hexmask.byte 0x0 0.--5. 1. "VALUE,Scaler Value"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0xC)++0x0
|
|
line.byte 0x0 "SCALER[$1],Scaler n"
|
|
hexmask.byte 0x0 0.--5. 1. "VALUE,Scaler Value"
|
|
repeat.end
|
|
endif
|
|
tree.end
|
|
tree "ADC (12-bit Analog to Digital Converter)"
|
|
base ad:0x44001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "ADCCON1,"
|
|
bitfld.long 0x0 23. "FRACT,Fractional Data Output Format bit" "0: Integer,1: Fractional"
|
|
bitfld.long 0x0 21.--22. "SELRES,Shared ADC7 Resolution bits" "0: 6 bits,1: 8 bits,2: 10 bits,3: 12 bits (default)"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "STRGSRC,Scan Trigger Source Select bits"
|
|
bitfld.long 0x0 15. "ON,ADC Module Enable bit" "0: ADC module is disabled,1: ADC module is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "FRZ," "0,1"
|
|
bitfld.long 0x0 13. "SIDL,Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 11. "CVD_EN,CVD Enable bit" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 11. "CVD_EN,CVD Enable bit" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 10. "FSYDMA," "0,1"
|
|
bitfld.long 0x0 9. "FSYUPB," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SCANEN," "0,1"
|
|
bitfld.long 0x0 4.--6. "IRQVS,Interrupt Vector Shift bits" "0: Shift x left 0 bit position,1: Shift x left 1 bit position,2: Shift x left 2 bit position,3: Shift x left 3 bit position,4: Shift x left 4 bit position,5: Shift x left 5 bit position,6: Shift x left 6 bit position,7: Shift x left 7 bit position"
|
|
newline
|
|
bitfld.long 0x0 3. "STRGLVL,Scan Trigger High Level/Positive Edge Sensitivity bit" "0: Scan trigger is positive edge sensitive. Once..,1: Scan trigger is high level sensitive. Once STRIG.."
|
|
bitfld.long 0x0 0.--2. "DMABL,DMA to System RAM Buffer Length Size bits" "0: Allocates 1 location in system memory to each..,1: Allocates 2 locations in system memory to each..,2: Allocates 4 locations in system memory to each..,3: Allocates 8 locations in system memory to each..,4: Allocates 16 locations in system memory to each..,5: Allocates 32 locations in system memory to each..,6: Allocates 64 locations in system memory to each..,7: Allocates 128 locations in system memory to each.."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "ADCCON2,"
|
|
bitfld.long 0x0 31. "BGVRRDY,Band Gap Voltage/ADC Reference Voltage Status bit" "0: Either or both band gap voltage and ADC..,1: Both band gap voltage and ADC reference voltages.."
|
|
bitfld.long 0x0 30. "REFFLT,Band Gap/ Vref / AVdd BOR Fault Status bit" "0: Band gap and Vref voltage are working properly,1: Fault in band gap or the Vref voltage while the.."
|
|
newline
|
|
bitfld.long 0x0 29. "EOSRDY,End of Scan Interrupt Status bit" "0: Scanning has not completed,1: All analog inputs are considered for scanning.."
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 26.--28. "CVD_CPL,CVD Partly Line Capacitor Setting bits" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 26.--28. "CVD_CPL,CVD Partly Line Capacitor Setting bits" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.word 0x0 16.--25. 1. "SAMC,Sample Time for the Shared ADC (ADC7) bits"
|
|
newline
|
|
bitfld.long 0x0 15. "BGVRIEN,Band Gap/ Vref Voltage Ready Interrupt Enable bit" "0: No interrupt is generated when the BGVRRDY bit..,1: Interrupt will be generated when the BGVRDDY bit.."
|
|
bitfld.long 0x0 14. "REFFLTIEN,Band Gap/ Vref Voltage Fault Interrupt Enable bit" "0: No interrupt is generated when the REFFLT bit is..,1: Interrupt will be generated when the REFFLT bit.."
|
|
newline
|
|
bitfld.long 0x0 13. "EOSIEN,End of Scan Interrupt Enable bit" "0: No interrupt is generated when the EOSRDY bit is..,1: Interrupt will be generated when EOSRDY bit is set"
|
|
bitfld.long 0x0 11. "ENXCNVRT," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "ADCEIS,Shared ADC Early Interrupt Select bits" "0: The data ready interrupt is generated 1 ADC..,1: The data ready interrupt is generated 2 ADC..,2: The data ready interrupt is generated 3 ADC..,3: The data ready interrupt is generated 4 ADC..,4: The data ready interrupt is generated 5 ADC..,5: The data ready interrupt is generated 6 ADC..,6: The data ready interrupt is generated 7 ADC..,7: The data ready interrupt is generated 8 ADC.."
|
|
hexmask.long.byte 0x0 0.--6. 1. "ADCDIV,Shared ADC Clock Divider bits"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "ADCCON3,"
|
|
bitfld.long 0x0 30.--31. "ADCSEL,Analog-to-Digital Clock Source bits" "0: PBCLK1,1: FRC,2: REFCLK3,3: SYSCLK"
|
|
hexmask.long.byte 0x0 24.--29. 1. "CONCLKDIV,Analog-to-Digital Control Clock Divider bits"
|
|
newline
|
|
bitfld.long 0x0 23. "DIGEN7,Shared ADC (ADC7) Digital Enable bit" "0,1"
|
|
bitfld.long 0x0 13.--15. "VREFSEL,Voltage Reference Input Selection bits" "0: ADC VREFH is AVDD ADC VREFL is AVSS,?,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 12. "TRGSUSP,Trigger Suspend bit" "0: Triggers are not blocked,1: Triggers are blocked from starting a new.."
|
|
bitfld.long 0x0 11. "UPDIEN,Update Ready Interrupt Enable bit" "0: No interrupt is generated,1: Interrupt will be generated when the UPDRDY bit.."
|
|
newline
|
|
bitfld.long 0x0 10. "UPDRDY,ADC Update Ready Status bit" "0: ADC SFRs cannot be updated,1: ADC SFRs can be updated"
|
|
bitfld.long 0x0 9. "SAMP,Shared ADC7 Analog Input Sampling Enable bit" "0: The ADC S&H amplifier is holding,1: The ADC S&H amplifier is sampling"
|
|
newline
|
|
bitfld.long 0x0 8. "RQCNVRT,Individual ADC Input Conversion Request bit" "0: Do not trigger the conversion,1: Trigger the conversion of the selected ADC input.."
|
|
bitfld.long 0x0 7. "GLSWTRG,Global Level Software Trigger bit" "0: Do not trigger an analog-to-digital conversion,1: Trigger conversion for ADC inputs that have.."
|
|
newline
|
|
bitfld.long 0x0 6. "GSWTRG,Global Software Trigger bit" "0: Do not trigger an analog-to-digital conversion,1: Trigger conversion for ADC inputs that have.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADINSEL,Analog Input Select bits"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "ADCIMCON1,"
|
|
bitfld.long 0x0 23. "DIFF11,AN11 Mode bit" "0: AN11 is using Single-ended mode,1: Selects AN11 differential input pair as AN11+.."
|
|
bitfld.long 0x0 22. "SIGN11,AN11 Signed Data Mode bit" "0: AN11 is using Unsigned Data mode,1: AN11 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 21. "DIFF10,AN10 Mode bit" "0: AN10 is using Single-ended mode,1: Selects AN10 differential input pair as AN10+.."
|
|
bitfld.long 0x0 20. "SIGN10,AN10 Signed Data Mode bit" "0: AN10 is using Unsigned Data mode,1: AN10 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 19. "DIFF9,AN9 Mode bit" "0: AN9 is using Single-ended mode,1: Selects AN9 differential input pair as AN9+ and.."
|
|
bitfld.long 0x0 18. "SIGN9,AN9 Signed Data Mode bit" "0: AN9 is using Unsigned Data mode,1: AN9 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 17. "DIFF8,AN 8 Mode bit" "0: AN8 is using Single-ended mode,1: Selects AN8 differential input pair as AN8+ and.."
|
|
bitfld.long 0x0 16. "SIGN8,AN8 Signed Data Mode bit" "0: AN8 is using Unsigned Data mode,1: AN8 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 15. "DIFF7,AN7 Mode bit" "0: AN7 is using Single-ended mode,1: Selects AN7 differential input pair as AN7+ and.."
|
|
bitfld.long 0x0 14. "SIGN7,AN7 Signed Data Mode bit" "0: AN7 is using Unsigned Data mode,1: AN7 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 13. "DIFF6,AN6 Mode bit" "0: AN6 is using Single-ended mode,1: Selects AN6 differential input pair as AN6+ and.."
|
|
bitfld.long 0x0 12. "SIGN6,AN6 Signed Data Mode bit" "0: AN6 is using Unsigned Data mode,1: AN6 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 11. "DIFF5,AN5 Mode bit" "0: AN5 is using Single-ended mode,1: Selects AN5 differential input pair as AN5+ and.."
|
|
bitfld.long 0x0 10. "SIGN5,AN5 Signed Data Mode bit" "0: AN5 is using Unsigned Data mode,1: AN5 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 9. "DIFF4,AN4 Mode bit" "0: AN4 is using Single-ended mode,1: Selects AN4 differential input pair as AN4+ and.."
|
|
bitfld.long 0x0 8. "SIGN4,AN4 Signed Data Mode bit" "0: AN4 is using Unsigned Data mode,1: AN4 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 7. "DIFF3,AN3 Mode bit" "0: AN3 is using Single-ended mode,1: Selects AN3 differential input pair as AN3+ and.."
|
|
bitfld.long 0x0 6. "SIGN3,AN3 Signed Data Mode bit" "0: AN3 is using Unsigned Data mode,1: AN3 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 5. "DIFF2,AN2 Mode bit" "0: AN2 is using Single-ended mode,1: Selects AN2 differential input pair as AN2+ and.."
|
|
bitfld.long 0x0 4. "SIGN2,AN2 Signed Data Mode bit" "0: AN2 is using Unsigned Data mode,1: AN2 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 3. "DIFF1,AN1 Mode bit" "0: AN1 is using Single-ended mode,1: Selects AN1 differential input pair as AN1+ and.."
|
|
bitfld.long 0x0 2. "SIGN1,AN1 Signed Data Mode bit" "0: AN1 is using Unsigned Data mode,1: AN1 is using Signed Data mode"
|
|
newline
|
|
bitfld.long 0x0 1. "DIFF0,AN0 Mode bit" "0: AN0 is using Single-ended mode,1: Selects AN0 differential input pair as AN0+ and.."
|
|
bitfld.long 0x0 0. "SIGN0,AN0 Signed Data Mode bit" "0: AN0 is using Unsigned Data mode,1: AN0 is using Signed Data mode"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "ADCGIRQEN1,"
|
|
bitfld.long 0x0 11. "AGIEN11,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 10. "AGIEN10,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
newline
|
|
bitfld.long 0x0 9. "AGIEN9,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 8. "AGIEN8,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
newline
|
|
bitfld.long 0x0 7. "AGIEN7,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 6. "AGIEN6,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
newline
|
|
bitfld.long 0x0 5. "AGIEN5,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 4. "AGIEN4,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
newline
|
|
bitfld.long 0x0 3. "AGIEN3,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 2. "AGIEN2,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
newline
|
|
bitfld.long 0x0 1. "AGIEN1,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
bitfld.long 0x0 0. "AGIEN0,ADC Global Interrupt Enable bit" "0: Interrupts are disabled,1: Interrupts are enabled for the selected analog.."
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ADCCSS1,"
|
|
bitfld.long 0x0 11. "CSS11,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 10. "CSS10,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
newline
|
|
bitfld.long 0x0 9. "CSS9,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 8. "CSS8,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
newline
|
|
bitfld.long 0x0 7. "CSS7,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 6. "CSS6,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
newline
|
|
bitfld.long 0x0 5. "CSS5,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 4. "CSS4,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
newline
|
|
bitfld.long 0x0 3. "CSS3,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 2. "CSS2,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
newline
|
|
bitfld.long 0x0 1. "CSS1,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
bitfld.long 0x0 0. "CSS0,Analog Common Scan Select bits" "0: Skip ANx for input scan,1: Select ANx for input scan (i.e.ANx = CSSx and.."
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "ADCDSTAT1,"
|
|
bitfld.long 0x0 11. "ARDY11," "0,1"
|
|
bitfld.long 0x0 10. "ARDY10," "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARDY9," "0,1"
|
|
bitfld.long 0x0 8. "ARDY8," "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ARDY7," "0,1"
|
|
bitfld.long 0x0 6. "ARDY6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ARDY5," "0,1"
|
|
bitfld.long 0x0 4. "ARDY4," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ARDY3," "0,1"
|
|
bitfld.long 0x0 2. "ARDY2," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ARDY1," "0,1"
|
|
bitfld.long 0x0 0. "ARDY0," "0,1"
|
|
group.long 0xE0++0x3
|
|
line.long 0x0 "ADCCMPEN1,"
|
|
bitfld.long 0x0 7. "CMPE7," "0,1"
|
|
bitfld.long 0x0 6. "CMPE6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CMPE5," "0,1"
|
|
bitfld.long 0x0 4. "CMPE4," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CMPE3," "0,1"
|
|
bitfld.long 0x0 2. "CMPE2," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CMPE1," "0,1"
|
|
bitfld.long 0x0 0. "CMPE0," "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "ADCCMP1,"
|
|
hexmask.long.word 0x0 16.--31. 1. "ADCMPHI,"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADCMPLO,"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "ADCCMPEN2,"
|
|
bitfld.long 0x0 7. "CMPE7," "0,1"
|
|
bitfld.long 0x0 6. "CMPE6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CMPE5," "0,1"
|
|
bitfld.long 0x0 4. "CMPE4," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CMPE3," "0,1"
|
|
bitfld.long 0x0 2. "CMPE2," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CMPE1," "0,1"
|
|
bitfld.long 0x0 0. "CMPE0," "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "ADCCMP2,"
|
|
hexmask.long.word 0x0 16.--31. 1. "ADCMPHI,"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADCMPLO,"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "ADCFLTR1,"
|
|
bitfld.long 0x0 31. "AFEN0," "0,1"
|
|
bitfld.long 0x0 30. "DATA16EN0," "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ADFMODE0," "0,1"
|
|
bitfld.long 0x0 26.--28. "OVRSAM0," "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 25. "AFIEN0," "0,1"
|
|
bitfld.long 0x0 24. "AFIF0," "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "FLTINID0,"
|
|
hexmask.long.word 0x0 0.--15. 1. "FLT_DATA0,"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x0 "ADCFLTR2,"
|
|
bitfld.long 0x0 31. "AFEN1," "0,1"
|
|
bitfld.long 0x0 30. "DATA16EN1," "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ADFMODE1," "0,1"
|
|
bitfld.long 0x0 26.--28. "OVRSAM1," "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 25. "AFIEN1," "0,1"
|
|
bitfld.long 0x0 24. "AFIF1," "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "FLTINID1,"
|
|
hexmask.long.word 0x0 0.--15. 1. "FLT_DATA1,"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "ADCTRG1,ADC Trigger Source 1 Register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "TRGSRC3,Trigger Source for Conversion of ADC3 Module Select bits"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TRGSRC2,Trigger Source for Conversion of ADC2 Module Select bits"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "TRGSRC1,Trigger Source for Conversion of ADC1 Module Select bits"
|
|
hexmask.long.byte 0x0 0.--4. 1. "TRGSRC0,Trigger Source for Conversion of ADC0 Module Select bits"
|
|
group.long 0x210++0x3
|
|
line.long 0x0 "ADCTRG2,ADC Trigger Source 2 Register"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 24.--28. 1. "TRGSRC7,Trigger Source for Conversion of ADC7 Module Select bits"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 24.--28. 1. "TRGSRC7,Trigger Source for Conversion of ADC7 Module Select bits"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 16.--20. 1. "TRGSRC6,Trigger Source for Conversion of ADC6 Module Select bits"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 16.--20. 1. "TRGSRC6,Trigger Source for Conversion of ADC6 Module Select bits"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x0 8.--12. 1. "TRGSRC5,Trigger Source for Conversion of ADC5 Module Select bits"
|
|
hexmask.long.byte 0x0 0.--4. 1. "TRGSRC4,Trigger Source for Conversion of ADC4 Module Select bits"
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "ADCCMPCON1,"
|
|
hexmask.long.word 0x0 16.--31. 1. "CVD_DATA,"
|
|
hexmask.long.byte 0x0 8.--13. 1. "CMPINID0,"
|
|
newline
|
|
bitfld.long 0x0 7. "ENDCMP," "0,1"
|
|
bitfld.long 0x0 6. "DCMPIEN," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DCMPED," "0,1"
|
|
bitfld.long 0x0 4. "IEBTWN," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IEHIHI," "0,1"
|
|
bitfld.long 0x0 2. "IEHILO," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "IELOHI," "0,1"
|
|
bitfld.long 0x0 0. "IELOLO," "0,1"
|
|
group.long 0x290++0x3
|
|
line.long 0x0 "ADCCMPCON2,"
|
|
hexmask.long.byte 0x0 8.--12. 1. "AINID,"
|
|
bitfld.long 0x0 7. "ENDCMP," "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DCMPGIEN," "0,1"
|
|
bitfld.long 0x0 5. "DCMPED," "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IEBTWN," "0,1"
|
|
bitfld.long 0x0 3. "IEHIHI," "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IEHILO," "0,1"
|
|
bitfld.long 0x0 1. "IELOHI," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "IELOLO," "0,1"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "ADCBASE,"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADCBASE,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x310++0x3
|
|
line.long 0x0 "ADCDMASTAT,"
|
|
bitfld.long 0x0 31. "DMAEN," "0,1"
|
|
bitfld.long 0x0 24. "RBF_IEN0," "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "WR_OVF_ERR," "0,1"
|
|
bitfld.long 0x0 16. "RBF0," "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMA_CNT_EN," "0,1"
|
|
bitfld.long 0x0 8. "RAF_IEN0," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RAF0," "0,1"
|
|
endif
|
|
group.long 0x320++0x3
|
|
line.long 0x0 "ADCCNTB,"
|
|
hexmask.long 0x0 0.--31. 1. "ADCCNTB,"
|
|
group.long 0x330++0x3
|
|
line.long 0x0 "ADCDMAB,"
|
|
hexmask.long 0x0 0.--31. 1. "ADDMAB,"
|
|
group.long 0x340++0x3
|
|
line.long 0x0 "ADCTRGSNS,"
|
|
bitfld.long 0x0 7. "LVL7," "0,1"
|
|
bitfld.long 0x0 6. "LVL6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LVL5," "0,1"
|
|
bitfld.long 0x0 4. "LVL4," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "LVL3," "0,1"
|
|
bitfld.long 0x0 2. "LVL2," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LVL1," "0,1"
|
|
bitfld.long 0x0 0. "LVL0," "0,1"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "ADCANCON,"
|
|
hexmask.long.byte 0x0 24.--27. 1. "WKUPCLKCNT,"
|
|
bitfld.long 0x0 23. "WKIEN7," "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "WKIEN0," "0,1"
|
|
bitfld.long 0x0 15. "WKRDY7," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "WKRDY0," "0,1"
|
|
bitfld.long 0x0 7. "ANEN7," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ANEN0," "0,1"
|
|
group.long 0x670++0x3
|
|
line.long 0x0 "ADC7CFG,"
|
|
hexmask.long 0x0 0.--31. 1. "ADC7CFG,"
|
|
group.long 0x700++0x3
|
|
line.long 0x0 "ADCSYSCFG0,"
|
|
bitfld.long 0x0 11. "AN11," "0,1"
|
|
bitfld.long 0x0 10. "AN10," "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AN9," "0,1"
|
|
bitfld.long 0x0 8. "AN8," "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AN7," "0,1"
|
|
bitfld.long 0x0 6. "AN6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AN5," "0,1"
|
|
bitfld.long 0x0 4. "AN4," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AN3," "0,1"
|
|
bitfld.long 0x0 2. "AN2," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AN1," "0,1"
|
|
bitfld.long 0x0 0. "AN0," "0,1"
|
|
group.long 0xA00++0x3
|
|
line.long 0x0 "ADCDATA0,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA10++0x3
|
|
line.long 0x0 "ADCDATA1,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA20++0x3
|
|
line.long 0x0 "ADCDATA2,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA30++0x3
|
|
line.long 0x0 "ADCDATA3,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA40++0x3
|
|
line.long 0x0 "ADCDATA4,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA50++0x3
|
|
line.long 0x0 "ADCDATA5,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA60++0x3
|
|
line.long 0x0 "ADCDATA6,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA70++0x3
|
|
line.long 0x0 "ADCDATA7,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA80++0x3
|
|
line.long 0x0 "ADCDATA8,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xA90++0x3
|
|
line.long 0x0 "ADCDATA9,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xAA0++0x3
|
|
line.long 0x0 "ADCDATA10,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0xAB0++0x3
|
|
line.long 0x0 "ADCDATA11,"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "ADCCON1CLR,Bit clear register"
|
|
line.long 0x4 "ADCCON1SET,Bit set register"
|
|
line.long 0x8 "ADCCON1INV,Bit invert register"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "ADCCON2CLR,Bit clear register"
|
|
line.long 0x4 "ADCCON2SET,Bit set register"
|
|
line.long 0x8 "ADCCON2INV,Bit invert register"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "ADCCON3CLR,Bit clear register"
|
|
line.long 0x4 "ADCCON3SET,Bit set register"
|
|
line.long 0x8 "ADCCON3INV,Bit invert register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "ADCIMOD1CLR,Bit clear register"
|
|
line.long 0x4 "ADCIMOD1SET,Bit set register"
|
|
line.long 0x8 "ADCIMOD1INV,Bit invert register"
|
|
group.long 0x84++0xB
|
|
line.long 0x0 "ADCGIRQEN1CLR,Bit clear register"
|
|
line.long 0x4 "ADCGIRQEN1SET,Bit set register"
|
|
line.long 0x8 "ADCGIRQEN1INV,Bit invert register"
|
|
group.long 0xA4++0xB
|
|
line.long 0x0 "ADCCSS1CLR,Bit clear register"
|
|
line.long 0x4 "ADCCSS1SET,Bit set register"
|
|
line.long 0x8 "ADCCSS1INV,Bit invert register"
|
|
group.long 0xC4++0xB
|
|
line.long 0x0 "ADCDSTAT1CLR,Bit clear register"
|
|
line.long 0x4 "ADCDSTAT1SET,Bit set register"
|
|
line.long 0x8 "ADCDSTAT1INV,Bit invert register"
|
|
group.long 0xE4++0xB
|
|
line.long 0x0 "ADCCMPEN0CLR,Bit clear register"
|
|
line.long 0x4 "ADCCMPEN0SET,Bit set register"
|
|
line.long 0x8 "ADCCMPEN0INV,Bit invert register"
|
|
group.long 0xF4++0xB
|
|
line.long 0x0 "ADCCMP0CLR,Bit clear register"
|
|
line.long 0x4 "ADCCMP0SET,Bit set register"
|
|
line.long 0x8 "ADCCMP0INV,Bit invert register"
|
|
group.long 0x104++0xB
|
|
line.long 0x0 "ADCCMPEN1CLR,Bit clear register"
|
|
line.long 0x4 "ADCCMPEN1SET,Bit set register"
|
|
line.long 0x8 "ADCCMPEN1INV,Bit invert register"
|
|
group.long 0x114++0xB
|
|
line.long 0x0 "ADDCMP1CLR,Bit clear register"
|
|
line.long 0x4 "ADDCMP1SET,Bit set register"
|
|
line.long 0x8 "ADDCMP1INV,Bit invert register"
|
|
group.long 0x1A4++0xB
|
|
line.long 0x0 "ADCFLTR0CLR,Bit clear register"
|
|
line.long 0x4 "ADCFLTR0SET,Bit set register"
|
|
line.long 0x8 "ADCFLTR0INV,Bit invert register"
|
|
group.long 0x1B4++0xB
|
|
line.long 0x0 "ADCFLTR1CLR,Bit clear register"
|
|
line.long 0x4 "ADCFLTR1SET,Bit set register"
|
|
line.long 0x8 "ADCFLTR1INV,Bit invert register"
|
|
group.long 0x204++0xB
|
|
line.long 0x0 "ADCTRG1CLR,Bit clear register"
|
|
line.long 0x4 "ADCTRG1SET,Bit set register"
|
|
line.long 0x8 "ADCTRG1INV,Bit invert register"
|
|
group.long 0x214++0xB
|
|
line.long 0x0 "ADTRG2CLR,Bit clear register"
|
|
line.long 0x4 "ADTRG2SET,Bit set register"
|
|
line.long 0x8 "ADTRG2INV,Bit invert register"
|
|
group.long 0x224++0xB
|
|
line.long 0x0 "ADTRG3CLR,Bit clear register"
|
|
line.long 0x4 "ADTRG3SET,Bit set register"
|
|
line.long 0x8 "ADTRG3INV,Bit invert register"
|
|
group.long 0x284++0xB
|
|
line.long 0x0 "ADCCMPCON1CLR,Bit clear register"
|
|
line.long 0x4 "ADCCMPCON1SET,Bit set register"
|
|
line.long 0x8 "ADCCMPCON1INV,Bit invert register"
|
|
group.long 0x294++0xB
|
|
line.long 0x0 "ADCMPCON2CLR,Bit clear register"
|
|
line.long 0x4 "ADCMPCON2SET,Bit set register"
|
|
line.long 0x8 "ADCMPCON2INV,Bit invert register"
|
|
group.long 0x2E4++0xB
|
|
line.long 0x0 "ADCFSTATCLR,Bit clear register"
|
|
line.long 0x4 "ADCFSTATSET,Bit set register"
|
|
line.long 0x8 "ADCFSTATINV,Bit invert register"
|
|
group.long 0x2F4++0xB
|
|
line.long 0x0 "ADCFIFOCLR,Bit clear register"
|
|
line.long 0x4 "ADCFIFOSET,Bit set register"
|
|
line.long 0x8 "ADCFIFOINV,Bit invert register"
|
|
group.long 0x304++0xB
|
|
line.long 0x0 "ADCBASECLR,Bit clear register"
|
|
line.long 0x4 "ADCBASESET,Bit set register"
|
|
line.long 0x8 "ADCBASEINV,Bit invert register"
|
|
group.long 0x314++0xB
|
|
line.long 0x0 "ADCDMASTATCLR,Bit clear register"
|
|
line.long 0x4 "ADCDMASTATSET,Bit set register"
|
|
line.long 0x8 "ADCDMASTATINV,Bit invert register"
|
|
group.long 0x324++0xB
|
|
line.long 0x0 "ADCCNTBCLR,Bit clear register"
|
|
line.long 0x4 "ADCCNTBSET,Bit set register"
|
|
line.long 0x8 "ADCCNTBINV,Bit invert register"
|
|
group.long 0x334++0xB
|
|
line.long 0x0 "ADCDMABCLR,Bit clear register"
|
|
line.long 0x4 "ADCDMABSET,Bit set register"
|
|
line.long 0x8 "ADCDMABINV,Bit invert register"
|
|
group.long 0x344++0xB
|
|
line.long 0x0 "ADCTRGSNSCLR,Bit clear register"
|
|
line.long 0x4 "ADCTRGSNSSET,Bit set register"
|
|
line.long 0x8 "ADCTRGSNSINV,Bit invert register"
|
|
group.long 0x354++0xB
|
|
line.long 0x0 "ADC0TIMECLR,Bit clear register"
|
|
line.long 0x4 "ADC0TIMESET,Bit set register"
|
|
line.long 0x8 "ADC0TIMEINV,Bit invert register"
|
|
group.long 0x3E4++0xB
|
|
line.long 0x0 "ADCEISTAT1CLR,Bit clear register"
|
|
line.long 0x4 "ADCEISTAT1SET,Bit set register"
|
|
line.long 0x8 "ADCEISTAT1INV,Bit invert register"
|
|
group.long 0x404++0xB
|
|
line.long 0x0 "ADCANLCTLCLR,Bit clear register"
|
|
line.long 0x4 "ADCANLCTLSET,Bit set register"
|
|
line.long 0x8 "ADCANLCTLINV,Bit invert register"
|
|
group.long 0x674++0xB
|
|
line.long 0x0 "ADCFGSHRCLR,Bit clear register"
|
|
line.long 0x4 "ADCFGSHRSET,Bit set register"
|
|
line.long 0x8 "ADCFGSHRINV,Bit invert register"
|
|
group.long 0x684++0xB
|
|
line.long 0x0 "ADCSVCONCLR,Bit clear register"
|
|
line.long 0x4 "ADCSVCONSET,Bit set register"
|
|
line.long 0x8 "ADCSVCONINV,Bit invert register"
|
|
group.long 0x704++0xB
|
|
line.long 0x0 "ADCSYSCFG0CLR,Bit clear register"
|
|
line.long 0x4 "ADCSYSCFG0SET,Bit set register"
|
|
line.long 0x8 "ADCSYSCFG0INV,Bit invert register"
|
|
tree.end
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
tree "AES (Advanced Encryption Standard)"
|
|
base ad:0x42000400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CTYPE,Counter Measure Type"
|
|
bitfld.long 0x0 14. "XORKEY,XOR Key Operation" "0: No effect,1: The user keyword gets XORed with the previous.."
|
|
newline
|
|
bitfld.long 0x0 13. "KEYGEN,Last Key Generation" "0: No effect,1: Start Computation of the last NK words of the.."
|
|
bitfld.long 0x0 12. "LOD,Last Output Data Mode" "0: No effect,1: Start encryption in Last Output Data mode"
|
|
newline
|
|
bitfld.long 0x0 11. "STARTMODE,Start Mode Select" "0: Start Encryption / Decryption in Manual mode,1: Start Encryption / Decryption in Auto mode"
|
|
bitfld.long 0x0 10. "CIPHER,Cipher Mode" "0: Decryption,1: Encryption"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "KEYSIZE,Encryption Key Size" "0: 128-bit Key for Encryption / Decryption,1: 192-bit Key for Encryption / Decryption,2: 256-bit Key for Encryption / Decryption,?"
|
|
bitfld.long 0x0 5.--7. "CFBS,Cipher Feedback Block Size" "0: 128-bit Input data block for..,1: 64-bit Input data block for..,2: 32-bit Input data block for..,3: 16-bit Input data block for..,4: 8-bit Input data block for Encryption/Decryption..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "AESMODE,AES Modes of operation" "0: Electronic code book mode,1: Cipher block chaining mode,2: Output feedback mode,3: Cipher feedback mode,4: Counter mode,5: CCM mode,6: Galois counter mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x5
|
|
line.byte 0x0 "CTRLB,Control B"
|
|
bitfld.byte 0x0 3. "GFMUL,GF Multiplication" "0,1"
|
|
bitfld.byte 0x0 2. "EOM,End of message" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "NEWMSG,New message" "0,1"
|
|
bitfld.byte 0x0 0. "START,Start Encryption/Decryption" "0,1"
|
|
line.byte 0x1 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x1 1. "GFMCMP,GF Multiplication Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "ENCCMP,Encryption Complete Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x2 1. "GFMCMP,GF Multiplication Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x2 0. "ENCCMP,Encryption Complete Interrupt Enable" "0,1"
|
|
line.byte 0x3 "INTFLAG,Interrupt Flag Status"
|
|
bitfld.byte 0x3 1. "GFMCMP,GF Multiplication Complete" "0,1"
|
|
bitfld.byte 0x3 0. "ENCCMP,Encryption Complete" "0,1"
|
|
line.byte 0x4 "DATABUFPTR,Data buffer pointer"
|
|
bitfld.byte 0x4 0.--1. "INDATAPTR,Input Data Pointer" "0,1,2,3"
|
|
line.byte 0x5 "DBGCTRL,Debug control"
|
|
bitfld.byte 0x5 0. "DBGRUN,Debug Run" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "KEYWORD[$1],Keyword n"
|
|
repeat.end
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "INDATA,Indata"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x3C)++0x3
|
|
line.long 0x0 "INTVECTV[$1],Initialisation Vector n"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x5C)++0x3
|
|
line.long 0x0 "HASHKEY[$1],Hash key n"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x6C)++0x3
|
|
line.long 0x0 "GHASH[$1],Galois Hash n"
|
|
repeat.end
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "CIPLEN,Cipher Length"
|
|
line.long 0x4 "RANDSEED,Random Seed"
|
|
tree.end
|
|
endif
|
|
tree "ARB (Radio Arbiter)"
|
|
base ad:0x41011000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "BT_CTRL,"
|
|
bitfld.long 0x0 9. "ALLOW_OPT_TX_BT,BT allow optimistic tx" "0,1"
|
|
bitfld.long 0x0 8. "ALLOW_OPT_RX_BT,BT allow optimistic rx" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MAX_ABORT_TIME_BT,BT max abort time"
|
|
line.long 0x4 "ZB_CTRL,"
|
|
bitfld.long 0x4 9. "ALLOW_OPT_TX_ZB,ZB allow optimistic tx" "0,1"
|
|
bitfld.long 0x4 8. "ALLOW_OPT_RX_ZB,ZB allow optimistic rx" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "MAX_ABORT_TIME_ZB,ZB max abort time"
|
|
line.long 0x8 "EVENT_CTRL,"
|
|
bitfld.long 0x8 10. "ABORT_IN_STATIC_MODE," "0,1"
|
|
bitfld.long 0x8 8.--9. "RESOLVE_EQUAL_PRIO," "0,1,2,3"
|
|
bitfld.long 0x8 7. "DELAYED_OK_TASKS_DONT_WAIT," "0,1"
|
|
bitfld.long 0x8 6. "USE_PRIO_AS_EVENT," "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "USE_START_TIME_AS_EVENT," "0,1"
|
|
bitfld.long 0x8 4. "USE_END_TIME_AS_EVENT," "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "START_TIME_ALLOWANCE,minimum change needed in the start time to be considered as an arbitration event."
|
|
line.long 0xC "CORE_CTRL,"
|
|
hexmask.long.word 0xC 16.--31. 1. "RAD_ARB_TIMEOUT,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 11.--15. 1. "RESERVED_1,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 11.--15. 1. "RESERVED_1,"
|
|
endif
|
|
bitfld.long 0xC 9.--10. "ARB_TESTBUS_BYTE_SELECT," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "AD_ARB_SOFT_RESET," "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 4.--7. 1. "CFG_CDC_ADJ_VAL,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 4.--7. 1. "CFG_CDC_ADJ_VAL,"
|
|
endif
|
|
bitfld.long 0xC 2.--3. "TESTBUS_SELECT," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 0.--1. "RADIO_ARB_MODE," "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CORE_STATUS,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 7.--10. 1. "CUR_REQ_PRI,"
|
|
bitfld.long 0x0 5.--6. "CUR_RADIO_OWNER," "0,1,2,3"
|
|
bitfld.long 0x0 3.--4. "NEXT_RADIO_OWNER," "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 7.--10. 1. "CUR_REQ_PRI,"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "CUR_RADIO_OWNER," "0,1,2,3"
|
|
bitfld.long 0x0 3.--4. "NEXT_RADIO_OWNER," "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.byte 0x0 5.--8. 1. "CUR_REQ_PRI,"
|
|
bitfld.long 0x0 3.--4. "CUR_RADIO_OWNER," "0,1,2,3"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 0.--2. "ARB_CORE_STATE," "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "INT_STATUS,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 7. "ARB_IDLE," "0,1"
|
|
bitfld.long 0x0 6. "COLLISION_PREDICTED," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 7. "ARB_IDLE," "0,1"
|
|
bitfld.long 0x0 6. "COLLISION_PREDICTED," "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 5. "ZB_TIMESENSE_REQ_LOSS," "0,1"
|
|
bitfld.long 0x0 4. "BT_TIMESENSE_REQ_LOSS," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ZB_RADIO_TO_ABRT," "0,1"
|
|
bitfld.long 0x0 2. "BT_RADIO_TO_ABRT," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ZB_ABORT_HIBT," "0,1"
|
|
bitfld.long 0x0 0. "BT_ABORT_HIZB," "0,1"
|
|
line.long 0x4 "INT_MASK,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 7. "ARB_IDLE_MSK," "0,1"
|
|
bitfld.long 0x4 6. "COLLISION_PREDICTED_MSK," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 7. "ARB_IDLE_MSK," "0,1"
|
|
bitfld.long 0x4 6. "COLLISION_PREDICTED_MSK," "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x4 5. "ZB_TIMESENSE_REQ_LOSS_MSK," "0,1"
|
|
bitfld.long 0x4 4. "BT_TIMESENSE_REQ_LOSS_MSK," "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ZB_RADIO_TO_ABRT_MSK," "0,1"
|
|
bitfld.long 0x4 2. "BT_RADIO_TO_ABRT_MSK," "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ZB_ABORT_HIBT_MSK," "0,1"
|
|
bitfld.long 0x4 0. "BT_ABORT_HIZB_MSK," "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INT_STATUS,"
|
|
bitfld.long 0x0 5. "ZB_TIMESENSE_REQ_LOSS," "0,1"
|
|
bitfld.long 0x0 4. "BT_TIMESENSE_REQ_LOSS," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ZB_RADIO_TO_ABRT," "0,1"
|
|
bitfld.long 0x0 2. "BT_RADIO_TO_ABRT," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ZB_ABORT_HIBT," "0,1"
|
|
bitfld.long 0x0 0. "BT_ABORT_HIZB," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INT_STATUS,"
|
|
bitfld.long 0x0 5. "ZB_TIMESENSE_REQ_LOSS," "0,1"
|
|
bitfld.long 0x0 4. "BT_TIMESENSE_REQ_LOSS," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ZB_RADIO_TO_ABRT," "0,1"
|
|
bitfld.long 0x0 2. "BT_RADIO_TO_ABRT," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ZB_ABORT_HIBT," "0,1"
|
|
bitfld.long 0x0 0. "BT_ABORT_HIZB," "0,1"
|
|
endif
|
|
tree.end
|
|
tree "BLE (Bluetooth Low Energy)"
|
|
base ad:0x41012000
|
|
group.word 0x4B8++0x3
|
|
line.word 0x0 "DPLL_RG1,"
|
|
hexmask.word 0x0 0.--15. 1. "DPLL_RG1BITS,"
|
|
line.word 0x2 "DPLL_RG2,"
|
|
hexmask.word 0x2 0.--15. 1. "DPLL_RG2BITS,"
|
|
tree.end
|
|
tree "CCL (Configurable Custom Logic)"
|
|
base ad:0x42001800
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "CTRL,Control"
|
|
bitfld.byte 0x0 6. "RUNSTDBY,Run in Standby" "0: Generic clock is not required in standby sleep..,1: Generic clock is required in standby sleep mode"
|
|
bitfld.byte 0x0 1. "ENABLE,Enable" "0: The peripheral is disabled,1: The peripheral is enabled"
|
|
newline
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0: The peripheral is not reset,1: The peripheral is reset"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x4)++0x0
|
|
line.byte 0x0 "SEQCTRL[$1],SEQ Control x"
|
|
hexmask.byte 0x0 0.--3. 1. "SEQSEL,Sequential Selection"
|
|
repeat.end
|
|
endif
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "LUTCTRL[$1],LUT Control x"
|
|
hexmask.long.byte 0x0 24.--31. 1. "TRUTH,Truth Value"
|
|
bitfld.long 0x0 22. "LUTEO,LUT Event Output Enable" "0: LUT event output is disabled,1: LUT event output is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "LUTEI,LUT Event Input Enable" "0: LUT incoming event is disabled,1: LUT incoming event is enabled"
|
|
bitfld.long 0x0 20. "INVEI,Inverted Event Input Enable" "0: Incoming event is not inverted,1: Incoming event is inverted"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "INSEL2,Input Selection 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "INSEL1,Input Selection 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "INSEL0,Input Selection 0"
|
|
bitfld.long 0x0 7. "EDGESEL,Edge Selection" "0: Edge detector is disabled,1: Edge detector is enabled"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "FILTSEL,Filter Selection" "0: Filter disabled,1: Synchronizer enabled,2: Filter enabled,?"
|
|
bitfld.long 0x0 1. "ENABLE,LUT Enable" "0: LUT block is disabled,1: LUT block is enabled"
|
|
repeat.end
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.byte (0x0+0x4)++0x0
|
|
line.byte 0x0 "SEQCTRL[0],SEQ Control 0"
|
|
hexmask.byte 0x0 0.--3. 1. "SEQSEL,Sequential Selection"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "LUTCTRL[$1],LUT Control x"
|
|
hexmask.long.byte 0x0 24.--31. 1. "TRUTH,Truth Value"
|
|
bitfld.long 0x0 22. "LUTEO,LUT Event Output Enable" "0: LUT event output is disabled,1: LUT event output is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "LUTEI,LUT Event Input Enable" "0: LUT incoming event is disabled,1: LUT incoming event is enabled"
|
|
bitfld.long 0x0 20. "INVEI,Inverted Event Input Enable" "0: Incoming event is not inverted,1: Incoming event is inverted"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "INSEL2,Input Selection 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "INSEL1,Input Selection 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "INSEL0,Input Selection 0"
|
|
bitfld.long 0x0 7. "EDGESEL,Edge Selection" "0: Edge detector is disabled,1: Edge detector is enabled"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "FILTSEL,Filter Selection" "0: Filter disabled,1: Synchronizer enabled,2: Filter enabled,?"
|
|
bitfld.long 0x0 1. "ENABLE,LUT Enable" "0: LUT block is disabled,1: LUT block is enabled"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.byte (0x0+0x4)++0x0
|
|
line.byte 0x0 "SEQCTRL[0],SEQ Control 0"
|
|
hexmask.byte 0x0 0.--3. 1. "SEQSEL,Sequential Selection"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "LUTCTRL[$1],LUT Control x"
|
|
hexmask.long.byte 0x0 24.--31. 1. "TRUTH,Truth Value"
|
|
bitfld.long 0x0 22. "LUTEO,LUT Event Output Enable" "0: LUT event output is disabled,1: LUT event output is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "LUTEI,LUT Event Input Enable" "0: LUT incoming event is disabled,1: LUT incoming event is enabled"
|
|
bitfld.long 0x0 20. "INVEI,Inverted Event Input Enable" "0: Incoming event is not inverted,1: Incoming event is inverted"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "INSEL2,Input Selection 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "INSEL1,Input Selection 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "INSEL0,Input Selection 0"
|
|
bitfld.long 0x0 7. "EDGESEL,Edge Selection" "0: Edge detector is disabled,1: Edge detector is enabled"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "FILTSEL,Filter Selection" "0: Filter disabled,1: Synchronizer enabled,2: Filter enabled,?"
|
|
bitfld.long 0x0 1. "ENABLE,LUT Enable" "0: LUT block is disabled,1: LUT block is enabled"
|
|
repeat.end
|
|
endif
|
|
tree.end
|
|
tree "CFG (System Configuration and Register Locking)"
|
|
base ad:0x44000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CFGCON0,"
|
|
bitfld.long 0x0 30. "FRECCDIS,Flex RAM ECC Control" "0,1"
|
|
bitfld.long 0x0 28.--29. "FECCCON,Flash ECC Control" "0,1,2,3"
|
|
bitfld.long 0x0 26. "INT0P,INT0P Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "INT0E,INT0 Enable" "0,1"
|
|
bitfld.long 0x0 24. "PCM,PCHE I/D Cacheable Mode" "0,1"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 23. "SLRTEN2,SLRT Enable for SERCOM2" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 23. "SLRTEN2,SLRT Enable for SERCOM2" "0,1"
|
|
endif
|
|
bitfld.long 0x0 22. "SLRTEN1,SLRT Enable for SERCOM1" "0,1"
|
|
bitfld.long 0x0 21. "SLRTEN0,SLRT Enable for SERCOM0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "HPLUGDIS,Hot Plugging Disable" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 19. "SMBUSEN2,SMBus Enable for SERCOM2" "0,1"
|
|
endif
|
|
bitfld.long 0x0 18. "SMBUSEN1,SMBus Enable for SERCOM1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SMBUSEN0,SMBus Enable for SERCOM0" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 16. "VBCMODE,VBC Operating Mode" "0,1"
|
|
bitfld.long 0x0 0. "TDOEN,TDO enable for 2-wire JTAG" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 14.--15. "CFGCLOCK,Configuration Register Lock" "0,1,2,3"
|
|
bitfld.long 0x0 13. "IOLOCK,IO LOCK" "0,1"
|
|
bitfld.long 0x0 12. "PMDLOCK,Peripheral Module Disable (PMD) LOCK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PGLCOK,Permission Group LOCK" "0,1"
|
|
bitfld.long 0x0 10. "PMULOCK,PMU Controller Register LOCK" "0,1"
|
|
bitfld.long 0x0 9. "RTCOUT_ALTEN,RTCOUT Alternate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RTCIN0_ALTEN,RTCIN0 Alternate Enable" "0,1"
|
|
bitfld.long 0x0 7. "CPENFILT,ADC CP Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "ACCMP1_ALTEN,AC CMP1 Alternate Enable" "0,1"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
bitfld.long 0x0 5. "GPSOSCE,GPIO/SOSC Enable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 4. "ADCPOVR,ADC Charge Pump Override" "0,1"
|
|
bitfld.long 0x0 3. "JTAGEN,JTAG Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TROEN,Trace Output Enable" "0,1"
|
|
bitfld.long 0x0 1. "SWOEN,SWO enable on 2-wire debug interface" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CFGCON1,"
|
|
bitfld.long 0x0 30. "CLKZBREF,External Reference Clock ZB Enable" "0,1"
|
|
bitfld.long 0x0 29. "QSPIDDRM,QSPI DDR Mode Clock Enable" "0,1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "WDTPSS,Watchdog Timer Post-scale Select Sleep"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 23. "I2CDSEL2,I2C Delay Select for SERCOM2" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 23. "I2CDSEL2,I2C Delay Select for SERCOM2" "0,1"
|
|
endif
|
|
bitfld.long 0x0 22. "I2CDSEL1,I2C Delay Select for SERCOM1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "I2CDSEL0,I2C Delay Select for SERCOM0" "0,1"
|
|
bitfld.long 0x0 20. "CCL_OE,CCL Pads (via PPS) Output Enable" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 19. "SCOM2_HSEN,SERCOM2 (Direct)High Speed Pin Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 18. "SCOM1_HSEN,SERCOM1 (Direct)High Speed Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SCOM0_HSEN,SERCOM0 (Direct)High Speed Pin Enable" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 16. "QSPI_HSEN,QSPI (Direct) Enable" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 16. "QSPI_HSEN,QSPI (Direct) Enable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 16. "QSPI_HSEN,QSPI (Direct) Enable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 15. "QSCHE_EN,QSPI Address Space Cache Attribute" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SMCLR,Selects CRU handling of MCLR Control" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 13. "SLRCTRL2,I2C Slew Rate Control for SERCOM2" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 13. "SLRCTRL2,I2C Slew Rate Control for SERCOM2" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 12. "SLRCTRL1,I2C Slew Rate Control for SERCOM1" "0,1"
|
|
bitfld.long 0x0 11. "SLRCTRL0,I2C Slew Rate Control for SERCOM0" "0,1"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 10. "CLASSBDIS,Disable CLASSB Device Functionality" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "ICESEL,EMUC/EMUD Communication Channel Select" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "DEBUG,Background Debugger Access Selection" "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x0 9. "CMP1_OE,Analog Comparator-1 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CMP0_OE,Analog Comparator-0 Output Enable" "0,1"
|
|
bitfld.long 0x0 7. "ZBTWKSYS,ZBT Subsystem External Wake-up source" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 6. "ECC_SEL_MEM,ECC row selection bit" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 6. "ECC_SEL_MEM,ECC row selection bit" "0,1"
|
|
endif
|
|
bitfld.long 0x0 5. "TRCEN,Trace Enable" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CFGCON2,"
|
|
bitfld.long 0x0 31. "DMTEN,Dead Man Timer Enable" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "DMTCNT,Dead Man Timer Count Select"
|
|
bitfld.long 0x0 24.--25. "WDTWINSZ,Watchdog Timer Window Size" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 23. "WDTEN,Watchdog Timer Enable" "0,1"
|
|
bitfld.long 0x0 22. "WINDIS,Windowed Watchdog Timer Disable" "0,1"
|
|
bitfld.long 0x0 21. "WDTSPGM,Watchdog Timer Stop during Flash Programming" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "WDTPSR,Watchdog Timer Post-scale Select Run"
|
|
bitfld.long 0x0 15. "FSCMEN,Fail-Safe Clock Monitor Enable" "0,1"
|
|
bitfld.long 0x0 14. "CKSWEN,Software Clock Switching Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "WAKE2SPD,2-Speed startup enabled in Sleep mode" "0,1"
|
|
bitfld.long 0x0 12. "SOSCSEL,SOSC Selection Configuration" "0,1"
|
|
bitfld.long 0x0 10.--11. "WDTRMCS,WDT RUN Mode Clock Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "POSCMOD,Primary Oscillator Configuration" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PMUTEST_VDD_EN,PMU Test Output or VDD/2 Enable via ADC IE12" "0,1"
|
|
bitfld.long 0x0 3.--5. "DMTINTV,Dead Man Timer Count Window Interval" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ACMP_CYCLE,AC SIB Comparator Result Wait Cycles" "0,1,2,3,4,5,6,7"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CFGCON4,"
|
|
bitfld.long 0x0 31. "RTCNTM_CSEL,RTC Counter Mode Clock Select" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 30. "LPOSCEN,Low Power (Secondary) Oscillator Enable" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 30. "LPOSCEN,Low Power (Secondary) Oscillator Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 29. "UVREGROVR,ULPVREG Retention Mode Override" "0,1"
|
|
bitfld.long 0x0 28. "DSEN,Deep Sleep Bit Enable" "0,1"
|
|
bitfld.long 0x0 27. "DSWDTEN,Deep Sleep Watchdog Timer Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DSWDTOSC,Deep Sleep Watchdog Timer Reference Clock Select" "0,1"
|
|
hexmask.long.byte 0x0 21.--25. 1. "DSWDTPS,Deep Sleep Watchdog Timer Postscale Select"
|
|
bitfld.long 0x0 20. "DSZPBOREN,Deep Sleep Zero-Power BOR Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17.--19. "CPEN_DLY,Charge-pump ready digital delay" "0,1,2,3,4,5,6,7"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 16. "RTCEFTYPE,RTC Event Type" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SOSCCFG,SOSC Configuration"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 16. "RTCEVTYPE,RTC Event Type" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 16. "RTCEVTYPE,RTC Event Type" "0,1"
|
|
endif
|
|
bitfld.long 0x0 15. "LPCLK_MOD,LPCLK modifier in counter/delay mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "VBKP_DIVSEL,VDDBUKPCORE LPCLK Clock Divider Selection" "0,1"
|
|
bitfld.long 0x0 12.--13. "VBKP_32KCSEL,VDDBUKPCORE 32KHz clock source selection" "0,1,2,3"
|
|
bitfld.long 0x0 11. "VBKP_1KCSEL,VDDBUKPCORE LPCLK Clock Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "RTCEVENT_EN,Pad Output Enable for MCHP legacy RTC event output" "0,1"
|
|
bitfld.long 0x0 8.--9. "RTCEVENT_SEL,RTC Event Selection" "0,1,2,3"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--7. 1. "SOSC_CFG,SOSC Configuration"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--7. 1. "SOSC_CFG,SOSC Configuration"
|
|
endif
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CFGPGQOS,"
|
|
bitfld.long 0x0 30.--31. "WISIBQOS,Wireless SIB QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "FCQOS,FC Controller QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "DSUPG,DSU Permission Group" "0,1,2,3"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 22.--23. "ICMQOS,ICM QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "ICMPG,ICM Permission Group" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "ADCQOS,ADC Controller QOS Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ADCPG,ADC Controller Permission Group" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "ICDJQOS,ICD-JTAG Bus QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "ICDJPG,ICD-JTAG Permission Group" "0,1,2,3"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 22.--23. "CRYPTOQOS,Crypto QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "CRYPTOPG,Crypto Permission Group" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "DGISPIQOS,ADC Controller QOS Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "DGISPIPG,ADC Controller Permission Group" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 22.--23. "CRYPTOQOS,Crypto QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "CRYPTOPG,Crypto Permission Group" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "DGISPIQOS,ADC Controller QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "DGISPIPG,ADC Controller Permission Group" "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x0 8.--9. "DMAPG,DMA (Rd/Wr) Permission Group" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CPUQOS,CPU I/D and System Bus QOS Control" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CPUPG,CPU (Code) Permission Group" "0,1,2,3"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "CFGPCLKGEN1,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 31. "CM4TD,CM4T Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 27. "TC23CD,TC2/3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 24.--26. "TC23CSEL,TC2/3 Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 15. "S01CD,SERCOM0/1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 11. "MCD,FREQMMC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 7. "RCD,FREQMRC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 31. "CM4TCD,CM4T Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 31. "CM4TCD,CM4T Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 28.--30. "CM4TCSEL,CM4T Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 23. "TCC12CD,TCC1/2 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 20.--22. "TCC12CSEL,TCC1/2 Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 19. "S23CD,SERCOM2/3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "SERCOM23CSEL,SERCOM2/3 Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 19. "SERCOM2CD,SERCOM2/3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 16.--18. "SERCOM2CSEL,SERCOM2/3 Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 15. "SERCOM01CD,SERCOM0/1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 15. "SERCOM01CD,SERCOM0/1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 12.--14. "SERCOM01CSEL,SERCOM0/1 Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 11. "FREQMMCD,FREQMMC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 11. "FREQMMCD,FREQMMC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 8.--10. "FREQMMCSEL,FREQMMC Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 7. "FREQMRCD,FREQMRC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 7. "FREQMRCD,FREQMRC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 4.--6. "FREQMRCSEL,FREQMRC Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 3. "EICCD,EIC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 0.--2. "EICCSEL,EIC Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CFGPCLKGEN2,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 31. "C8D,C8D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 27. "C7D,C7D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 23. "C6D,EVSYSC6 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
bitfld.long 0x0 19. "C5D,EVSYSC5 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 15. "C4D,EVSYSC4 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 11. "C3D,EVSYSC3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
bitfld.long 0x0 7. "C2D,EVSYSC2 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 3. "C1D,EVSYSC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 31. "EVSYSC8CD,EVSYSC8 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 31. "EVSYSC8CD,EVSYSC8 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 28.--30. "EVSYSC8SEL,EVSYSC8 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 27. "EVSYSC7CD,EVSYSC7 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 27. "EVSYSC7CD,EVSYSC7 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 24.--26. "EVSYSC7SEL,EVSYSC7 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 23. "EVSYSC6CD,EVSYSC6 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 23. "EVSYSC6CD,EVSYSC6 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 20.--22. "EVSYSC6SEL,EVSYSC6 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 19. "EVSYSC5CD,EVSYSC5 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 19. "EVSYSC5CD,EVSYSC5 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 16.--18. "EVSYSC5SEL,EVSYSC5 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 15. "EVSYSC4CD,EVSYSC4 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 15. "EVSYSC4CD,EVSYSC4 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 12.--14. "EVSYSC4SEL,EVSYSC4 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 11. "EVSYSC3CD,EVSYSC3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 11. "EVSYSC3CD,EVSYSC3 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 8.--10. "EVSYSC3SEL,EVSYSC3 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 7. "EVSYSC2CD,EVSYSC2 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 7. "EVSYSC2CD,EVSYSC2 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 4.--6. "EVSYSC2SEL,EVSYSC2 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 3. "EVSYSC1CD,EVSYSC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 3. "EVSYSC1CD,EVSYSC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 0.--2. "EVSYSC1SEL,EVSYSC1 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "CFGPCLKGEN3,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 31. "TC1CD,TC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 28.--30. "TC1CSEL,TC1 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
bitfld.long 0x0 27. "TC0CD,TC0 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
bitfld.long 0x0 24.--26. "TC0CSEL,TC0 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
bitfld.long 0x0 16.--18. "ACCLKSEL,AC Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
bitfld.long 0x0 15. "C12D,C12D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
bitfld.long 0x0 11. "C11D,C11D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 7. "C10D,C10D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 3. "C9D,C9D Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 23. "TCC0CD,TCC0 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 20.--22. "TCC0CSEL,TCC0 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
bitfld.long 0x0 19. "ACCD,AC Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 16.--18. "ACCSEL,AC Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
bitfld.long 0x0 15. "EVSYSC12CD,EVSYSC12 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 16.--18. "ACCSEL,AC Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 15. "EVSYSC12CD,EVSYSC12 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 12.--14. "EVSYSC12SEL,EVSYSC12 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 11. "EVSYSC11CD,EVSYSC11 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 11. "EVSYSC11CD,EVSYSC11 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 8.--10. "EVSYSC11SEL,EVSYSC11 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 7. "EVSYSC10CD,EVSYSC10 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 7. "EVSYSC10CD,EVSYSC10 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 4.--6. "EVSYSC10SEL,EVSYSC10 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 3. "EVSYSC9CD,EVSYSC9 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 3. "EVSYSC9CD,EVSYSC9 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
endif
|
|
bitfld.long 0x0 0.--2. "EVSYSC9SEL,EVSYSC9 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x0 "ID,Device ID"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x90++0xF
|
|
line.long 0x0 "CFGPCLKGEN4,"
|
|
bitfld.long 0x0 19. "TC67CD,TC67CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 16.--18. "TC67CSEL,TC67CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 15. "TC54CD,TC54CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 12.--14. "TC54CSEL,TC54CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 11. "TC23CD,TC23CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 8.--10. "TC23CSEL,TC23CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 7. "TC1CD,TC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 4.--6. "TC1CSEL,TC1 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 3. "TC0CD,TC0 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 0.--2. "TC0CSEL,TC0 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
line.long 0x4 "CFGPCLKGEN4CLR,Bit clear register"
|
|
line.long 0x8 "CFGPCLKGEN4SET,Bit set register"
|
|
line.long 0xC "CFGPCLKGEN4INV,Bit invert register"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x90++0xF
|
|
line.long 0x0 "CFGPCLKGEN4,"
|
|
bitfld.long 0x0 19. "TC67CD,TC67CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 16.--18. "TC67CSEL,TC67CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 15. "TC54CD,TC54CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 12.--14. "TC54CSEL,TC54CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 11. "TC23CD,TC23CD Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 8.--10. "TC23CSEL,TC23CSEL Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 7. "TC1CD,TC1 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 4.--6. "TC1CSEL,TC1 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
newline
|
|
bitfld.long 0x0 3. "TC0CD,TC0 Clock Disable" "0: Disable PGCLK,1: Enable PGCLK"
|
|
bitfld.long 0x0 0.--2. "TC0CSEL,TC0 Peripheral Clock Selection" "0: No Clock,1: Reference Clock 1,2: Reference Clock 2,3: Reference Clock 3,4: Reference Clock 4,5: Reference Clock 5,6: Reference Clock 6,7: 32 KHz Low Power Clock"
|
|
line.long 0x4 "CFGPCLKGEN4CLR,Bit clear register"
|
|
line.long 0x8 "CFGPCLKGEN4SET,Bit set register"
|
|
line.long 0xC "CFGPCLKGEN4INV,Bit invert register"
|
|
endif
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "USER_ID,"
|
|
hexmask.long.word 0x0 0.--15. 1. "USER_ID,User unique ID readable using the JTAG USER_ID instruction"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "SYSKEY,"
|
|
hexmask.long 0x0 0.--31. 1. "SYSKEY,System Key"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "PMD1,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 29. "SQIMD,SQI Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 29. "QSPIMD,SQI Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 29. "QSPIMD,SQI Module Disable" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 23. "DGISPIMD,DGI SPI Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 23. "DGISPIMD,DGI SPI Module Disable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 16. "RTCCMD,RTCC Module Disable" "0,1"
|
|
newline
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 9. "CVDMD,Shared ADC SAR Core Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 9. "CVDMD,Shared ADC SAR Core Module Disable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 8. "ADCSARMD,Shared ADC SAR Core Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ADCMD,ADC Controller Module Disable" "0,1"
|
|
bitfld.long 0x0 6. "ACMD,AC Module Disable" "0,1"
|
|
bitfld.long 0x0 4. "PLVDMD,PLVD Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "LPAMD,RF LPA Module Disable" "0,1"
|
|
bitfld.long 0x0 2. "MPAMD,RF MPA Module Disable" "0,1"
|
|
bitfld.long 0x0 1. "BTMD,Bluetooth Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ZBMD,ZigBee Module Disable" "0,1"
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "PMD2,"
|
|
bitfld.long 0x0 31. "REFO4MD,Reference (Clock) Out 4 Module Disable" "0,1"
|
|
bitfld.long 0x0 30. "REFO3MD,Reference (Clock) Out 3 Module Disable" "0,1"
|
|
bitfld.long 0x0 29. "REFO2MD,Reference (Clock) Out 2 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "REFO1MD,Reference (Clock) Out 1 Module Disable" "0,1"
|
|
bitfld.long 0x0 25. "REFO6MD,Reference (Clock) Out 6 Module Disable" "0,1"
|
|
bitfld.long 0x0 24. "REFO5MD,Reference (Clock) Out 5 Module Disable" "0,1"
|
|
group.long 0xE0++0x3
|
|
line.long 0x0 "PMD3,"
|
|
bitfld.long 0x0 14. "TCC2MD,TCC2 Module Disable" "0,1"
|
|
bitfld.long 0x0 13. "TCC1MD,TCC1 Module Disable" "0,1"
|
|
bitfld.long 0x0 12. "TCC0MD,TCC0 Module Disable" "0,1"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 11. "TC3MD,TC3 Module Disable" "0,1"
|
|
bitfld.long 0x0 10. "TC2MD,TC2 Module Disable" "0,1"
|
|
bitfld.long 0x0 9. "TC1MD,TC1 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TC0MD,TC0 Module Disable" "0,1"
|
|
bitfld.long 0x0 7. "AESMD,AES Module Disable" "0,1"
|
|
bitfld.long 0x0 6. "RNGMD,TRNG Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PUKCCMD,PUKCC Module Disable" "0,1"
|
|
bitfld.long 0x0 4. "ICMMD,ICM Module Disable" "0,1"
|
|
bitfld.long 0x0 1. "SER2MD,SERCOM2 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SER1MD,SERCOM1 Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 11. "TC7MD,TC7 Module Disable" "0,1"
|
|
bitfld.long 0x0 10. "TC6MD,TC6 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TC5MD,TC5 Module Disable" "0,1"
|
|
bitfld.long 0x0 8. "TC4MD,TC4 Module Disable" "0,1"
|
|
bitfld.long 0x0 7. "TC3MD,TC3 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TC2MD,TC2 Module Disable" "0,1"
|
|
bitfld.long 0x0 5. "TC1MD,TC1 Module Disable" "0,1"
|
|
bitfld.long 0x0 4. "TC0MD,TC0 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DACMD,DAC Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 11. "TC7MD,TC7 Module Disable" "0,1"
|
|
bitfld.long 0x0 10. "TC6MD,TC6 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TC5MD,TC5 Module Disable" "0,1"
|
|
bitfld.long 0x0 8. "TC4MD,TC4 Module Disable" "0,1"
|
|
bitfld.long 0x0 7. "TC3MD,TC3 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TC2MD,TC2 Module Disable" "0,1"
|
|
bitfld.long 0x0 5. "TC1MD,TC1 Module Disable" "0,1"
|
|
bitfld.long 0x0 4. "TC0MD,TC0 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DACMD,DAC Module Disable" "0,1"
|
|
bitfld.long 0x0 2. "SER2MD,SERCOM2 Module Disable" "0,1"
|
|
bitfld.long 0x0 1. "SER1MD,SERCOM1 Module Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SER0MD,SERCOM0 Module Disable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 3. "SER4MD,SERCOM4 Module Disable" "0,1"
|
|
bitfld.long 0x0 2. "SER3MD,SERCOM3 Module Disable" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 1. "SER1MD,SERCOM1 Module Disable" "0,1"
|
|
bitfld.long 0x0 0. "SER0MD,SERCOM0 Module Disable" "0,1"
|
|
endif
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "MISCSTAT,"
|
|
bitfld.long 0x0 9. "CLDORDY,CLDO Ready" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "ID,Device ID"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "ID,Device ID"
|
|
endif
|
|
rgroup.long 0x200++0x3
|
|
line.long 0x0 "BCFG0,"
|
|
bitfld.long 0x0 31. "BINFOVALID0,First 256-bit BCFG information Valid" "0,1"
|
|
bitfld.long 0x0 29. "SIGN,Flash SIGN" "0,1"
|
|
bitfld.long 0x0 28. "CP,Boot Code Protect" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PCSCMODE,PCHE Single cache Mode" "0,1"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "CFGCON0CLR,Bit clear register"
|
|
line.long 0x4 "CFGCON0SET,Bit set register"
|
|
line.long 0x8 "CFGCON0INV,Bit invert register"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CFGCON1CLR,Bit clear register"
|
|
line.long 0x4 "CFGCON1SET,Bit set register"
|
|
line.long 0x8 "CFGCON1INV,Bit invert register"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CFGCON2CLR,Bit clear register"
|
|
line.long 0x4 "CFGCON2SET,Bit set register"
|
|
line.long 0x8 "CFGCON2INV,Bit invert register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "CFGCON4CLR,Bit clear register"
|
|
line.long 0x4 "CFGCON4SET,Bit set register"
|
|
line.long 0x8 "CFGCON4INV,Bit invert register"
|
|
group.long 0x54++0xB
|
|
line.long 0x0 "CFGPGQOSCLR,Bit clear register"
|
|
line.long 0x4 "CFGPGQOSSET,Bit set register"
|
|
line.long 0x8 "CFGPGQOSINV,Bit invert register"
|
|
group.long 0x64++0xB
|
|
line.long 0x0 "CFGPCLKGEN1CLR,Bit clear register"
|
|
line.long 0x4 "CFGPCLKGEN1SET,Bit set register"
|
|
line.long 0x8 "CFGPCLKGEN1INV,Bit invert register"
|
|
group.long 0x74++0xB
|
|
line.long 0x0 "CFGPCLKGEN2CLR,Bit clear register"
|
|
line.long 0x4 "CFGPCLKGEN2SET,Bit set register"
|
|
line.long 0x8 "CFGPCLKGEN2INV,Bit invert register"
|
|
group.long 0x84++0xB
|
|
line.long 0x0 "CFGPCLKGEN3CLR,Bit clear register"
|
|
line.long 0x4 "CFGPCLKGEN3SET,Bit set register"
|
|
line.long 0x8 "CFGPCLKGEN3INV,Bit invert register"
|
|
group.long 0xA4++0xB
|
|
line.long 0x0 "USER_IDCLR,Bit clear register"
|
|
line.long 0x4 "USER_IDSET,Bit set register"
|
|
line.long 0x8 "USER_IDINV,Bit invert register"
|
|
group.long 0xC4++0xB
|
|
line.long 0x0 "PMD1CLR,Bit clear register"
|
|
line.long 0x4 "PMD1SET,Bit set register"
|
|
line.long 0x8 "PMD1INV,Bit invert register"
|
|
group.long 0xD4++0xB
|
|
line.long 0x0 "PMD2CLR,Bit clear register"
|
|
line.long 0x4 "PMD2SET,Bit set register"
|
|
line.long 0x8 "PMD2INV,Bit invert register"
|
|
group.long 0xE4++0xB
|
|
line.long 0x0 "PMD3CLR,Bit clear register"
|
|
line.long 0x4 "PMD3SET,Bit set register"
|
|
line.long 0x8 "PMD3INV,Bit invert register"
|
|
tree.end
|
|
tree "CMCC (Cortex M Cache Controller)"
|
|
base ad:0x41002000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "TYPE,Cache Type Register"
|
|
bitfld.long 0x0 11.--13. "CLSIZE,Cache Line Size" "0: Cache Line Size is 4 bytes,1: Cache Line Size is 8 bytes,2: Cache Line Size is 16 bytes,3: Cache Line Size is 32 bytes,4: Cache Line Size is 64 bytes,5: Cache Line Size is 128 bytes,?,?"
|
|
bitfld.long 0x0 8.--10. "CSIZE,Cache Size" "0: Cache Size is 1 KB,1: Cache Size is 2 KB,2: Cache Size is 4 KB,3: Cache Size is 8 KB,4: Cache Size is 16 KB,5: Cache Size is 32 KB,6: Cache Size is 64 KB,?"
|
|
bitfld.long 0x0 7. "LCKDOWN,Lock Down supported" "0,1"
|
|
bitfld.long 0x0 5.--6. "WAYNUM,Number of Way" "0: Direct Mapped Cache,1: 2-WAY set associative,2: 4-WAY set associative,?"
|
|
newline
|
|
bitfld.long 0x0 4. "RRP,Round Robin Policy supported" "0,1"
|
|
bitfld.long 0x0 1. "GCLK,dynamic Clock Gating supported" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CFG,Cache Configuration Register"
|
|
bitfld.long 0x0 4.--6. "CSIZESW,Cache size configured by software" "0: The Cache Size is configured to 1KB,1: The Cache Size is configured to 2KB,2: The Cache Size is configured to 4KB,3: The Cache Size is configured to 8KB,4: The Cache Size is configured to 16KB,5: The Cache Size is configured to 32KB,6: The Cache Size is configured to 64KB,?"
|
|
bitfld.long 0x0 2. "DCDIS,Data Cache Disable" "0,1"
|
|
bitfld.long 0x0 1. "ICDIS,Instruction Cache Disable" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "CTRL,Cache Control Register"
|
|
bitfld.long 0x0 0. "CEN,Cache Controller Enable" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,Cache Status Register"
|
|
bitfld.long 0x0 0. "CSTS,Cache Controller Status" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "LCKWAY,Cache Lock per Way Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LCKWAY,Lockdown way Register"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "MAINT0,Cache Maintenance Register 0"
|
|
bitfld.long 0x0 0. "INVALL,Cache Controller invalidate All" "0,1"
|
|
line.long 0x4 "MAINT1,Cache Maintenance Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "WAY,Invalidate Way"
|
|
hexmask.long.byte 0x4 4.--11. 1. "INDEX,Invalidate Index"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "MCFG,Cache Monitor Configuration Register"
|
|
bitfld.long 0x0 0.--1. "MODE,Cache Controller Monitor Counter Mode" "0: Cycle counter,1: Instruction hit counter,2: Data hit counter,?"
|
|
line.long 0x4 "MEN,Cache Monitor Enable Register"
|
|
bitfld.long 0x4 0. "MENABLE,Cache Controller Monitor Enable" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "MCTRL,Cache Monitor Control Register"
|
|
bitfld.long 0x0 0. "SWRST,Cache Controller Software Reset" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "MSR,Cache Monitor Status Register"
|
|
hexmask.long 0x0 0.--31. 1. "EVENT_CNT,Monitor Event Counter"
|
|
tree.end
|
|
tree "COREDEBUG (Core Debug Register)"
|
|
base ad:0xE000EDF0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DHCSR,Debug Halting Control and Status Register"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
rbitfld.long 0x0 25. "S_RESET_ST," "0,1"
|
|
rbitfld.long 0x0 24. "S_RETIRE_ST," "0,1"
|
|
rbitfld.long 0x0 19. "S_LOCKUP," "0,1"
|
|
rbitfld.long 0x0 18. "S_SLEEP," "0,1"
|
|
rbitfld.long 0x0 17. "S_HALT," "0,1"
|
|
rbitfld.long 0x0 16. "S_REGRDY," "0,1"
|
|
hexmask.long.word 0x0 16.--31. 1. "DBGKEY,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 25. "S_RESET_ST," "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "S_RETIRE_ST," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 25. "S_RESET_ST," "0,1"
|
|
bitfld.long 0x0 24. "S_RETIRE_ST," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 19. "S_LOCKUP," "0,1"
|
|
bitfld.long 0x0 18. "S_SLEEP," "0,1"
|
|
bitfld.long 0x0 17. "S_HALT," "0,1"
|
|
bitfld.long 0x0 16. "S_REGRDY," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 19. "S_LOCKUP," "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "S_SLEEP," "0,1"
|
|
bitfld.long 0x0 17. "S_HALT," "0,1"
|
|
bitfld.long 0x0 16. "S_REGRDY," "0,1"
|
|
endif
|
|
bitfld.long 0x0 5. "C_SNAPSTALL," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "C_MASKINTS," "0,1"
|
|
bitfld.long 0x0 2. "C_STEP," "0,1"
|
|
bitfld.long 0x0 1. "C_HALT," "0,1"
|
|
bitfld.long 0x0 0. "C_DEBUGEN," "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x0 16. "REGWnR," "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "REGSEL,"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "DCRDR,Debug Core Register Data Register"
|
|
line.long 0x4 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x4 24. "TRCENA," "0,1"
|
|
bitfld.long 0x4 19. "MON_REQ," "0,1"
|
|
bitfld.long 0x4 18. "MON_STEP," "0,1"
|
|
bitfld.long 0x4 17. "MON_PEND," "0,1"
|
|
bitfld.long 0x4 16. "MON_EN," "0,1"
|
|
bitfld.long 0x4 10. "VC_HARDERR," "0,1"
|
|
bitfld.long 0x4 9. "VC_INTERR," "0,1"
|
|
bitfld.long 0x4 8. "VC_BUSERR," "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "VC_STATERR," "0,1"
|
|
bitfld.long 0x4 6. "VC_CHKERR," "0,1"
|
|
bitfld.long 0x4 5. "VC_NOCPERR," "0,1"
|
|
bitfld.long 0x4 4. "VC_MMERR," "0,1"
|
|
bitfld.long 0x4 0. "VC_CORERESET," "0,1"
|
|
tree.end
|
|
tree "CRU (Clock and Reset Unit)"
|
|
base ad:0x44000A00
|
|
group.long 0x0++0x2F
|
|
line.long 0x0 "OSCCON,CRU OSCILLATOR CONTROL REGISTER"
|
|
bitfld.long 0x0 24.--26. "FRCDIV,Fast RC Clock Divider bits" "0: FRC Divide by 1,1: FRC Divide by 2,2: FRC Divide by 4,3: FRC Divide by 8,4: FRC Divide by 16,5: FRC Divide by 32,6: FRC Divide by 64,7: FRC Divide by 256"
|
|
bitfld.long 0x0 23. "DRMEN,Enable Dream Mode bit" "0: DMA transfer has no effect,1: When the cpu_si_sleep input is asserted and.."
|
|
newline
|
|
bitfld.long 0x0 21. "WAKE2SPD,2-Speed startup enabled in Sleep mode bit" "0: When the device EXITS Sleep Mode the sys_clk..,1: When the device EXITS Sleep Mode the sys_clk.."
|
|
hexmask.long.byte 0x0 12.--15. 1. "COSC,Current Oscillator Selection bits (Read-only)"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "NOSC,New Oscillator Selection bits"
|
|
bitfld.long 0x0 7. "CLKLOCK,Clock Lock Enabled bit" "0: Clock and PLL selection registers are not locked..,1: All clock and PLL configuration registers are.."
|
|
newline
|
|
bitfld.long 0x0 4. "SLPEN,Enable SLEEP Mode bit" "0: When a WAIT instruction is executed device will..,1: When a WAIT Instruction is executed device will.."
|
|
bitfld.long 0x0 3. "CF,Clock Fail Detect bit (Read / writable / Clearable by application)" "0: FSCM has not detected clock failure,1: FSCM has detected clock failure"
|
|
newline
|
|
bitfld.long 0x0 1. "SOSCEN,32 kHz Secondary (LP) Oscillator Enable bit" "0: Disable Secondary Oscillator,1: Enable Secondary Oscillator"
|
|
bitfld.long 0x0 0. "OSWEN,Oscillator Switch Enable bit" "0: Oscillator switch is complete,1: Request oscillator switch to selection specified.."
|
|
line.long 0x4 "OSCCONCLR,"
|
|
line.long 0x8 "OSCCONSET,"
|
|
line.long 0xC "OSCCONINV,"
|
|
line.long 0x10 "OSCTUN,CRU OSCILLATOR TRIMMING REGISTER"
|
|
hexmask.long.byte 0x10 0.--5. 1. "TUN,Internal Fast RC (FRC) Oscillator Tuning bits"
|
|
line.long 0x14 "OSCTUNCLR,"
|
|
line.long 0x18 "OSCTUNSET,"
|
|
line.long 0x1C "OSCTUNINV,"
|
|
line.long 0x20 "SPLLCON,SPLL CONTROL REGISTER"
|
|
bitfld.long 0x20 30.--31. "SPLL_BYP,SPLL Clock 2 Source" "0: SPLL3 (RFPLL) Clock is the clock source for ADC..,?,2: POSC is used as clock source for ADC CP Clock..,3: FRC is used as clock source for ADC CP Clock.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "SPLLPOSTDIV2,SPLL Clock 2 Divide Value 1 to 15"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. "SPLLPOSTDIV1,SPLL Clock 1 Divide Value 1 to 255"
|
|
bitfld.long 0x20 5. "SPLLRST,System PLL Reset" "0: De-assert the reset to the SPLL,1: Assert the reset to the SPLL"
|
|
newline
|
|
bitfld.long 0x20 4. "SPLLFLOCK,System PLL Force Lock" "0: Do not force the SPLL lock signal to be asserted,1: Force the SPLL lock signal to be asserted"
|
|
bitfld.long 0x20 3. "SPLLPWDN,PLL Power Down Register bit" "0: PLL is active,1: PLL is powered down"
|
|
line.long 0x24 "SPLLCONCLR,"
|
|
line.long 0x28 "SPLLCONSET,"
|
|
line.long 0x2C "SPLLCONINV,"
|
|
group.long 0x70++0xC3
|
|
line.long 0x0 "REFO1CON,REFERENCE OSCILLATOR 1 CONTROL REGISTER"
|
|
hexmask.long.word 0x0 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0x0 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0x0 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0x0 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO1 pin.,1: Reference clock is driven out on REFO1 pin"
|
|
bitfld.long 0x0 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0x0 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0x0 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0x4 "REFO1CONCLR,"
|
|
line.long 0x8 "REFO1CONSET,"
|
|
line.long 0xC "REFO1CONINV,"
|
|
line.long 0x10 "REFO1TRIM,REFERENCE OSCILLATOR 1 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0x10 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0x10 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0x10 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0x14 "REFO1TRIMCLR,"
|
|
line.long 0x18 "REFO1TRIMSET,"
|
|
line.long 0x1C "REFO1TRIMINV,"
|
|
line.long 0x20 "REFO2CON,REFERENCE OSCILLATOR 2 CONTROL REGISTER"
|
|
hexmask.long.word 0x20 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0x20 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0x20 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0x20 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0x20 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO2 pin.,1: Reference clock is driven out on REFO2 pin"
|
|
bitfld.long 0x20 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0x20 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0x20 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0x20 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0x24 "REFO2CONCLR,"
|
|
line.long 0x28 "REFO2CONSET,"
|
|
line.long 0x2C "REFO2CONINV,"
|
|
line.long 0x30 "REFO2TRIM,REFERENCE OSCILLATOR 2 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0x30 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0x30 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0x30 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0x34 "REFO2TRIMCLR,"
|
|
line.long 0x38 "REFO2TRIMSET,"
|
|
line.long 0x3C "REFO2TRIMINV,"
|
|
line.long 0x40 "REFO3CON,REFERENCE OSCILLATOR 3 CONTROL REGISTER"
|
|
hexmask.long.word 0x40 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0x40 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0x40 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0x40 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0x40 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO3 pin.,1: Reference clock is driven out on REFO3 pin"
|
|
bitfld.long 0x40 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0x40 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0x40 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0x40 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0x44 "REFO3CONCLR,"
|
|
line.long 0x48 "REFO3CONSET,"
|
|
line.long 0x4C "REFO3CONINV,"
|
|
line.long 0x50 "REFO3TRIM,REFERENCE OSCILLATOR 3 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0x50 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0x50 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0x50 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0x54 "REFO3TRIMCLR,"
|
|
line.long 0x58 "REFO3TRIMSET,"
|
|
line.long 0x5C "REFO3TRIMINV,"
|
|
line.long 0x60 "REFO4CON,REFERENCE OSCILLATOR 4 CONTROL REGISTER"
|
|
hexmask.long.word 0x60 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0x60 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0x60 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0x60 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0x60 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO4 pin.,1: Reference clock is driven out on REFO4 pin"
|
|
bitfld.long 0x60 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0x60 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0x60 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0x60 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0x64 "REFO4CONCLR,"
|
|
line.long 0x68 "REFO4CONSET,"
|
|
line.long 0x6C "REFO4CONINV,"
|
|
line.long 0x70 "REFO4TRIM,REFERENCE OSCILLATOR 4 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0x70 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0x70 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0x70 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0x74 "REFO4TRIMCLR,"
|
|
line.long 0x78 "REFO4TRIMSET,"
|
|
line.long 0x7C "REFO4TRIMINV,"
|
|
line.long 0x80 "REFO5CON,REFERENCE OSCILLATOR 5 CONTROL REGISTER"
|
|
hexmask.long.word 0x80 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0x80 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0x80 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0x80 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0x80 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO5 pin.,1: Reference clock is driven out on REFO5 pin"
|
|
bitfld.long 0x80 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0x80 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0x80 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0x80 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0x84 "REFO5CONCLR,"
|
|
line.long 0x88 "REFO5CONSET,"
|
|
line.long 0x8C "REFO5CONINV,"
|
|
line.long 0x90 "REFO5TRIM,REFERENCE OSCILLATOR 5 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0x90 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0x90 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0x90 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0x94 "REFO5TRIMCLR,"
|
|
line.long 0x98 "REFO5TRIMSET,"
|
|
line.long 0x9C "REFO5TRIMINV,"
|
|
line.long 0xA0 "REFO6CON,REFERENCE OSCILLATOR 6 CONTROL REGISTER"
|
|
hexmask.long.word 0xA0 16.--30. 1. "RODIV,Reference Clock Divider bits"
|
|
bitfld.long 0xA0 15. "ON,Output Enable bit" "0: Reference Oscillator Module disabled,1: Reference Oscillator Module enabled"
|
|
newline
|
|
bitfld.long 0xA0 14. "FRZ,Freeze in Debug mode bit" "0: When emulator is in Debug mode module continues..,1: When emulator is in Debug mode module freezes.."
|
|
bitfld.long 0xA0 13. "SIDL,Peripheral Stop in Idle Mode bit" "0: Continue module operation in Idle mode,1: Discontinue module operation when device enters.."
|
|
newline
|
|
bitfld.long 0xA0 12. "OE,Reference Clock Output Enable bit" "0: Reference clock is not driven out on REFO6 pin.,1: Reference clock is driven out on REFO6 pin"
|
|
bitfld.long 0xA0 11. "RSLP,Reference Oscillator Run in Sleep bit" "0: Reference Oscillator output is disabled in Sleep,1: Reference Oscillator output continues to run in.."
|
|
newline
|
|
bitfld.long 0xA0 9. "DIVSWEN,Clock RODIV/ROTRIM switch enabled." "0: Clock Divider Switch has completed.,1: Clock Divider Switching currently in progress."
|
|
bitfld.long 0xA0 8. "ACTIVE,Reference Clock Request Status bit" "0: Reference clock request is not active (User can..,1: Reference clock request is active (User should.."
|
|
newline
|
|
hexmask.long.byte 0xA0 0.--3. 1. "ROSEL,Reference Clock Source Select bits"
|
|
line.long 0xA4 "REFO6CONCLR,"
|
|
line.long 0xA8 "REFO6CONSET,"
|
|
line.long 0xAC "REFO6CONINV,"
|
|
line.long 0xB0 "REFO6TRIM,REFERENCE OSCILLATOR 6 TRIM REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.word 0xB0 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.word 0xB0 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.word 0xB0 23.--31. 1. "ROTRIM,Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock"
|
|
endif
|
|
line.long 0xB4 "REFO6TRIMCLR,"
|
|
line.long 0xB8 "REFO6TRIMSET,"
|
|
line.long 0xBC "REFO6TRIMINV,"
|
|
line.long 0xC0 "PB1DIV,PB1 CLOCK DIVISOR CONTROL REGISTER"
|
|
bitfld.long 0xC0 15. "PBDIVON,Output Enable bit" "0: PB1 Output clock is disabled,1: PB1 Output clock is enabled"
|
|
bitfld.long 0xC0 11. "PBDIVRDY,PB1 Peripheral Clock Divisor Ready" "0: Indicates the PB clock divisor logic is..,1: Indicates the PB clock divisor logic is not.."
|
|
newline
|
|
hexmask.long.byte 0xC0 0.--6. 1. "PBDIV,PB1 Peripheral Clock Divisor Control value"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "PB2DIV,PB2 CLOCK DIVISOR CONTROL REGISTER"
|
|
bitfld.long 0x0 15. "PBDIVON,Output Enable bit" "0: PB2 Output clock is disabled,1: PB2 Output clock is enabled"
|
|
bitfld.long 0x0 11. "PBDIVRDY,PB2 Peripheral Clock Divisor Ready" "0: Indicates the PB clock divisor logic is..,1: Indicates the PB clock divisor logic is not.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "PBDIV,PB2 Peripheral Clock Divisor Control value"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PB3DIV,PB3 CLOCK DIVISOR CONTROL REGISTER"
|
|
bitfld.long 0x0 15. "PBDIVON,Output Enable bit" "0: PB3 Output clock is disabled,1: PB3 Output clock is enabled"
|
|
bitfld.long 0x0 11. "PBDIVRDY,PB3 Peripheral Clock Divisor Ready" "0: Indicates the PB clock divisor logic is..,1: Indicates the PB clock divisor logic is not.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "PBDIV,PB3 Peripheral Clock Divisor Control value"
|
|
group.long 0x134++0xB
|
|
line.long 0x0 "PB1DIVCLR,"
|
|
line.long 0x4 "PB1DIVSET,"
|
|
line.long 0x8 "PB1DIVINV,"
|
|
group.long 0x144++0xB
|
|
line.long 0x0 "PB2DIVCLR,"
|
|
line.long 0x4 "PB2DIVSET,"
|
|
line.long 0x8 "PB2DIVINV,"
|
|
group.long 0x154++0x1F
|
|
line.long 0x0 "PB3DIVCLR,"
|
|
line.long 0x4 "PB3DIVSET,"
|
|
line.long 0x8 "PB3DIVINV,"
|
|
line.long 0xC "SLEWCON,SLEW RATE CONTROL FOR CLOCK SWITCHING REGISTER"
|
|
hexmask.long.byte 0xC 24.--27. 1. "SLWDLY,Number of clocks generated at each slew step for a clock switch"
|
|
hexmask.long.byte 0xC 16.--19. 1. "SYSDIV,PBx Peripheral Clock Divisor Control value"
|
|
newline
|
|
bitfld.long 0xC 8.--10. "SLWDIV,Divisor steps used when doing slewed clock switches" "0: No Divisor used,1: Divide by 2 then no divisor,2: Divide by 4 then by 2 then no divisor,3: Divide by 8 then by 4 then by 2 then no divisor,4: Divide by 16 then by 8 then by 4 then by 2 then..,5: Divide by 32 then by 16 then by 8 then by 4 then..,6: Divide by 64 then by 32 then by 16 then by 8..,7: Divide by 128 then by 64 then by 32 then by 16.."
|
|
bitfld.long 0xC 2. "UPEN,Clock slew enable for switching up to faster clocks" "0: Clock Slewing disabled,1: Clock Slewing enabled on a clock switch OR exit.."
|
|
newline
|
|
bitfld.long 0xC 1. "DNEN,Clock slew enable for switching down to slower clocks" "0: Clock Slewing disabled,1: Clock Slewing enabled on a clock switch"
|
|
bitfld.long 0xC 0. "BUSY,Clock Switch Slewing Active Status Bit - Read-Only" "0: Clock Switch has reached its final value,1: Clock frequency is being actively Slewed"
|
|
line.long 0x10 "SLEWCONCLR,"
|
|
line.long 0x14 "SLEWCONSET,"
|
|
line.long 0x18 "SLEWCONINV,"
|
|
line.long 0x1C "CLKSTAT,CLOCK STATUS REGISTER"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x1C 9. "SPLL3RDY,System PLL3 Ready Status value" "0: SPLL3 Output is not stable and not ready,1: SPLL3 Output is stable and ready"
|
|
bitfld.long 0x1C 5. "LPRCRDY,LPRC Ready Status value" "0: LPRC is not stable and not ready,1: LPRC is stable and ready"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x1C 5. "SPLL3RDY,System PLL3 Ready Status value" "0: SPLL3 Output is not stable and not ready,1: SPLL3 Output is stable and ready"
|
|
bitfld.long 0x1C 4. "LPRCRDY,LPRC Ready Status value" "0: LPRC is not stable and not ready,1: LPRC is stable and ready"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x1C 5. "SPLL3RDY,System PLL3 Ready Status value" "0: SPLL3 Output is not stable and not ready,1: SPLL3 Output is stable and ready"
|
|
bitfld.long 0x1C 4. "LPRCRDY,LPRC Ready Status value" "0: LPRC is not stable and not ready,1: LPRC is stable and ready"
|
|
newline
|
|
endif
|
|
bitfld.long 0x1C 3. "SOSCRDY,SOSC Ready Status value" "0: SOSC is not stable and not ready,1: SOSC is stable and ready"
|
|
bitfld.long 0x1C 2. "POSCRDY,Primary Oscillator Ready Status value" "0: POSC is not stable and not ready,1: POSC is stable and ready"
|
|
newline
|
|
bitfld.long 0x1C 1. "SPLL1RDY,System PLL1 Ready Status value" "0: SPLL1 Primary Output is not stable and not ready,1: SPLL1 Primary Output is stable and ready"
|
|
bitfld.long 0x1C 0. "FRCRDY,FRC Ready Status value" "0: FRC is not stable and not ready,1: FRC is stable and ready"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "CLKDIAG,USER CLK DIAGNOSTICS CONTROL REGISTER"
|
|
hexmask.long.word 0x0 16.--31. 1. "NMICNT,NMI Counter value"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 6. "SPLL3STOP,SPLL3 Clock Stop Control value" "0: SPLL3 clock source runs as normal,1: SPLL3 clock source is stopped"
|
|
newline
|
|
bitfld.long 0x0 5. "SPLL2STOP,SPLL2 Clock Stop Control value" "0: SPLL2 clock source runs as normal,1: SPLL2 clock source is stopped"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 5. "SPLL3STOP,SPLL3 Clock Stop Control value" "0: SPLL3 clock source runs as normal,1: SPLL3 clock source is stopped"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 5. "SPLL3STOP,SPLL3 Clock Stop Control value" "0: SPLL3 clock source runs as normal,1: SPLL3 clock source is stopped"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 4. "SPLL1STOP,SPLL1 Clock Stop Control value" "0: SPLL1 clock source runs as normal,1: SPLL1 clock source is stopped"
|
|
newline
|
|
bitfld.long 0x0 3. "LPRCSTOP,LPRC Clock Stop Control value" "0: LPRC clock source runs as normal,1: LPRC clock source is stopped"
|
|
bitfld.long 0x0 2. "FRCSTOP,FRC Clock Stop Control value" "0: FRC clock source runs as normal,1: FRC clock source is stopped"
|
|
newline
|
|
bitfld.long 0x0 1. "SOSCSTOP,SOSC Clock Stop Control value" "0: SOSC clock source runs as normal,1: SOSC clock source is stopped"
|
|
bitfld.long 0x0 0. "POSCSTOP,POSC Clock Stop Control value" "0: POSC clock source runs as normal,1: POSC clock source is stopped"
|
|
tree.end
|
|
sif (cpuis("PIC32C?5109BZ31032*")||cpuis("PIC32C?5109BZ31048*"))
|
|
tree "CVD (Capacitive Voltage Divider)"
|
|
base ad:0x44002400
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CVDCON,CVD Control Register"
|
|
bitfld.long 0x0 31. "ON,Enables the State Machine to scan enabled Scan Descriptors upon next trigger." "0,1"
|
|
bitfld.long 0x0 30. "FRZ,Freeze Mode1= CVD controller halts in debugger mode0= CVD controller runs in debugger mode" "0,1"
|
|
bitfld.long 0x0 29. "SIDL,Stop in Idle Mode bit1= CVD controller halts when device enters Idle mode0= CVD controller continues running in Idle mode" "0,1"
|
|
bitfld.long 0x0 28. "ORDER,RX/TX Loop Order1= Scan all requested TX indexes then increment RX index and continue0= Scan all requested RX indexes then increment TX index and continue" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "SDWREN,Scan Descriptor Write Enable1= Enables writes to the scan descriptors and prevents Scan Descriptor EN bits from being decoded and captured intoFSM_CLK domain by the Descriptor Selection Logic. This simplifies synchronization issues. The currently.." "0: Prevents writes to the scan descriptors,?"
|
|
bitfld.long 0x0 25. "ABORT,Instructs the controller to abort the current scan. The controller will move on to the next enabled ScanDescriptor if there is one else it will go idle.Cleared by Hardware" "0,1"
|
|
bitfld.long 0x0 24. "SWTRIG,Software Trigger control. Starts scan manuallyCleared by Hardware." "0,1"
|
|
bitfld.long 0x0 23. "THSTR,Threshold Store Mode1= Store only results which exceed the programmed threshold for the Scan Descriptor0= Store all results in FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CVDIEN,Global Interrupt Enable for full macro. Gates any enabled FIFO or Scan Descriptor interrupts." "0,1"
|
|
bitfld.long 0x0 18. "FIFOTHIEN,FIFO Threshold Interrupt Enable1= Controller will assert an interrupt when the FIFO threshold is met0= Controller will not assert an interrupt when the FIFO threshold is met" "0,1"
|
|
hexmask.long.word 0x0 8.--17. 1. "FIFOTH,Threshold for the results FIFO that will cause an interrupt and watermark FIFOWM status bitassertion"
|
|
bitfld.long 0x0 4.--5. "CLKSEL,Clock Select for FSM00= UPB_FSM_CLK01= External clock source 110= External clock source 211= External clock source 3" "?,?,?,?"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "TRIGSEL,Selects one of 15 external trigger inputs to start scanning."
|
|
line.long 0x4 "CVDADC,CVD ADC Configuration Register"
|
|
bitfld.long 0x4 3. "DIGEN,Control differential mode operation of ANN0" "0,1"
|
|
bitfld.long 0x4 2. "DIFFPEN,Control differential mode operation of ANN0" "0,1"
|
|
bitfld.long 0x4 0.--1. "SELRES,Shared ADC Resolution bits" "0,1,2,3"
|
|
line.long 0x8 "CVDSTAT,CVD Status Register"
|
|
bitfld.long 0x8 31. "FIFOFULL,The Results FIFO is full." "0,1"
|
|
bitfld.long 0x8 30. "FIFOWM,The Results FIFO has reached the programmed FIFOTHRESH threshold." "0,1"
|
|
bitfld.long 0x8 29. "FIFOMT,The Results FIFO is empty." "0,1"
|
|
hexmask.long.word 0x8 16.--25. 1. "FIFOCNT,Results FIFO word count: Indicates the number of words in the Results FIFO."
|
|
newline
|
|
bitfld.long 0x8 14. "SD4INT,Scan Descriptor 4 has caused an interrupt." "0,1"
|
|
bitfld.long 0x8 13. "SD4DONE,Core will set this bit if Scan Descriptor 4 has completed at least once. Core will clear this bit uponreceiving next trigger for Scan Descriptor 4." "0,1"
|
|
bitfld.long 0x8 12. "SD4BUSY,Scan Descriptor 4 is in progress" "0,1"
|
|
bitfld.long 0x8 10. "SD3INT,Scan Descriptor 3 has caused an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "SD3DONE,Core will set this bit if Scan Descriptor 3 has completed at least once. Core will clear this bit uponreceiving next trigger for Scan Descriptor 3." "0,1"
|
|
bitfld.long 0x8 8. "SD3BUSY,Scan Descriptor 3 is in progress" "0,1"
|
|
bitfld.long 0x8 6. "SD2INT,Scan Descriptor 2 has caused an interrupt" "0,1"
|
|
bitfld.long 0x8 5. "SD2DONE,Core will set this bit if Scan Descriptor 2 has completed at least once. Core will clear this bit uponreceiving next trigger for Scan Descriptor 2." "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "SD2BUSY,Scan Descriptor 2 is in progress" "0,1"
|
|
bitfld.long 0x8 2. "SD1INT,Scan Descriptor 1 has caused an interrupt" "0,1"
|
|
bitfld.long 0x8 1. "SD1DONE,Core will set this bit if Scan Descriptor 1 has completed at least once. Core will clear this bit uponreceiving next trigger for Scan Descriptor 1." "0,1"
|
|
bitfld.long 0x8 0. "SD1BUSY,Scan Descriptor 1 is in progress" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "CVDRESH,CVD RESULTS POS FIFO Read Register (CVDRESH)"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "POS,The accumulated result of the positive-side measurements.Since the controller supports up to 128x oversampling each polarity can accumulate up to 23 bits when using a 16-bitADC. The accumulation is not shifted back down to create an average."
|
|
line.long 0x4 "CVDRESL,CVD RESULTS NEG FIFO Read Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "NEG,The accumulated result of the negative-side measurements.Since the controller supports up to 128x oversampling each polarity can accumulate up to 23 bits when using a 16-bitADC. The accumulation is not shifted back down to create an average."
|
|
line.long 0x8 "CVDRESD,CVD RESULTS DESCRIPTOR FIFO Read Register"
|
|
hexmask.long.byte 0x8 27.--31. 1. "TXINDEX,Transmit Index for this result. If the Stride of the Scan Descriptor was more than one the Transmit Index indicates the first one of the group."
|
|
bitfld.long 0x8 24.--25. "SDNUM,Scan Descriptor Number that generated this result" "0,1,2,3"
|
|
hexmask.long.byte 0x8 19.--23. 1. "RXINDEX,Receive Index for this result. If the Stride of the Scan Descriptor was more than one the ReceiveIndex indicates the first one of the group."
|
|
hexmask.long.tbyte 0x8 0.--17. 1. "DELTA,Delta of the accumulated results of the negative-side and positive-side measurements."
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "CVDRX,CVD RECEIVE INDEX N CONFIGURATION Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "RXAN3,ANx/CVDR channel to use for RX Index 4n+3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "RXAN2,ANx/CVDR channel to use for RX Index 4n+3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "RXAN1,ANx/CVDR channel to use for RX Index 4n+3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RXAN0,ANx/CVDR channel to use for RX Index 4n+3"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "CVDTX,CVD TRANSMIT INDEX NCONFIGURATION"
|
|
hexmask.long.byte 0x0 24.--29. 1. "TXAN3,CVDT channel to use for TX Index"
|
|
hexmask.long.byte 0x0 16.--21. 1. "TXAN2,CVDT channel to use for TX Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "TXAN1,CVDT channel to use for TX Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TXAN0,CVDT channel to use for TX Index"
|
|
endif
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CVDSD0C1,CVD SCAN DESCRIPTOR N CONTROL1 REGISTER"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "SDTH,Scan Descriptor Threshold."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDOVRSAMP,Scan Descriptor Over Sampling0= One measurement1= Two measurements accumulated...127= 128 measurements accumulated"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "CVDSD1C1,CVD SCAN DESCRIPTOR N CONTROL1 REGISTER"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "SDTH,Scan Descriptor Threshold."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDOVRSAMP,Scan Descriptor Over Sampling0= One measurement1= Two measurements accumulated...127= 128 measurements accumulated"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "CVDSD2C1,CVD SCAN DESCRIPTOR N CONTROL1 REGISTER"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "SDTH,Scan Descriptor Threshold."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDOVRSAMP,Scan Descriptor Over Sampling0= One measurement1= Two measurements accumulated...127= 128 measurements accumulated"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "CVDSD3C1,CVD SCAN DESCRIPTOR N CONTROL1 REGISTER"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "SDTH,Scan Descriptor Threshold."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDOVRSAMP,Scan Descriptor Over Sampling0= One measurement1= Two measurements accumulated...127= 128 measurements accumulated"
|
|
group.long 0x104++0x3
|
|
line.long 0x0 "CVDSD0C2,CVD SCAN DESCRIPTOR N CONTROL2 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDTXSTRIDE1,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SDTXEND,Scan Descriptor TX Index EndDetermines the last TX index to include in a scan.One the TX index pointer which is incremented by the SDnTXSTRIDE+1 value meets or exceeds this value the TXloop of the scan is complete."
|
|
bitfld.long 0x0 22.--23. "SDTXSTRIDE0,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SDTXBEG,Scan Descriptor TX Index StartDetermines the first TX index to include in a scan."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SDRXSTRIDE1,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SDRXEND,Scan Descriptor RX Index EndDetermines the last RX index to include in a scan.One the RX index pointer which is incremented by the SDnRXSTRIDE+1 value meets or exceeds this value the RXloop of the scan is complete."
|
|
bitfld.long 0x0 6.--7. "SDRXSTRIDE0,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SDRXBEG,Scan Descriptor RX Index StartDetermines the first RX index to include in a scan."
|
|
group.long 0x114++0x3
|
|
line.long 0x0 "CVDSD1C2,CVD SCAN DESCRIPTOR N CONTROL2 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDTXSTRIDE1,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SDTXEND,Scan Descriptor TX Index EndDetermines the last TX index to include in a scan.One the TX index pointer which is incremented by the SDnTXSTRIDE+1 value meets or exceeds this value the TXloop of the scan is complete."
|
|
bitfld.long 0x0 22.--23. "SDTXSTRIDE0,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SDTXBEG,Scan Descriptor TX Index StartDetermines the first TX index to include in a scan."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SDRXSTRIDE1,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SDRXEND,Scan Descriptor RX Index EndDetermines the last RX index to include in a scan.One the RX index pointer which is incremented by the SDnRXSTRIDE+1 value meets or exceeds this value the RXloop of the scan is complete."
|
|
bitfld.long 0x0 6.--7. "SDRXSTRIDE0,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SDRXBEG,Scan Descriptor RX Index StartDetermines the first RX index to include in a scan."
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "CVDSD2C2,CVD SCAN DESCRIPTOR N CONTROL2 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDTXSTRIDE1,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SDTXEND,Scan Descriptor TX Index EndDetermines the last TX index to include in a scan.One the TX index pointer which is incremented by the SDnTXSTRIDE+1 value meets or exceeds this value the TXloop of the scan is complete."
|
|
bitfld.long 0x0 22.--23. "SDTXSTRIDE0,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SDTXBEG,Scan Descriptor TX Index StartDetermines the first TX index to include in a scan."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SDRXSTRIDE1,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SDRXEND,Scan Descriptor RX Index EndDetermines the last RX index to include in a scan.One the RX index pointer which is incremented by the SDnRXSTRIDE+1 value meets or exceeds this value the RXloop of the scan is complete."
|
|
bitfld.long 0x0 6.--7. "SDRXSTRIDE0,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SDRXBEG,Scan Descriptor RX Index StartDetermines the first RX index to include in a scan."
|
|
group.long 0x134++0x3
|
|
line.long 0x0 "CVDSD3C2,CVD SCAN DESCRIPTOR N CONTROL2 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDTXSTRIDE1,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SDTXEND,Scan Descriptor TX Index EndDetermines the last TX index to include in a scan.One the TX index pointer which is incremented by the SDnTXSTRIDE+1 value meets or exceeds this value the TXloop of the scan is complete."
|
|
bitfld.long 0x0 22.--23. "SDTXSTRIDE0,Scan Descriptor TX Index StrideDetermines the number of TX Indexes included in a single measurement.4'h0= One TX Index4'bF= 16TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SDTXBEG,Scan Descriptor TX Index StartDetermines the first TX index to include in a scan."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SDRXSTRIDE1,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SDRXEND,Scan Descriptor RX Index EndDetermines the last RX index to include in a scan.One the RX index pointer which is incremented by the SDnRXSTRIDE+1 value meets or exceeds this value the RXloop of the scan is complete."
|
|
bitfld.long 0x0 6.--7. "SDRXSTRIDE0,Scan Descriptor RX Index StrideDetermines the number of RX Indexes included in a single measurement4'h0= One RX Index4'hF= 16 TX Indexes" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SDRXBEG,Scan Descriptor RX Index StartDetermines the first RX index to include in a scan."
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "CVDSD0C3,CVD SCAN DESCRIPTOR N CONTROL3 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDEN,Scan Descriptor Enable Mode00= Scan Descriptor Disabled01= Execute Scan Descriptor one time only then clear the enable.10= Execute the Scan Descriptor but keep enabled. Move on to next enabled descriptors.11= Execute the Scan Descriptor in a loop.." "?,?,?,?"
|
|
bitfld.long 0x0 27. "SDBUF,Scan Descriptor CVD Buffer Enable1= Use the SOC's CVD Buffer macro to drive the party-line (shared ADC core input) rather than the RX outputs0= SOC's CVD Buffer macro not used to drive party-line (or doesn't exist)" "0,1"
|
|
bitfld.long 0x0 26. "SDINTEN,Scan Descriptor Interrupt Enable1= Scan Descriptor creates an interrupt if the accumulator threshold is met0= Scan descriptor does not create an interrupt" "0,1"
|
|
bitfld.long 0x0 25. "SDSELF,Scan Descriptor Mutual Mode1= Self Measurement Mode; RX outputs are part of CVD measurement and are driven0= No Self Measurement; RX outputs are not part of CVD measurements" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SDMUT,Scan Descriptor Mutual Mode1= Mutual Measurement Mode; TX outputs are part of CVD measurement and are driven0=No Mutual Measurement Mode; TX outputs are not part of CVD measurements" "0,1"
|
|
bitfld.long 0x0 19. "CVDEN,Capacitive Voltage Division Enable bit" "0,1"
|
|
bitfld.long 0x0 16.--18. "CVDCPL,Capacitor Voltage Divider (CVD) Setting bits" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDACQTIME,Scan Descriptor Acquire TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the ACQUIRE stateto allow the ADC voltage to settle"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCHGTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CHARGE statedriving both the internal and external capacitor nodes as well as the TX output(s)"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "CVDSD1C3,CVD SCAN DESCRIPTOR N CONTROL3 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDEN,Scan Descriptor Enable Mode00= Scan Descriptor Disabled01= Execute Scan Descriptor one time only then clear the enable.10= Execute the Scan Descriptor but keep enabled. Move on to next enabled descriptors.11= Execute the Scan Descriptor in a loop.." "?,?,?,?"
|
|
bitfld.long 0x0 27. "SDBUF,Scan Descriptor CVD Buffer Enable1= Use the SOC's CVD Buffer macro to drive the party-line (shared ADC core input) rather than the RX outputs0= SOC's CVD Buffer macro not used to drive party-line (or doesn't exist)" "0,1"
|
|
bitfld.long 0x0 26. "SDINTEN,Scan Descriptor Interrupt Enable1= Scan Descriptor creates an interrupt if the accumulator threshold is met0= Scan descriptor does not create an interrupt" "0,1"
|
|
bitfld.long 0x0 25. "SDSELF,Scan Descriptor Mutual Mode1= Self Measurement Mode; RX outputs are part of CVD measurement and are driven0= No Self Measurement; RX outputs are not part of CVD measurements" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SDMUT,Scan Descriptor Mutual Mode1= Mutual Measurement Mode; TX outputs are part of CVD measurement and are driven0=No Mutual Measurement Mode; TX outputs are not part of CVD measurements" "0,1"
|
|
bitfld.long 0x0 19. "CVDEN,Capacitive Voltage Division Enable bit" "0,1"
|
|
bitfld.long 0x0 16.--18. "CVDCPL,Capacitor Voltage Divider (CVD) Setting bits" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDACQTIME,Scan Descriptor Acquire TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the ACQUIRE stateto allow the ADC voltage to settle"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCHGTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CHARGE statedriving both the internal and external capacitor nodes as well as the TX output(s)"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "CVDSD2C3,CVD SCAN DESCRIPTOR N CONTROL3 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDEN,Scan Descriptor Enable Mode00= Scan Descriptor Disabled01= Execute Scan Descriptor one time only then clear the enable.10= Execute the Scan Descriptor but keep enabled. Move on to next enabled descriptors.11= Execute the Scan Descriptor in a loop.." "?,?,?,?"
|
|
bitfld.long 0x0 27. "SDBUF,Scan Descriptor CVD Buffer Enable1= Use the SOC's CVD Buffer macro to drive the party-line (shared ADC core input) rather than the RX outputs0= SOC's CVD Buffer macro not used to drive party-line (or doesn't exist)" "0,1"
|
|
bitfld.long 0x0 26. "SDINTEN,Scan Descriptor Interrupt Enable1= Scan Descriptor creates an interrupt if the accumulator threshold is met0= Scan descriptor does not create an interrupt" "0,1"
|
|
bitfld.long 0x0 25. "SDSELF,Scan Descriptor Mutual Mode1= Self Measurement Mode; RX outputs are part of CVD measurement and are driven0= No Self Measurement; RX outputs are not part of CVD measurements" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SDMUT,Scan Descriptor Mutual Mode1= Mutual Measurement Mode; TX outputs are part of CVD measurement and are driven0=No Mutual Measurement Mode; TX outputs are not part of CVD measurements" "0,1"
|
|
bitfld.long 0x0 19. "CVDEN,Capacitive Voltage Division Enable bit" "0,1"
|
|
bitfld.long 0x0 16.--18. "CVDCPL,Capacitor Voltage Divider (CVD) Setting bits" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDACQTIME,Scan Descriptor Acquire TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the ACQUIRE stateto allow the ADC voltage to settle"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCHGTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CHARGE statedriving both the internal and external capacitor nodes as well as the TX output(s)"
|
|
group.long 0x138++0x3
|
|
line.long 0x0 "CVDSD3C3,CVD SCAN DESCRIPTOR N CONTROL3 REGISTER"
|
|
bitfld.long 0x0 30.--31. "SDEN,Scan Descriptor Enable Mode00= Scan Descriptor Disabled01= Execute Scan Descriptor one time only then clear the enable.10= Execute the Scan Descriptor but keep enabled. Move on to next enabled descriptors.11= Execute the Scan Descriptor in a loop.." "?,?,?,?"
|
|
bitfld.long 0x0 27. "SDBUF,Scan Descriptor CVD Buffer Enable1= Use the SOC's CVD Buffer macro to drive the party-line (shared ADC core input) rather than the RX outputs0= SOC's CVD Buffer macro not used to drive party-line (or doesn't exist)" "0,1"
|
|
bitfld.long 0x0 26. "SDINTEN,Scan Descriptor Interrupt Enable1= Scan Descriptor creates an interrupt if the accumulator threshold is met0= Scan descriptor does not create an interrupt" "0,1"
|
|
bitfld.long 0x0 25. "SDSELF,Scan Descriptor Mutual Mode1= Self Measurement Mode; RX outputs are part of CVD measurement and are driven0= No Self Measurement; RX outputs are not part of CVD measurements" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SDMUT,Scan Descriptor Mutual Mode1= Mutual Measurement Mode; TX outputs are part of CVD measurement and are driven0=No Mutual Measurement Mode; TX outputs are not part of CVD measurements" "0,1"
|
|
bitfld.long 0x0 19. "CVDEN,Capacitive Voltage Division Enable bit" "0,1"
|
|
bitfld.long 0x0 16.--18. "CVDCPL,Capacitor Voltage Divider (CVD) Setting bits" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDACQTIME,Scan Descriptor Acquire TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the ACQUIRE stateto allow the ADC voltage to settle"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCHGTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CHARGE statedriving both the internal and external capacitor nodes as well as the TX output(s)"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "CVDSD0T2,CVD SCAN DESCRIPTOR N TIME2 REGISTER"
|
|
hexmask.long.byte 0x0 24.--30. 1. "SDCHNTIME,Scan Descriptor Channel TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the RXCHAN orTXCHAN state before moving to the next RX/TX pair"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SDOVRTIME,Scan Descriptor Oversample TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the OVERSAMPstate before taking the next oversampling measurement of an RX/TX pair."
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDPOLTIME,Scan Descriptor Polarity TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the POLARITY statebefore taking the second polarity measurement of an RX/TX pair"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCONTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CONVERT statewaiting for the ADC sample data. It must be ensured that the ADC will assert End-Of-Convert (EOC) before.."
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "CVDSD1T2,CVD SCAN DESCRIPTOR N TIME2 REGISTER"
|
|
hexmask.long.byte 0x0 24.--30. 1. "SDCHNTIME,Scan Descriptor Channel TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the RXCHAN orTXCHAN state before moving to the next RX/TX pair"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SDOVRTIME,Scan Descriptor Oversample TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the OVERSAMPstate before taking the next oversampling measurement of an RX/TX pair."
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDPOLTIME,Scan Descriptor Polarity TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the POLARITY statebefore taking the second polarity measurement of an RX/TX pair"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCONTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CONVERT statewaiting for the ADC sample data. It must be ensured that the ADC will assert End-Of-Convert (EOC) before.."
|
|
group.long 0x12C++0x3
|
|
line.long 0x0 "CVDSD2T2,CVD SCAN DESCRIPTOR N TIME2 REGISTER"
|
|
hexmask.long.byte 0x0 24.--30. 1. "SDCHNTIME,Scan Descriptor Channel TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the RXCHAN orTXCHAN state before moving to the next RX/TX pair"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SDOVRTIME,Scan Descriptor Oversample TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the OVERSAMPstate before taking the next oversampling measurement of an RX/TX pair."
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDPOLTIME,Scan Descriptor Polarity TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the POLARITY statebefore taking the second polarity measurement of an RX/TX pair"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCONTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CONVERT statewaiting for the ADC sample data. It must be ensured that the ADC will assert End-Of-Convert (EOC) before.."
|
|
group.long 0x13C++0x3
|
|
line.long 0x0 "CVDSD3T2,CVD SCAN DESCRIPTOR N TIME2 REGISTER"
|
|
hexmask.long.byte 0x0 24.--30. 1. "SDCHNTIME,Scan Descriptor Channel TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the RXCHAN orTXCHAN state before moving to the next RX/TX pair"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SDOVRTIME,Scan Descriptor Oversample TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the OVERSAMPstate before taking the next oversampling measurement of an RX/TX pair."
|
|
hexmask.long.byte 0x0 8.--14. 1. "SDPOLTIME,Scan Descriptor Polarity TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the POLARITY statebefore taking the second polarity measurement of an RX/TX pair"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SDCONTIME,Scan Descriptor Charge TimeControls the number of cycles (clock based on CVDCON.CLKSEL[1:0]) the state machine waits in the CONVERT statewaiting for the ADC sample data. It must be ensured that the ADC will assert End-Of-Convert (EOC) before.."
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "CVDBG,CVD DEBUG REGISTER"
|
|
hexmask.long.word 0x0 16.--31. 1. "SEL_H,Select signal to MUX debug signals on to port cvd_tst_dbg_data[31:16]"
|
|
hexmask.long.word 0x0 0.--15. 1. "SEL_L,Select signal to MUX debug signals on to port cvd_tst_dbg_data[15:0]"
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "CVDRX[$1],CVD RECEIVE INDEX N CONFIGURATION Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "RXAN3,ANx/CVDR channel to use for RX Index 4n+3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "RXAN2,ANx/CVDR channel to use for RX Index 4n+3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "RXAN1,ANx/CVDR channel to use for RX Index 4n+3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RXAN0,ANx/CVDR channel to use for RX Index 4n+3"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC0)++0x3
|
|
line.long 0x0 "CVDTX[$1],CVD TRANSMIT INDEX NCONFIGURATION"
|
|
hexmask.long.byte 0x0 24.--29. 1. "TXAN3,CVDT channel to use for TX Index"
|
|
hexmask.long.byte 0x0 16.--21. 1. "TXAN2,CVDT channel to use for TX Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "TXAN1,CVDT channel to use for TX Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TXAN0,CVDT channel to use for TX Index"
|
|
repeat.end
|
|
endif
|
|
tree.end
|
|
tree "DAC (7-bit Digital-to-Analog Converter)"
|
|
base ad:0x44003C00
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DACCON,CONTROL Register"
|
|
bitfld.long 0x0 15. "EN,Enable" "0: The peripheral is disabled.,1: The peripheral is enabled."
|
|
bitfld.long 0x0 7. "SNH,Sample and hold circuitry" "0: DAC operation in normal mode,1: DAC operation in low power mode"
|
|
bitfld.long 0x0 6. "OUTEN,Will enable the output buffer" "0: Output buffer disabled,1: Output buffer enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "LPRCEN1,LPRC clock enabled for SnH mode" "0: LPRC clock not enabled,1: LPRC clock enabled"
|
|
line.long 0x4 "DACCODE,DAC CODE Register"
|
|
hexmask.long.byte 0x4 0.--6. 1. "DATA,DAC data"
|
|
line.long 0x8 "DACCON2,DAC Config register1"
|
|
bitfld.long 0x8 29.--31. "PRESCALAR,Prescaling factor for SnH clock" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 16.--25. 1. "PERIOD,SnH clock period"
|
|
hexmask.long.word 0x8 0.--9. 1. "WIDTH,SnH clock width"
|
|
tree.end
|
|
tree "DGI_SPI (SPI DMA for DGI Macro)"
|
|
base ad:0x44003E00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SPICON,SPI control register"
|
|
bitfld.long 0x0 28. "MSSEN,Master Mode Slave Select Enable bit" "0: Slave select SPI support disabled,1: SPI Slave Select support enabled"
|
|
bitfld.long 0x0 23. "MCLKEN,Master Clock Enable" "0: PBCLK is used by the BRG,1: MCLK is used by the BRG"
|
|
newline
|
|
bitfld.long 0x0 16. "ENHBUF,Enhanced Buffer Enable bit" "0: Enhanced Buffer Mode is disabled,1: Enhanced Buffer Mode is enabled"
|
|
bitfld.long 0x0 15. "ON,DGISPI On bit" "0: Turn off and reset macro disable clocks disable..,1: Enable macro"
|
|
newline
|
|
bitfld.long 0x0 14. "FRZ,Freeze bit (in Debug Mode)" "0: Continue macro operation when in Debug mode,1: Break macro operation when in Debug mode"
|
|
bitfld.long 0x0 13. "SIDL,Stop in Idle control bit" "0: Continue to operate in CPU Idle mode,1: Halt in CPU Idle mode"
|
|
newline
|
|
bitfld.long 0x0 12. "DISSDO,Disable SDO bit" "0: SDO pin is controlled by the macro,1: SDO pin is not used by the macro. Pin controlled.."
|
|
bitfld.long 0x0 10.--11. "MODE,Serial Word Length bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "CKE,SPI Clock Edge Select bit" "0: Transmit happens on transition from idle clock..,1: Transmit happens on transition from active clock.."
|
|
bitfld.long 0x0 7. "SSCON,SSControl bits" "0: SS is not controlled by the DMA module,1: SS is asserted for the duration of TXCNT"
|
|
newline
|
|
bitfld.long 0x0 6. "CKP,Clock Polarity Select bit" "0: Idle state for clock is a low level; active..,1: Idle state for clock is a high level; active.."
|
|
bitfld.long 0x0 2.--3. "STXISEL,SPI Transmit Service Request Interrupt SelectFor enhanced buffer mode the SPI generates a Transmit Service Request when:" "0: The SPIxTXB is empty and SPIxSR is empty (i.e.,1: The SPIxTXB is empty,2: The SPIxTXB is at least half empty,3: The SPIxTXB is not full"
|
|
newline
|
|
bitfld.long 0x0 0. "GO,DMA Operation Status bitThis bit is set by the user software to start the DMA operation. It is reset back to zero by the DMA engine whenthe DMA operation is completed or aborted by clearing the ON bit." "0: DMA is not in operation,1: DMA is in operation"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SPISTAT,SPI Status register"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TXBUFELM,TransmitBuffer Element Count bits (valid only when ENHBUF = 1)"
|
|
bitfld.long 0x0 11. "SPIBUSY,SPI activity status bit" "0: No on-going transactions (at time of read),1: Macro currently busy with some transactions"
|
|
newline
|
|
bitfld.long 0x0 7. "SRMT,Shift Register (SPIxSR) Empty bit0= There are current or pending transactions" "?,1: There are no current or pending transactions"
|
|
bitfld.long 0x0 3. "SPITBE,SPI Transmit Buffer Empty status bit" "0: SPIxTXB is not empty,1: SPIxTXB is empty"
|
|
newline
|
|
bitfld.long 0x0 1. "SPITBF,SPI Transmit Buffer Full Status bit" "0: SPIxTXB not full,1: SPIxTXB is full"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SPIBUF,SPI BUFFER register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,FIFO Data bits"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "SPIBRG,SPI Baud rate register"
|
|
hexmask.long.word 0x0 0.--12. 1. "BRG,Baud Rate Divisor bitsseeSection 2.4.1."
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "SPITXADD,SPI DMA Transmit Address register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXADD,Transmit Source Address bitsTXADD can constantly be updated to reflect the current transmit address as the transfer progresses"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "SPITXCNT,SPI DMA Transmit Count register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXCNT,Transmit Count bitsThis register indicates the number of transferred data words. As the DMA progresses TXCNT is constantly decremented to reflect the remaining count yet to be transferred."
|
|
tree.end
|
|
endif
|
|
tree "DMAC (Direct Memory Access Controller)"
|
|
base ad:0x41004000
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRL,Control"
|
|
bitfld.word 0x0 11. "LVLEN3,Priority Level 3 Enable" "0,1"
|
|
bitfld.word 0x0 10. "LVLEN2,Priority Level 2 Enable" "0,1"
|
|
bitfld.word 0x0 9. "LVLEN1,Priority Level 1 Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "LVLEN0,Priority Level 0 Enable" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.word 0x0 2. "CRCENABLE,CRC Enable" "0,1"
|
|
endif
|
|
bitfld.word 0x0 1. "DMAENABLE,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.word 0x2 "CRCCTRL,CRC Control"
|
|
bitfld.word 0x2 14.--15. "CRCMODE,CRC Operating Mode" "0: Default operating mode,?,2: Memory CRC monitor operating mode,3: Memory CRC generation operating mode"
|
|
hexmask.word.byte 0x2 8.--13. 1. "CRCSRC,CRC Input Source"
|
|
bitfld.word 0x2 2.--3. "CRCPOLY,CRC Polynomial Type" "0: CRC-16 (CRC-CCITT),1: CRC32 (IEEE 802.3),?,?"
|
|
newline
|
|
bitfld.word 0x2 0.--1. "CRCBEATSIZE,CRC Beat Size" "0: 8-bit bus transfer,1: 16-bit bus transfer,2: 32-bit bus transfer,?"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CRCDATAIN,CRC Data Input"
|
|
hexmask.long 0x0 0.--31. 1. "CRCDATAIN,CRC Data Input"
|
|
line.long 0x4 "CRCCHKSUM,CRC Checksum"
|
|
hexmask.long 0x4 0.--31. 1. "CRCCHKSUM,CRC Checksum"
|
|
group.byte 0xC++0x1
|
|
line.byte 0x0 "CRCSTATUS,CRC Status"
|
|
bitfld.byte 0x0 2. "CRCERR,CRC Error" "0,1"
|
|
bitfld.byte 0x0 1. "CRCZERO,CRC Zero" "0,1"
|
|
bitfld.byte 0x0 0. "CRCBUSY,CRC Module Busy" "0,1"
|
|
line.byte 0x1 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x1 0. "DBGRUN,Debug Run" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "SWTRIGCTRL,Software Trigger Control"
|
|
bitfld.long 0x0 15. "SWTRIG15,Channel 15 Software Trigger" "0,1"
|
|
bitfld.long 0x0 14. "SWTRIG14,Channel 14 Software Trigger" "0,1"
|
|
bitfld.long 0x0 13. "SWTRIG13,Channel 13 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SWTRIG12,Channel 12 Software Trigger" "0,1"
|
|
bitfld.long 0x0 11. "SWTRIG11,Channel 11 Software Trigger" "0,1"
|
|
bitfld.long 0x0 10. "SWTRIG10,Channel 10 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "SWTRIG9,Channel 9 Software Trigger" "0,1"
|
|
bitfld.long 0x0 8. "SWTRIG8,Channel 8 Software Trigger" "0,1"
|
|
bitfld.long 0x0 7. "SWTRIG7,Channel 7 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "SWTRIG6,Channel 6 Software Trigger" "0,1"
|
|
bitfld.long 0x0 5. "SWTRIG5,Channel 5 Software Trigger" "0,1"
|
|
bitfld.long 0x0 4. "SWTRIG4,Channel 4 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SWTRIG3,Channel 3 Software Trigger" "0,1"
|
|
bitfld.long 0x0 2. "SWTRIG2,Channel 2 Software Trigger" "0,1"
|
|
bitfld.long 0x0 1. "SWTRIG1,Channel 1 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWTRIG0,Channel 0 Software Trigger" "0,1"
|
|
line.long 0x4 "PRICTRL0,Priority Control 0"
|
|
bitfld.long 0x4 31. "RRLVLEN3,Level 3 Round-Robin Scheduling Enable" "0,1"
|
|
bitfld.long 0x4 29.--30. "QOS3,Level 3 Quality of Service" "0: Regular delivery,1: Bandwidth shortage,2: Latency sensitive,3: Latency critical"
|
|
hexmask.long.byte 0x4 24.--28. 1. "LVLPRI3,Level 3 Channel Priority Number"
|
|
newline
|
|
bitfld.long 0x4 23. "RRLVLEN2,Level 2 Round-Robin Scheduling Enable" "0,1"
|
|
bitfld.long 0x4 21.--22. "QOS2,Level 2 Quality of Service" "0: Regular delivery,1: Bandwidth shortage,2: Latency sensitive,3: Latency critical"
|
|
hexmask.long.byte 0x4 16.--20. 1. "LVLPRI2,Level 2 Channel Priority Number"
|
|
newline
|
|
bitfld.long 0x4 15. "RRLVLEN1,Level 1 Round-Robin Scheduling Enable" "0,1"
|
|
bitfld.long 0x4 13.--14. "QOS1,Level 1 Quality of Service" "0: Regular delivery,1: Bandwidth shortage,2: Latency sensitive,3: Latency critical"
|
|
hexmask.long.byte 0x4 8.--12. 1. "LVLPRI1,Level 1 Channel Priority Number"
|
|
newline
|
|
bitfld.long 0x4 7. "RRLVLEN0,Level 0 Round-Robin Scheduling Enable" "0,1"
|
|
bitfld.long 0x4 5.--6. "QOS0,Level 0 Quality of Service" "0: Regular delivery,1: Bandwidth shortage,2: Latency sensitive,3: Latency critical"
|
|
hexmask.long.byte 0x4 0.--4. 1. "LVLPRI0,Level 0 Channel Priority Number"
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "INTPEND,Interrupt Pending"
|
|
bitfld.word 0x0 15. "PEND,Pending" "0,1"
|
|
bitfld.word 0x0 14. "BUSY,Busy" "0,1"
|
|
bitfld.word 0x0 13. "FERR,Fetch Error" "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CRCERR,CRC Error" "0,1"
|
|
bitfld.word 0x0 10. "SUSP,Channel Suspend" "0,1"
|
|
bitfld.word 0x0 9. "TCMPL,Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "TERR,Transfer Error" "0,1"
|
|
hexmask.word.byte 0x0 0.--4. 1. "ID,Channel ID"
|
|
rgroup.long 0x24++0xF
|
|
line.long 0x0 "INTSTATUS,Interrupt Status"
|
|
bitfld.long 0x0 15. "CHINT15,Channel 15 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 14. "CHINT14,Channel 14 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 13. "CHINT13,Channel 13 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CHINT12,Channel 12 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 11. "CHINT11,Channel 11 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 10. "CHINT10,Channel 10 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CHINT9,Channel 9 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 8. "CHINT8,Channel 8 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 7. "CHINT7,Channel 7 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CHINT6,Channel 6 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 5. "CHINT5,Channel 5 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "CHINT4,Channel 4 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHINT3,Channel 3 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "CHINT2,Channel 2 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHINT1,Channel 1 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CHINT0,Channel 0 Pending Interrupt" "0,1"
|
|
line.long 0x4 "BUSYCH,Busy Channels"
|
|
bitfld.long 0x4 15. "BUSYCH15,Busy Channel 15" "0,1"
|
|
bitfld.long 0x4 14. "BUSYCH14,Busy Channel 14" "0,1"
|
|
bitfld.long 0x4 13. "BUSYCH13,Busy Channel 13" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "BUSYCH12,Busy Channel 12" "0,1"
|
|
bitfld.long 0x4 11. "BUSYCH11,Busy Channel 11" "0,1"
|
|
bitfld.long 0x4 10. "BUSYCH10,Busy Channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "BUSYCH9,Busy Channel 9" "0,1"
|
|
bitfld.long 0x4 8. "BUSYCH8,Busy Channel 8" "0,1"
|
|
bitfld.long 0x4 7. "BUSYCH7,Busy Channel 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "BUSYCH6,Busy Channel 6" "0,1"
|
|
bitfld.long 0x4 5. "BUSYCH5,Busy Channel 5" "0,1"
|
|
bitfld.long 0x4 4. "BUSYCH4,Busy Channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BUSYCH3,Busy Channel 3" "0,1"
|
|
bitfld.long 0x4 2. "BUSYCH2,Busy Channel 2" "0,1"
|
|
bitfld.long 0x4 1. "BUSYCH1,Busy Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "BUSYCH0,Busy Channel 0" "0,1"
|
|
line.long 0x8 "PENDCH,Pending Channels"
|
|
bitfld.long 0x8 15. "PENDCH15,Pending Channel 15" "0,1"
|
|
bitfld.long 0x8 14. "PENDCH14,Pending Channel 14" "0,1"
|
|
bitfld.long 0x8 13. "PENDCH13,Pending Channel 13" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "PENDCH12,Pending Channel 12" "0,1"
|
|
bitfld.long 0x8 11. "PENDCH11,Pending Channel 11" "0,1"
|
|
bitfld.long 0x8 10. "PENDCH10,Pending Channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "PENDCH9,Pending Channel 9" "0,1"
|
|
bitfld.long 0x8 8. "PENDCH8,Pending Channel 8" "0,1"
|
|
bitfld.long 0x8 7. "PENDCH7,Pending Channel 7" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "PENDCH6,Pending Channel 6" "0,1"
|
|
bitfld.long 0x8 5. "PENDCH5,Pending Channel 5" "0,1"
|
|
bitfld.long 0x8 4. "PENDCH4,Pending Channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "PENDCH3,Pending Channel 3" "0,1"
|
|
bitfld.long 0x8 2. "PENDCH2,Pending Channel 2" "0,1"
|
|
bitfld.long 0x8 1. "PENDCH1,Pending Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "PENDCH0,Pending Channel 0" "0,1"
|
|
line.long 0xC "ACTIVE,Active Channel and Levels"
|
|
hexmask.long.word 0xC 16.--31. 1. "BTCNT,Active Channel Block Transfer Count"
|
|
bitfld.long 0xC 15. "ABUSY,Active Channel Busy" "0,1"
|
|
hexmask.long.byte 0xC 8.--12. 1. "ID,Active Channel ID"
|
|
newline
|
|
bitfld.long 0xC 3. "LVLEX3,Level 3 Channel Trigger Request Executing" "0,1"
|
|
bitfld.long 0xC 2. "LVLEX2,Level 2 Channel Trigger Request Executing" "0,1"
|
|
bitfld.long 0xC 1. "LVLEX1,Level 1 Channel Trigger Request Executing" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "LVLEX0,Level 0 Channel Trigger Request Executing" "0,1"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "BASEADDR,Descriptor Memory Section Base Address"
|
|
hexmask.long 0x0 0.--31. 1. "BASEADDR,Descriptor Memory Base Address"
|
|
line.long 0x4 "WRBADDR,Write-Back Memory Section Base Address"
|
|
hexmask.long 0x4 0.--31. 1. "WRBADDR,Write-Back Memory Base Address"
|
|
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x41004040 ad:0x41004050 ad:0x41004060 ad:0x41004070 ad:0x41004080 ad:0x41004090 ad:0x410040A0 ad:0x410040B0 ad:0x410040C0 ad:0x410040D0 ad:0x410040E0 ad:0x410040F0 ad:0x41004100 ad:0x41004110 ad:0x41004120 ad:0x41004130)
|
|
tree "CHANNEL[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CHCTRLA,Channel n Control A"
|
|
bitfld.long 0x0 28.--29. "THRESHOLD,FIFO Threshold" "0: Destination write starts after each beat source..,1: Destination write starts after 2-beats source..,2: Destination write starts after 4-beats source..,3: Destination write starts after 8-beats source.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "BURSTLEN,Burst Length"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "TRIGACT,Trigger Action" "0: One trigger required for each block transfer,?,2: One trigger required for each burst transfer,3: One trigger required for each transaction"
|
|
hexmask.long.byte 0x0 8.--14. 1. "TRIGSRC,Trigger Source"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Channel Run in Standby" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Channel Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Channel Software Reset" "0,1"
|
|
group.byte ($2+0x4)++0x2
|
|
line.byte 0x0 "CHCTRLB,Channel n Control B"
|
|
bitfld.byte 0x0 0.--1. "CMD,Software Command" "0: No action,1: Channel suspend operation,2: Channel resume operation,?"
|
|
line.byte 0x1 "CHPRILVL,Channel n Priority Level"
|
|
bitfld.byte 0x1 0.--1. "PRILVL,Channel Priority Level" "0: Channel Priority Level 0 (Lowest Level),1: Channel Priority Level 1,2: Channel Priority Level 2,3: Channel Priority Level 3 (Highest Level)"
|
|
line.byte 0x2 "CHEVCTRL,Channel n Event Control"
|
|
bitfld.byte 0x2 7. "EVOE,Channel Event Output Enable" "0,1"
|
|
bitfld.byte 0x2 6. "EVIE,Channel Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 4.--5. "EVOMODE,Channel Event Output Mode" "0: Block event output selection. Refer to..,1: Ongoing trigger action,?,?"
|
|
bitfld.byte 0x2 0.--2. "EVACT,Channel Event Input Action" "0: No action,1: Transfer and periodic transfer trigger,2: Conditional transfer trigger,3: Conditional block transfer,4: Channel suspend operation,5: Channel resume operation,6: Skip next block suspend action,7: Increase priority"
|
|
group.byte ($2+0xC)++0x3
|
|
line.byte 0x0 "CHINTENCLR,Channel n Interrupt Enable Clear"
|
|
bitfld.byte 0x0 2. "SUSP,Channel Suspend Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TCMPL,Channel Transfer Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "TERR,Channel Transfer Error Interrupt Enable" "0,1"
|
|
line.byte 0x1 "CHINTENSET,Channel n Interrupt Enable Set"
|
|
bitfld.byte 0x1 2. "SUSP,Channel Suspend Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 1. "TCMPL,Channel Transfer Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "TERR,Channel Transfer Error Interrupt Enable" "0,1"
|
|
line.byte 0x2 "CHINTFLAG,Channel n Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 2. "SUSP,Channel Suspend" "0,1"
|
|
bitfld.byte 0x2 1. "TCMPL,Channel Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 0. "TERR,Channel Transfer Error" "0,1"
|
|
line.byte 0x3 "CHSTATUS,Channel n Status"
|
|
bitfld.byte 0x3 3. "CRCERR,Channel CRC Error" "0,1"
|
|
bitfld.byte 0x3 2. "FERR,Channel Fetch Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 1. "BUSY,Channel Busy" "0,1"
|
|
bitfld.byte 0x3 0. "PEND,Channel Pending" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "DMT (Deadman Timer)"
|
|
base ad:0x44000E00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DMTCON,"
|
|
bitfld.long 0x0 15. "ON," "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DMTPRECLR,"
|
|
hexmask.long.byte 0x0 8.--15. 1. "STEP1,"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "DMTCLR,"
|
|
hexmask.long.byte 0x0 0.--7. 1. "STEP2,"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "DMTSTAT,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 7. "BAD1," "0,1"
|
|
bitfld.long 0x0 6. "BAD2," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 7. "BAD1," "0,1"
|
|
bitfld.long 0x0 6. "BAD2," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 6.--7. "BAD," "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x0 5. "DMTEVENT," "0,1"
|
|
bitfld.long 0x0 0. "WINOPN," "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DMTCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "COUNTER,"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DMTHOLDREG,"
|
|
hexmask.long.word 0x0 0.--15. 1. "UPRCNT,"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "DMTPSCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "PSCNT,"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "DMTPSINTV,"
|
|
hexmask.long 0x0 0.--31. 1. "PSINTV,"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "DMTCONCLR,Bit clear register"
|
|
line.long 0x4 "DMTCONSET,Bit set register"
|
|
line.long 0x8 "DMTCONINV,Bit invert register"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "DMTPRECLRCLR,Bit clear register"
|
|
line.long 0x4 "DMTPRECLRSET,Bit set register"
|
|
line.long 0x8 "DMTPRECLRINV,Bit invert register"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DMTCLRCLR,Bit clear register"
|
|
line.long 0x4 "DMTCLRSET,Bit set register"
|
|
line.long 0x8 "DMTCLRINV,Bit invert register"
|
|
group.long 0x34++0xB
|
|
line.long 0x0 "DMTSTATCLR,Bit clear register"
|
|
line.long 0x4 "DMTSTATSET,Bit set register"
|
|
line.long 0x8 "DMTSTATINV,Bit invert register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "DMTCNTCLR,Bit clear register"
|
|
line.long 0x4 "DMTCNTSET,Bit set register"
|
|
line.long 0x8 "DMTCNTINV,Bit invert register"
|
|
group.long 0x54++0xB
|
|
line.long 0x0 "DMTHOLDREGCLR,Bit clear register"
|
|
line.long 0x4 "DMTHOLDREGSET,Bit set register"
|
|
line.long 0x8 "DMTHOLDREGINV,Bit invert register"
|
|
group.long 0x64++0xB
|
|
line.long 0x0 "DMTPSCNTCLR,Bit clear register"
|
|
line.long 0x4 "DMTPSCNTSET,Bit set register"
|
|
line.long 0x8 "DMTPSCNTINV,Bit invert register"
|
|
group.long 0x74++0xB
|
|
line.long 0x0 "DMTPSINTVCLR,Bit clear register"
|
|
line.long 0x4 "DMTPSINTVSET,Bit set register"
|
|
line.long 0x8 "DMTPSINTVINV,Bit invert register"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DMTCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "COUNTER,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "DMTHOLDREG,"
|
|
hexmask.long.word 0x0 0.--15. 1. "UPRCNT,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "DMTPSCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "PSCNT,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "DMTPSINTV,"
|
|
hexmask.long 0x0 0.--31. 1. "PSINTV,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DMTCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "COUNTER,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "DMTHOLDREG,"
|
|
hexmask.long.word 0x0 0.--15. 1. "UPRCNT,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "DMTPSCNT,"
|
|
hexmask.long 0x0 0.--31. 1. "PSCNT,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "DMTPSINTV,"
|
|
hexmask.long 0x0 0.--31. 1. "PSINTV,"
|
|
endif
|
|
tree.end
|
|
tree "DSCON (Deep Sleep Control)"
|
|
base ad:0x42011000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DSCON,"
|
|
bitfld.long 0x0 15. "DSEN," "0,1"
|
|
bitfld.long 0x0 13. "XSEMAEN," "0,1"
|
|
bitfld.long 0x0 12. "RTCPWREQ," "0,1"
|
|
bitfld.long 0x0 8. "RTCCWDIS," "0,1"
|
|
bitfld.long 0x0 1. "ZPBOR," "0,1"
|
|
bitfld.long 0x0 0. "DSSR," "0,1"
|
|
line.long 0x4 "DSWAKE,"
|
|
bitfld.long 0x4 8. "INT0," "0,1"
|
|
bitfld.long 0x4 7. "FAULT," "0,1"
|
|
bitfld.long 0x4 5. "EXT," "0,1"
|
|
bitfld.long 0x4 4. "DSWDT," "0,1"
|
|
bitfld.long 0x4 3. "RTCC," "0,1"
|
|
bitfld.long 0x4 2. "MCLR," "0,1"
|
|
bitfld.long 0x4 1. "ICD," "0,1"
|
|
line.long 0x8 "DSSEMA1,"
|
|
hexmask.long 0x8 0.--31. 1. "DSSEMA,"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DSXSEMA1,"
|
|
hexmask.long 0x0 0.--31. 1. "DSXSEMA,"
|
|
tree.end
|
|
tree "DSU (Device Service Unit)"
|
|
base ad:0x41000000
|
|
wgroup.byte 0x0++0x0
|
|
line.byte 0x0 "CTRL,Control"
|
|
bitfld.byte 0x0 7. "SMSA,Start Memory Stream Access" "0,1"
|
|
bitfld.byte 0x0 6. "ARR,Auxiliary Row Read" "0,1"
|
|
bitfld.byte 0x0 4. "CE,Chip-Erase" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.byte 0x0 3. "MBIST,Memory built-in self-test" "0,1"
|
|
endif
|
|
bitfld.byte 0x0 2. "CRC,32-bit Cyclic Redundancy Code" "0,1"
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "STATUSA,Status A"
|
|
bitfld.byte 0x0 4. "PERR,Protection Error" "0,1"
|
|
bitfld.byte 0x0 3. "FAIL,Failure" "0,1"
|
|
bitfld.byte 0x0 2. "BERR,Bus Error" "0,1"
|
|
bitfld.byte 0x0 1. "CRSTEXT,CPU Reset Phase Extension" "0,1"
|
|
bitfld.byte 0x0 0. "DONE,Done" "0,1"
|
|
rgroup.byte 0x2++0x0
|
|
line.byte 0x0 "STATUSB,Status B"
|
|
bitfld.byte 0x0 7. "TDCCD1,Test Debug Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x0 6. "TDCCD0,Test Debug Communication Channel 0 Dirty" "0,1"
|
|
bitfld.byte 0x0 5. "CELCK,Chip Erase Locked" "0,1"
|
|
bitfld.byte 0x0 4. "HPE,Hot-Plugging Enable" "0,1"
|
|
bitfld.byte 0x0 3. "DCCD1,Debug Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x0 2. "DCCD0,Debug Communication Channel 0 Dirty" "0,1"
|
|
bitfld.byte 0x0 1. "DBGPRES,Debugger Present" "0,1"
|
|
bitfld.byte 0x0 0. "PROT,Protected" "0,1"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "ADDR,Address"
|
|
hexmask.long 0x0 2.--31. 1. "ADDR,Address"
|
|
bitfld.long 0x0 0.--1. "AMOD,Access Mode" "0,1,2,3"
|
|
line.long 0x4 "LENGTH,Length"
|
|
hexmask.long 0x4 2.--31. 1. "LENGTH,Length"
|
|
line.long 0x8 "DATA,Data"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Data"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "DCC[$1],Debug Communication Channel n"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "DID,Device Identification"
|
|
hexmask.long.byte 0x0 28.--31. 1. "REVISION,Revision Number"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.long.byte 0x0 23.--27. 1. "FAMILY,Family"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SERIES,Series"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 23.--27. 1. "FAMILY,Family"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 23.--27. 1. "FAMILY,Family"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 16.--21. 1. "SERIES,Series"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 16.--21. 1. "SERIES,Series"
|
|
endif
|
|
hexmask.long.byte 0x0 8.--15. 1. "DIE,Die Number"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DEVSEL,Device Select"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CFG,Configuration"
|
|
bitfld.long 0x0 4. "ETBRAMEN,Trace Control" "0,1"
|
|
bitfld.long 0x0 2.--3. "DCCDMALEVEL,DMA Trigger Level" "0: Trigger rises when DCC is empty,1: Trigger rises when DCC is full,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "LQOS,Latency Quality Of Service" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CFG,Configuration"
|
|
bitfld.long 0x0 4. "ETBRAMEN,Trace Control" "0,1"
|
|
bitfld.long 0x0 2.--3. "DCCDMALEVEL,DMA Trigger Level" "0: Trigger rises when DCC is empty,1: Trigger rises when DCC is full,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "LQOS,Latency Quality Of Service" "0,1,2,3"
|
|
endif
|
|
rgroup.long 0x1000++0xB
|
|
line.long 0x0 "ENTRY0,CoreSight ROM Table Entry 0"
|
|
hexmask.long.tbyte 0x0 12.--31. 1. "ADDOFF,Address Offset"
|
|
bitfld.long 0x0 1. "FMT,Format" "0,1"
|
|
bitfld.long 0x0 0. "EPRES,Entry Present" "0,1"
|
|
line.long 0x4 "ENTRY1,CoreSight ROM Table Entry 1"
|
|
line.long 0x8 "END,CoreSight ROM Table End"
|
|
hexmask.long 0x8 0.--31. 1. "END,End Marker"
|
|
rgroup.long 0x1FCC++0x7
|
|
line.long 0x0 "MEMTYPE,CoreSight ROM Table Memory Type"
|
|
bitfld.long 0x0 0. "SMEMP,System Memory Present" "0,1"
|
|
line.long 0x4 "PID4,Peripheral Identification 4"
|
|
hexmask.long.byte 0x4 4.--7. 1. "FKBC,4KB count"
|
|
hexmask.long.byte 0x4 0.--3. 1. "JEPCC,JEP-106 Continuation Code"
|
|
rgroup.long 0x1FE0++0x1F
|
|
line.long 0x0 "PID0,Peripheral Identification 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PARTNBL,Part Number Low"
|
|
line.long 0x4 "PID1,Peripheral Identification 1"
|
|
hexmask.long.byte 0x4 4.--7. 1. "JEPIDCL,Low part of the JEP-106 Identity Code"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PARTNBH,Part Number High"
|
|
line.long 0x8 "PID2,Peripheral Identification 2"
|
|
hexmask.long.byte 0x8 4.--7. 1. "REVISION,Revision Number"
|
|
bitfld.long 0x8 3. "JEPU,JEP-106 Identity Code is used" "0,1"
|
|
bitfld.long 0x8 0.--2. "JEPIDCH,JEP-106 Identity Code High" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PID3,Peripheral Identification 3"
|
|
hexmask.long.byte 0xC 4.--7. 1. "REVAND,Revision Number"
|
|
hexmask.long.byte 0xC 0.--3. 1. "CUSMOD,ARM CUSMOD"
|
|
line.long 0x10 "CID0,Component Identification 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PREAMBLEB0,Preamble Byte 0"
|
|
line.long 0x14 "CID1,Component Identification 1"
|
|
hexmask.long.byte 0x14 4.--7. 1. "CCLASS,Component Class"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PREAMBLE,Preamble"
|
|
line.long 0x18 "CID2,Component Identification 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. "PREAMBLEB2,Preamble Byte 2"
|
|
line.long 0x1C "CID3,Component Identification 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "PREAMBLEB3,Preamble Byte 3"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x38)++0x3
|
|
line.long 0x0 "UUID[$1],Unique Identifier n"
|
|
hexmask.long 0x0 0.--31. 1. "UUID,UUID"
|
|
repeat.end
|
|
rgroup.long 0x48++0xB
|
|
line.long 0x0 "SECCFG,Secure Config"
|
|
hexmask.long 0x0 0.--31. 1. "SECCFG,Secure Config"
|
|
line.long 0x4 "CTR_STAT,RoT Rollback counter"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ROLLBACK_CTR,Rollback counter"
|
|
line.long 0x8 "BOOT_STAT,RoT Boot Status"
|
|
hexmask.long.byte 0x8 0.--7. 1. "BOOT_STATUS,Boot Status"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x54)++0x3
|
|
line.long 0x0 "BOOT_KEY[$1],Secure Boot Key n"
|
|
hexmask.long 0x0 0.--31. 1. "BOOT_KEY,Secure Boot Key"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xF0)++0x3
|
|
line.long 0x0 "DCFG[$1],Device Configuration"
|
|
hexmask.long 0x0 0.--31. 1. "DCFG,Device Configuration"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x38)++0x3
|
|
line.long 0x0 "UUID[$1],Unique Identifier n"
|
|
hexmask.long 0x0 0.--31. 1. "UUID,UUID"
|
|
repeat.end
|
|
rgroup.long 0x48++0xB
|
|
line.long 0x0 "SECCFG,Secure Config"
|
|
hexmask.long 0x0 0.--31. 1. "SECCFG,Secure Config"
|
|
line.long 0x4 "CTR_STAT,RoT Rollback counter"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ROLLBACK_CTR,Rollback counter"
|
|
line.long 0x8 "BOOT_STAT,RoT Boot Status"
|
|
hexmask.long.byte 0x8 0.--7. 1. "BOOT_STATUS,Boot Status"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x54)++0x3
|
|
line.long 0x0 "BOOT_KEY[$1],Secure Boot Key n"
|
|
hexmask.long 0x0 0.--31. 1. "BOOT_KEY,Secure Boot Key"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xF0)++0x3
|
|
line.long 0x0 "DCFG[$1],Device Configuration"
|
|
hexmask.long 0x0 0.--31. 1. "DCFG,Device Configuration"
|
|
repeat.end
|
|
endif
|
|
tree.end
|
|
tree "DWT (Data Watchpoint and Trace Register)"
|
|
base ad:0xE0001000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL,Control Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "NUMCOMP,"
|
|
bitfld.long 0x0 27. "NOTRCPKT," "0,1"
|
|
bitfld.long 0x0 26. "NOEXTTRIG," "0,1"
|
|
bitfld.long 0x0 25. "NOCYCCNT," "0,1"
|
|
bitfld.long 0x0 24. "NOPRFCNT," "0,1"
|
|
bitfld.long 0x0 22. "CYCEVTENA," "0,1"
|
|
bitfld.long 0x0 21. "FOLDEVTENA," "0,1"
|
|
bitfld.long 0x0 20. "LSUEVTENA," "0,1"
|
|
bitfld.long 0x0 19. "SLEEPEVTENA," "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "EXCEVTENA," "0,1"
|
|
bitfld.long 0x0 17. "CPIEVTENA," "0,1"
|
|
bitfld.long 0x0 16. "EXCTRCENA," "0,1"
|
|
bitfld.long 0x0 12. "PCSAMPLENA," "0,1"
|
|
bitfld.long 0x0 10.--11. "SYNCTAP," "0,1,2,3"
|
|
bitfld.long 0x0 9. "CYCTAP," "0,1"
|
|
hexmask.long.byte 0x0 5.--8. 1. "POSTINIT,"
|
|
hexmask.long.byte 0x0 1.--4. 1. "POSTPRESET,"
|
|
bitfld.long 0x0 0. "CYCCNTENA," "0,1"
|
|
line.long 0x4 "CYCCNT,Cycle Count Register"
|
|
line.long 0x8 "CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "CPICNT,"
|
|
line.long 0xC "EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "EXCCNT,"
|
|
line.long 0x10 "SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SLEEPCNT,"
|
|
line.long 0x14 "LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. "LSUCNT,"
|
|
line.long 0x18 "FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. "FOLDCNT,"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "PCSR,Program Counter Sample Register"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "COMP0,Comparator Register 0"
|
|
line.long 0x4 "MASK0,Mask Register 0"
|
|
hexmask.long.byte 0x4 0.--4. 1. "MASK,"
|
|
line.long 0x8 "FUNCTION0,Function Register 0"
|
|
bitfld.long 0x8 24. "MATCHED," "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1,"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0,"
|
|
bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3"
|
|
bitfld.long 0x8 9. "LNK1ENA," "0,1"
|
|
bitfld.long 0x8 8. "DATAVMATCH," "0,1"
|
|
bitfld.long 0x8 7. "CYCMATCH," "0,1"
|
|
bitfld.long 0x8 5. "EMITRANGE," "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FUNCTION,"
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "COMP1,Comparator Register 1"
|
|
line.long 0x4 "MASK1,Mask Register 1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "MASK,"
|
|
line.long 0x8 "FUNCTION1,Function Register 1"
|
|
bitfld.long 0x8 24. "MATCHED," "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1,"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0,"
|
|
bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3"
|
|
bitfld.long 0x8 9. "LNK1ENA," "0,1"
|
|
bitfld.long 0x8 8. "DATAVMATCH," "0,1"
|
|
bitfld.long 0x8 7. "CYCMATCH," "0,1"
|
|
bitfld.long 0x8 5. "EMITRANGE," "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FUNCTION,"
|
|
group.long 0x40++0xB
|
|
line.long 0x0 "COMP2,Comparator Register 2"
|
|
line.long 0x4 "MASK2,Mask Register 2"
|
|
hexmask.long.byte 0x4 0.--4. 1. "MASK,"
|
|
line.long 0x8 "FUNCTION2,Function Register 2"
|
|
bitfld.long 0x8 24. "MATCHED," "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1,"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0,"
|
|
bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3"
|
|
bitfld.long 0x8 9. "LNK1ENA," "0,1"
|
|
bitfld.long 0x8 8. "DATAVMATCH," "0,1"
|
|
bitfld.long 0x8 7. "CYCMATCH," "0,1"
|
|
bitfld.long 0x8 5. "EMITRANGE," "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FUNCTION,"
|
|
group.long 0x50++0xB
|
|
line.long 0x0 "COMP3,Comparator Register 3"
|
|
line.long 0x4 "MASK3,Mask Register 3"
|
|
hexmask.long.byte 0x4 0.--4. 1. "MASK,"
|
|
line.long 0x8 "FUNCTION3,Function Register 3"
|
|
bitfld.long 0x8 24. "MATCHED," "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1,"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0,"
|
|
bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3"
|
|
bitfld.long 0x8 9. "LNK1ENA," "0,1"
|
|
bitfld.long 0x8 8. "DATAVMATCH," "0,1"
|
|
bitfld.long 0x8 7. "CYCMATCH," "0,1"
|
|
bitfld.long 0x8 5. "EMITRANGE," "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FUNCTION,"
|
|
tree.end
|
|
tree "EIC (External Interrupt Controller)"
|
|
base ad:0x40000800
|
|
group.byte 0x0++0x1
|
|
line.byte 0x0 "CTRLA,Control A"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.byte 0x0 4. "CKSEL,Clock Selection" "0: Clocked by GCLK,1: Clocked by ULP32K"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.byte 0x0 4. "CKSEL,Clock Selection" "0: Clocked by GCLK,1: Clocked by LPCLK"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.byte 0x0 4. "CKSEL,Clock Selection" "0: Clocked by GCLK,1: Clocked by LPCLK"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.byte 0x1 "NMICTRL,Non-Maskable Interrupt Control"
|
|
bitfld.byte 0x1 4. "NMIASYNCH,Asynchronous Edge Detection Mode" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.byte 0x1 3. "NMIFILTEN,Non-Maskable Interrupt Filter Enable" "0,1"
|
|
bitfld.byte 0x1 0.--2. "NMISENSE,Non-Maskable Interrupt Sense Configuration" "0: No detection,1: Rising-edge detection,2: Falling-edge detection,3: Both-edges detection,4: High-level detection,5: Low-level detection,?,?"
|
|
group.word 0x2++0x1
|
|
line.word 0x0 "NMIFLAG,Non-Maskable Interrupt Flag Status and Clear"
|
|
bitfld.word 0x0 0. "NMI,Non-Maskable Interrupt" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 1. "ENABLE,Enable Synchronization Busy Status" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy Status" "0,1"
|
|
group.long 0x8++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
hexmask.long.byte 0x0 0.--3. 1. "EXTINTEO,External Interrupt Event Output Enable"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
hexmask.long.byte 0x4 0.--3. 1. "EXTINT,External Interrupt Enable"
|
|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
hexmask.long.byte 0x8 0.--3. 1. "EXTINT,External Interrupt Enable"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
hexmask.long.byte 0xC 0.--3. 1. "EXTINT,External Interrupt"
|
|
line.long 0x10 "ASYNCH,External Interrupt Asynchronous Mode"
|
|
hexmask.long.byte 0x10 0.--3. 1. "ASYNCH,Asynchronous Edge Detection Mode"
|
|
line.long 0x14 "CONFIG,External Interrupt Sense Configuration"
|
|
bitfld.long 0x14 15. "FILTEN3,Filter Enable 3" "0,1"
|
|
bitfld.long 0x14 12.--14. "SENSE3,Input Sense Configuration 3" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?"
|
|
bitfld.long 0x14 11. "FILTEN2,Filter Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 8.--10. "SENSE2,Input Sense Configuration 2" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?"
|
|
bitfld.long 0x14 7. "FILTEN1,Filter Enable 1" "0,1"
|
|
bitfld.long 0x14 4.--6. "SENSE1,Input Sense Configuration 1" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?"
|
|
newline
|
|
bitfld.long 0x14 3. "FILTEN0,Filter Enable 0" "0,1"
|
|
bitfld.long 0x14 0.--2. "SENSE0,Input Sense Configuration 0" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DEBOUNCEN,Debouncer Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DEBOUNCEN,Debouncer Enable"
|
|
line.long 0x4 "DPRESCALER,Debouncer Prescaler"
|
|
bitfld.long 0x4 16. "TICKON,Pin Sampler frequency selection" "0: Clocked by GCLK,1: Clocked by Low Frequency Clock"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x4 7. "STATES1,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples"
|
|
bitfld.long 0x4 4.--6. "PRESCALER1,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256"
|
|
newline
|
|
endif
|
|
bitfld.long 0x4 3. "STATES0,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples"
|
|
bitfld.long 0x4 0.--2. "PRESCALER0,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "PINSTATE,Pin State"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINSTATE,Pin State"
|
|
tree.end
|
|
tree "ETM (Embedded Trace Macrocell)"
|
|
base ad:0xE0041000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,ETM Main Control Register"
|
|
bitfld.long 0x0 28. "TSEN,TimeStamp Enable" "0,1"
|
|
bitfld.long 0x0 21. "PORTSIZE3,Port Size bit 3" "0,1"
|
|
bitfld.long 0x0 16.--17. "PORTMODE,Port Mode bits 1:0" "?,1: 0,?,?"
|
|
bitfld.long 0x0 13. "PORTMODE2,Port Mode bit 2" "0,1"
|
|
bitfld.long 0x0 11. "PORTSEL,ETM Port Select" "0,1"
|
|
bitfld.long 0x0 10. "PROG,ETM Programming" "0,1"
|
|
bitfld.long 0x0 9. "DBGRQ,Debug Request Control" "0,1"
|
|
bitfld.long 0x0 8. "BROUT,Branch Output" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "STALL,Stall Processor" "0,1"
|
|
bitfld.long 0x0 4.--6. "PORTSIZE,Port Size bits 2:0" "?,?,2: 0,?,?,?,?,?"
|
|
bitfld.long 0x0 0. "ETMPD,ETM Power Down" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "CCR,ETM Configuration Code Register"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TRIGGER,ETM Trigger Event Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "SR,ETM Status Register"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "SCR,ETM System Configuration Register"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TEEVR,ETM TraceEnable Event Register"
|
|
line.long 0x4 "TECR1,ETM TraceEnable Control 1 Register"
|
|
line.long 0x8 "FFLR,ETM FIFO Full Level Register"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "CNTRLDVR1,ETM Free-running Counter Reload Value"
|
|
rgroup.long 0x1E0++0xB
|
|
line.long 0x0 "SYNCFR,ETM Synchronization Frequency Register"
|
|
line.long 0x4 "IDR,ETM ID Register"
|
|
line.long 0x8 "CCER,ETM Configuration Code Extension Register"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x0 "TESSEICR,ETM TraceEnable Start/Stop EmbeddedICE Control Register"
|
|
group.long 0x1F8++0x3
|
|
line.long 0x0 "TSEVT,ETM TimeStamp Event Register"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "TRACEIDR,ETM CoreSight Trace ID Register"
|
|
rgroup.long 0x208++0x3
|
|
line.long 0x0 "IDR2,ETM ID Register 2"
|
|
rgroup.long 0x314++0x3
|
|
line.long 0x0 "PDSR,ETM Device Power-Down Status Register"
|
|
rgroup.long 0xEE0++0x3
|
|
line.long 0x0 "ITMISCIN,ETM Integration Test Miscellaneous Inputs"
|
|
wgroup.long 0xEE8++0x3
|
|
line.long 0x0 "ITTRIGOUT,ETM Integration Test Trigger Out"
|
|
rgroup.long 0xEF0++0x3
|
|
line.long 0x0 "ITATBCTR2,ETM Integration Test ATB Control 2"
|
|
wgroup.long 0xEF8++0x3
|
|
line.long 0x0 "ITATBCTR0,ETM Integration Test ATB Control 0"
|
|
group.long 0xF00++0x3
|
|
line.long 0x0 "ITCTRL,ETM Integration Mode Control Register"
|
|
bitfld.long 0x0 0. "INTEGRATION," "0,1"
|
|
group.long 0xFA0++0x7
|
|
line.long 0x0 "CLAIMSET,ETM Claim Tag Set Register"
|
|
line.long 0x4 "CLAIMCLR,ETM Claim Tag Clear Register"
|
|
wgroup.long 0xFB0++0x3
|
|
line.long 0x0 "LAR,ETM Lock Access Register"
|
|
rgroup.long 0xFB4++0x7
|
|
line.long 0x0 "LSR,ETM Lock Status Register"
|
|
bitfld.long 0x0 2. "ByteAcc," "0,1"
|
|
bitfld.long 0x0 1. "Access," "0,1"
|
|
bitfld.long 0x0 0. "Present," "0,1"
|
|
line.long 0x4 "AUTHSTATUS,ETM Authentication Status Register"
|
|
rgroup.long 0xFCC++0x33
|
|
line.long 0x0 "DEVTYPE,ETM CoreSight Device Type Register"
|
|
line.long 0x4 "PIDR4,ETM Peripheral Identification Register #4"
|
|
line.long 0x8 "PIDR5,ETM Peripheral Identification Register #5"
|
|
line.long 0xC "PIDR6,ETM Peripheral Identification Register #6"
|
|
line.long 0x10 "PIDR7,ETM Peripheral Identification Register #7"
|
|
line.long 0x14 "PIDR0,ETM Peripheral Identification Register #0"
|
|
line.long 0x18 "PIDR1,ETM Peripheral Identification Register #1"
|
|
line.long 0x1C "PIDR2,ETM Peripheral Identification Register #2"
|
|
line.long 0x20 "PIDR3,ETM Peripheral Identification Register #3"
|
|
line.long 0x24 "CIDR0,ETM Component Identification Register #0"
|
|
line.long 0x28 "CIDR1,ETM Component Identification Register #1"
|
|
line.long 0x2C "CIDR2,ETM Component Identification Register #2"
|
|
line.long 0x30 "CIDR3,ETM Component Identification Register #3"
|
|
tree.end
|
|
tree "EVSYS (Event System)"
|
|
base ad:0x41006000
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "CTRLA,Control"
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "SWEVT,Software Event"
|
|
bitfld.long 0x0 31. "CHANNEL31,Channel 31 Software Selection" "0,1"
|
|
bitfld.long 0x0 30. "CHANNEL30,Channel 30 Software Selection" "0,1"
|
|
bitfld.long 0x0 29. "CHANNEL29,Channel 29 Software Selection" "0,1"
|
|
bitfld.long 0x0 28. "CHANNEL28,Channel 28 Software Selection" "0,1"
|
|
bitfld.long 0x0 27. "CHANNEL27,Channel 27 Software Selection" "0,1"
|
|
bitfld.long 0x0 26. "CHANNEL26,Channel 26 Software Selection" "0,1"
|
|
bitfld.long 0x0 25. "CHANNEL25,Channel 25 Software Selection" "0,1"
|
|
bitfld.long 0x0 24. "CHANNEL24,Channel 24 Software Selection" "0,1"
|
|
bitfld.long 0x0 23. "CHANNEL23,Channel 23 Software Selection" "0,1"
|
|
bitfld.long 0x0 22. "CHANNEL22,Channel 22 Software Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "CHANNEL21,Channel 21 Software Selection" "0,1"
|
|
bitfld.long 0x0 20. "CHANNEL20,Channel 20 Software Selection" "0,1"
|
|
bitfld.long 0x0 19. "CHANNEL19,Channel 19 Software Selection" "0,1"
|
|
bitfld.long 0x0 18. "CHANNEL18,Channel 18 Software Selection" "0,1"
|
|
bitfld.long 0x0 17. "CHANNEL17,Channel 17 Software Selection" "0,1"
|
|
bitfld.long 0x0 16. "CHANNEL16,Channel 16 Software Selection" "0,1"
|
|
bitfld.long 0x0 15. "CHANNEL15,Channel 15 Software Selection" "0,1"
|
|
bitfld.long 0x0 14. "CHANNEL14,Channel 14 Software Selection" "0,1"
|
|
bitfld.long 0x0 13. "CHANNEL13,Channel 13 Software Selection" "0,1"
|
|
bitfld.long 0x0 12. "CHANNEL12,Channel 12 Software Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CHANNEL11,Channel 11 Software Selection" "0,1"
|
|
bitfld.long 0x0 10. "CHANNEL10,Channel 10 Software Selection" "0,1"
|
|
bitfld.long 0x0 9. "CHANNEL9,Channel 9 Software Selection" "0,1"
|
|
bitfld.long 0x0 8. "CHANNEL8,Channel 8 Software Selection" "0,1"
|
|
bitfld.long 0x0 7. "CHANNEL7,Channel 7 Software Selection" "0,1"
|
|
bitfld.long 0x0 6. "CHANNEL6,Channel 6 Software Selection" "0,1"
|
|
bitfld.long 0x0 5. "CHANNEL5,Channel 5 Software Selection" "0,1"
|
|
bitfld.long 0x0 4. "CHANNEL4,Channel 4 Software Selection" "0,1"
|
|
bitfld.long 0x0 3. "CHANNEL3,Channel 3 Software Selection" "0,1"
|
|
bitfld.long 0x0 2. "CHANNEL2,Channel 2 Software Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHANNEL1,Channel 1 Software Selection" "0,1"
|
|
bitfld.long 0x0 0. "CHANNEL0,Channel 0 Software Selection" "0,1"
|
|
group.byte 0x8++0x0
|
|
line.byte 0x0 "PRICTRL,Priority Control"
|
|
bitfld.byte 0x0 7. "RREN,Round-Robin Scheduling Enable" "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
hexmask.byte 0x0 0.--3. 1. "PRI,Channel Priority Number"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.byte 0x0 0.--4. 1. "PRI,Channel Priority Number"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.byte 0x0 0.--4. 1. "PRI,Channel Priority Number"
|
|
endif
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "INTPEND,Channel Pending Interrupt"
|
|
bitfld.word 0x0 15. "BUSY,Busy" "0,1"
|
|
bitfld.word 0x0 14. "READY,Ready" "0,1"
|
|
bitfld.word 0x0 9. "EVD,Channel Event Detected" "0,1"
|
|
bitfld.word 0x0 8. "OVR,Channel Overrun" "0,1"
|
|
hexmask.word.byte 0x0 0.--3. 1. "ID,Channel ID"
|
|
rgroup.long 0x14++0xB
|
|
line.long 0x0 "INTSTATUS,Interrupt Status"
|
|
bitfld.long 0x0 11. "CHINT11,Channel 11 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 10. "CHINT10,Channel 10 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "CHINT9,Channel 9 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 8. "CHINT8,Channel 8 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 7. "CHINT7,Channel 7 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "CHINT6,Channel 6 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 5. "CHINT5,Channel 5 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "CHINT4,Channel 4 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 3. "CHINT3,Channel 3 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "CHINT2,Channel 2 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHINT1,Channel 1 Pending Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHINT0,Channel 0 Pending Interrupt" "0,1"
|
|
line.long 0x4 "BUSYCH,Busy Channels"
|
|
bitfld.long 0x4 11. "BUSYCH11,Busy Channel 11" "0,1"
|
|
bitfld.long 0x4 10. "BUSYCH10,Busy Channel 10" "0,1"
|
|
bitfld.long 0x4 9. "BUSYCH9,Busy Channel 9" "0,1"
|
|
bitfld.long 0x4 8. "BUSYCH8,Busy Channel 8" "0,1"
|
|
bitfld.long 0x4 7. "BUSYCH7,Busy Channel 7" "0,1"
|
|
bitfld.long 0x4 6. "BUSYCH6,Busy Channel 6" "0,1"
|
|
bitfld.long 0x4 5. "BUSYCH5,Busy Channel 5" "0,1"
|
|
bitfld.long 0x4 4. "BUSYCH4,Busy Channel 4" "0,1"
|
|
bitfld.long 0x4 3. "BUSYCH3,Busy Channel 3" "0,1"
|
|
bitfld.long 0x4 2. "BUSYCH2,Busy Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "BUSYCH1,Busy Channel 1" "0,1"
|
|
bitfld.long 0x4 0. "BUSYCH0,Busy Channel 0" "0,1"
|
|
line.long 0x8 "READYUSR,Ready Users"
|
|
bitfld.long 0x8 11. "READYUSR11,Ready User for Channel 11" "0,1"
|
|
bitfld.long 0x8 10. "READYUSR10,Ready User for Channel 10" "0,1"
|
|
bitfld.long 0x8 9. "READYUSR9,Ready User for Channel 9" "0,1"
|
|
bitfld.long 0x8 8. "READYUSR8,Ready User for Channel 8" "0,1"
|
|
bitfld.long 0x8 7. "READYUSR7,Ready User for Channel 7" "0,1"
|
|
bitfld.long 0x8 6. "READYUSR6,Ready User for Channel 6" "0,1"
|
|
bitfld.long 0x8 5. "READYUSR5,Ready User for Channel 5" "0,1"
|
|
bitfld.long 0x8 4. "READYUSR4,Ready User for Channel 4" "0,1"
|
|
bitfld.long 0x8 3. "READYUSR3,Ready User for Channel 3" "0,1"
|
|
bitfld.long 0x8 2. "READYUSR2,Ready User for Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "READYUSR1,Ready User for Channel 1" "0,1"
|
|
bitfld.long 0x8 0. "READYUSR0,Ready User for Channel 0" "0,1"
|
|
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x41006020 ad:0x41006028 ad:0x41006030 ad:0x41006038 ad:0x41006040 ad:0x41006048 ad:0x41006050 ad:0x41006058 ad:0x41006060 ad:0x41006068 ad:0x41006070 ad:0x41006078 ad:0x41006080 ad:0x41006088 ad:0x41006090 ad:0x41006098)
|
|
tree "CHANNEL[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CHANNEL,Channel n Control"
|
|
bitfld.long 0x0 15. "ONDEMAND,Generic Clock On Demand" "0,1"
|
|
bitfld.long 0x0 14. "RUNSTDBY,Run in standby" "0,1"
|
|
bitfld.long 0x0 10.--11. "EDGSEL,Edge Detection Selection" "0: No event output when using the resynchronized or..,1: Event detection only on the rising edge of the..,2: Event detection only on the falling edge of the..,3: Event detection on rising and falling edges of.."
|
|
bitfld.long 0x0 8.--9. "PATH,Path Selection" "0: Synchronous path,1: Resynchronized path,2: Asynchronous path,?"
|
|
hexmask.long.byte 0x0 0.--6. 1. "EVGEN,Event Generator Selection"
|
|
group.byte ($2+0x4)++0x2
|
|
line.byte 0x0 "CHINTENCLR,Channel n Interrupt Enable Clear"
|
|
bitfld.byte 0x0 1. "EVD,Channel Event Detected Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVR,Channel Overrun Interrupt Disable" "0,1"
|
|
line.byte 0x1 "CHINTENSET,Channel n Interrupt Enable Set"
|
|
bitfld.byte 0x1 1. "EVD,Channel Event Detected Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVR,Channel Overrun Interrupt Enable" "0,1"
|
|
line.byte 0x2 "CHINTFLAG,Channel n Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 1. "EVD,Channel Event Detected" "0,1"
|
|
bitfld.byte 0x2 0. "OVR,Channel Overrun" "0,1"
|
|
rgroup.byte ($2+0x7)++0x0
|
|
line.byte 0x0 "CHSTATUS,Channel n Status"
|
|
bitfld.byte 0x0 1. "BUSYCH,Busy Channel" "0,1"
|
|
bitfld.byte 0x0 0. "RDYUSR,Ready User" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x410060A0 ad:0x410060A8 ad:0x410060B0 ad:0x410060B8 ad:0x410060C0 ad:0x410060C8 ad:0x410060D0 ad:0x410060D8 ad:0x410060E0 ad:0x410060E8 ad:0x410060F0 ad:0x410060F8 ad:0x41006100 ad:0x41006108 ad:0x41006110 ad:0x41006118)
|
|
tree "CHANNEL[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CHANNEL,Channel n Control"
|
|
bitfld.long 0x0 15. "ONDEMAND,Generic Clock On Demand" "0,1"
|
|
bitfld.long 0x0 14. "RUNSTDBY,Run in standby" "0,1"
|
|
bitfld.long 0x0 10.--11. "EDGSEL,Edge Detection Selection" "0: No event output when using the resynchronized or..,1: Event detection only on the rising edge of the..,2: Event detection only on the falling edge of the..,3: Event detection on rising and falling edges of.."
|
|
bitfld.long 0x0 8.--9. "PATH,Path Selection" "0: Synchronous path,1: Resynchronized path,2: Asynchronous path,?"
|
|
hexmask.long.byte 0x0 0.--6. 1. "EVGEN,Event Generator Selection"
|
|
group.byte ($2+0x4)++0x2
|
|
line.byte 0x0 "CHINTENCLR,Channel n Interrupt Enable Clear"
|
|
bitfld.byte 0x0 1. "EVD,Channel Event Detected Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVR,Channel Overrun Interrupt Disable" "0,1"
|
|
line.byte 0x1 "CHINTENSET,Channel n Interrupt Enable Set"
|
|
bitfld.byte 0x1 1. "EVD,Channel Event Detected Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVR,Channel Overrun Interrupt Enable" "0,1"
|
|
line.byte 0x2 "CHINTFLAG,Channel n Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 1. "EVD,Channel Event Detected" "0,1"
|
|
bitfld.byte 0x2 0. "OVR,Channel Overrun" "0,1"
|
|
rgroup.byte ($2+0x7)++0x0
|
|
line.byte 0x0 "CHSTATUS,Channel n Status"
|
|
bitfld.byte 0x0 1. "BUSYCH,Busy Channel" "0,1"
|
|
bitfld.byte 0x0 0. "RDYUSR,Ready User" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x41006000
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
repeat 52. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x120)++0x3
|
|
line.long 0x0 "USER[$1],User Multiplexer n"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CHANNEL,Channel Event Selection"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
repeat 57. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x120)++0x3
|
|
line.long 0x0 "USER[$1],User Multiplexer n"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CHANNEL,Channel Event Selection"
|
|
repeat.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
repeat 57. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x120)++0x3
|
|
line.long 0x0 "USER[$1],User Multiplexer n"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CHANNEL,Channel Event Selection"
|
|
repeat.end
|
|
endif
|
|
tree.end
|
|
tree "FPU (Floating Point Unit)"
|
|
base ad:0xE000EF30
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x0 31. "ASPEN," "0,1"
|
|
bitfld.long 0x0 30. "LSPEN," "0,1"
|
|
bitfld.long 0x0 8. "MONRDY," "0,1"
|
|
bitfld.long 0x0 6. "BFRDY," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MMRDY," "0,1"
|
|
bitfld.long 0x0 4. "HFRDY," "0,1"
|
|
bitfld.long 0x0 3. "THREAD," "0,1"
|
|
bitfld.long 0x0 1. "USER," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "LSPACT," "0,1"
|
|
line.long 0x4 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x4 3.--31. 1. "ADDRESS,Address for FP registers in exception stack frame"
|
|
line.long 0x8 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP" "0,1"
|
|
bitfld.long 0x8 25. "DN,Default value for FPSCR.DN" "0,1"
|
|
bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ" "0,1"
|
|
bitfld.long 0x8 22.--23. "RMODE,Default value for FPSCR.RMODE" "0: Round to Nearest,1: Round towards Positive Infinity,2: Round towards Negative Infinity,3: Round towards Zero"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "MVFR0,Media and FP Feature Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "FP_rounding_modes,"
|
|
hexmask.long.byte 0x0 24.--27. 1. "Short_vectors,"
|
|
hexmask.long.byte 0x0 20.--23. 1. "Square_root,"
|
|
hexmask.long.byte 0x0 16.--19. 1. "Divide,"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "FP_excep_trapping,"
|
|
hexmask.long.byte 0x0 8.--11. 1. "Double_precision,"
|
|
hexmask.long.byte 0x0 4.--7. 1. "Single_precision,"
|
|
hexmask.long.byte 0x0 0.--3. 1. "A_SIMD_registers,"
|
|
line.long 0x4 "MVFR1,Media and FP Feature Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "FP_fused_MAC,"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FP_HPFP,"
|
|
hexmask.long.byte 0x4 4.--7. 1. "D_NaN_mode,"
|
|
hexmask.long.byte 0x4 0.--3. 1. "FtZ_mode,"
|
|
tree.end
|
|
tree "FREQM (Frequency Meter)"
|
|
base ad:0x40000400
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "CTRLA,Control A Register"
|
|
bitfld.byte 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1"
|
|
wgroup.byte 0x1++0x0
|
|
line.byte 0x0 "CTRLB,Control B Register"
|
|
bitfld.byte 0x0 0. "START,Start Measurement" "0,1"
|
|
group.word 0x2++0x1
|
|
line.word 0x0 "CFGA,Config A register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "REFNUM,Number of Reference Clock Cycles"
|
|
group.byte 0x8++0x3
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear Register"
|
|
bitfld.byte 0x0 0. "DONE,Measurement Done Interrupt Enable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set Register"
|
|
bitfld.byte 0x1 0. "DONE,Measurement Done Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Register"
|
|
bitfld.byte 0x2 0. "DONE,Measurement Done" "0,1"
|
|
line.byte 0x3 "STATUS,Status Register"
|
|
bitfld.byte 0x3 1. "OVF,Sticky Count Value Overflow" "0,1"
|
|
bitfld.byte 0x3 0. "BUSY,FREQM Status" "0,1"
|
|
rgroup.long 0xC++0x7
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "VALUE,Count Value Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "VALUE,Measurement Value"
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O)"
|
|
base ad:0x0
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
base ad:0x44002200
|
|
elif (cpuis("PIC32C?5109BZ31032*"))
|
|
base ad:0x44002A00
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*")||cpuis("PIC32C?5109BZ31032*"))
|
|
tree "GPIOA"
|
|
group.long 0x0++0xDF
|
|
line.long 0x0 "ANSEL,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 14. "ANS14," "0,1"
|
|
bitfld.long 0x0 13. "ANS13," "0,1"
|
|
bitfld.long 0x0 12. "ANS12," "0,1"
|
|
bitfld.long 0x0 11. "ANS11," "0,1"
|
|
bitfld.long 0x0 2. "ANS2," "0,1"
|
|
bitfld.long 0x0 1. "ANS1," "0,1"
|
|
bitfld.long 0x0 0. "ANS0," "0,1"
|
|
endif
|
|
bitfld.long 0x0 10. "ANS10," "0,1"
|
|
bitfld.long 0x0 9. "ANS9," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ANS8," "0,1"
|
|
bitfld.long 0x0 7. "ANS7," "0,1"
|
|
bitfld.long 0x0 6. "ANS6," "0,1"
|
|
bitfld.long 0x0 5. "ANS5," "0,1"
|
|
bitfld.long 0x0 4. "ANS4," "0,1"
|
|
bitfld.long 0x0 3. "ANS3," "0,1"
|
|
line.long 0x4 "ANSELCLR,"
|
|
line.long 0x8 "ANSELSET,"
|
|
line.long 0xC "ANSELINV,"
|
|
line.long 0x10 "TRIS,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x10 14. "TRIS14," "0,1"
|
|
bitfld.long 0x10 13. "TRIS13," "0,1"
|
|
bitfld.long 0x10 2. "TRIS2," "0,1"
|
|
bitfld.long 0x10 1. "TRIS1," "0,1"
|
|
bitfld.long 0x10 0. "TRIS0," "0,1"
|
|
endif
|
|
bitfld.long 0x10 10. "TRIS10," "0,1"
|
|
bitfld.long 0x10 9. "TRIS9," "0,1"
|
|
bitfld.long 0x10 8. "TRIS8," "0,1"
|
|
bitfld.long 0x10 7. "TRIS7," "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "TRIS6," "0,1"
|
|
bitfld.long 0x10 5. "TRIS5," "0,1"
|
|
bitfld.long 0x10 4. "TRIS4," "0,1"
|
|
bitfld.long 0x10 3. "TRIS3," "0,1"
|
|
line.long 0x14 "TRISCLR,"
|
|
line.long 0x18 "TRISSET,"
|
|
line.long 0x1C "TRISINV,"
|
|
line.long 0x20 "PORT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x20 14. "R14," "0,1"
|
|
bitfld.long 0x20 13. "R13," "0,1"
|
|
bitfld.long 0x20 12. "R12," "0,1"
|
|
bitfld.long 0x20 11. "R11," "0,1"
|
|
bitfld.long 0x20 2. "R2," "0,1"
|
|
bitfld.long 0x20 1. "R1," "0,1"
|
|
bitfld.long 0x20 0. "R0," "0,1"
|
|
endif
|
|
bitfld.long 0x20 10. "R10," "0,1"
|
|
bitfld.long 0x20 9. "R9," "0,1"
|
|
newline
|
|
bitfld.long 0x20 8. "R8," "0,1"
|
|
bitfld.long 0x20 7. "R7," "0,1"
|
|
bitfld.long 0x20 6. "R6," "0,1"
|
|
bitfld.long 0x20 5. "R5," "0,1"
|
|
bitfld.long 0x20 4. "R4," "0,1"
|
|
bitfld.long 0x20 3. "R3," "0,1"
|
|
line.long 0x24 "PORTCLR,"
|
|
line.long 0x28 "PORTSET,"
|
|
line.long 0x2C "PORTINV,"
|
|
line.long 0x30 "LAT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x30 14. "LAT14," "0,1"
|
|
bitfld.long 0x30 13. "LAT13," "0,1"
|
|
bitfld.long 0x30 12. "LAT12," "0,1"
|
|
bitfld.long 0x30 11. "LAT11," "0,1"
|
|
bitfld.long 0x30 2. "LAT2," "0,1"
|
|
bitfld.long 0x30 1. "LAT1," "0,1"
|
|
bitfld.long 0x30 0. "LAT0," "0,1"
|
|
endif
|
|
bitfld.long 0x30 10. "LAT10," "0,1"
|
|
bitfld.long 0x30 9. "LAT9," "0,1"
|
|
newline
|
|
bitfld.long 0x30 8. "LAT8," "0,1"
|
|
bitfld.long 0x30 7. "LAT7," "0,1"
|
|
bitfld.long 0x30 6. "LAT6," "0,1"
|
|
bitfld.long 0x30 5. "LAT5," "0,1"
|
|
bitfld.long 0x30 4. "LAT4," "0,1"
|
|
bitfld.long 0x30 3. "LAT3," "0,1"
|
|
line.long 0x34 "LATCLR,"
|
|
line.long 0x38 "LATSET,"
|
|
line.long 0x3C "LATINV,"
|
|
line.long 0x40 "ODC,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x40 14. "ODC14," "0,1"
|
|
bitfld.long 0x40 13. "ODC13," "0,1"
|
|
bitfld.long 0x40 12. "ODC12," "0,1"
|
|
bitfld.long 0x40 11. "ODC11," "0,1"
|
|
bitfld.long 0x40 2. "ODC2," "0,1"
|
|
bitfld.long 0x40 1. "ODC1," "0,1"
|
|
bitfld.long 0x40 0. "ODC0," "0,1"
|
|
endif
|
|
bitfld.long 0x40 10. "ODC10," "0,1"
|
|
bitfld.long 0x40 9. "ODC9," "0,1"
|
|
newline
|
|
bitfld.long 0x40 8. "ODC8," "0,1"
|
|
bitfld.long 0x40 7. "ODC7," "0,1"
|
|
bitfld.long 0x40 6. "ODC6," "0,1"
|
|
bitfld.long 0x40 5. "ODC5," "0,1"
|
|
bitfld.long 0x40 4. "ODC4," "0,1"
|
|
bitfld.long 0x40 3. "ODC3," "0,1"
|
|
line.long 0x44 "ODCCLR,"
|
|
line.long 0x48 "ODCSET,"
|
|
line.long 0x4C "ODCINV,"
|
|
line.long 0x50 "CNPU,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x50 14. "CNPU14," "0,1"
|
|
bitfld.long 0x50 13. "CNPU13," "0,1"
|
|
bitfld.long 0x50 12. "CNPU12," "0,1"
|
|
bitfld.long 0x50 11. "CNPU11," "0,1"
|
|
bitfld.long 0x50 2. "CNPU2," "0,1"
|
|
bitfld.long 0x50 1. "CNPU1," "0,1"
|
|
bitfld.long 0x50 0. "CNPU0," "0,1"
|
|
endif
|
|
bitfld.long 0x50 10. "CNPU10," "0,1"
|
|
bitfld.long 0x50 9. "CNPU9," "0,1"
|
|
newline
|
|
bitfld.long 0x50 8. "CNPU8," "0,1"
|
|
bitfld.long 0x50 7. "CNPU7," "0,1"
|
|
bitfld.long 0x50 6. "CNPU6," "0,1"
|
|
bitfld.long 0x50 5. "CNPU5," "0,1"
|
|
bitfld.long 0x50 4. "CNPU4," "0,1"
|
|
bitfld.long 0x50 3. "CNPU3," "0,1"
|
|
line.long 0x54 "CNPUCLR,"
|
|
line.long 0x58 "CNPUSET,"
|
|
line.long 0x5C "CNPUINV,"
|
|
line.long 0x60 "CNPD,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x60 14. "CNPD14," "0,1"
|
|
bitfld.long 0x60 13. "CNPD13," "0,1"
|
|
bitfld.long 0x60 12. "CNPD12," "0,1"
|
|
bitfld.long 0x60 11. "CNPD11," "0,1"
|
|
bitfld.long 0x60 2. "CNPD2," "0,1"
|
|
bitfld.long 0x60 1. "CNPD1," "0,1"
|
|
bitfld.long 0x60 0. "CNPD0," "0,1"
|
|
endif
|
|
bitfld.long 0x60 10. "CNPD10," "0,1"
|
|
bitfld.long 0x60 9. "CNPD9," "0,1"
|
|
newline
|
|
bitfld.long 0x60 8. "CNPD8," "0,1"
|
|
bitfld.long 0x60 7. "CNPD7," "0,1"
|
|
bitfld.long 0x60 6. "CNPD6," "0,1"
|
|
bitfld.long 0x60 5. "CNPD5," "0,1"
|
|
bitfld.long 0x60 4. "CNPD4," "0,1"
|
|
bitfld.long 0x60 3. "CNPD3," "0,1"
|
|
line.long 0x64 "CNPDCLR,"
|
|
line.long 0x68 "CNPDSET,"
|
|
line.long 0x6C "CNPDINV,"
|
|
line.long 0x70 "CNCON,"
|
|
bitfld.long 0x70 15. "ON," "0,1"
|
|
bitfld.long 0x70 14. "FRZ," "0,1"
|
|
bitfld.long 0x70 13. "SIDL," "0,1"
|
|
bitfld.long 0x70 11. "EDGEDETECT," "0,1"
|
|
line.long 0x74 "CNCONCLR,"
|
|
line.long 0x78 "CNCONSET,"
|
|
line.long 0x7C "CNCONINV,"
|
|
line.long 0x80 "CNEN,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x80 14. "CNIE14," "0,1"
|
|
bitfld.long 0x80 13. "CNIE13," "0,1"
|
|
bitfld.long 0x80 12. "CNIE12," "0,1"
|
|
bitfld.long 0x80 11. "CNIE11," "0,1"
|
|
bitfld.long 0x80 2. "CNIE2," "0,1"
|
|
bitfld.long 0x80 1. "CNIE1," "0,1"
|
|
bitfld.long 0x80 0. "CNIE0," "0,1"
|
|
endif
|
|
bitfld.long 0x80 10. "CNIE10," "0,1"
|
|
bitfld.long 0x80 9. "CNIE9," "0,1"
|
|
newline
|
|
bitfld.long 0x80 8. "CNIE8," "0,1"
|
|
bitfld.long 0x80 7. "CNIE7," "0,1"
|
|
bitfld.long 0x80 6. "CNIE6," "0,1"
|
|
bitfld.long 0x80 5. "CNIE5," "0,1"
|
|
bitfld.long 0x80 4. "CNIE4," "0,1"
|
|
bitfld.long 0x80 3. "CNIE3," "0,1"
|
|
line.long 0x84 "CNENCLR,"
|
|
line.long 0x88 "CNENSET,"
|
|
line.long 0x8C "CNENINV,"
|
|
line.long 0x90 "CNSTAT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x90 14. "CNSTAT14," "0,1"
|
|
bitfld.long 0x90 13. "CNSTAT13," "0,1"
|
|
bitfld.long 0x90 12. "CNSTAT12," "0,1"
|
|
bitfld.long 0x90 11. "CNSTAT11," "0,1"
|
|
bitfld.long 0x90 2. "CNSTAT2," "0,1"
|
|
bitfld.long 0x90 1. "CNSTAT1," "0,1"
|
|
bitfld.long 0x90 0. "CNSTAT0," "0,1"
|
|
endif
|
|
bitfld.long 0x90 10. "CNSTAT10," "0,1"
|
|
bitfld.long 0x90 9. "CNSTATA," "0,1"
|
|
newline
|
|
bitfld.long 0x90 8. "CNSTAT8," "0,1"
|
|
bitfld.long 0x90 7. "CNSTAT7," "0,1"
|
|
bitfld.long 0x90 6. "CNSTAT6," "0,1"
|
|
bitfld.long 0x90 5. "CNSTAT5," "0,1"
|
|
bitfld.long 0x90 4. "CNSTAT4," "0,1"
|
|
bitfld.long 0x90 3. "CNSTAT3," "0,1"
|
|
line.long 0x94 "CNSTATCLR,"
|
|
line.long 0x98 "CNSTATSET,"
|
|
line.long 0x9C "CNSTATINV,"
|
|
line.long 0xA0 "CNNE,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xA0 14. "CNNE14," "0,1"
|
|
bitfld.long 0xA0 13. "CNNE13," "0,1"
|
|
bitfld.long 0xA0 12. "CNNE12," "0,1"
|
|
bitfld.long 0xA0 11. "CNNE11," "0,1"
|
|
bitfld.long 0xA0 2. "CNNE2," "0,1"
|
|
bitfld.long 0xA0 1. "CNNE1," "0,1"
|
|
bitfld.long 0xA0 0. "CNNE0," "0,1"
|
|
endif
|
|
bitfld.long 0xA0 10. "CNNE10," "0,1"
|
|
bitfld.long 0xA0 9. "CNNE9," "0,1"
|
|
newline
|
|
bitfld.long 0xA0 8. "CNNE8," "0,1"
|
|
bitfld.long 0xA0 7. "CNNE7," "0,1"
|
|
bitfld.long 0xA0 6. "CNNE6," "0,1"
|
|
bitfld.long 0xA0 5. "CNNE5," "0,1"
|
|
bitfld.long 0xA0 4. "CNNE4," "0,1"
|
|
bitfld.long 0xA0 3. "CNNE3," "0,1"
|
|
line.long 0xA4 "CNNECLR,"
|
|
line.long 0xA8 "CNNESET,"
|
|
line.long 0xAC "CNNEINV,"
|
|
line.long 0xB0 "CNF,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xB0 14. "CNF14," "0,1"
|
|
bitfld.long 0xB0 13. "CNF13," "0,1"
|
|
bitfld.long 0xB0 12. "CNF12," "0,1"
|
|
bitfld.long 0xB0 11. "CNF11," "0,1"
|
|
bitfld.long 0xB0 2. "CNF2," "0,1"
|
|
bitfld.long 0xB0 1. "CNF1," "0,1"
|
|
bitfld.long 0xB0 0. "CNF0," "0,1"
|
|
endif
|
|
bitfld.long 0xB0 10. "CNF10," "0,1"
|
|
bitfld.long 0xB0 9. "CNF9," "0,1"
|
|
newline
|
|
bitfld.long 0xB0 8. "CNF8," "0,1"
|
|
bitfld.long 0xB0 7. "CNF7," "0,1"
|
|
bitfld.long 0xB0 6. "CNF6," "0,1"
|
|
bitfld.long 0xB0 5. "CNF5," "0,1"
|
|
bitfld.long 0xB0 4. "CNF4," "0,1"
|
|
bitfld.long 0xB0 3. "CNF3," "0,1"
|
|
line.long 0xB4 "CNFCLR,"
|
|
line.long 0xB8 "CNFSET,"
|
|
line.long 0xBC "CNFINV,"
|
|
line.long 0xC0 "SRCON0,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC0 14. "SR014," "0,1"
|
|
bitfld.long 0xC0 13. "SR013," "0,1"
|
|
bitfld.long 0xC0 12. "SR012," "0,1"
|
|
bitfld.long 0xC0 11. "SR011," "0,1"
|
|
bitfld.long 0xC0 2. "SR02," "0,1"
|
|
bitfld.long 0xC0 1. "SR01," "0,1"
|
|
bitfld.long 0xC0 0. "SR00," "0,1"
|
|
endif
|
|
bitfld.long 0xC0 10. "SR010," "0,1"
|
|
bitfld.long 0xC0 9. "SR09," "0,1"
|
|
newline
|
|
bitfld.long 0xC0 8. "SR08," "0,1"
|
|
bitfld.long 0xC0 7. "SR07," "0,1"
|
|
bitfld.long 0xC0 6. "SR06," "0,1"
|
|
bitfld.long 0xC0 5. "SR05," "0,1"
|
|
bitfld.long 0xC0 4. "SR04," "0,1"
|
|
bitfld.long 0xC0 3. "SR03," "0,1"
|
|
line.long 0xC4 "SRCON0CLR,"
|
|
line.long 0xC8 "SRCON0SET,"
|
|
line.long 0xCC "SRCON0INV,"
|
|
line.long 0xD0 "SRCON1,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xD0 14. "SR114," "0,1"
|
|
bitfld.long 0xD0 13. "SR113," "0,1"
|
|
bitfld.long 0xD0 12. "SR112," "0,1"
|
|
bitfld.long 0xD0 11. "SR111," "0,1"
|
|
bitfld.long 0xD0 2. "SR12," "0,1"
|
|
bitfld.long 0xD0 1. "SR11," "0,1"
|
|
bitfld.long 0xD0 0. "SR10," "0,1"
|
|
endif
|
|
bitfld.long 0xD0 10. "SR110," "0,1"
|
|
bitfld.long 0xD0 9. "SR19," "0,1"
|
|
newline
|
|
bitfld.long 0xD0 8. "SR18," "0,1"
|
|
bitfld.long 0xD0 7. "SR17," "0,1"
|
|
bitfld.long 0xD0 6. "SR16," "0,1"
|
|
bitfld.long 0xD0 5. "SR15," "0,1"
|
|
bitfld.long 0xD0 4. "SR14," "0,1"
|
|
bitfld.long 0xD0 3. "SR13," "0,1"
|
|
line.long 0xD4 "SRCON1CLR,"
|
|
line.long 0xD8 "SRCON1SET,"
|
|
line.long 0xDC "SRCON1INV,"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
base ad:0x44002300
|
|
elif (cpuis("PIC32C?5109BZ31032*"))
|
|
base ad:0x44002B00
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*")||cpuis("PIC32C?5109BZ31032*"))
|
|
tree "GPIOB"
|
|
group.long 0x0++0xDF
|
|
line.long 0x0 "ANSEL,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 14. "ANS14," "0,1"
|
|
bitfld.long 0x0 13. "ANS13," "0,1"
|
|
bitfld.long 0x0 12. "ANS12," "0,1"
|
|
bitfld.long 0x0 11. "ANS11," "0,1"
|
|
bitfld.long 0x0 2. "ANS2," "0,1"
|
|
bitfld.long 0x0 1. "ANS1," "0,1"
|
|
bitfld.long 0x0 0. "ANS0," "0,1"
|
|
endif
|
|
bitfld.long 0x0 10. "ANS10," "0,1"
|
|
bitfld.long 0x0 9. "ANS9," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ANS8," "0,1"
|
|
bitfld.long 0x0 7. "ANS7," "0,1"
|
|
bitfld.long 0x0 6. "ANS6," "0,1"
|
|
bitfld.long 0x0 5. "ANS5," "0,1"
|
|
bitfld.long 0x0 4. "ANS4," "0,1"
|
|
bitfld.long 0x0 3. "ANS3," "0,1"
|
|
line.long 0x4 "ANSELCLR,"
|
|
line.long 0x8 "ANSELSET,"
|
|
line.long 0xC "ANSELINV,"
|
|
line.long 0x10 "TRIS,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x10 14. "TRIS14," "0,1"
|
|
bitfld.long 0x10 13. "TRIS13," "0,1"
|
|
bitfld.long 0x10 2. "TRIS2," "0,1"
|
|
bitfld.long 0x10 1. "TRIS1," "0,1"
|
|
bitfld.long 0x10 0. "TRIS0," "0,1"
|
|
endif
|
|
bitfld.long 0x10 10. "TRIS10," "0,1"
|
|
bitfld.long 0x10 9. "TRIS9," "0,1"
|
|
bitfld.long 0x10 8. "TRIS8," "0,1"
|
|
bitfld.long 0x10 7. "TRIS7," "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "TRIS6," "0,1"
|
|
bitfld.long 0x10 5. "TRIS5," "0,1"
|
|
bitfld.long 0x10 4. "TRIS4," "0,1"
|
|
bitfld.long 0x10 3. "TRIS3," "0,1"
|
|
line.long 0x14 "TRISCLR,"
|
|
line.long 0x18 "TRISSET,"
|
|
line.long 0x1C "TRISINV,"
|
|
line.long 0x20 "PORT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x20 14. "R14," "0,1"
|
|
bitfld.long 0x20 13. "R13," "0,1"
|
|
bitfld.long 0x20 12. "R12," "0,1"
|
|
bitfld.long 0x20 11. "R11," "0,1"
|
|
bitfld.long 0x20 2. "R2," "0,1"
|
|
bitfld.long 0x20 1. "R1," "0,1"
|
|
bitfld.long 0x20 0. "R0," "0,1"
|
|
endif
|
|
bitfld.long 0x20 10. "R10," "0,1"
|
|
bitfld.long 0x20 9. "R9," "0,1"
|
|
newline
|
|
bitfld.long 0x20 8. "R8," "0,1"
|
|
bitfld.long 0x20 7. "R7," "0,1"
|
|
bitfld.long 0x20 6. "R6," "0,1"
|
|
bitfld.long 0x20 5. "R5," "0,1"
|
|
bitfld.long 0x20 4. "R4," "0,1"
|
|
bitfld.long 0x20 3. "R3," "0,1"
|
|
line.long 0x24 "PORTCLR,"
|
|
line.long 0x28 "PORTSET,"
|
|
line.long 0x2C "PORTINV,"
|
|
line.long 0x30 "LAT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x30 14. "LAT14," "0,1"
|
|
bitfld.long 0x30 13. "LAT13," "0,1"
|
|
bitfld.long 0x30 12. "LAT12," "0,1"
|
|
bitfld.long 0x30 11. "LAT11," "0,1"
|
|
bitfld.long 0x30 2. "LAT2," "0,1"
|
|
bitfld.long 0x30 1. "LAT1," "0,1"
|
|
bitfld.long 0x30 0. "LAT0," "0,1"
|
|
endif
|
|
bitfld.long 0x30 10. "LAT10," "0,1"
|
|
bitfld.long 0x30 9. "LAT9," "0,1"
|
|
newline
|
|
bitfld.long 0x30 8. "LAT8," "0,1"
|
|
bitfld.long 0x30 7. "LAT7," "0,1"
|
|
bitfld.long 0x30 6. "LAT6," "0,1"
|
|
bitfld.long 0x30 5. "LAT5," "0,1"
|
|
bitfld.long 0x30 4. "LAT4," "0,1"
|
|
bitfld.long 0x30 3. "LAT3," "0,1"
|
|
line.long 0x34 "LATCLR,"
|
|
line.long 0x38 "LATSET,"
|
|
line.long 0x3C "LATINV,"
|
|
line.long 0x40 "ODC,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x40 14. "ODC14," "0,1"
|
|
bitfld.long 0x40 13. "ODC13," "0,1"
|
|
bitfld.long 0x40 12. "ODC12," "0,1"
|
|
bitfld.long 0x40 11. "ODC11," "0,1"
|
|
bitfld.long 0x40 2. "ODC2," "0,1"
|
|
bitfld.long 0x40 1. "ODC1," "0,1"
|
|
bitfld.long 0x40 0. "ODC0," "0,1"
|
|
endif
|
|
bitfld.long 0x40 10. "ODC10," "0,1"
|
|
bitfld.long 0x40 9. "ODC9," "0,1"
|
|
newline
|
|
bitfld.long 0x40 8. "ODC8," "0,1"
|
|
bitfld.long 0x40 7. "ODC7," "0,1"
|
|
bitfld.long 0x40 6. "ODC6," "0,1"
|
|
bitfld.long 0x40 5. "ODC5," "0,1"
|
|
bitfld.long 0x40 4. "ODC4," "0,1"
|
|
bitfld.long 0x40 3. "ODC3," "0,1"
|
|
line.long 0x44 "ODCCLR,"
|
|
line.long 0x48 "ODCSET,"
|
|
line.long 0x4C "ODCINV,"
|
|
line.long 0x50 "CNPU,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x50 14. "CNPU14," "0,1"
|
|
bitfld.long 0x50 13. "CNPU13," "0,1"
|
|
bitfld.long 0x50 12. "CNPU12," "0,1"
|
|
bitfld.long 0x50 11. "CNPU11," "0,1"
|
|
bitfld.long 0x50 2. "CNPU2," "0,1"
|
|
bitfld.long 0x50 1. "CNPU1," "0,1"
|
|
bitfld.long 0x50 0. "CNPU0," "0,1"
|
|
endif
|
|
bitfld.long 0x50 10. "CNPU10," "0,1"
|
|
bitfld.long 0x50 9. "CNPU9," "0,1"
|
|
newline
|
|
bitfld.long 0x50 8. "CNPU8," "0,1"
|
|
bitfld.long 0x50 7. "CNPU7," "0,1"
|
|
bitfld.long 0x50 6. "CNPU6," "0,1"
|
|
bitfld.long 0x50 5. "CNPU5," "0,1"
|
|
bitfld.long 0x50 4. "CNPU4," "0,1"
|
|
bitfld.long 0x50 3. "CNPU3," "0,1"
|
|
line.long 0x54 "CNPUCLR,"
|
|
line.long 0x58 "CNPUSET,"
|
|
line.long 0x5C "CNPUINV,"
|
|
line.long 0x60 "CNPD,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x60 14. "CNPD14," "0,1"
|
|
bitfld.long 0x60 13. "CNPD13," "0,1"
|
|
bitfld.long 0x60 12. "CNPD12," "0,1"
|
|
bitfld.long 0x60 11. "CNPD11," "0,1"
|
|
bitfld.long 0x60 2. "CNPD2," "0,1"
|
|
bitfld.long 0x60 1. "CNPD1," "0,1"
|
|
bitfld.long 0x60 0. "CNPD0," "0,1"
|
|
endif
|
|
bitfld.long 0x60 10. "CNPD10," "0,1"
|
|
bitfld.long 0x60 9. "CNPD9," "0,1"
|
|
newline
|
|
bitfld.long 0x60 8. "CNPD8," "0,1"
|
|
bitfld.long 0x60 7. "CNPD7," "0,1"
|
|
bitfld.long 0x60 6. "CNPD6," "0,1"
|
|
bitfld.long 0x60 5. "CNPD5," "0,1"
|
|
bitfld.long 0x60 4. "CNPD4," "0,1"
|
|
bitfld.long 0x60 3. "CNPD3," "0,1"
|
|
line.long 0x64 "CNPDCLR,"
|
|
line.long 0x68 "CNPDSET,"
|
|
line.long 0x6C "CNPDINV,"
|
|
line.long 0x70 "CNCON,"
|
|
bitfld.long 0x70 15. "ON," "0,1"
|
|
bitfld.long 0x70 14. "FRZ," "0,1"
|
|
bitfld.long 0x70 13. "SIDL," "0,1"
|
|
bitfld.long 0x70 11. "EDGEDETECT," "0,1"
|
|
line.long 0x74 "CNCONCLR,"
|
|
line.long 0x78 "CNCONSET,"
|
|
line.long 0x7C "CNCONINV,"
|
|
line.long 0x80 "CNEN,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x80 14. "CNIE14," "0,1"
|
|
bitfld.long 0x80 13. "CNIE13," "0,1"
|
|
bitfld.long 0x80 12. "CNIE12," "0,1"
|
|
bitfld.long 0x80 11. "CNIE11," "0,1"
|
|
bitfld.long 0x80 2. "CNIE2," "0,1"
|
|
bitfld.long 0x80 1. "CNIE1," "0,1"
|
|
bitfld.long 0x80 0. "CNIE0," "0,1"
|
|
endif
|
|
bitfld.long 0x80 10. "CNIE10," "0,1"
|
|
bitfld.long 0x80 9. "CNIE9," "0,1"
|
|
newline
|
|
bitfld.long 0x80 8. "CNIE8," "0,1"
|
|
bitfld.long 0x80 7. "CNIE7," "0,1"
|
|
bitfld.long 0x80 6. "CNIE6," "0,1"
|
|
bitfld.long 0x80 5. "CNIE5," "0,1"
|
|
bitfld.long 0x80 4. "CNIE4," "0,1"
|
|
bitfld.long 0x80 3. "CNIE3," "0,1"
|
|
line.long 0x84 "CNENCLR,"
|
|
line.long 0x88 "CNENSET,"
|
|
line.long 0x8C "CNENINV,"
|
|
line.long 0x90 "CNSTAT,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x90 14. "CNSTAT14," "0,1"
|
|
bitfld.long 0x90 13. "CNSTAT13," "0,1"
|
|
bitfld.long 0x90 12. "CNSTAT12," "0,1"
|
|
bitfld.long 0x90 11. "CNSTAT11," "0,1"
|
|
bitfld.long 0x90 2. "CNSTAT2," "0,1"
|
|
bitfld.long 0x90 1. "CNSTAT1," "0,1"
|
|
bitfld.long 0x90 0. "CNSTAT0," "0,1"
|
|
endif
|
|
bitfld.long 0x90 10. "CNSTAT10," "0,1"
|
|
bitfld.long 0x90 9. "CNSTATA," "0,1"
|
|
newline
|
|
bitfld.long 0x90 8. "CNSTAT8," "0,1"
|
|
bitfld.long 0x90 7. "CNSTAT7," "0,1"
|
|
bitfld.long 0x90 6. "CNSTAT6," "0,1"
|
|
bitfld.long 0x90 5. "CNSTAT5," "0,1"
|
|
bitfld.long 0x90 4. "CNSTAT4," "0,1"
|
|
bitfld.long 0x90 3. "CNSTAT3," "0,1"
|
|
line.long 0x94 "CNSTATCLR,"
|
|
line.long 0x98 "CNSTATSET,"
|
|
line.long 0x9C "CNSTATINV,"
|
|
line.long 0xA0 "CNNE,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xA0 14. "CNNE14," "0,1"
|
|
bitfld.long 0xA0 13. "CNNE13," "0,1"
|
|
bitfld.long 0xA0 12. "CNNE12," "0,1"
|
|
bitfld.long 0xA0 11. "CNNE11," "0,1"
|
|
bitfld.long 0xA0 2. "CNNE2," "0,1"
|
|
bitfld.long 0xA0 1. "CNNE1," "0,1"
|
|
bitfld.long 0xA0 0. "CNNE0," "0,1"
|
|
endif
|
|
bitfld.long 0xA0 10. "CNNE10," "0,1"
|
|
bitfld.long 0xA0 9. "CNNE9," "0,1"
|
|
newline
|
|
bitfld.long 0xA0 8. "CNNE8," "0,1"
|
|
bitfld.long 0xA0 7. "CNNE7," "0,1"
|
|
bitfld.long 0xA0 6. "CNNE6," "0,1"
|
|
bitfld.long 0xA0 5. "CNNE5," "0,1"
|
|
bitfld.long 0xA0 4. "CNNE4," "0,1"
|
|
bitfld.long 0xA0 3. "CNNE3," "0,1"
|
|
line.long 0xA4 "CNNECLR,"
|
|
line.long 0xA8 "CNNESET,"
|
|
line.long 0xAC "CNNEINV,"
|
|
line.long 0xB0 "CNF,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xB0 14. "CNF14," "0,1"
|
|
bitfld.long 0xB0 13. "CNF13," "0,1"
|
|
bitfld.long 0xB0 12. "CNF12," "0,1"
|
|
bitfld.long 0xB0 11. "CNF11," "0,1"
|
|
bitfld.long 0xB0 2. "CNF2," "0,1"
|
|
bitfld.long 0xB0 1. "CNF1," "0,1"
|
|
bitfld.long 0xB0 0. "CNF0," "0,1"
|
|
endif
|
|
bitfld.long 0xB0 10. "CNF10," "0,1"
|
|
bitfld.long 0xB0 9. "CNF9," "0,1"
|
|
newline
|
|
bitfld.long 0xB0 8. "CNF8," "0,1"
|
|
bitfld.long 0xB0 7. "CNF7," "0,1"
|
|
bitfld.long 0xB0 6. "CNF6," "0,1"
|
|
bitfld.long 0xB0 5. "CNF5," "0,1"
|
|
bitfld.long 0xB0 4. "CNF4," "0,1"
|
|
bitfld.long 0xB0 3. "CNF3," "0,1"
|
|
line.long 0xB4 "CNFCLR,"
|
|
line.long 0xB8 "CNFSET,"
|
|
line.long 0xBC "CNFINV,"
|
|
line.long 0xC0 "SRCON0,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC0 14. "SR014," "0,1"
|
|
bitfld.long 0xC0 13. "SR013," "0,1"
|
|
bitfld.long 0xC0 12. "SR012," "0,1"
|
|
bitfld.long 0xC0 11. "SR011," "0,1"
|
|
bitfld.long 0xC0 2. "SR02," "0,1"
|
|
bitfld.long 0xC0 1. "SR01," "0,1"
|
|
bitfld.long 0xC0 0. "SR00," "0,1"
|
|
endif
|
|
bitfld.long 0xC0 10. "SR010," "0,1"
|
|
bitfld.long 0xC0 9. "SR09," "0,1"
|
|
newline
|
|
bitfld.long 0xC0 8. "SR08," "0,1"
|
|
bitfld.long 0xC0 7. "SR07," "0,1"
|
|
bitfld.long 0xC0 6. "SR06," "0,1"
|
|
bitfld.long 0xC0 5. "SR05," "0,1"
|
|
bitfld.long 0xC0 4. "SR04," "0,1"
|
|
bitfld.long 0xC0 3. "SR03," "0,1"
|
|
line.long 0xC4 "SRCON0CLR,"
|
|
line.long 0xC8 "SRCON0SET,"
|
|
line.long 0xCC "SRCON0INV,"
|
|
line.long 0xD0 "SRCON1,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xD0 14. "SR114," "0,1"
|
|
bitfld.long 0xD0 13. "SR113," "0,1"
|
|
bitfld.long 0xD0 12. "SR112," "0,1"
|
|
bitfld.long 0xD0 11. "SR111," "0,1"
|
|
bitfld.long 0xD0 2. "SR12," "0,1"
|
|
bitfld.long 0xD0 1. "SR11," "0,1"
|
|
bitfld.long 0xD0 0. "SR10," "0,1"
|
|
endif
|
|
bitfld.long 0xD0 10. "SR110," "0,1"
|
|
bitfld.long 0xD0 9. "SR19," "0,1"
|
|
newline
|
|
bitfld.long 0xD0 8. "SR18," "0,1"
|
|
bitfld.long 0xD0 7. "SR17," "0,1"
|
|
bitfld.long 0xD0 6. "SR16," "0,1"
|
|
bitfld.long 0xD0 5. "SR15," "0,1"
|
|
bitfld.long 0xD0 4. "SR14," "0,1"
|
|
bitfld.long 0xD0 3. "SR13," "0,1"
|
|
line.long 0xD4 "SRCON1CLR,"
|
|
line.long 0xD8 "SRCON1SET,"
|
|
line.long 0xDC "SRCON1INV,"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
tree "GPIOA"
|
|
base ad:0x44002A00
|
|
group.long 0x0++0xDF
|
|
line.long 0x0 "ANSEL,"
|
|
bitfld.long 0x0 14. "ANS14," "0,1"
|
|
bitfld.long 0x0 13. "ANS13," "0,1"
|
|
bitfld.long 0x0 12. "ANS12," "0,1"
|
|
bitfld.long 0x0 11. "ANS11," "0,1"
|
|
bitfld.long 0x0 10. "ANS10," "0,1"
|
|
bitfld.long 0x0 9. "ANS9," "0,1"
|
|
bitfld.long 0x0 8. "ANS8," "0,1"
|
|
bitfld.long 0x0 7. "ANS7," "0,1"
|
|
bitfld.long 0x0 6. "ANS6," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ANS5," "0,1"
|
|
bitfld.long 0x0 4. "ANS4," "0,1"
|
|
bitfld.long 0x0 3. "ANS3," "0,1"
|
|
bitfld.long 0x0 2. "ANS2," "0,1"
|
|
bitfld.long 0x0 1. "ANS1," "0,1"
|
|
bitfld.long 0x0 0. "ANS0," "0,1"
|
|
line.long 0x4 "ANSELCLR,"
|
|
line.long 0x8 "ANSELSET,"
|
|
line.long 0xC "ANSELINV,"
|
|
line.long 0x10 "TRIS,"
|
|
bitfld.long 0x10 14. "TRIS14," "0,1"
|
|
bitfld.long 0x10 13. "TRIS13," "0,1"
|
|
bitfld.long 0x10 12. "TRIS12," "0,1"
|
|
bitfld.long 0x10 11. "TRIS11," "0,1"
|
|
bitfld.long 0x10 10. "TRIS10," "0,1"
|
|
bitfld.long 0x10 9. "TRIS9," "0,1"
|
|
bitfld.long 0x10 8. "TRIS8," "0,1"
|
|
bitfld.long 0x10 7. "TRIS7," "0,1"
|
|
bitfld.long 0x10 6. "TRIS6," "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "TRIS5," "0,1"
|
|
bitfld.long 0x10 4. "TRIS4," "0,1"
|
|
bitfld.long 0x10 3. "TRIS3," "0,1"
|
|
bitfld.long 0x10 2. "TRIS2," "0,1"
|
|
bitfld.long 0x10 1. "TRIS1," "0,1"
|
|
bitfld.long 0x10 0. "TRIS0," "0,1"
|
|
line.long 0x14 "TRISCLR,"
|
|
line.long 0x18 "TRISSET,"
|
|
line.long 0x1C "TRISINV,"
|
|
line.long 0x20 "PORT,"
|
|
bitfld.long 0x20 14. "R14," "0,1"
|
|
bitfld.long 0x20 13. "R13," "0,1"
|
|
bitfld.long 0x20 12. "R12," "0,1"
|
|
bitfld.long 0x20 11. "R11," "0,1"
|
|
bitfld.long 0x20 10. "R10," "0,1"
|
|
bitfld.long 0x20 9. "R9," "0,1"
|
|
bitfld.long 0x20 8. "R8," "0,1"
|
|
bitfld.long 0x20 7. "R7," "0,1"
|
|
bitfld.long 0x20 6. "R6," "0,1"
|
|
newline
|
|
bitfld.long 0x20 5. "R5," "0,1"
|
|
bitfld.long 0x20 4. "R4," "0,1"
|
|
bitfld.long 0x20 3. "R3," "0,1"
|
|
bitfld.long 0x20 2. "R2," "0,1"
|
|
bitfld.long 0x20 1. "R1," "0,1"
|
|
bitfld.long 0x20 0. "R0," "0,1"
|
|
line.long 0x24 "PORTCLR,"
|
|
line.long 0x28 "PORTSET,"
|
|
line.long 0x2C "PORTINV,"
|
|
line.long 0x30 "LAT,"
|
|
bitfld.long 0x30 14. "LAT14," "0,1"
|
|
bitfld.long 0x30 13. "LAT13," "0,1"
|
|
bitfld.long 0x30 12. "LAT12," "0,1"
|
|
bitfld.long 0x30 11. "LAT11," "0,1"
|
|
bitfld.long 0x30 10. "LAT10," "0,1"
|
|
bitfld.long 0x30 9. "LAT9," "0,1"
|
|
bitfld.long 0x30 8. "LAT8," "0,1"
|
|
bitfld.long 0x30 7. "LAT7," "0,1"
|
|
bitfld.long 0x30 6. "LAT6," "0,1"
|
|
newline
|
|
bitfld.long 0x30 5. "LAT5," "0,1"
|
|
bitfld.long 0x30 4. "LAT4," "0,1"
|
|
bitfld.long 0x30 3. "LAT3," "0,1"
|
|
bitfld.long 0x30 2. "LAT2," "0,1"
|
|
bitfld.long 0x30 1. "LAT1," "0,1"
|
|
bitfld.long 0x30 0. "LAT0," "0,1"
|
|
line.long 0x34 "LATCLR,"
|
|
line.long 0x38 "LATSET,"
|
|
line.long 0x3C "LATINV,"
|
|
line.long 0x40 "ODC,"
|
|
bitfld.long 0x40 14. "ODC14," "0,1"
|
|
bitfld.long 0x40 13. "ODC13," "0,1"
|
|
bitfld.long 0x40 12. "ODC12," "0,1"
|
|
bitfld.long 0x40 11. "ODC11," "0,1"
|
|
bitfld.long 0x40 10. "ODC10," "0,1"
|
|
bitfld.long 0x40 9. "ODC9," "0,1"
|
|
bitfld.long 0x40 8. "ODC8," "0,1"
|
|
bitfld.long 0x40 7. "ODC7," "0,1"
|
|
bitfld.long 0x40 6. "ODC6," "0,1"
|
|
newline
|
|
bitfld.long 0x40 5. "ODC5," "0,1"
|
|
bitfld.long 0x40 4. "ODC4," "0,1"
|
|
bitfld.long 0x40 3. "ODC3," "0,1"
|
|
bitfld.long 0x40 2. "ODC2," "0,1"
|
|
bitfld.long 0x40 1. "ODC1," "0,1"
|
|
bitfld.long 0x40 0. "ODC0," "0,1"
|
|
line.long 0x44 "ODCCLR,"
|
|
line.long 0x48 "ODCSET,"
|
|
line.long 0x4C "ODCINV,"
|
|
line.long 0x50 "CNPU,"
|
|
bitfld.long 0x50 14. "CNPU14," "0,1"
|
|
bitfld.long 0x50 13. "CNPU13," "0,1"
|
|
bitfld.long 0x50 12. "CNPU12," "0,1"
|
|
bitfld.long 0x50 11. "CNPU11," "0,1"
|
|
bitfld.long 0x50 10. "CNPU10," "0,1"
|
|
bitfld.long 0x50 9. "CNPU9," "0,1"
|
|
bitfld.long 0x50 8. "CNPU8," "0,1"
|
|
bitfld.long 0x50 7. "CNPU7," "0,1"
|
|
bitfld.long 0x50 6. "CNPU6," "0,1"
|
|
newline
|
|
bitfld.long 0x50 5. "CNPU5," "0,1"
|
|
bitfld.long 0x50 4. "CNPU4," "0,1"
|
|
bitfld.long 0x50 3. "CNPU3," "0,1"
|
|
bitfld.long 0x50 2. "CNPU2," "0,1"
|
|
bitfld.long 0x50 1. "CNPU1," "0,1"
|
|
bitfld.long 0x50 0. "CNPU0," "0,1"
|
|
line.long 0x54 "CNPUCLR,"
|
|
line.long 0x58 "CNPUSET,"
|
|
line.long 0x5C "CNPUINV,"
|
|
line.long 0x60 "CNPD,"
|
|
bitfld.long 0x60 14. "CNPD14," "0,1"
|
|
bitfld.long 0x60 13. "CNPD13," "0,1"
|
|
bitfld.long 0x60 12. "CNPD12," "0,1"
|
|
bitfld.long 0x60 11. "CNPD11," "0,1"
|
|
bitfld.long 0x60 10. "CNPD10," "0,1"
|
|
bitfld.long 0x60 9. "CNPD9," "0,1"
|
|
bitfld.long 0x60 8. "CNPD8," "0,1"
|
|
bitfld.long 0x60 7. "CNPD7," "0,1"
|
|
bitfld.long 0x60 6. "CNPD6," "0,1"
|
|
newline
|
|
bitfld.long 0x60 5. "CNPD5," "0,1"
|
|
bitfld.long 0x60 4. "CNPD4," "0,1"
|
|
bitfld.long 0x60 3. "CNPD3," "0,1"
|
|
bitfld.long 0x60 2. "CNPD2," "0,1"
|
|
bitfld.long 0x60 1. "CNPD1," "0,1"
|
|
bitfld.long 0x60 0. "CNPD0," "0,1"
|
|
line.long 0x64 "CNPDCLR,"
|
|
line.long 0x68 "CNPDSET,"
|
|
line.long 0x6C "CNPDINV,"
|
|
line.long 0x70 "CNCON,"
|
|
bitfld.long 0x70 15. "ON," "0,1"
|
|
bitfld.long 0x70 14. "FRZ," "0,1"
|
|
bitfld.long 0x70 13. "SIDL," "0,1"
|
|
bitfld.long 0x70 11. "EDGEDETECT," "0,1"
|
|
line.long 0x74 "CNCONCLR,"
|
|
line.long 0x78 "CNCONSET,"
|
|
line.long 0x7C "CNCONINV,"
|
|
line.long 0x80 "CNEN,"
|
|
bitfld.long 0x80 14. "CNIE14," "0,1"
|
|
bitfld.long 0x80 13. "CNIE13," "0,1"
|
|
bitfld.long 0x80 12. "CNIE12," "0,1"
|
|
bitfld.long 0x80 11. "CNIE11," "0,1"
|
|
bitfld.long 0x80 10. "CNIE10," "0,1"
|
|
bitfld.long 0x80 9. "CNIE9," "0,1"
|
|
bitfld.long 0x80 8. "CNIE8," "0,1"
|
|
bitfld.long 0x80 7. "CNIE7," "0,1"
|
|
bitfld.long 0x80 6. "CNIE6," "0,1"
|
|
newline
|
|
bitfld.long 0x80 5. "CNIE5," "0,1"
|
|
bitfld.long 0x80 4. "CNIE4," "0,1"
|
|
bitfld.long 0x80 3. "CNIE3," "0,1"
|
|
bitfld.long 0x80 2. "CNIE2," "0,1"
|
|
bitfld.long 0x80 1. "CNIE1," "0,1"
|
|
bitfld.long 0x80 0. "CNIE0," "0,1"
|
|
line.long 0x84 "CNENCLR,"
|
|
line.long 0x88 "CNENSET,"
|
|
line.long 0x8C "CNENINV,"
|
|
line.long 0x90 "CNSTAT,"
|
|
bitfld.long 0x90 14. "CNSTAT14," "0,1"
|
|
bitfld.long 0x90 13. "CNSTAT13," "0,1"
|
|
bitfld.long 0x90 12. "CNSTAT12," "0,1"
|
|
bitfld.long 0x90 11. "CNSTAT11," "0,1"
|
|
bitfld.long 0x90 10. "CNSTAT10," "0,1"
|
|
bitfld.long 0x90 9. "CNSTATA," "0,1"
|
|
bitfld.long 0x90 8. "CNSTAT8," "0,1"
|
|
bitfld.long 0x90 7. "CNSTAT7," "0,1"
|
|
bitfld.long 0x90 6. "CNSTAT6," "0,1"
|
|
newline
|
|
bitfld.long 0x90 5. "CNSTAT5," "0,1"
|
|
bitfld.long 0x90 4. "CNSTAT4," "0,1"
|
|
bitfld.long 0x90 3. "CNSTAT3," "0,1"
|
|
bitfld.long 0x90 2. "CNSTAT2," "0,1"
|
|
bitfld.long 0x90 1. "CNSTAT1," "0,1"
|
|
bitfld.long 0x90 0. "CNSTAT0," "0,1"
|
|
line.long 0x94 "CNSTATCLR,"
|
|
line.long 0x98 "CNSTATSET,"
|
|
line.long 0x9C "CNSTATINV,"
|
|
line.long 0xA0 "CNNE,"
|
|
bitfld.long 0xA0 14. "CNNE14," "0,1"
|
|
bitfld.long 0xA0 13. "CNNE13," "0,1"
|
|
bitfld.long 0xA0 12. "CNNE12," "0,1"
|
|
bitfld.long 0xA0 11. "CNNE11," "0,1"
|
|
bitfld.long 0xA0 10. "CNNE10," "0,1"
|
|
bitfld.long 0xA0 9. "CNNE9," "0,1"
|
|
bitfld.long 0xA0 8. "CNNE8," "0,1"
|
|
bitfld.long 0xA0 7. "CNNE7," "0,1"
|
|
bitfld.long 0xA0 6. "CNNE6," "0,1"
|
|
newline
|
|
bitfld.long 0xA0 5. "CNNE5," "0,1"
|
|
bitfld.long 0xA0 4. "CNNE4," "0,1"
|
|
bitfld.long 0xA0 3. "CNNE3," "0,1"
|
|
bitfld.long 0xA0 2. "CNNE2," "0,1"
|
|
bitfld.long 0xA0 1. "CNNE1," "0,1"
|
|
bitfld.long 0xA0 0. "CNNE0," "0,1"
|
|
line.long 0xA4 "CNNECLR,"
|
|
line.long 0xA8 "CNNESET,"
|
|
line.long 0xAC "CNNEINV,"
|
|
line.long 0xB0 "CNF,"
|
|
bitfld.long 0xB0 14. "CNF14," "0,1"
|
|
bitfld.long 0xB0 13. "CNF13," "0,1"
|
|
bitfld.long 0xB0 12. "CNF12," "0,1"
|
|
bitfld.long 0xB0 11. "CNF11," "0,1"
|
|
bitfld.long 0xB0 10. "CNF10," "0,1"
|
|
bitfld.long 0xB0 9. "CNF9," "0,1"
|
|
bitfld.long 0xB0 8. "CNF8," "0,1"
|
|
bitfld.long 0xB0 7. "CNF7," "0,1"
|
|
bitfld.long 0xB0 6. "CNF6," "0,1"
|
|
newline
|
|
bitfld.long 0xB0 5. "CNF5," "0,1"
|
|
bitfld.long 0xB0 4. "CNF4," "0,1"
|
|
bitfld.long 0xB0 3. "CNF3," "0,1"
|
|
bitfld.long 0xB0 2. "CNF2," "0,1"
|
|
bitfld.long 0xB0 1. "CNF1," "0,1"
|
|
bitfld.long 0xB0 0. "CNF0," "0,1"
|
|
line.long 0xB4 "CNFCLR,"
|
|
line.long 0xB8 "CNFSET,"
|
|
line.long 0xBC "CNFINV,"
|
|
line.long 0xC0 "SRCON0,"
|
|
bitfld.long 0xC0 14. "SR014," "0,1"
|
|
bitfld.long 0xC0 13. "SR013," "0,1"
|
|
bitfld.long 0xC0 12. "SR012," "0,1"
|
|
bitfld.long 0xC0 11. "SR011," "0,1"
|
|
bitfld.long 0xC0 10. "SR010," "0,1"
|
|
bitfld.long 0xC0 9. "SR09," "0,1"
|
|
bitfld.long 0xC0 8. "SR08," "0,1"
|
|
bitfld.long 0xC0 7. "SR07," "0,1"
|
|
bitfld.long 0xC0 6. "SR06," "0,1"
|
|
newline
|
|
bitfld.long 0xC0 5. "SR05," "0,1"
|
|
bitfld.long 0xC0 4. "SR04," "0,1"
|
|
bitfld.long 0xC0 3. "SR03," "0,1"
|
|
bitfld.long 0xC0 2. "SR02," "0,1"
|
|
bitfld.long 0xC0 1. "SR01," "0,1"
|
|
bitfld.long 0xC0 0. "SR00," "0,1"
|
|
line.long 0xC4 "SRCON0CLR,"
|
|
line.long 0xC8 "SRCON0SET,"
|
|
line.long 0xCC "SRCON0INV,"
|
|
line.long 0xD0 "SRCON1,"
|
|
bitfld.long 0xD0 14. "SR114," "0,1"
|
|
bitfld.long 0xD0 13. "SR113," "0,1"
|
|
bitfld.long 0xD0 12. "SR112," "0,1"
|
|
bitfld.long 0xD0 11. "SR111," "0,1"
|
|
bitfld.long 0xD0 10. "SR110," "0,1"
|
|
bitfld.long 0xD0 9. "SR19," "0,1"
|
|
bitfld.long 0xD0 8. "SR18," "0,1"
|
|
bitfld.long 0xD0 7. "SR17," "0,1"
|
|
bitfld.long 0xD0 6. "SR16," "0,1"
|
|
newline
|
|
bitfld.long 0xD0 5. "SR15," "0,1"
|
|
bitfld.long 0xD0 4. "SR14," "0,1"
|
|
bitfld.long 0xD0 3. "SR13," "0,1"
|
|
bitfld.long 0xD0 2. "SR12," "0,1"
|
|
bitfld.long 0xD0 1. "SR11," "0,1"
|
|
bitfld.long 0xD0 0. "SR10," "0,1"
|
|
line.long 0xD4 "SRCON1CLR,"
|
|
line.long 0xD8 "SRCON1SET,"
|
|
line.long 0xDC "SRCON1INV,"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x44002B00
|
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group.long 0x0++0xDF
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line.long 0x0 "ANSEL,"
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bitfld.long 0x0 14. "ANS14," "0,1"
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bitfld.long 0x0 13. "ANS13," "0,1"
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bitfld.long 0x0 12. "ANS12," "0,1"
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|
bitfld.long 0x0 11. "ANS11," "0,1"
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bitfld.long 0x0 10. "ANS10," "0,1"
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|
bitfld.long 0x0 9. "ANS9," "0,1"
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|
bitfld.long 0x0 8. "ANS8," "0,1"
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|
bitfld.long 0x0 7. "ANS7," "0,1"
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bitfld.long 0x0 6. "ANS6," "0,1"
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|
newline
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bitfld.long 0x0 5. "ANS5," "0,1"
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bitfld.long 0x0 4. "ANS4," "0,1"
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bitfld.long 0x0 3. "ANS3," "0,1"
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bitfld.long 0x0 2. "ANS2," "0,1"
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bitfld.long 0x0 1. "ANS1," "0,1"
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bitfld.long 0x0 0. "ANS0," "0,1"
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line.long 0x4 "ANSELCLR,"
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|
line.long 0x8 "ANSELSET,"
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line.long 0xC "ANSELINV,"
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line.long 0x10 "TRIS,"
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|
bitfld.long 0x10 14. "TRIS14," "0,1"
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bitfld.long 0x10 13. "TRIS13," "0,1"
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bitfld.long 0x10 12. "TRIS12," "0,1"
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bitfld.long 0x10 11. "TRIS11," "0,1"
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bitfld.long 0x10 10. "TRIS10," "0,1"
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bitfld.long 0x10 9. "TRIS9," "0,1"
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bitfld.long 0x10 8. "TRIS8," "0,1"
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bitfld.long 0x10 7. "TRIS7," "0,1"
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bitfld.long 0x10 6. "TRIS6," "0,1"
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|
newline
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bitfld.long 0x10 5. "TRIS5," "0,1"
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bitfld.long 0x10 4. "TRIS4," "0,1"
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bitfld.long 0x10 3. "TRIS3," "0,1"
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bitfld.long 0x10 2. "TRIS2," "0,1"
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bitfld.long 0x10 1. "TRIS1," "0,1"
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bitfld.long 0x10 0. "TRIS0," "0,1"
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line.long 0x14 "TRISCLR,"
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line.long 0x18 "TRISSET,"
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line.long 0x1C "TRISINV,"
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line.long 0x20 "PORT,"
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bitfld.long 0x20 14. "R14," "0,1"
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bitfld.long 0x20 13. "R13," "0,1"
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bitfld.long 0x20 12. "R12," "0,1"
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bitfld.long 0x20 11. "R11," "0,1"
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bitfld.long 0x20 10. "R10," "0,1"
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bitfld.long 0x20 9. "R9," "0,1"
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bitfld.long 0x20 8. "R8," "0,1"
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bitfld.long 0x20 7. "R7," "0,1"
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bitfld.long 0x20 6. "R6," "0,1"
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newline
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bitfld.long 0x20 5. "R5," "0,1"
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bitfld.long 0x20 4. "R4," "0,1"
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bitfld.long 0x20 3. "R3," "0,1"
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bitfld.long 0x20 2. "R2," "0,1"
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bitfld.long 0x20 1. "R1," "0,1"
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bitfld.long 0x20 0. "R0," "0,1"
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line.long 0x24 "PORTCLR,"
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line.long 0x28 "PORTSET,"
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line.long 0x2C "PORTINV,"
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line.long 0x30 "LAT,"
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bitfld.long 0x30 14. "LAT14," "0,1"
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bitfld.long 0x30 13. "LAT13," "0,1"
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bitfld.long 0x30 12. "LAT12," "0,1"
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bitfld.long 0x30 11. "LAT11," "0,1"
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bitfld.long 0x30 10. "LAT10," "0,1"
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bitfld.long 0x30 9. "LAT9," "0,1"
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bitfld.long 0x30 8. "LAT8," "0,1"
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bitfld.long 0x30 7. "LAT7," "0,1"
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bitfld.long 0x30 6. "LAT6," "0,1"
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newline
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bitfld.long 0x30 5. "LAT5," "0,1"
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bitfld.long 0x30 4. "LAT4," "0,1"
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bitfld.long 0x30 3. "LAT3," "0,1"
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bitfld.long 0x30 2. "LAT2," "0,1"
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bitfld.long 0x30 1. "LAT1," "0,1"
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bitfld.long 0x30 0. "LAT0," "0,1"
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line.long 0x34 "LATCLR,"
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line.long 0x38 "LATSET,"
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line.long 0x3C "LATINV,"
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line.long 0x40 "ODC,"
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bitfld.long 0x40 14. "ODC14," "0,1"
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bitfld.long 0x40 13. "ODC13," "0,1"
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bitfld.long 0x40 12. "ODC12," "0,1"
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bitfld.long 0x40 11. "ODC11," "0,1"
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bitfld.long 0x40 10. "ODC10," "0,1"
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bitfld.long 0x40 9. "ODC9," "0,1"
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bitfld.long 0x40 8. "ODC8," "0,1"
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bitfld.long 0x40 7. "ODC7," "0,1"
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bitfld.long 0x40 6. "ODC6," "0,1"
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newline
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bitfld.long 0x40 5. "ODC5," "0,1"
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bitfld.long 0x40 4. "ODC4," "0,1"
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bitfld.long 0x40 3. "ODC3," "0,1"
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bitfld.long 0x40 2. "ODC2," "0,1"
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bitfld.long 0x40 1. "ODC1," "0,1"
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bitfld.long 0x40 0. "ODC0," "0,1"
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line.long 0x44 "ODCCLR,"
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line.long 0x48 "ODCSET,"
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line.long 0x4C "ODCINV,"
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line.long 0x50 "CNPU,"
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bitfld.long 0x50 14. "CNPU14," "0,1"
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bitfld.long 0x50 13. "CNPU13," "0,1"
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bitfld.long 0x50 12. "CNPU12," "0,1"
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bitfld.long 0x50 11. "CNPU11," "0,1"
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bitfld.long 0x50 10. "CNPU10," "0,1"
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bitfld.long 0x50 9. "CNPU9," "0,1"
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bitfld.long 0x50 8. "CNPU8," "0,1"
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bitfld.long 0x50 7. "CNPU7," "0,1"
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bitfld.long 0x50 6. "CNPU6," "0,1"
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newline
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bitfld.long 0x50 5. "CNPU5," "0,1"
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bitfld.long 0x50 4. "CNPU4," "0,1"
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bitfld.long 0x50 3. "CNPU3," "0,1"
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bitfld.long 0x50 2. "CNPU2," "0,1"
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bitfld.long 0x50 1. "CNPU1," "0,1"
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bitfld.long 0x50 0. "CNPU0," "0,1"
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line.long 0x54 "CNPUCLR,"
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line.long 0x58 "CNPUSET,"
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line.long 0x5C "CNPUINV,"
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line.long 0x60 "CNPD,"
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bitfld.long 0x60 14. "CNPD14," "0,1"
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bitfld.long 0x60 13. "CNPD13," "0,1"
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bitfld.long 0x60 12. "CNPD12," "0,1"
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bitfld.long 0x60 11. "CNPD11," "0,1"
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bitfld.long 0x60 10. "CNPD10," "0,1"
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bitfld.long 0x60 9. "CNPD9," "0,1"
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bitfld.long 0x60 8. "CNPD8," "0,1"
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bitfld.long 0x60 7. "CNPD7," "0,1"
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bitfld.long 0x60 6. "CNPD6," "0,1"
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newline
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bitfld.long 0x60 5. "CNPD5," "0,1"
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bitfld.long 0x60 4. "CNPD4," "0,1"
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bitfld.long 0x60 3. "CNPD3," "0,1"
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bitfld.long 0x60 2. "CNPD2," "0,1"
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bitfld.long 0x60 1. "CNPD1," "0,1"
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bitfld.long 0x60 0. "CNPD0," "0,1"
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line.long 0x64 "CNPDCLR,"
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line.long 0x68 "CNPDSET,"
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line.long 0x6C "CNPDINV,"
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line.long 0x70 "CNCON,"
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bitfld.long 0x70 15. "ON," "0,1"
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bitfld.long 0x70 14. "FRZ," "0,1"
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bitfld.long 0x70 13. "SIDL," "0,1"
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bitfld.long 0x70 11. "EDGEDETECT," "0,1"
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line.long 0x74 "CNCONCLR,"
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line.long 0x78 "CNCONSET,"
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line.long 0x7C "CNCONINV,"
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line.long 0x80 "CNEN,"
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bitfld.long 0x80 14. "CNIE14," "0,1"
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bitfld.long 0x80 13. "CNIE13," "0,1"
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bitfld.long 0x80 12. "CNIE12," "0,1"
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bitfld.long 0x80 11. "CNIE11," "0,1"
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bitfld.long 0x80 10. "CNIE10," "0,1"
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bitfld.long 0x80 9. "CNIE9," "0,1"
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bitfld.long 0x80 8. "CNIE8," "0,1"
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bitfld.long 0x80 7. "CNIE7," "0,1"
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bitfld.long 0x80 6. "CNIE6," "0,1"
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newline
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bitfld.long 0x80 5. "CNIE5," "0,1"
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bitfld.long 0x80 4. "CNIE4," "0,1"
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bitfld.long 0x80 3. "CNIE3," "0,1"
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bitfld.long 0x80 2. "CNIE2," "0,1"
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bitfld.long 0x80 1. "CNIE1," "0,1"
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bitfld.long 0x80 0. "CNIE0," "0,1"
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line.long 0x84 "CNENCLR,"
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line.long 0x88 "CNENSET,"
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line.long 0x8C "CNENINV,"
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line.long 0x90 "CNSTAT,"
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bitfld.long 0x90 14. "CNSTAT14," "0,1"
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bitfld.long 0x90 13. "CNSTAT13," "0,1"
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bitfld.long 0x90 12. "CNSTAT12," "0,1"
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bitfld.long 0x90 11. "CNSTAT11," "0,1"
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bitfld.long 0x90 10. "CNSTAT10," "0,1"
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bitfld.long 0x90 9. "CNSTATA," "0,1"
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bitfld.long 0x90 8. "CNSTAT8," "0,1"
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bitfld.long 0x90 7. "CNSTAT7," "0,1"
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bitfld.long 0x90 6. "CNSTAT6," "0,1"
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newline
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bitfld.long 0x90 5. "CNSTAT5," "0,1"
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bitfld.long 0x90 4. "CNSTAT4," "0,1"
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bitfld.long 0x90 3. "CNSTAT3," "0,1"
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bitfld.long 0x90 2. "CNSTAT2," "0,1"
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bitfld.long 0x90 1. "CNSTAT1," "0,1"
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bitfld.long 0x90 0. "CNSTAT0," "0,1"
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line.long 0x94 "CNSTATCLR,"
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line.long 0x98 "CNSTATSET,"
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line.long 0x9C "CNSTATINV,"
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line.long 0xA0 "CNNE,"
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bitfld.long 0xA0 14. "CNNE14," "0,1"
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bitfld.long 0xA0 13. "CNNE13," "0,1"
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bitfld.long 0xA0 12. "CNNE12," "0,1"
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bitfld.long 0xA0 11. "CNNE11," "0,1"
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bitfld.long 0xA0 10. "CNNE10," "0,1"
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bitfld.long 0xA0 9. "CNNE9," "0,1"
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bitfld.long 0xA0 8. "CNNE8," "0,1"
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bitfld.long 0xA0 7. "CNNE7," "0,1"
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bitfld.long 0xA0 6. "CNNE6," "0,1"
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newline
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bitfld.long 0xA0 5. "CNNE5," "0,1"
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bitfld.long 0xA0 4. "CNNE4," "0,1"
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bitfld.long 0xA0 3. "CNNE3," "0,1"
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bitfld.long 0xA0 2. "CNNE2," "0,1"
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bitfld.long 0xA0 1. "CNNE1," "0,1"
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bitfld.long 0xA0 0. "CNNE0," "0,1"
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line.long 0xA4 "CNNECLR,"
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line.long 0xA8 "CNNESET,"
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line.long 0xAC "CNNEINV,"
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line.long 0xB0 "CNF,"
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bitfld.long 0xB0 14. "CNF14," "0,1"
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bitfld.long 0xB0 13. "CNF13," "0,1"
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bitfld.long 0xB0 12. "CNF12," "0,1"
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bitfld.long 0xB0 11. "CNF11," "0,1"
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bitfld.long 0xB0 10. "CNF10," "0,1"
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bitfld.long 0xB0 9. "CNF9," "0,1"
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bitfld.long 0xB0 8. "CNF8," "0,1"
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bitfld.long 0xB0 7. "CNF7," "0,1"
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bitfld.long 0xB0 6. "CNF6," "0,1"
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newline
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bitfld.long 0xB0 5. "CNF5," "0,1"
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bitfld.long 0xB0 4. "CNF4," "0,1"
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bitfld.long 0xB0 3. "CNF3," "0,1"
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bitfld.long 0xB0 2. "CNF2," "0,1"
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bitfld.long 0xB0 1. "CNF1," "0,1"
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bitfld.long 0xB0 0. "CNF0," "0,1"
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line.long 0xB4 "CNFCLR,"
|
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line.long 0xB8 "CNFSET,"
|
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line.long 0xBC "CNFINV,"
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line.long 0xC0 "SRCON0,"
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bitfld.long 0xC0 14. "SR014," "0,1"
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bitfld.long 0xC0 13. "SR013," "0,1"
|
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bitfld.long 0xC0 12. "SR012," "0,1"
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bitfld.long 0xC0 11. "SR011," "0,1"
|
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bitfld.long 0xC0 10. "SR010," "0,1"
|
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bitfld.long 0xC0 9. "SR09," "0,1"
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bitfld.long 0xC0 8. "SR08," "0,1"
|
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bitfld.long 0xC0 7. "SR07," "0,1"
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bitfld.long 0xC0 6. "SR06," "0,1"
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newline
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bitfld.long 0xC0 5. "SR05," "0,1"
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bitfld.long 0xC0 4. "SR04," "0,1"
|
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bitfld.long 0xC0 3. "SR03," "0,1"
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bitfld.long 0xC0 2. "SR02," "0,1"
|
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bitfld.long 0xC0 1. "SR01," "0,1"
|
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bitfld.long 0xC0 0. "SR00," "0,1"
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line.long 0xC4 "SRCON0CLR,"
|
|
line.long 0xC8 "SRCON0SET,"
|
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line.long 0xCC "SRCON0INV,"
|
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line.long 0xD0 "SRCON1,"
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bitfld.long 0xD0 14. "SR114," "0,1"
|
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bitfld.long 0xD0 13. "SR113," "0,1"
|
|
bitfld.long 0xD0 12. "SR112," "0,1"
|
|
bitfld.long 0xD0 11. "SR111," "0,1"
|
|
bitfld.long 0xD0 10. "SR110," "0,1"
|
|
bitfld.long 0xD0 9. "SR19," "0,1"
|
|
bitfld.long 0xD0 8. "SR18," "0,1"
|
|
bitfld.long 0xD0 7. "SR17," "0,1"
|
|
bitfld.long 0xD0 6. "SR16," "0,1"
|
|
newline
|
|
bitfld.long 0xD0 5. "SR15," "0,1"
|
|
bitfld.long 0xD0 4. "SR14," "0,1"
|
|
bitfld.long 0xD0 3. "SR13," "0,1"
|
|
bitfld.long 0xD0 2. "SR12," "0,1"
|
|
bitfld.long 0xD0 1. "SR11," "0,1"
|
|
bitfld.long 0xD0 0. "SR10," "0,1"
|
|
line.long 0xD4 "SRCON1CLR,"
|
|
line.long 0xD8 "SRCON1SET,"
|
|
line.long 0xDC "SRCON1INV,"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "HMATRIX (High-Speed Bus Matrix)"
|
|
base ad:0x42002400
|
|
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x42002480 ad:0x42002488 ad:0x42002490 ad:0x42002498 ad:0x420024A0 ad:0x420024A8 ad:0x420024B0 ad:0x420024B8 ad:0x420024C0 ad:0x420024C8 ad:0x420024D0 ad:0x420024D8 ad:0x420024E0 ad:0x420024E8 ad:0x420024F0 ad:0x420024F8)
|
|
tree "PRS[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "PRAS,Priority A for Slave"
|
|
line.long 0x4 "PRBS,Priority B for Slave"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
tree "ICM (Integrity Check Monitor)"
|
|
base ad:0x42002C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CFG,Configuration"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DAPROT,Region Descriptor Area Protection"
|
|
hexmask.long.byte 0x0 16.--21. 1. "HAPROT,Region Hash Area Protection"
|
|
bitfld.long 0x0 13.--15. "UALGO,User SHA Algorithm" "0: SHA1 Algorithm,1: SHA256 Algorithm,?,?,4: SHA224 Algorithm,?,?,?"
|
|
bitfld.long 0x0 12. "UIHASH,User Initial Hash Value" "0,1"
|
|
bitfld.long 0x0 9. "DUALBUFF,Dual Input Buffer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ASCD,Automatic Switch To Compare Digest" "0,1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "BBC,Bus Burden Control"
|
|
bitfld.long 0x0 2. "SLBDIS,Secondary List Branching Disable" "0,1"
|
|
bitfld.long 0x0 1. "EOMDIS,End of Monitoring Disable" "0,1"
|
|
bitfld.long 0x0 0. "WBDIS,Write Back Disable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "CTRL,Control"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RMEN,Region Monitoring Enable"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RMDIS,Region Monitoring Disable"
|
|
hexmask.long.byte 0x0 4.--7. 1. "REHASH,Recompute Internal Hash"
|
|
bitfld.long 0x0 2. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 1. "DISABLE,ICM Disable Register" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,ICM Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RMDIS,Region Monitoring Disabled Status"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RAWRMDIS,RAW Region Monitoring Disabled Status"
|
|
bitfld.long 0x0 0. "ENABLE,ICM Controller Enable Register" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER,Interrupt Enable"
|
|
bitfld.long 0x0 24. "URAD,Undefined Register Access Detection Interrupt Enable" "0,1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "RSU,Region Status Updated Interrupt Disable"
|
|
hexmask.long.byte 0x0 16.--19. 1. "REC,Region End bit Condition Detected Interrupt Enable"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RWC,Region Wrap Condition detected Interrupt Enable"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RBE,Region Bus Error Interrupt Enable"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "RHC,Region Hash Completed Interrupt Enable"
|
|
line.long 0x4 "IDR,Interrupt Disable"
|
|
bitfld.long 0x4 24. "URAD,Undefined Register Access Detection Interrupt Disable" "0,1"
|
|
hexmask.long.byte 0x4 20.--23. 1. "RSU,Region Status Updated Interrupt Disable"
|
|
hexmask.long.byte 0x4 16.--19. 1. "REC,Region End bit Condition detected Interrupt Disable"
|
|
hexmask.long.byte 0x4 12.--15. 1. "RWC,Region Wrap Condition Detected Interrupt Disable"
|
|
hexmask.long.byte 0x4 8.--11. 1. "RBE,Region Bus Error Interrupt Disable"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Disable"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RHC,Region Hash Completed Interrupt Disable"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask"
|
|
bitfld.long 0x0 24. "URAD,Undefined Register Access Detection Interrupt Mask" "0,1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "RSU,Region Status Updated Interrupt Mask"
|
|
hexmask.long.byte 0x0 16.--19. 1. "REC,Region End bit Condition Detected Interrupt Mask"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RWC,Region Wrap Condition Detected Interrupt Mask"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RBE,Region Bus Error Interrupt Mask"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Mask"
|
|
hexmask.long.byte 0x0 0.--3. 1. "RHC,Region Hash Completed Interrupt Mask"
|
|
line.long 0x4 "ISR,Interrupt Status"
|
|
bitfld.long 0x4 24. "URAD,Undefined Register Access Detection Status" "0,1"
|
|
hexmask.long.byte 0x4 20.--23. 1. "RSU,Region Status Updated Detected"
|
|
hexmask.long.byte 0x4 16.--19. 1. "REC,Region End bit Condition Detected"
|
|
hexmask.long.byte 0x4 12.--15. 1. "RWC,Region Wrap Condition Detected"
|
|
hexmask.long.byte 0x4 8.--11. 1. "RBE,Region Bus Error"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "RDM,Region Digest Mismatch"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RHC,Region Hash Completed"
|
|
line.long 0x8 "UASR,Undefined Access Status"
|
|
bitfld.long 0x8 0.--2. "URAT,Undefined Register Access Trace" "0: Unspecified structure member set to one detected..,1: CFG modified during active monitoring,2: DSCR modified during active monitoring,3: HASH modified during active monitoring,4: Write-only register read access,?,?,?"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DSCR,Region Descriptor Area Start Address"
|
|
hexmask.long 0x0 6.--31. 1. "DASA,Descriptor Area Start Address"
|
|
line.long 0x4 "HASH,Region Hash Area Start Address"
|
|
hexmask.long 0x4 7.--31. 1. "HASA,Hash Area Start Address"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x38)++0x3
|
|
line.long 0x0 "UIHVAL[$1],User Initial Hash Value n"
|
|
hexmask.long 0x0 0.--31. 1. "VAL,Initial Hash Value"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
tree "ITM (Instrumentation Trace Macrocell)"
|
|
base ad:0xE0000000
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "PORT_WORD_MODE[$1],ITM Stimulus Port Registers"
|
|
hexmask.long 0x0 0.--31. 1. "PORT,"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "PORT_BYTE_MODE[$1],ITM Stimulus Port Registers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PORT,"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "PORT_HWORD_MODE[$1],ITM Stimulus Port Registers"
|
|
hexmask.long.word 0x0 0.--15. 1. "PORT,"
|
|
repeat.end
|
|
group.long 0xE00++0x3
|
|
line.long 0x0 "TER,ITM Trace Enable Register"
|
|
group.long 0xE40++0x3
|
|
line.long 0x0 "TPR,ITM Trace Privilege Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRIVMASK,"
|
|
group.long 0xE80++0x3
|
|
line.long 0x0 "TCR,ITM Trace Control Register"
|
|
bitfld.long 0x0 23. "BUSY," "0,1"
|
|
hexmask.long.byte 0x0 16.--22. 1. "TraceBusID,"
|
|
bitfld.long 0x0 10.--11. "GTSFREQ," "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "TSPrescale," "0,1,2,3"
|
|
bitfld.long 0x0 5. "STALLENA," "0,1"
|
|
bitfld.long 0x0 4. "SWOENA," "0,1"
|
|
bitfld.long 0x0 3. "DWTENA," "0,1"
|
|
bitfld.long 0x0 2. "SYNCENA," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TSENA," "0,1"
|
|
bitfld.long 0x0 0. "ITMENA," "0,1"
|
|
wgroup.long 0xEF8++0x3
|
|
line.long 0x0 "IWR,ITM Integration Write Register"
|
|
bitfld.long 0x0 0. "ATVALIDM," "0,1"
|
|
rgroup.long 0xEFC++0x3
|
|
line.long 0x0 "IRR,ITM Integration Read Register"
|
|
bitfld.long 0x0 0. "ATREADYM," "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0xFD0++0x2F
|
|
line.long 0x0 "PID4,ITM Peripheral Identification Register #4"
|
|
line.long 0x4 "PID5,ITM Peripheral Identification Register #5"
|
|
line.long 0x8 "PID6,ITM Peripheral Identification Register #6"
|
|
line.long 0xC "PID7,ITM Peripheral Identification Register #7"
|
|
line.long 0x10 "PID0,ITM Peripheral Identification Register #0"
|
|
line.long 0x14 "PID1,ITM Peripheral Identification Register #1"
|
|
line.long 0x18 "PID2,ITM Peripheral Identification Register #2"
|
|
line.long 0x1C "PID3,ITM Peripheral Identification Register #3"
|
|
line.long 0x20 "CID0,ITM Component Identification Register #0"
|
|
line.long 0x24 "CID1,ITM Component Identification Register #1"
|
|
line.long 0x28 "CID2,ITM Component Identification Register #2"
|
|
line.long 0x2C "CID3,ITM Component Identification Register #3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0xFD0++0x2F
|
|
line.long 0x0 "PID4,ITM Peripheral Identification Register #4"
|
|
line.long 0x4 "PID5,ITM Peripheral Identification Register #5"
|
|
line.long 0x8 "PID6,ITM Peripheral Identification Register #6"
|
|
line.long 0xC "PID7,ITM Peripheral Identification Register #7"
|
|
line.long 0x10 "PID0,ITM Peripheral Identification Register #0"
|
|
line.long 0x14 "PID1,ITM Peripheral Identification Register #1"
|
|
line.long 0x18 "PID2,ITM Peripheral Identification Register #2"
|
|
line.long 0x1C "PID3,ITM Peripheral Identification Register #3"
|
|
line.long 0x20 "CID0,ITM Component Identification Register #0"
|
|
line.long 0x24 "CID1,ITM Component Identification Register #1"
|
|
line.long 0x28 "CID2,ITM Component Identification Register #2"
|
|
line.long 0x2C "CID3,ITM Component Identification Register #3"
|
|
endif
|
|
tree.end
|
|
tree "MPU (Memory Protection Unit)"
|
|
base ad:0xE000ED90
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "TYPE,MPU Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IREGION,Number of Instruction Regions"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DREGION,Number of Data Regions"
|
|
bitfld.long 0x0 0. "SEPARATE,Separate instruction and Data Memory MapsRegions" "0,1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "CTRL,MPU Control Register"
|
|
bitfld.long 0x0 2. "PRIVDEFENA,Enables privileged software access to default memory map" "0,1"
|
|
bitfld.long 0x0 1. "HFNMIENA,Enable Hard Fault and NMI handlers" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,MPU Enable" "0,1"
|
|
line.long 0x4 "RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "REGION,Region referenced by RBAR and RASR"
|
|
line.long 0x8 "RBAR,MPU Region Base Address Register"
|
|
hexmask.long 0x8 5.--31. 1. "ADDR,Region base address"
|
|
bitfld.long 0x8 4. "VALID,Region number valid" "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "REGION,Region number"
|
|
line.long 0xC "RASR,MPU Region Attribute and Size Register"
|
|
bitfld.long 0xC 28. "XN,Execute Never Attribute" "0,1"
|
|
bitfld.long 0xC 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18. "S,Shareable bit" "0,1"
|
|
bitfld.long 0xC 17. "C,Cacheable bit" "0,1"
|
|
bitfld.long 0xC 16. "B,Bufferable bit" "0,1"
|
|
hexmask.long.byte 0xC 8.--15. 1. "SRD,Sub-region disable"
|
|
bitfld.long 0xC 1. "SIZE,Region Size" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "ENABLE,Region Enable" "0,1"
|
|
line.long 0x10 "RBAR_A1,MPU Alias 1 Region Base Address Register"
|
|
hexmask.long 0x10 5.--31. 1. "ADDR,Region base address"
|
|
bitfld.long 0x10 4. "VALID,Region number valid" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "REGION,Region number"
|
|
line.long 0x14 "RASR_A1,MPU Alias 1 Region Attribute and Size Register"
|
|
bitfld.long 0x14 28. "XN,Execute Never Attribute" "0,1"
|
|
bitfld.long 0x14 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18. "S,Shareable bit" "0,1"
|
|
bitfld.long 0x14 17. "C,Cacheable bit" "0,1"
|
|
bitfld.long 0x14 16. "B,Bufferable bit" "0,1"
|
|
hexmask.long.byte 0x14 8.--15. 1. "SRD,Sub-region disable"
|
|
bitfld.long 0x14 1. "SIZE,Region Size" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "ENABLE,Region Enable" "0,1"
|
|
line.long 0x18 "RBAR_A2,MPU Alias 2 Region Base Address Register"
|
|
hexmask.long 0x18 5.--31. 1. "ADDR,Region base address"
|
|
bitfld.long 0x18 4. "VALID,Region number valid" "0,1"
|
|
hexmask.long.byte 0x18 0.--3. 1. "REGION,Region number"
|
|
line.long 0x1C "RASR_A2,MPU Alias 2 Region Attribute and Size Register"
|
|
bitfld.long 0x1C 28. "XN,Execute Never Attribute" "0,1"
|
|
bitfld.long 0x1C 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 18. "S,Shareable bit" "0,1"
|
|
bitfld.long 0x1C 17. "C,Cacheable bit" "0,1"
|
|
bitfld.long 0x1C 16. "B,Bufferable bit" "0,1"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "SRD,Sub-region disable"
|
|
bitfld.long 0x1C 1. "SIZE,Region Size" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0. "ENABLE,Region Enable" "0,1"
|
|
line.long 0x20 "RBAR_A3,MPU Alias 3 Region Base Address Register"
|
|
hexmask.long 0x20 5.--31. 1. "ADDR,Region base address"
|
|
bitfld.long 0x20 4. "VALID,Region number valid" "0,1"
|
|
hexmask.long.byte 0x20 0.--3. 1. "REGION,Region number"
|
|
line.long 0x24 "RASR_A3,MPU Alias 3 Region Attribute and Size Register"
|
|
bitfld.long 0x24 28. "XN,Execute Never Attribute" "0,1"
|
|
bitfld.long 0x24 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 18. "S,Shareable bit" "0,1"
|
|
bitfld.long 0x24 17. "C,Cacheable bit" "0,1"
|
|
bitfld.long 0x24 16. "B,Bufferable bit" "0,1"
|
|
hexmask.long.byte 0x24 8.--15. 1. "SRD,Sub-region disable"
|
|
bitfld.long 0x24 1. "SIZE,Region Size" "0,1"
|
|
newline
|
|
bitfld.long 0x24 0. "ENABLE,Region Enable" "0,1"
|
|
tree.end
|
|
tree "NVIC (Nested Vectored Interrupt Controller)"
|
|
base ad:0xE000E100
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "ISER[$1],Interrupt Set Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "ICER[$1],Interrupt Clear Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "ISPR[$1],Interrupt Set Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x180)++0x3
|
|
line.long 0x0 "ICPR[$1],Interrupt Clear Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "IABR[$1],Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active bits"
|
|
repeat.end
|
|
repeat 35. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x300)++0x0
|
|
line.byte 0x0 "IP[$1],Interrupt Priority Register n"
|
|
bitfld.byte 0x0 0.--2. "PRI0,Priority of interrupt n" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
wgroup.long 0xE00++0x3
|
|
line.long 0x0 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "INTID,Interrupt ID to trigger"
|
|
tree.end
|
|
tree "NVM (Non-Volatile Memory)"
|
|
base ad:0x44000600
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "NVMCON,"
|
|
bitfld.long 0x0 15. "WR," "0,1"
|
|
bitfld.long 0x0 14. "WREN," "0,1"
|
|
bitfld.long 0x0 13. "WRERR," "0,1"
|
|
bitfld.long 0x0 12. "LVDERR," "0,1"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 8. "HTDPGM," "0,1"
|
|
bitfld.long 0x0 7. "PFSWAP," "0,1"
|
|
bitfld.long 0x0 6. "BFSWAP," "0,1"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x0 0.--3. 1. "NVMOP,"
|
|
line.long 0x4 "NVMCONCLR,"
|
|
line.long 0x8 "NVMCONSET,"
|
|
line.long 0xC "NVMCONINV,"
|
|
line.long 0x10 "NVMCON2,"
|
|
hexmask.long.byte 0x10 28.--31. 1. "ERS,"
|
|
bitfld.long 0x10 24. "SLEEP," "0,1"
|
|
hexmask.long.byte 0x10 16.--20. 1. "WS,"
|
|
bitfld.long 0x10 14. "TEMP," "0,1"
|
|
bitfld.long 0x10 13. "CREAD1," "0,1"
|
|
bitfld.long 0x10 12. "VREAD1," "0,1"
|
|
bitfld.long 0x10 8.--9. "RETRY," "0,1,2,3"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x10 6.--7. "SWAPLK," "0,1,2,3"
|
|
bitfld.long 0x10 0. "PREPG," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x10 0. "NVMPREPG," "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x10 0. "NVMPREPG," "0,1"
|
|
endif
|
|
line.long 0x14 "NVMCON2CLR,"
|
|
line.long 0x18 "NVMCON2SET,"
|
|
line.long 0x1C "NVMCON2INV,"
|
|
line.long 0x20 "NVMKEY,"
|
|
hexmask.long 0x20 0.--31. 1. "NVMKEY,"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "NVMADDR,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMADDR,"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "NVMDATA0,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA0,"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "NVMDATA1,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA1,"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "NVMDATA2,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA2,"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "NVMDATA3,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA3,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "NVMDATA4,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA4,"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "NVMDATA5,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA5,"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "NVMDATA6,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA6,"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "NVMDATA7,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMDATA7,"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "NVMUBWP,"
|
|
bitfld.long 0x0 31. "ULOCK," "0,1"
|
|
bitfld.long 0x0 23. "UBWP23," "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "UBWP22," "0,1"
|
|
bitfld.long 0x0 21. "UBWP21," "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "UBWP20," "0,1"
|
|
bitfld.long 0x0 19. "UBWP19," "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "UBWP18," "0,1"
|
|
bitfld.long 0x0 17. "UBWP17," "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "UBWP16," "0,1"
|
|
bitfld.long 0x0 15. "UBWP15," "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "UBWP14," "0,1"
|
|
bitfld.long 0x0 13. "UBWP13," "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "UBWP12," "0,1"
|
|
bitfld.long 0x0 11. "UBWP11," "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UBWP10," "0,1"
|
|
bitfld.long 0x0 9. "UBWP9," "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "UBWP8," "0,1"
|
|
bitfld.long 0x0 7. "UBWP7," "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "UBWP6," "0,1"
|
|
bitfld.long 0x0 5. "UBWP5," "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "UBWP4," "0,1"
|
|
bitfld.long 0x0 3. "UBWP3," "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UBWP2," "0,1"
|
|
bitfld.long 0x0 1. "UBWP1," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "UBWP0," "0,1"
|
|
line.long 0x4 "NVMUBWPCLR,"
|
|
line.long 0x8 "NVMUBWPSET,"
|
|
line.long 0xC "NVMUBWPINV,"
|
|
endif
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "NVMSRCADDR,"
|
|
hexmask.long 0x0 0.--31. 1. "NVMSRCADDR,"
|
|
group.long 0xD0++0x2F
|
|
line.long 0x0 "NVMPWPLT,"
|
|
bitfld.long 0x0 31. "ULOCK," "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PWPLT,"
|
|
line.long 0x4 "NVMPWPLTCLR,"
|
|
line.long 0x8 "NVMPWPLTSET,"
|
|
line.long 0xC "NVMPWPLTINV,"
|
|
line.long 0x10 "NVMPWPGTE,"
|
|
bitfld.long 0x10 31. "ULOCK," "0,1"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "PWPGTE,"
|
|
line.long 0x14 "NVMPWPGTECLR,"
|
|
line.long 0x18 "NVMPWPGTESET,"
|
|
line.long 0x1C "NVMPWPGTEINV,"
|
|
line.long 0x20 "NVMLBWP,"
|
|
bitfld.long 0x20 31. "ULOCK," "0,1"
|
|
bitfld.long 0x20 23. "LBWP23," "0,1"
|
|
bitfld.long 0x20 22. "LBWP22," "0,1"
|
|
bitfld.long 0x20 21. "LBWP21," "0,1"
|
|
bitfld.long 0x20 20. "LBWP20," "0,1"
|
|
bitfld.long 0x20 19. "LBWP19," "0,1"
|
|
bitfld.long 0x20 18. "LBWP18," "0,1"
|
|
newline
|
|
bitfld.long 0x20 17. "LBWP17," "0,1"
|
|
bitfld.long 0x20 16. "LBWP16," "0,1"
|
|
bitfld.long 0x20 15. "LBWP15," "0,1"
|
|
bitfld.long 0x20 14. "LBWP14," "0,1"
|
|
bitfld.long 0x20 13. "LBWP13," "0,1"
|
|
bitfld.long 0x20 12. "LBWP12," "0,1"
|
|
bitfld.long 0x20 11. "LBWP11," "0,1"
|
|
newline
|
|
bitfld.long 0x20 10. "LBWP10," "0,1"
|
|
bitfld.long 0x20 9. "LBWP9," "0,1"
|
|
bitfld.long 0x20 8. "LBWP8," "0,1"
|
|
bitfld.long 0x20 7. "LBWP7," "0,1"
|
|
bitfld.long 0x20 6. "LBWP6," "0,1"
|
|
bitfld.long 0x20 5. "LBWP5," "0,1"
|
|
bitfld.long 0x20 4. "LBWP4," "0,1"
|
|
newline
|
|
bitfld.long 0x20 3. "LBWP3," "0,1"
|
|
bitfld.long 0x20 2. "LBWP2," "0,1"
|
|
bitfld.long 0x20 1. "LBWP1," "0,1"
|
|
bitfld.long 0x20 0. "LBWP0," "0,1"
|
|
line.long 0x24 "NVMLBWPCLR,"
|
|
line.long 0x28 "NVMLBWPSET,"
|
|
line.long 0x2C "NVMLBWPINV,"
|
|
tree.end
|
|
tree "PAC (Peripheral Access Controller)"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "WRCTRL,Write control"
|
|
hexmask.long.byte 0x0 16.--23. 1. "KEY,Peripheral access control key"
|
|
hexmask.long.word 0x0 0.--15. 1. "PERID,Peripheral identifier"
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "EVCTRL,Event control"
|
|
bitfld.byte 0x0 0. "ERREO,Peripheral acess error event output" "0,1"
|
|
group.byte 0x8++0x1
|
|
line.byte 0x0 "INTENCLR,Interrupt enable clear"
|
|
bitfld.byte 0x0 0. "ERR,Peripheral access error interrupt disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt enable set"
|
|
bitfld.byte 0x1 0. "ERR,Peripheral access error interrupt enable" "0,1"
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "INTFLAGAHB,Bridge interrupt flag status"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 12. "CRYPTO_,CRYPTO" "0,1"
|
|
bitfld.long 0x0 11. "ROT_,ROT" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 12. "CRYPTO_,CRYPTO" "0,1"
|
|
bitfld.long 0x0 11. "ROT_,ROT" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 11. "PUKCC_,PUKCC" "0,1"
|
|
endif
|
|
bitfld.long 0x0 10. "QSPI_,QSPI" "0,1"
|
|
bitfld.long 0x0 9. "HPBPIC_,HPBPIC0" "0,1"
|
|
bitfld.long 0x0 8. "HPBC_,HPBC" "0,1"
|
|
bitfld.long 0x0 7. "HPBB_,HPBB" "0,1"
|
|
bitfld.long 0x0 6. "HPBA_,HPBA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PFLASH_,PFLASH" "0,1"
|
|
bitfld.long 0x0 4. "CFLASH_,CFLASH" "0,1"
|
|
bitfld.long 0x0 3. "SRAM3_,SRAM3" "0,1"
|
|
bitfld.long 0x0 2. "SRAM2_,SRAM2" "0,1"
|
|
bitfld.long 0x0 1. "SRAM1_,SRAM1" "0,1"
|
|
bitfld.long 0x0 0. "SRAM0_,SRAM0" "0,1"
|
|
line.long 0x4 "INTFLAGA,Peripheral interrupt flag status - Bridge A"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 15. "TCC2_,TCC2" "0,1"
|
|
bitfld.long 0x4 14. "TCC1_,TCC1" "0,1"
|
|
bitfld.long 0x4 13. "TCC0_,TCC0" "0,1"
|
|
bitfld.long 0x4 12. "TC7_,TC7" "0,1"
|
|
bitfld.long 0x4 11. "TC6_,TC6" "0,1"
|
|
bitfld.long 0x4 10. "TC5_,TC5" "0,1"
|
|
bitfld.long 0x4 9. "TC4_,TC4" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 15. "TCC2_,TCC2" "0,1"
|
|
bitfld.long 0x4 14. "TCC1_,TCC1" "0,1"
|
|
bitfld.long 0x4 13. "TCC0_,TCC0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TC7_,TC7" "0,1"
|
|
bitfld.long 0x4 11. "TC6_,TC6" "0,1"
|
|
bitfld.long 0x4 10. "TC5_,TC5" "0,1"
|
|
bitfld.long 0x4 9. "TC4_,TC4" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x4 11. "TCC2_,TCC2" "0,1"
|
|
bitfld.long 0x4 10. "TCC1_,TCC1" "0,1"
|
|
bitfld.long 0x4 9. "TCC0_,TCC0" "0,1"
|
|
endif
|
|
bitfld.long 0x4 8. "TC3_,TC3" "0,1"
|
|
bitfld.long 0x4 7. "TC2_,TC2" "0,1"
|
|
bitfld.long 0x4 6. "TC1_,TC1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "TC0_,TC0" "0,1"
|
|
bitfld.long 0x4 4. "SERCOM1_,SERCOM1" "0,1"
|
|
bitfld.long 0x4 3. "SERCOM0_,SERCOM0" "0,1"
|
|
bitfld.long 0x4 2. "EIC_,EIC" "0,1"
|
|
bitfld.long 0x4 1. "FREQM_,FREQM" "0,1"
|
|
bitfld.long 0x4 0. "PAC_,PAC" "0,1"
|
|
line.long 0x8 "INTFLAGB,Peripheral interrupt flag status - Bridge B"
|
|
bitfld.long 0x8 4. "RAMECC_,RAMECC" "0,1"
|
|
bitfld.long 0x8 3. "EVSYS_,EVSYS" "0,1"
|
|
bitfld.long 0x8 2. "DMAC_,DMAC" "0,1"
|
|
bitfld.long 0x8 0. "DSU_,DSU" "0,1"
|
|
line.long 0xC "INTFLAGC,Peripheral interrupt flag status - Bridge C"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC 10. "TRNG_,TRNG" "0,1"
|
|
bitfld.long 0xC 4. "SERCOM3_,SERCOM3" "0,1"
|
|
bitfld.long 0xC 3. "SERCOM2_,SERCOM2" "0,1"
|
|
bitfld.long 0xC 1. "AES_,AES" "0,1"
|
|
endif
|
|
bitfld.long 0xC 7. "AC_,AC" "0,1"
|
|
bitfld.long 0xC 6. "CCL_,CCL" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0xC 1. "SERCOM2_,SERCOM2" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0xC 1. "SERCOM2_,SERCOM2" "0,1"
|
|
endif
|
|
bitfld.long 0xC 0. "QSPI_,QSPI" "0,1"
|
|
rgroup.long 0x34++0xB
|
|
line.long 0x0 "STATUSA,Peripheral write protection status - Bridge A"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 15. "TCC2_,TCC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCC1_,TCC1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 13. "TCC0_,TCC0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 12. "TC7_,TC7 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 11. "TC6_,TC6 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 10. "TC5_,TC5 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 9. "TC4_,TC4 APB Protect Enable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 15. "TCC2_,TCC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCC1_,TCC1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 13. "TCC0_,TCC0 APB Protect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TC7_,TC7 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 11. "TC6_,TC6 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 10. "TC5_,TC5 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 9. "TC4_,TC4 APB Protect Enable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x0 11. "TCC2_,TCC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 10. "TCC1_,TCC1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 9. "TCC0_,TCC0 APB Protect Enable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 8. "TC3_,TC3 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 7. "TC2_,TC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 6. "TC1_,TC1 APB Protect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TC0_,TC0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 4. "SERCOM1_,SERCOM1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 3. "SERCOM0_,SERCOM0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 2. "EIC_,EIC APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 1. "FREQM_,FREQM APB Protect Enable" "0,1"
|
|
bitfld.long 0x0 0. "PAC_,PAC APB Protect Enable" "0,1"
|
|
line.long 0x4 "STATUSB,Peripheral write protection status - Bridge B"
|
|
bitfld.long 0x4 4. "RAMECC_,RAMECC APB Protect Enable" "0,1"
|
|
bitfld.long 0x4 3. "EVSYS_,EVSYS APB Protect Enable" "0,1"
|
|
bitfld.long 0x4 2. "DMAC_,DMAC APB Protect Enable" "0,1"
|
|
bitfld.long 0x4 0. "DSU_,DSU APB Protect Enable" "0,1"
|
|
line.long 0x8 "STATUSC,Peripheral write protection status - Bridge C"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x8 10. "TRNG_,TRNG APB Protect Enable" "0,1"
|
|
bitfld.long 0x8 4. "SERCOM3_,SERCOM3 APB Protect Enable" "0,1"
|
|
bitfld.long 0x8 3. "SERCOM2_,SERCOM2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x8 1. "AES_,AES APB Protect Enable" "0,1"
|
|
endif
|
|
bitfld.long 0x8 7. "AC_,AC APB Protect Enable" "0,1"
|
|
bitfld.long 0x8 6. "CCL_,CCL APB Protect Enable" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x8 1. "SERCOM2_,SERCOM2 APB Protect Enable" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x8 1. "SERCOM2_,SERCOM2 APB Protect Enable" "0,1"
|
|
endif
|
|
bitfld.long 0x8 0. "QSPI_,QSPI APB Protect Enable" "0,1"
|
|
tree.end
|
|
tree "PCHE (Prefetch Cache)"
|
|
base ad:0x44012400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CHECON,"
|
|
bitfld.long 0x0 26. "ACHEEN," "0,1"
|
|
bitfld.long 0x0 25. "DCHEEN," "0,1"
|
|
bitfld.long 0x0 24. "ICHEEN," "0,1"
|
|
bitfld.long 0x0 22. "ACHEINV," "0,1"
|
|
bitfld.long 0x0 21. "DCHEINV," "0,1"
|
|
bitfld.long 0x0 20. "ICHEINV," "0,1"
|
|
bitfld.long 0x0 18. "ACHECOH," "0,1"
|
|
bitfld.long 0x0 17. "DCHECOH," "0,1"
|
|
bitfld.long 0x0 16. "ICHECOH," "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CHEPERF," "0,1"
|
|
bitfld.long 0x0 8. "ADRWS," "0,1"
|
|
bitfld.long 0x0 7. "PFMSECEN," "0,1"
|
|
bitfld.long 0x0 4.--5. "PREFEN," "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PFMWS,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "CHECONCLR,"
|
|
line.long 0x4 "CHECONSET,"
|
|
line.long 0x8 "CHECONINV,"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CHESTATCLR,"
|
|
line.long 0x4 "CHESTATSET,"
|
|
line.long 0x8 "CHESTATINV,"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CHEHITCLR,"
|
|
line.long 0x4 "CHEHITSET,"
|
|
line.long 0x8 "CHEHITINV,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "CHECONCLR,"
|
|
line.long 0x4 "CHECONSET,"
|
|
line.long 0x8 "CHECONINV,"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CHESTATCLR,"
|
|
line.long 0x4 "CHESTATSET,"
|
|
line.long 0x8 "CHESTATINV,"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CHEHITCLR,"
|
|
line.long 0x4 "CHEHITSET,"
|
|
line.long 0x8 "CHEHITINV,"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "CHEMISCLR,"
|
|
line.long 0x4 "CHEMISSET,"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CHESTAT,"
|
|
bitfld.long 0x0 27. "PFMDED," "0,1"
|
|
bitfld.long 0x0 26. "PFMSEC," "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PFMSECCNT,"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CHEHIT,"
|
|
hexmask.long 0x0 0.--31. 1. "CHEHIT,"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "CHEMIS,"
|
|
hexmask.long 0x0 0.--31. 1. "CHEMIS,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x34++0xB
|
|
line.long 0x0 "CHEMISCLR,"
|
|
line.long 0x4 "CHEMISSET,"
|
|
line.long 0x8 "CHEMISINV,"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "CHEMISINV,"
|
|
endif
|
|
tree.end
|
|
tree "PFW (Flash Wrapper)"
|
|
base ad:0x44000800
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "IFT_CON,"
|
|
bitfld.long 0x0 15. "ON," "0,1"
|
|
bitfld.long 0x0 14. "SIDL," "0,1"
|
|
bitfld.long 0x0 13. "FRZ," "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "IFT_CRCCON,"
|
|
hexmask.long.word 0x0 16.--31. 1. "PERIOD,"
|
|
bitfld.long 0x0 15. "CRCEN," "0,1"
|
|
bitfld.long 0x0 14. "DONE," "0,1"
|
|
bitfld.long 0x0 13. "ERROR," "0,1"
|
|
bitfld.long 0x0 12. "PLEN32," "0,1"
|
|
bitfld.long 0x0 2. "PAUSE," "0,1"
|
|
bitfld.long 0x0 1. "RBITO," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "AUTOR," "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "IFT_CRCMADR,"
|
|
hexmask.long 0x0 0.--31. 1. "IFT_CRCMADR,"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IFT_CRCMLEN,"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CRCMLEN,"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "IFT_CRCIV,"
|
|
hexmask.long 0x0 0.--31. 1. "CRCIV,"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "IFT_CRCACC,"
|
|
hexmask.long 0x0 0.--31. 1. "CRCACC,"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "IFT_CRCPOLY,"
|
|
hexmask.long 0x0 0.--31. 1. "CYCPOLY,"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "IFT_CRCFXOR,"
|
|
hexmask.long 0x0 0.--31. 1. "CRCFXOR,"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "IFT_CRCSUM,"
|
|
hexmask.long 0x0 0.--31. 1. "CRCSUM,"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "IFT_ECCCON,"
|
|
bitfld.long 0x0 15. "FLTEN," "0,1"
|
|
bitfld.long 0x0 8.--10. "CTLFLT," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 7. "EVENT," "0,1"
|
|
bitfld.long 0x0 0.--2. "FLT_MD," "0,1,2,3,4,5,6,7"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "IFT_ECCFLT,"
|
|
hexmask.long.word 0x0 16.--24. 1. "FLT2PTR,"
|
|
hexmask.long.word 0x0 0.--8. 1. "FLT1PTR,"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "IFT_ECCADR,"
|
|
hexmask.long 0x0 0.--31. 1. "ECCADR,"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "IFT_ECCPAR,"
|
|
bitfld.long 0x0 31. "DEDOUT," "0,1"
|
|
hexmask.long.word 0x0 16.--24. 1. "SECOUT,"
|
|
bitfld.long 0x0 15. "DEDIN," "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "SECIN,"
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "IFT_ECCSYN,"
|
|
bitfld.long 0x0 31. "PERR3," "0,1"
|
|
bitfld.long 0x0 30. "PERR2," "0,1"
|
|
bitfld.long 0x0 29. "PERR1," "0,1"
|
|
bitfld.long 0x0 28. "PERR0," "0,1"
|
|
bitfld.long 0x0 24.--26. "CTLSTAT," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18. "CERR," "0,1"
|
|
bitfld.long 0x0 17. "DERR," "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SERR," "0,1"
|
|
bitfld.long 0x0 15. "DEDSYS," "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "SECSYN,"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "DFT_VALCON,"
|
|
bitfld.long 0x0 15. "VAL_ON," "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DFT_VALP1RR01,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P1RR1,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR1RR0,"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "DFT_VALP1RR23,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P1RR3,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR1RR2,"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "DFT_VALP1RR45,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P1RR5,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR1RR4,"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "DFT_VALP1RR67,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P1RR7,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR1RR6,"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "DFT_VALP2RR01,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P2RR1,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR2RR0,"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "DFT_VALP2RR23,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P2RR3,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR2RR2,"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "DFT_VALP2RR45,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P2RR5,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR2RR4,"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "DFT_VALP2RR67,"
|
|
hexmask.long.word 0x0 16.--31. 1. "P2RR7,"
|
|
hexmask.long.word 0x0 0.--15. 1. "PR2RR6,"
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base ad:0x44013E00
|
|
group.long 0x0++0x3B
|
|
line.long 0x0 "SPICTRL,"
|
|
bitfld.long 0x0 31. "SPIRST," "0,1"
|
|
bitfld.long 0x0 30. "PMUCRST," "0,1"
|
|
bitfld.long 0x0 24. "CMD," "0,1"
|
|
hexmask.long.byte 0x0 16.--23. 1. "SPIADDR,"
|
|
hexmask.long.word 0x0 0.--15. 1. "SPIWDATA,"
|
|
line.long 0x4 "SPISTATUS,"
|
|
hexmask.long.word 0x4 16.--31. 1. "SPIRDATA,"
|
|
hexmask.long.byte 0x4 8.--15. 1. "SPIADDR,"
|
|
bitfld.long 0x4 7. "SPIRDY," "0,1"
|
|
bitfld.long 0x4 0. "SPIERR," "0,1"
|
|
line.long 0x8 "CLKCTRL,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x8 31. "WCMRET," "0,1"
|
|
bitfld.long 0x8 30. "WLDOOFF," "0,1"
|
|
endif
|
|
bitfld.long 0x8 29. "F_BCLK_CFG," "0,1"
|
|
bitfld.long 0x8 28. "BUCKBOREN," "0,1"
|
|
bitfld.long 0x8 27. "ADCBOREN," "0,1"
|
|
bitfld.long 0x8 26. "MLDOEXT_BOREN," "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "BKCLK_HW_OVR," "0,1"
|
|
hexmask.long.byte 0x8 20.--23. 1. "CMP_CYCLE,"
|
|
bitfld.long 0x8 18. "MVREFFSMEN," "0,1"
|
|
bitfld.long 0x8 17. "MLDOEXTEN," "0,1"
|
|
bitfld.long 0x8 16. "BACWD," "0,1"
|
|
bitfld.long 0x8 14.--15. "BUCKSRC," "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--13. 1. "BUCKCLKDIV,"
|
|
bitfld.long 0x8 7. "SPISRC," "0,1"
|
|
bitfld.long 0x8 6. "PMUANA_BKBOREN," "0,1"
|
|
hexmask.long.byte 0x8 0.--5. 1. "SPICLKDIV,"
|
|
line.long 0xC "MODECTRL1,"
|
|
bitfld.long 0xC 31. "BUCKEN," "0,1"
|
|
bitfld.long 0xC 30. "MLDOEN," "0,1"
|
|
bitfld.long 0xC 29. "BUCKMODE," "0,1"
|
|
hexmask.long.byte 0xC 24.--28. 1. "VREG1CTRL,"
|
|
hexmask.long.byte 0xC 16.--20. 1. "VREG2CTRL,"
|
|
hexmask.long.byte 0xC 8.--12. 1. "VREG3CTRL,"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "VREG4CTRL,"
|
|
line.long 0x10 "MODECTRL2,"
|
|
bitfld.long 0x10 31. "BUCKEN," "0,1"
|
|
bitfld.long 0x10 30. "MLDOEN," "0,1"
|
|
bitfld.long 0x10 29. "BUCKMODE," "0,1"
|
|
hexmask.long.byte 0x10 24.--28. 1. "VREG1CTRL,"
|
|
hexmask.long.byte 0x10 16.--20. 1. "VREG2CTRL,"
|
|
hexmask.long.byte 0x10 8.--12. 1. "VREG3CTRL,"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--4. 1. "VREG4CTRL,"
|
|
line.long 0x14 "MODECTRL3,"
|
|
bitfld.long 0x14 31. "BUCKEN," "0,1"
|
|
bitfld.long 0x14 30. "MLDOEN," "0,1"
|
|
bitfld.long 0x14 29. "BUCKMODE," "0,1"
|
|
hexmask.long.byte 0x14 24.--28. 1. "VREG1CTRL,"
|
|
hexmask.long.byte 0x14 16.--20. 1. "VREG2CTRL,"
|
|
hexmask.long.byte 0x14 8.--12. 1. "VREG3CTRL,"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--4. 1. "VREG4CTRL,"
|
|
line.long 0x18 "MODECTRL4,"
|
|
bitfld.long 0x18 31. "BUCKEN," "0,1"
|
|
bitfld.long 0x18 30. "MLDOEN," "0,1"
|
|
bitfld.long 0x18 29. "BUCKMODE," "0,1"
|
|
hexmask.long.byte 0x18 24.--28. 1. "VREG1CTRL,"
|
|
hexmask.long.byte 0x18 16.--20. 1. "VREG2CTRL,"
|
|
hexmask.long.byte 0x18 8.--12. 1. "VREG3CTRL,"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "VREG4CTRL,"
|
|
line.long 0x1C "OVERCTRL,"
|
|
bitfld.long 0x1C 31. "OBUCKEN," "0,1"
|
|
bitfld.long 0x1C 30. "OMLDOEN," "0,1"
|
|
bitfld.long 0x1C 29. "OBUCKMODE," "0,1"
|
|
hexmask.long.byte 0x1C 24.--28. 1. "VREG1OCTRL,"
|
|
bitfld.long 0x1C 23. "OVEREN," "0,1"
|
|
bitfld.long 0x1C 22. "PHWC," "0,1"
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--20. 1. "VREG2OCTRL,"
|
|
hexmask.long.byte 0x1C 8.--12. 1. "VREG3OCTRL,"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "VREG4OCTRL,"
|
|
line.long 0x20 "PMUCMODE,"
|
|
bitfld.long 0x20 31. "CBUCKEN," "0,1"
|
|
bitfld.long 0x20 30. "CMLDOEN," "0,1"
|
|
bitfld.long 0x20 29. "CBUCKMODE," "0,1"
|
|
hexmask.long.byte 0x20 24.--28. 1. "CVREG1OCTRL,"
|
|
bitfld.long 0x20 23. "MLDOEXTBOR," "0,1"
|
|
bitfld.long 0x20 22. "BUCKBOR," "0,1"
|
|
newline
|
|
bitfld.long 0x20 21. "ADCBOR," "0,1"
|
|
hexmask.long.byte 0x20 16.--20. 1. "CVREG2OCTROL,"
|
|
hexmask.long.byte 0x20 8.--12. 1. "CVREG3OCTRL,"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x20 5.--7. "SUPFSM," "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x20 5.--7. "SUPFSM," "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.byte 0x20 0.--4. 1. "CVREG4OCTRL,"
|
|
line.long 0x24 "PMUSTATUS,"
|
|
bitfld.long 0x24 31. "BSSERR," "0,1"
|
|
hexmask.long.byte 0x24 24.--30. 1. "BSSENUM,"
|
|
hexmask.long.word 0x24 8.--23. 1. "BSSEDATA,"
|
|
bitfld.long 0x24 6. "PMUANA_BUCKBOR," "0,1"
|
|
bitfld.long 0x24 5. "WCMRM," "0,1"
|
|
hexmask.long.byte 0x24 0.--4. 1. "PMUSTATUS,"
|
|
line.long 0x28 "PMUSEQ1,"
|
|
hexmask.long.word 0x28 16.--31. 1. "SPIDATA,"
|
|
hexmask.long.byte 0x28 8.--15. 1. "SPIRADDR,"
|
|
bitfld.long 0x28 7. "CMD," "0,1"
|
|
bitfld.long 0x28 6. "CMPBVAL," "0,1"
|
|
hexmask.long.byte 0x28 0.--5. 1. "DELAY,"
|
|
line.long 0x2C "PMUSEQ2,"
|
|
hexmask.long.word 0x2C 16.--31. 1. "SPIDATA,"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "SPIRADDR,"
|
|
bitfld.long 0x2C 7. "CMD," "0,1"
|
|
bitfld.long 0x2C 6. "CMPBVAL," "0,1"
|
|
hexmask.long.byte 0x2C 0.--5. 1. "DELAY,"
|
|
line.long 0x30 "PMUSEQ3,"
|
|
hexmask.long.word 0x30 16.--31. 1. "SPIDATA,"
|
|
hexmask.long.byte 0x30 8.--15. 1. "SPIRADDR,"
|
|
bitfld.long 0x30 7. "CMD," "0,1"
|
|
bitfld.long 0x30 6. "CMPBVAL," "0,1"
|
|
hexmask.long.byte 0x30 0.--5. 1. "DELAY,"
|
|
line.long 0x34 "PMUSEQ4,"
|
|
hexmask.long.word 0x34 16.--31. 1. "SPIDATA,"
|
|
hexmask.long.byte 0x34 8.--15. 1. "SPIRADDR,"
|
|
bitfld.long 0x34 7. "CMD," "0,1"
|
|
bitfld.long 0x34 6. "CMPBVAL," "0,1"
|
|
hexmask.long.byte 0x34 0.--5. 1. "DELAY,"
|
|
line.long 0x38 "PMUCFG,"
|
|
hexmask.long.byte 0x38 28.--31. 1. "ADC_CP_H,"
|
|
hexmask.long.byte 0x38 24.--27. 1. "ADC_CP_L,"
|
|
hexmask.long.byte 0x38 20.--23. 1. "BUCK_CP_H,"
|
|
hexmask.long.byte 0x38 16.--19. 1. "BUCK_CP_L,"
|
|
bitfld.long 0x38 14.--15. "MLDOEXT_l," "0,1,2,3"
|
|
hexmask.long.byte 0x38 8.--13. 1. "MLDO_SW_DELAY,"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--6. 1. "BUCK_SW_DELAY,"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x3C++0xB
|
|
line.long 0x0 "WCMCMD,"
|
|
bitfld.long 0x0 31. "MODE," "0,1"
|
|
bitfld.long 0x0 30. "CMD," "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "WCMRDU," "0,1"
|
|
bitfld.long 0x0 16.--18. "WCMCLKDIV," "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "WCMADDR,"
|
|
line.long 0x4 "WCMWDATA,"
|
|
hexmask.long 0x4 0.--31. 1. "WCMWDATA,"
|
|
line.long 0x8 "WCMRDATA,"
|
|
hexmask.long 0x8 0.--31. 1. "WCMRDATA,"
|
|
endif
|
|
group.long 0x48++0x17
|
|
line.long 0x0 "VBCCMD,"
|
|
bitfld.long 0x0 30. "CMD," "0,1"
|
|
bitfld.long 0x0 28. "VBCRDY," "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "VBCADDR,"
|
|
line.long 0x4 "VBCWDATA,"
|
|
hexmask.long 0x4 0.--31. 1. "VBCWDATA,"
|
|
line.long 0x8 "VBCRDATA,"
|
|
hexmask.long 0x8 0.--31. 1. "VBCRDATA,"
|
|
line.long 0xC "WCMCFG,"
|
|
bitfld.long 0xC 4.--6. "WCM2CFG," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 0.--2. "WCM1CFG," "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "PMUIENB,"
|
|
bitfld.long 0x10 4. "VBCIAIEN," "0,1"
|
|
bitfld.long 0x10 3. "WCMIAIEN," "0,1"
|
|
bitfld.long 0x10 2. "SCMPIEN," "0,1"
|
|
bitfld.long 0x10 1. "BUCKBORIEN," "0,1"
|
|
bitfld.long 0x10 0. "ADCBORIEN," "0,1"
|
|
line.long 0x14 "PMUISTAT,"
|
|
bitfld.long 0x14 4. "VBCIAINT," "0,1"
|
|
bitfld.long 0x14 3. "WCMIAINT," "0,1"
|
|
bitfld.long 0x14 2. "SCMPINT," "0,1"
|
|
bitfld.long 0x14 1. "BUCKBORINT," "0,1"
|
|
bitfld.long 0x14 0. "ADCBORINT," "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "WCMSIZ,"
|
|
bitfld.long 0x0 8.--9. "SRAM1_SIZ," "0: FlexRAM is completely powered OFF,1: 16K Flex RAM available in retention,2: 32K Flex RAM available in retention,?"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "WCMSIZ,"
|
|
bitfld.long 0x0 8.--9. "SRAM1_SIZ," "0: FlexRAM is completely powered OFF,1: 16K Flex RAM available in retention,2: 32K Flex RAM available in retention,?"
|
|
endif
|
|
tree.end
|
|
tree "PPS (Peripheral Pin Select)"
|
|
base ad:0x44001000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "EXTINT0R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "EXTINT0,EXTINT0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "EXTINT0,EXTINT0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "EXTINT0,EXTINT0"
|
|
endif
|
|
line.long 0x4 "EXTINT1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "EXTINT1,EXTINT1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "EXTINT1,EXTINT1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "EXTINT1,EXTINT1"
|
|
endif
|
|
line.long 0x8 "EXTINT2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "EXTINT2,EXTINT2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "EXTINT2,EXTINT2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "EXTINT2,EXTINT2"
|
|
endif
|
|
line.long 0xC "EXTINT3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "EXTINT3,EXTINT3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "EXTINT3,EXTINT3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "EXTINT3,EXTINT3"
|
|
endif
|
|
group.long 0x3C++0x23
|
|
line.long 0x0 "NMIR,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "NMI,NMI"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "NMI,NMI"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "NMI,NMI"
|
|
endif
|
|
line.long 0x4 "SCOM0P0R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCOM0P0,SERCOM0/PAD0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCOM0P0,SERCOM0/PAD0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCOM0P0,SERCOM0/PAD0"
|
|
endif
|
|
line.long 0x8 "SCOM0P1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "SCOM0P1,SERCOM0/PAD1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "SCOM0P1,SERCOM0/PAD1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "SCOM0P1,SERCOM0/PAD1"
|
|
endif
|
|
line.long 0xC "SCOM0P2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "SCOM0P2,SERCOM0/PAD2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "SCOM0P2,SERCOM0/PAD2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "SCOM0P2,SERCOM0/PAD2"
|
|
endif
|
|
line.long 0x10 "SCOM0P3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "SCOM0P3,SERCOM0/PAD3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "SCOM0P3,SERCOM0/PAD3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "SCOM0P3,SERCOM0/PAD3"
|
|
endif
|
|
line.long 0x14 "SCOM1P0R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "SCOM1P0,SERCOM1/PAD0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "SCOM1P0,SERCOM1/PAD0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "SCOM1P0,SERCOM1/PAD0"
|
|
endif
|
|
line.long 0x18 "SCOM1P1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "SCOM1P1,SERCOM1/PAD1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "SCOM1P1,SERCOM1/PAD1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "SCOM1P1,SERCOM1/PAD1"
|
|
endif
|
|
line.long 0x1C "SCOM1P2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SCOM1P2,SERCOM1/PAD2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SCOM1P2,SERCOM1/PAD2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SCOM1P2,SERCOM1/PAD2"
|
|
endif
|
|
line.long 0x20 "SCOM1P3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "SCOM1P3,SERCOM1/PAD3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "SCOM1P3,SERCOM1/PAD3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "SCOM1P3,SERCOM1/PAD3"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x60++0x1F
|
|
line.long 0x0 "SCOM2P0R,"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SCOM2P0,SERCOM2/PAD0"
|
|
line.long 0x4 "SCOM2P1R,"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCOM2P1,SERCOM2/PAD1"
|
|
line.long 0x8 "SCOM2P2R,"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SCOM2P2,SERCOM2/PAD2"
|
|
line.long 0xC "SCOM2P3R,"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SCOM2P3,SERCOM2/PAD3"
|
|
line.long 0x10 "SCOM3P0R,"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SCOM3P0,SERCOM3/PAD0"
|
|
line.long 0x14 "SCOM3P1R,"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SCOM3P1,SERCOM3/PAD1"
|
|
line.long 0x18 "SCOM3P2R,"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SCOM3P2,SERCOM3/PAD2"
|
|
line.long 0x1C "SCOM3P3R,"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SCOM3P3,SERCOM3/PAD3"
|
|
group.long 0x200++0x17
|
|
line.long 0x0 "RPA0G2R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA0G2R,RPA0/G2"
|
|
line.long 0x4 "RPA0G3R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA0G3R,RPA0/G3"
|
|
line.long 0x8 "RPA1G3R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA1G3R,RPA1/G3"
|
|
line.long 0xC "RPA1G4R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA1G4R,RPA1/G4"
|
|
line.long 0x10 "RPA2G1R,"
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPA2G1R,RPA2/G1"
|
|
line.long 0x14 "RPA2G4R,"
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPA2G4R,RPA2/G4"
|
|
group.long 0x278++0xF
|
|
line.long 0x0 "RPA13G3R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA13G3R,RPA13/G3"
|
|
line.long 0x4 "RPA13G4R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA13G4R,RPA13/G4"
|
|
line.long 0x8 "RPA14G1R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA14G1R,RPA14/G1"
|
|
line.long 0xC "RPA14G4R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA14G4R,RPA14/G4"
|
|
group.long 0x28C++0x1F
|
|
line.long 0x0 "RPB0G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB0G1R,RPB0/G1"
|
|
line.long 0x4 "RPB0G2R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB0G2R,RPB0/G2"
|
|
line.long 0x8 "RPB1G2R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB1G2R,RPB1/G2"
|
|
line.long 0xC "RPB1G3R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB1G3R,RPB1/G3"
|
|
line.long 0x10 "RPB2G3R,"
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPB2G3R,RPB2/G3"
|
|
line.long 0x14 "RPB2G4R,"
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPB2G4R,RPB2/G4"
|
|
line.long 0x18 "RPB3G1R,"
|
|
hexmask.long.byte 0x18 0.--4. 1. "RPB3G1R,RPB3/G1"
|
|
line.long 0x1C "RPB3G4R,"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "RPB3G4R,RPB3/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "QSCKR,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "QSCK,QSPI/SCK"
|
|
endif
|
|
group.long 0x25C++0x3
|
|
line.long 0x0 "RPA9G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA9G1R,RPA9/G1"
|
|
endif
|
|
group.long 0x268++0x3
|
|
line.long 0x0 "RPA10G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA10G1R,RPA10/G1"
|
|
endif
|
|
group.long 0x2AC++0x3
|
|
line.long 0x0 "RPB4G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB4G1R,RPB4/G1"
|
|
endif
|
|
group.long 0x2B8++0x3
|
|
line.long 0x0 "RPB5G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB5G3R,RPB5/G3"
|
|
endif
|
|
group.long 0x2C0++0x3
|
|
line.long 0x0 "RPB6G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G4R,RPB6/G4"
|
|
endif
|
|
group.long 0x2D4++0x3
|
|
line.long 0x0 "RPB9G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G2R,RPB9/G2"
|
|
endif
|
|
endif
|
|
group.long 0x84++0x63
|
|
line.long 0x0 "QD0R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "QD0,QSPI/DATA0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "QD0,QSPI/DATA0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "QD0,QSPI/DATA0"
|
|
endif
|
|
line.long 0x4 "QD1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "QD1,QSPI/DATA1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "QD1,QSPI/DATA1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--3. 1. "QD1,QSPI/DATA1"
|
|
endif
|
|
line.long 0x8 "QD2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "QD2,QSPI/DATA2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "QD2,QSPI/DATA2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x8 0.--3. 1. "QD2,QSPI/DATA2"
|
|
endif
|
|
line.long 0xC "QD3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "QD3,QSPI/DATA3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "QD3,QSPI/DATA3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 0.--3. 1. "QD3,QSPI/DATA3"
|
|
endif
|
|
line.long 0x10 "REFIR,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "REFI,REFI"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "REFI,REFI"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x10 0.--3. 1. "REFI,REFI"
|
|
endif
|
|
line.long 0x14 "CCLIN0R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "CCLIN0,CCL/IN0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "CCLIN0,CCL/IN0"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x14 0.--3. 1. "CCLIN0,CCL/IN0"
|
|
endif
|
|
line.long 0x18 "CCLIN1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "CCLIN1,CCL/IN1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "CCLIN1,CCL/IN1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x18 0.--3. 1. "CCLIN1,CCL/IN1"
|
|
endif
|
|
line.long 0x1C "CCLIN2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "CCLIN2,CCL/IN2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "CCLIN2,CCL/IN2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x1C 0.--3. 1. "CCLIN2,CCL/IN2"
|
|
endif
|
|
line.long 0x20 "CCLIN3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "CCLIN3,CCL/IN3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "CCLIN3,CCL/IN3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x20 0.--3. 1. "CCLIN3,CCL/IN3"
|
|
endif
|
|
line.long 0x24 "CCLIN4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x24 0.--3. 1. "CCLIN4,CCL/IN4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x24 0.--3. 1. "CCLIN4,CCL/IN4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x24 0.--3. 1. "CCLIN4,CCL/IN4"
|
|
endif
|
|
line.long 0x28 "CCLIN5R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x28 0.--3. 1. "CCLIN5,CCL/IN5"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x28 0.--3. 1. "CCLIN5,CCL/IN5"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x28 0.--3. 1. "CCLIN5,CCL/IN5"
|
|
endif
|
|
line.long 0x2C "TC0WO0G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x2C 0.--3. 1. "TC0WO0,TC0/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x2C 0.--3. 1. "TC0WO0,TC0/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x2C 0.--3. 1. "TC0WO0,TC0/WO0G1"
|
|
endif
|
|
line.long 0x30 "TC0WO0G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x30 0.--3. 1. "TC0WO0,TC0/WO0G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x30 0.--3. 1. "TC0WO0,TC0/WO0G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x30 0.--3. 1. "TC0WO0,TC0/WO0G2"
|
|
endif
|
|
line.long 0x34 "TC0WO1G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x34 0.--3. 1. "TC0WO1,TC0/WO1G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x34 0.--3. 1. "TC0WO1,TC0/WO1G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x34 0.--3. 1. "TC0WO1,TC0/WO1G3"
|
|
endif
|
|
line.long 0x38 "TC0WO1G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x38 0.--3. 1. "TC0WO1,TC0/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x38 0.--3. 1. "TC0WO1,TC0/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x38 0.--3. 1. "TC0WO1,TC0/WO1G4"
|
|
endif
|
|
line.long 0x3C "TC1WO0G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x3C 0.--3. 1. "TC1WO0,TC1/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x3C 0.--3. 1. "TC1WO0,TC1/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x3C 0.--3. 1. "TC1WO0,TC1/WO0G1"
|
|
endif
|
|
line.long 0x40 "TC1WO1G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x40 0.--3. 1. "TC1WO1,TC1/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x40 0.--3. 1. "TC1WO1,TC1/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x40 0.--3. 1. "TC1WO1,TC1/WO1G2"
|
|
endif
|
|
line.long 0x44 "TC2WO0G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x44 0.--3. 1. "TC2WO0,TC2/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x44 0.--3. 1. "TC2WO0,TC2/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x44 0.--3. 1. "TC2WO0,TC2/WO0G1"
|
|
endif
|
|
line.long 0x48 "TC2WO0G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x48 0.--3. 1. "TC2WO0,TC2/WO0G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x48 0.--3. 1. "TC2WO0,TC2/WO0G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x48 0.--3. 1. "TC2WO0,TC2/WO0G3"
|
|
endif
|
|
line.long 0x4C "TC2WO1G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4C 0.--3. 1. "TC2WO1,TC2/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4C 0.--3. 1. "TC2WO1,TC2/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4C 0.--3. 1. "TC2WO1,TC2/WO1G2"
|
|
endif
|
|
line.long 0x50 "TC2WO1G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x50 0.--3. 1. "TC2WO1,TC2/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x50 0.--3. 1. "TC2WO1,TC2/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x50 0.--3. 1. "TC2WO1,TC2/WO1G4"
|
|
endif
|
|
line.long 0x54 "TC3WO0G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x54 0.--3. 1. "TC3WO0,TC3/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x54 0.--3. 1. "TC3WO0,TC3/WO0G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x54 0.--3. 1. "TC3WO0,TC3/WO0G1"
|
|
endif
|
|
line.long 0x58 "TC3WO0G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x58 0.--3. 1. "TC3WO0,TC3/WO0G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x58 0.--3. 1. "TC3WO0,TC3/WO0G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x58 0.--3. 1. "TC3WO0,TC3/WO0G3"
|
|
endif
|
|
line.long 0x5C "TC3WO1G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x5C 0.--3. 1. "TC3WO1,TC3/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x5C 0.--3. 1. "TC3WO1,TC3/WO1G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x5C 0.--3. 1. "TC3WO1,TC3/WO1G2"
|
|
endif
|
|
line.long 0x60 "TC3WO1G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x60 0.--3. 1. "TC3WO1,TC3/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x60 0.--3. 1. "TC3WO1,TC3/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x60 0.--3. 1. "TC3WO1,TC3/WO1G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0xE8++0x3F
|
|
line.long 0x0 "TC4WO0G1R,"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TC4WO0,TC4/WO0G1"
|
|
line.long 0x4 "TC4WO0G3R,"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TC4WO0,TC4/WO0G3"
|
|
line.long 0x8 "TC4WO1G2R,"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TC4WO1,TC4/WO1G2"
|
|
line.long 0xC "TC4WO1G4R,"
|
|
hexmask.long.byte 0xC 0.--3. 1. "TC4WO1,TC4/WO1G4"
|
|
line.long 0x10 "TC5WO0G1R,"
|
|
hexmask.long.byte 0x10 0.--3. 1. "TC5WO0,TC5/WO0G1"
|
|
line.long 0x14 "TC5WO0G3R,"
|
|
hexmask.long.byte 0x14 0.--3. 1. "TC5WO0,TC5/WO0G3"
|
|
line.long 0x18 "TC5WO1G2R,"
|
|
hexmask.long.byte 0x18 0.--3. 1. "TC5WO1,TC5/WO1G2"
|
|
line.long 0x1C "TC5WO1G4R,"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "TC5WO1,TC5/WO1G4"
|
|
line.long 0x20 "TC6WO0G1R,"
|
|
hexmask.long.byte 0x20 0.--3. 1. "TC6WO0,TC6/WO0G1"
|
|
line.long 0x24 "TC6WO0G3R,"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TC6WO0,TC6/WO0G3"
|
|
line.long 0x28 "TC6WO1G2R,"
|
|
hexmask.long.byte 0x28 0.--3. 1. "TC6WO1,TC6/WO1G2"
|
|
line.long 0x2C "TC6WO1G4R,"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "TC6WO1,TC6/WO1G4"
|
|
line.long 0x30 "TC7WO0G1R,"
|
|
hexmask.long.byte 0x30 0.--3. 1. "TC7WO0,TC7/WO0G1"
|
|
line.long 0x34 "TC7WO0G3R,"
|
|
hexmask.long.byte 0x34 0.--3. 1. "TC7WO0,TC7/WO0G3"
|
|
line.long 0x38 "TC7WO1G2R,"
|
|
hexmask.long.byte 0x38 0.--3. 1. "TC7WO1,TC7/WO1G2"
|
|
line.long 0x3C "TC7WO1G4R,"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "TC7WO1,TC7/WO1G4"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x0 "RPB5G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB5G1R,RPB5/G1"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x0 "RPB6G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G1R,RPB6/G1"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x0 "RPB9G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G1R,RPB9/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0xE8++0x3F
|
|
line.long 0x0 "TC4WO0G1R,"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TC4WO0,TC4/WO0G1"
|
|
line.long 0x4 "TC4WO0G3R,"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TC4WO0,TC4/WO0G3"
|
|
line.long 0x8 "TC4WO1G2R,"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TC4WO1,TC4/WO1G2"
|
|
line.long 0xC "TC4WO1G4R,"
|
|
hexmask.long.byte 0xC 0.--3. 1. "TC4WO1,TC4/WO1G4"
|
|
line.long 0x10 "TC5WO0G1R,"
|
|
hexmask.long.byte 0x10 0.--3. 1. "TC5WO0,TC5/WO0G1"
|
|
line.long 0x14 "TC5WO0G3R,"
|
|
hexmask.long.byte 0x14 0.--3. 1. "TC5WO0,TC5/WO0G3"
|
|
line.long 0x18 "TC5WO1G2R,"
|
|
hexmask.long.byte 0x18 0.--3. 1. "TC5WO1,TC5/WO1G2"
|
|
line.long 0x1C "TC5WO1G4R,"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "TC5WO1,TC5/WO1G4"
|
|
line.long 0x20 "TC6WO0G1R,"
|
|
hexmask.long.byte 0x20 0.--3. 1. "TC6WO0,TC6/WO0G1"
|
|
line.long 0x24 "TC6WO0G3R,"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TC6WO0,TC6/WO0G3"
|
|
line.long 0x28 "TC6WO1G2R,"
|
|
hexmask.long.byte 0x28 0.--3. 1. "TC6WO1,TC6/WO1G2"
|
|
line.long 0x2C "TC6WO1G4R,"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "TC6WO1,TC6/WO1G4"
|
|
line.long 0x30 "TC7WO0G1R,"
|
|
hexmask.long.byte 0x30 0.--3. 1. "TC7WO0,TC7/WO0G1"
|
|
line.long 0x34 "TC7WO0G3R,"
|
|
hexmask.long.byte 0x34 0.--3. 1. "TC7WO0,TC7/WO0G3"
|
|
line.long 0x38 "TC7WO1G2R,"
|
|
hexmask.long.byte 0x38 0.--3. 1. "TC7WO1,TC7/WO1G2"
|
|
line.long 0x3C "TC7WO1G4R,"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "TC7WO1,TC7/WO1G4"
|
|
group.long 0x200++0xF
|
|
line.long 0x0 "RPA0G2R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA0G2R,RPA0/G2"
|
|
line.long 0x4 "RPA0G3R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA0G3R,RPA0/G3"
|
|
line.long 0x8 "RPA1G3R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA1G3R,RPA1/G3"
|
|
line.long 0xC "RPA1G4R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA1G4R,RPA1/G4"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "RPA2G4R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA2G4R,RPA2/G4"
|
|
group.long 0x278++0x7
|
|
line.long 0x0 "RPA13G3R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA13G3R,RPA13/G3"
|
|
line.long 0x4 "RPA13G4R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA13G4R,RPA13/G4"
|
|
group.long 0x284++0x3
|
|
line.long 0x0 "RPA14G4R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA14G4R,RPA14/G4"
|
|
group.long 0x290++0x13
|
|
line.long 0x0 "RPB0G2R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB0G2R,RPB0/G2"
|
|
line.long 0x4 "RPB1G2R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB1G2R,RPB1/G2"
|
|
line.long 0x8 "RPB1G3R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB1G3R,RPB1/G3"
|
|
line.long 0xC "RPB2G3R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB2G3R,RPB2/G3"
|
|
line.long 0x10 "RPB2G4R,"
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPB2G4R,RPB2/G4"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x0 "RPB3G4R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB3G4R,RPB3/G4"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x0 "RPB5G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB5G1R,RPB5/G1"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x0 "RPB6G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G1R,RPB6/G1"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x0 "RPB9G1R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G1R,RPB9/G1"
|
|
group.long 0x2DC++0x7
|
|
line.long 0x0 "RPB10G3R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB10G3R,RPB10/G3"
|
|
line.long 0x4 "RPB10G4R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB10G4R,RPB10/G4"
|
|
group.long 0x2E8++0x3
|
|
line.long 0x0 "RPB11G4R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB11G4R,RPB11/G4"
|
|
group.long 0x2F0++0x7
|
|
line.long 0x0 "RPB12G2R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB12G2R,RPB12/G2"
|
|
line.long 0x4 "RPB13G2R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB13G2R,RPB13/G2"
|
|
endif
|
|
group.long 0x218++0x43
|
|
line.long 0x0 "RPA3G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA3G1R,RPA3/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA3G1R,RPA3/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA3G1R,RPA3/G1"
|
|
endif
|
|
line.long 0x4 "RPA3G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA3G2R,RPA3/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA3G2R,RPA3/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA3G2R,RPA3/G2"
|
|
endif
|
|
line.long 0x8 "RPA3G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA3G3R,RPA3/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA3G3R,RPA3/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPA3G3R,RPA3/G3"
|
|
endif
|
|
line.long 0xC "RPA4G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA4G2R,RPA4/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA4G2R,RPA4/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPA4G2R,RPA4/G2"
|
|
endif
|
|
line.long 0x10 "RPA4G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPA4G3R,RPA4/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPA4G3R,RPA4/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPA4G3R,RPA4/G3"
|
|
endif
|
|
line.long 0x14 "RPA4G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPA4G4R,RPA4/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPA4G4R,RPA4/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPA4G4R,RPA4/G4"
|
|
endif
|
|
line.long 0x18 "RPA5G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x18 0.--4. 1. "RPA5G1R,RPA5/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x18 0.--4. 1. "RPA5G1R,RPA5/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x18 0.--4. 1. "RPA5G1R,RPA5/G1"
|
|
endif
|
|
line.long 0x1C "RPA5G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x1C 0.--4. 1. "RPA5G3R,RPA5/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x1C 0.--4. 1. "RPA5G3R,RPA5/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x1C 0.--4. 1. "RPA5G3R,RPA5/G3"
|
|
endif
|
|
line.long 0x20 "RPA5G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x20 0.--4. 1. "RPA5G4R,RPA5/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x20 0.--4. 1. "RPA5G4R,RPA5/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x20 0.--4. 1. "RPA5G4R,RPA5/G4"
|
|
endif
|
|
line.long 0x24 "RPA6G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x24 0.--4. 1. "RPA6G1R,RPA6/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x24 0.--4. 1. "RPA6G1R,RPA6/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x24 0.--4. 1. "RPA6G1R,RPA6/G1"
|
|
endif
|
|
line.long 0x28 "RPA6G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x28 0.--4. 1. "RPA6G2R,RPA6/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x28 0.--4. 1. "RPA6G2R,RPA6/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x28 0.--4. 1. "RPA6G2R,RPA6/G2"
|
|
endif
|
|
line.long 0x2C "RPA6G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x2C 0.--4. 1. "RPA6G4R,RPA6/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x2C 0.--4. 1. "RPA6G4R,RPA6/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x2C 0.--4. 1. "RPA6G4R,RPA6/G4"
|
|
endif
|
|
line.long 0x30 "RPA7G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x30 0.--4. 1. "RPA7G1R,RPA7/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x30 0.--4. 1. "RPA7G1R,RPA7/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x30 0.--4. 1. "RPA7G1R,RPA7/G1"
|
|
endif
|
|
line.long 0x34 "RPA7G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x34 0.--4. 1. "RPA7G2R,RPA7/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x34 0.--4. 1. "RPA7G2R,RPA7/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x34 0.--4. 1. "RPA7G2R,RPA7/G2"
|
|
endif
|
|
line.long 0x38 "RPA8G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x38 0.--4. 1. "RPA8G2R,RPA8/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x38 0.--4. 1. "RPA8G2R,RPA8/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x38 0.--4. 1. "RPA8G2R,RPA8/G2"
|
|
endif
|
|
line.long 0x3C "RPA8G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x3C 0.--4. 1. "RPA8G3R,RPA8/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x3C 0.--4. 1. "RPA8G3R,RPA8/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x3C 0.--4. 1. "RPA8G3R,RPA8/G3"
|
|
endif
|
|
line.long 0x40 "RPA8G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x40 0.--4. 1. "RPA8G4R,RPA8/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x40 0.--4. 1. "RPA8G4R,RPA8/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x40 0.--4. 1. "RPA8G4R,RPA8/G4"
|
|
endif
|
|
group.long 0x260++0x7
|
|
line.long 0x0 "RPA9G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA9G3R,RPA9/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA9G3R,RPA9/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA9G3R,RPA9/G3"
|
|
endif
|
|
line.long 0x4 "RPA9G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA9G4R,RPA9/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA9G4R,RPA9/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPA9G4R,RPA9/G4"
|
|
endif
|
|
group.long 0x26C++0x3
|
|
line.long 0x0 "RPA10G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA10G4R,RPA10/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA10G4R,RPA10/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPA10G4R,RPA10/G4"
|
|
endif
|
|
group.long 0x2B0++0x7
|
|
line.long 0x0 "RPB4G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB4G2R,RPB4G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB4G2R,RPB4G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB4G2R,RPB4G2"
|
|
endif
|
|
line.long 0x4 "RPB5G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB5G2R,RPB5/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB5G2R,RPB5/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB5G2R,RPB5/G2"
|
|
endif
|
|
group.long 0x2BC++0x3
|
|
line.long 0x0 "RPB6G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G3R,RPB6/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G3R,RPB6/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB6G3R,RPB6/G3"
|
|
endif
|
|
group.long 0x2C4++0xF
|
|
line.long 0x0 "RPB7G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB7G1R,RPB7/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB7G1R,RPB7/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB7G1R,RPB7/G1"
|
|
endif
|
|
line.long 0x4 "RPB7G4R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB7G4R,RPB7/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB7G4R,RPB7/G4"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB7G4R,RPB7/G4"
|
|
endif
|
|
line.long 0x8 "RPB8G1R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB8G1R,RPB8/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB8G1R,RPB8/G1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB8G1R,RPB8/G1"
|
|
endif
|
|
line.long 0xC "RPB8G2R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB8G2R,RPB8/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB8G2R,RPB8/G2"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB8G2R,RPB8/G2"
|
|
endif
|
|
group.long 0x2D8++0x3
|
|
line.long 0x0 "RPB9G3R,"
|
|
sif (cpuis("PIC32C?1012BZ24032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G3R,RPB9/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G3R,RPB9/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB9G3R,RPB9/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
group.long 0x2DC++0x1F
|
|
line.long 0x0 "RPB10G3R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB10G3R,RPB10/G3"
|
|
line.long 0x4 "RPB10G4R,"
|
|
hexmask.long.byte 0x4 0.--4. 1. "RPB10G4R,RPB10/G4"
|
|
line.long 0x8 "RPB11G1R,"
|
|
hexmask.long.byte 0x8 0.--4. 1. "RPB11G1R,RPB11/G1"
|
|
line.long 0xC "RPB11G4R,"
|
|
hexmask.long.byte 0xC 0.--4. 1. "RPB11G4R,RPB11/G4"
|
|
line.long 0x10 "RPB12G1R,"
|
|
hexmask.long.byte 0x10 0.--4. 1. "RPB12G1R,RPB12/G1"
|
|
line.long 0x14 "RPB12G2R,"
|
|
hexmask.long.byte 0x14 0.--4. 1. "RPB12G2R,RPB12/G2"
|
|
line.long 0x18 "RPB13G2R,"
|
|
hexmask.long.byte 0x18 0.--4. 1. "RPB13G2R,RPB13/G2"
|
|
line.long 0x1C "RPB13G3R,"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "RPB13G3R,RPB13/G3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x2F8++0x3
|
|
line.long 0x0 "RPB13G3R,"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RPB13G3R,RPB13/G3"
|
|
endif
|
|
tree.end
|
|
tree "QSPI (Quad SPI Interface)"
|
|
base ad:0x42000000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,Control B"
|
|
hexmask.long.byte 0x4 24.--31. 1. "DLYCS,Minimum Inactive CS Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. "DLYBCT,Delay Between Consecutive Transfers"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "DATALEN,Data Length"
|
|
bitfld.long 0x4 4.--5. "CSMODE,Chip Select Mode" "0: The chip select is deasserted if TD has not been..,1: The chip select is deasserted when the bit..,2: The chip select is deasserted systematically..,?"
|
|
newline
|
|
bitfld.long 0x4 3. "SMEMREG,Serial Memory reg" "0,1"
|
|
bitfld.long 0x4 2. "WDRBT,Wait Data Read Before Transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPEN,Local Loopback Enable" "0: Local Loopback is disabled,1: Local Loopback is enabled"
|
|
bitfld.long 0x4 0. "MODE,Serial Memory Mode" "0: SPI operating mode,1: Serial Memory operating mode"
|
|
line.long 0x8 "BAUD,Baud Rate"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DLYBS,Delay Before SCK"
|
|
hexmask.long.byte 0x8 8.--15. 1. "BAUD,Serial Clock Baud Rate"
|
|
newline
|
|
bitfld.long 0x8 1. "CPHA,Clock Phase" "0,1"
|
|
bitfld.long 0x8 0. "CPOL,Clock Polarity" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "RXDATA,Receive Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "TXDATA,Transmit Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Transmit Data"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x0 10. "INSTREND,Instruction End Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 8. "CSRISE,Chip Select Rise Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ERROR,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 2. "TXC,Transmission Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DRE,Transmit Data Register Empty Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 0. "RXC,Receive Data Register Full Interrupt Disable" "0,1"
|
|
line.long 0x4 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x4 10. "INSTREND,Instruction End Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "CSRISE,Chip Select Rise Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERROR,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "TXC,Transmission Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DRE,Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "RXC,Receive Data Register Full Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x8 10. "INSTREND,Instruction End" "0,1"
|
|
bitfld.long 0x8 8. "CSRISE,Chip Select Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERROR,Overrun Error" "0,1"
|
|
bitfld.long 0x8 2. "TXC,Transmission Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "DRE,Transmit Data Register Empty" "0,1"
|
|
bitfld.long 0x8 0. "RXC,Receive Data Register Full" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "STATUS,Status Register"
|
|
bitfld.long 0x0 9. "CSSTATUS,Chip Select" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "INSTRADDR,Instruction Address"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Instruction Address"
|
|
line.long 0x4 "INSTRCTRL,Instruction Code"
|
|
hexmask.long.byte 0x4 16.--23. 1. "OPTCODE,Option Code"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INSTR,Instruction Code"
|
|
line.long 0x8 "INSTRFRAME,Instruction Frame"
|
|
hexmask.long.byte 0x8 16.--20. 1. "DUMMYLEN,Dummy Cycles Length"
|
|
bitfld.long 0x8 15. "DDREN,Double Data Rate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "CRMODE,Continuous Read Mode" "0,1"
|
|
bitfld.long 0x8 12.--13. "TFRTYPE,Data Transfer Type" "0: Read transfer from the serial memory.Scrambling..,1: Read data transfer from the serial memory.If..,2: Write transfer into the serial memory.Scrambling..,3: Write data transfer into the serial memory.If.."
|
|
newline
|
|
bitfld.long 0x8 10. "ADDRLEN,Address Length" "0: 24-bits address length,1: 32-bits address length"
|
|
bitfld.long 0x8 8.--9. "OPTCODELEN,Option Code Length" "0: 1-bit length option code,1: 2-bits length option code,2: 4-bits length option code,3: 8-bits length option code"
|
|
newline
|
|
bitfld.long 0x8 7. "DATAEN,Data Enable" "0,1"
|
|
bitfld.long 0x8 6. "OPTCODEEN,Option Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "ADDREN,Address Enable" "0,1"
|
|
bitfld.long 0x8 4. "INSTREN,Instruction Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "WIDTH,Instruction Code Address Option Code and Data Width" "0: Instruction: Single-bit SPI / Address-Option:..,1: Instruction: Single-bit SPI / Address-Option:..,2: Instruction: Single-bit SPI / Address-Option:..,3: Instruction: Single-bit SPI / Address-Option:..,4: Instruction: Single-bit SPI / Address-Option:..,5: Instruction: Dual SPI / Address-Option: Dual SPI..,6: Instruction: Quad SPI / Address-Option: Quad SPI..,?"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "SCRAMBCTRL,Scrambling Mode"
|
|
bitfld.long 0x0 1. "RANDOMDIS,Scrambling/Unscrambling Random Value Disable" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,Scrambling/Unscrambling Enable" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "SCRAMBKEY,Scrambling Key"
|
|
hexmask.long 0x0 0.--31. 1. "KEY,Scrambling User Key"
|
|
tree.end
|
|
tree "RAMECC (RAM Error Correction Code)"
|
|
base ad:0x41008000
|
|
group.byte 0x0++0x2
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 1. "DUALE,Dual Bit ECC Error Interrupt Enable Clear" "0,1"
|
|
bitfld.byte 0x0 0. "SINGLEE,Single Bit ECC Error Interrupt Enable Clear" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 1. "DUALE,Dual Bit ECC Error Interrupt Enable Set" "0,1"
|
|
bitfld.byte 0x1 0. "SINGLEE,Single Bit ECC Error Interrupt Enable Set" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag"
|
|
bitfld.byte 0x2 1. "DUALE,Dual Bit ECC Error Interrupt" "0,1"
|
|
bitfld.byte 0x2 0. "SINGLEE,Single Bit ECC Error Interrupt" "0,1"
|
|
rgroup.byte 0x3++0x0
|
|
line.byte 0x0 "STATUS,Status"
|
|
bitfld.byte 0x0 0. "ECCDIS,ECC Disable" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ERRADDR,Error Address"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "ERRADDR,Error Address"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 1. "ECCELOG,ECC Error Log" "0,1"
|
|
bitfld.byte 0x0 0. "ECCDIS,ECC Disable" "0,1"
|
|
tree.end
|
|
tree "RCON (Reset Control)"
|
|
base ad:0x44000A00
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "RCON,RESET CONTROL REGISTER"
|
|
bitfld.long 0x0 31. "PORIO,IO Voltage POR Flag bit" "0: A Power-up Reset has not occurred due to IO..,1: A Power-up Reset has occurred due to IO Voltage."
|
|
bitfld.long 0x0 30. "PORCORE,Core Voltage POR Flag bit" "0: A Power-up Reset has not occurred due to Core..,1: A Power-up Reset has occurred due to Core Voltage."
|
|
newline
|
|
bitfld.long 0x0 27. "BCFGERR,BCFG Error Flag Bit" "0: A BCFG Error has not occurred.,1: A BCFG Error has occurred."
|
|
bitfld.long 0x0 26. "BCFGFAIL,BCFG Failure Flag Bit" "0: A BCFG Failure has not occurred.,1: A BCFG Failure has occurred."
|
|
newline
|
|
bitfld.long 0x0 25. "NVMLTA,NVM Life Time Alert Flag Bit" "0: A NVM LTA Error has not occurred.,1: A NVM LTA Error has occurred."
|
|
bitfld.long 0x0 24. "NVMEOL,NVM End of Life Flag Bit" "0: A NVM EOL Failure has not occurred.,1: A NVM EOL Failure has occurred."
|
|
newline
|
|
bitfld.long 0x0 10. "DPSLP,DPSLP Deep Sleep Mode Flag Bit" "0: Deep Sleep Mode has not occurred.,1: Deep Sleep Mode has occurred."
|
|
bitfld.long 0x0 9. "CMR,Configuration Mismatch Flag bit" "0: A Configuration Mismatch Reset Event has not..,1: A Configuration Mismatch Reset Event has occurred."
|
|
newline
|
|
bitfld.long 0x0 7. "EXTR,External Reset (MCLR) Status bit" "0: A Master Clear (pin) Reset has not occurred.,1: A Master Clear (pin) Reset has occurred."
|
|
bitfld.long 0x0 6. "SWR,Software Reset Flag bit" "0: A Software Commanded Reset has not occurred.,1: A Software Commanded Reset has occurred."
|
|
newline
|
|
bitfld.long 0x0 5. "DMTO,Deadman Timer Time-Out Flag bit" "0: DMT Time-out has not occurred.,1: DMT Time-out has occurred and caused a reset."
|
|
bitfld.long 0x0 4. "WDTO,Watchdog Timer Time-Out Flag bit" "0: WDT Time-out has not occurred.,1: WDT Time-out has occurred and caused a reset."
|
|
newline
|
|
bitfld.long 0x0 3. "SLEEP,Wake from Sleep Flag bit" "0: Device has not been in Sleep mode.,1: Device has been in Sleep mode."
|
|
bitfld.long 0x0 2. "IDLE,Wake from Idle Flag bit" "0: Device was not in Idle mode.,1: Device was in Idle mode."
|
|
newline
|
|
bitfld.long 0x0 1. "BOR,Brown-out Reset Flag bit" "0: A Brown-out Reset has not occurred.,1: A Brown-out Reset has occurred."
|
|
bitfld.long 0x0 0. "POR,Power-On Reset Flag bit" "0: A Power-up Reset has not occurred.,1: A Power-up Reset has occurred."
|
|
line.long 0x4 "RCONCLR,"
|
|
line.long 0x8 "RCONSET,"
|
|
line.long 0xC "RCONINV,"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x0 "RSWRST,SOFTWARE RESET REGISTER"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Trigger" "0: Do not enable software reset event,1: Enable software reset event"
|
|
group.long 0x44++0x1B
|
|
line.long 0x0 "RSWRSTCLR,"
|
|
line.long 0x4 "RSWRSTSET,"
|
|
line.long 0x8 "RSWRSTINV,"
|
|
line.long 0xC "RNMICON,NMI CONTROL REGISTER"
|
|
bitfld.long 0xC 25. "DMTO,Deadman Timer Time-Out Flag bit" "0: DMT Time-out has not occurred.,1: DMT Time-out has occurred and caused a NMI."
|
|
bitfld.long 0xC 24. "WDTR,Watchdog Timer Time-Out in Run Flag bit" "0: WDT Time-out has not occurred.,1: WDT Time-out has occurred and caused a NMI."
|
|
newline
|
|
bitfld.long 0xC 23. "SWNMI,Software NMI Trigger" "0: Writing a 0 to this bit will have no effect.,1: Writing a 1 to this bit will cause an NMI to be.."
|
|
bitfld.long 0xC 19. "GNMI,External / Generic NMI Event" "0: A general NMI event has not been detected.,1: A general NMI event has been detected and caused.."
|
|
newline
|
|
bitfld.long 0xC 18. "LVD,Programmable Low Voltage Detect Event" "0: PLVD has not detected a low voltage condition,1: PLVD has detected a low voltage condition and.."
|
|
bitfld.long 0xC 17. "CF,Clock Fail Detect bit" "0: FSCM has not detected clock failure,1: FSCM has detected clock failure and caused an NMI"
|
|
newline
|
|
bitfld.long 0xC 16. "WDTS,Watch-Dog Timer Time-Out in Sleep Flag bit" "0: WDT Time-out has not occurred during sleep_mode.,1: WDT Time-out has occurred during sleep_mode and.."
|
|
hexmask.long.word 0xC 0.--15. 1. "NMICNT,NMI Reset counter value"
|
|
line.long 0x10 "RNMICONCLR,"
|
|
line.long 0x14 "RNMICONSET,"
|
|
line.long 0x18 "RNMICONINV,"
|
|
tree.end
|
|
sif (cpuis("PIC32C?5109BZ31032*")||cpuis("PIC32C?5109BZ31048*"))
|
|
tree "ROT (Root of Trust)"
|
|
base ad:0x44002C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SECCFG,Secure Configuration HOLDING REGISTER1.2"
|
|
bitfld.long 0x0 16. "ADD_BOOT_KEY,Additional boot Key bit" "0,1"
|
|
bitfld.long 0x0 10.--11. "BOOT_KEY_LOCK,Lock bits for Secure Boot/OTA Key" "0: Secure boot key is not locked,1: Secure boot key is locked and cannot be programmed,2: Secure boot key is locked and cannot be programmed,3: Secure boot key is locked and cannot be programmed"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ROOT_KEY_LOCK,Lock bits for storage root Key" "0: Storage root key is not locked,1: Storage root key is locked and cannot be..,2: Storage root key is locked and cannot be..,3: Storage root key is locked and cannot be.."
|
|
bitfld.long 0x0 6.--7. "DEBUG_LOCK,Lock bits for debug/programming" "0: Debug is not locked,1: Debug is locked,2: Debug is locked,3: Debug is locked"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "UUID_LOCK,Programming lock bits for Unique ID fuses" "0: Unique ID is not locked,1: Unique ID is locked and cannot be programmed,2: Unique ID is locked and cannot be programmed,3: Unique ID is locked and cannot be programmed"
|
|
group.long 0xC00++0xB
|
|
line.long 0x0 "SEC_BOOT,Secure Boot Register"
|
|
bitfld.long 0x0 16.--17. "SECURE_BOOT_DONE,Bits to indicate that secure boot is done" "0: S ecure boot is done,1: S ecure boot is not done,2: S ecure boot is not done,3: S ecure boot is done"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SEC_BOOT_STATUS,Bits to indicate that secure boot status"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SECURE_BOOT_REQD,Bits to indicate that secure boot is required on the next device reset." "0: Secure boot code authentication is required,1: Secure boot code authentication is NOT required,2: Secure boot code authentication is NOT required,3: Secure boot code authentication is required"
|
|
line.long 0x4 "EFUSE_RWDATA,EFuse RW Data Register"
|
|
hexmask.long.word 0x4 16.--27. 1. "ADDR,eFuse Program/Read Address"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,eFuse Program (Write) Data"
|
|
line.long 0x8 "EFUSE_CON,Efuse Configuration Register2"
|
|
bitfld.long 0x8 7. "EN_PGM,eFuse Programming Start bit" "0: EFuse Programming operation has completed,1: Start eFuse Programming operation"
|
|
bitfld.long 0x8 6. "EN_LD_ALL1,eFuse Panel Read Start bit for loading into the holding registers" "0: EFuse Read operation has completed,1: Start eFuse Read operation for entire eFuse panel"
|
|
newline
|
|
bitfld.long 0x8 5. "EN_LD,eFuse Word Read Start bit for loading the fuse byte pointed by ADDR field into the holding register" "0: EFuse Read operation has completed,1: Start eFuse Read operation for specified eFuse.."
|
|
bitfld.long 0x8 1. "PGM_MODE,eFuse Programming Mode Enable bit" "0: EFuse Programming disabled,1: EFuse Programming enabled"
|
|
newline
|
|
bitfld.long 0x8 0. "PGM_1BIT,eFuse CTRL to program 1 bit at a time. Valid only when EN_PGM is set" "0: EFuse controller will program..,1: EFuse controller will program.."
|
|
tree.end
|
|
endif
|
|
tree "RTC (Real-Time Counter)"
|
|
base ad:0x42010000
|
|
tree "MODE0 (32-bit Counter with Single 32-bit Compare)"
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRLA,MODE0 Control A"
|
|
bitfld.word 0x0 15. "COUNTSYNC,Count Read Synchronization Enable" "0,1"
|
|
bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1"
|
|
bitfld.word 0x0 13. "BKTRST,BKUP Registers Reset On Tamper Enable" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler"
|
|
bitfld.word 0x0 7. "MATCHCLR,Clear on Match" "0,1"
|
|
bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?"
|
|
newline
|
|
bitfld.word 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.word 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.word 0x2 "CTRLB,MODE0 Control B"
|
|
bitfld.word 0x2 12.--14. "ACTF,Active Layer Freqnuency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256"
|
|
bitfld.word 0x2 8.--10. "DEBF,Debounce Freqnuency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256"
|
|
bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1"
|
|
bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1"
|
|
bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1"
|
|
bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "EVCTRL,MODE0 Event Control"
|
|
bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1"
|
|
bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CMPEO1,Compare 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "CMPEO0,Compare 0 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1"
|
|
group.word 0x8++0x5
|
|
line.word 0x0 "INTENCLR,MODE0 Interrupt Enable Clear"
|
|
bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x0 9. "CMP1,Compare 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
line.word 0x2 "INTENSET,MODE0 Interrupt Enable Set"
|
|
bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x2 9. "CMP1,Compare 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
line.word 0x4 "INTFLAG,MODE0 Interrupt Flag Status and Clear"
|
|
bitfld.word 0x4 15. "OVF,Overflow" "0,1"
|
|
bitfld.word 0x4 14. "TAMPER,Tamper" "0,1"
|
|
bitfld.word 0x4 9. "CMP1,Compare 1" "0,1"
|
|
newline
|
|
bitfld.word 0x4 8. "CMP0,Compare 0" "0,1"
|
|
bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1"
|
|
bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1"
|
|
newline
|
|
bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1"
|
|
bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1"
|
|
bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1"
|
|
newline
|
|
bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1"
|
|
bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1"
|
|
bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,MODE0 Synchronization Busy Status"
|
|
bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1"
|
|
bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1"
|
|
bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1"
|
|
bitfld.long 0x0 15. "COUNTSYNC,Count Synchronization Enable Bit Busy" "0,1"
|
|
bitfld.long 0x0 6. "COMP1,COMP 1 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "COMP0,COMP 0 Register Busy" "0,1"
|
|
bitfld.long 0x0 3. "COUNT,COUNT Register Busy" "0,1"
|
|
bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Busy" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "FREQCORR,Frequency Correction"
|
|
bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1"
|
|
hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "COUNT,MODE0 Counter Value"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x20)++0x3
|
|
line.long 0x0 "COMP[$1],MODE0 Compare n Value"
|
|
hexmask.long 0x0 0.--31. 1. "COMP,Compare Value"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "GP[$1],General Purpose"
|
|
hexmask.long 0x0 0.--31. 1. "GP,General Purpose"
|
|
repeat.end
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TAMPCTRL,Tamper Control"
|
|
bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1"
|
|
bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1"
|
|
bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1"
|
|
bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1"
|
|
bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1"
|
|
bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1"
|
|
bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN3 to OUT"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN2 to OUT"
|
|
bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN1 to OUT"
|
|
bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN0 to OUT"
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x0 "TIMESTAMP,MODE0 Timestamp"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Count Timestamp Value"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TAMPID,Tamper ID"
|
|
bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1"
|
|
bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1"
|
|
bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1"
|
|
bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "BKUP[$1],Backup"
|
|
hexmask.long 0x0 0.--31. 1. "BKUP,Backup"
|
|
repeat.end
|
|
tree.end
|
|
tree "MODE1 (16-bit Counter with Two 16-bit Compares)"
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRLA,MODE1 Control A"
|
|
bitfld.word 0x0 15. "COUNTSYNC,Count Read Synchronization Enable" "0,1"
|
|
bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1"
|
|
bitfld.word 0x0 13. "BKTRST,BKUP Registers Reset On Tamper Enable" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler"
|
|
bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?"
|
|
bitfld.word 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.word 0x2 "CTRLB,MODE1 Control B"
|
|
bitfld.word 0x2 12.--14. "ACTF,Active Layer Freqnuency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256"
|
|
bitfld.word 0x2 8.--10. "DEBF,Debounce Freqnuency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256"
|
|
bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1"
|
|
bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1"
|
|
bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1"
|
|
bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "EVCTRL,MODE1 Event Control"
|
|
bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1"
|
|
bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CMPEO3,Compare 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 10. "CMPEO2,Compare 2 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "CMPEO1,Compare 1 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CMPEO0,Compare 0 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1"
|
|
group.word 0x8++0x5
|
|
line.word 0x0 "INTENCLR,MODE1 Interrupt Enable Clear"
|
|
bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x0 11. "CMP3,Compare 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "CMP2,Compare 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 9. "CMP1,Compare 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
line.word 0x2 "INTENSET,MODE1 Interrupt Enable Set"
|
|
bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x2 11. "CMP3,Compare 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 10. "CMP2,Compare 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 9. "CMP1,Compare 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
line.word 0x4 "INTFLAG,MODE1 Interrupt Flag Status and Clear"
|
|
bitfld.word 0x4 15. "OVF,Overflow" "0,1"
|
|
bitfld.word 0x4 14. "TAMPER,Tamper" "0,1"
|
|
bitfld.word 0x4 11. "CMP3,Compare 3" "0,1"
|
|
newline
|
|
bitfld.word 0x4 10. "CMP2,Compare 2" "0,1"
|
|
bitfld.word 0x4 9. "CMP1,Compare 1" "0,1"
|
|
bitfld.word 0x4 8. "CMP0,Compare 0" "0,1"
|
|
newline
|
|
bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1"
|
|
bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1"
|
|
bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1"
|
|
newline
|
|
bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1"
|
|
bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1"
|
|
bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1"
|
|
newline
|
|
bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1"
|
|
bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,MODE1 Synchronization Busy Status"
|
|
bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1"
|
|
bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1"
|
|
bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1"
|
|
bitfld.long 0x0 15. "COUNTSYNC,Count Synchronization Enable Bit Busy" "0,1"
|
|
bitfld.long 0x0 8. "COMP3,COMP 3 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "COMP2,COMP 2 Register Busy" "0,1"
|
|
bitfld.long 0x0 6. "COMP1,COMP 1 Register Busy" "0,1"
|
|
bitfld.long 0x0 5. "COMP0,COMP 0 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PER,PER Register Busy" "0,1"
|
|
bitfld.long 0x0 3. "COUNT,COUNT Register Busy" "0,1"
|
|
bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Bit Busy" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "FREQCORR,Frequency Correction"
|
|
bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1"
|
|
hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "COUNT,MODE1 Counter Value"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
group.word 0x1C++0x1
|
|
line.word 0x0 "PER,MODE1 Counter Period"
|
|
hexmask.word 0x0 0.--15. 1. "PER,Counter Period"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x20)++0x1
|
|
line.word 0x0 "COMP[$1],MODE1 Compare n Value"
|
|
hexmask.word 0x0 0.--15. 1. "COMP,Compare Value"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "GP[$1],General Purpose"
|
|
hexmask.long 0x0 0.--31. 1. "GP,General Purpose"
|
|
repeat.end
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TAMPCTRL,Tamper Control"
|
|
bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1"
|
|
bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1"
|
|
bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1"
|
|
bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1"
|
|
bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1"
|
|
bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1"
|
|
bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN3 to OUT"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN2 to OUT"
|
|
bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN1 to OUT"
|
|
bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN0 to OUT"
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x0 "TIMESTAMP,MODE1 Timestamp"
|
|
hexmask.long.word 0x0 0.--15. 1. "COUNT,Count Timestamp Value"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TAMPID,Tamper ID"
|
|
bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1"
|
|
bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1"
|
|
bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1"
|
|
bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "BKUP[$1],Backup"
|
|
hexmask.long 0x0 0.--31. 1. "BKUP,Backup"
|
|
repeat.end
|
|
tree.end
|
|
tree "MODE2 (Clock/Calendar with Alarm)"
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRLA,MODE2 Control A"
|
|
bitfld.word 0x0 15. "CLOCKSYNC,Clock Read Synchronization Enable" "0,1"
|
|
bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1"
|
|
bitfld.word 0x0 13. "BKTRST,BKUP Registers Reset On Tamper Enable" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler"
|
|
bitfld.word 0x0 7. "MATCHCLR,Clear on Match" "0,1"
|
|
bitfld.word 0x0 6. "CLKREP,Clock Representation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?"
|
|
bitfld.word 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.word 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.word 0x2 "CTRLB,MODE2 Control B"
|
|
bitfld.word 0x2 12.--14. "ACTF,Active Layer Freqnuency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256"
|
|
bitfld.word 0x2 8.--10. "DEBF,Debounce Freqnuency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256"
|
|
bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1"
|
|
bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1"
|
|
bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1"
|
|
bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "EVCTRL,MODE2 Event Control"
|
|
bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1"
|
|
bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALARMEO1,Alarm 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "ALARMEO0,Alarm 0 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1"
|
|
group.word 0x8++0x5
|
|
line.word 0x0 "INTENCLR,MODE2 Interrupt Enable Clear"
|
|
bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x0 9. "ALARM1,Alarm 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "ALARM0,Alarm 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
line.word 0x2 "INTENSET,MODE2 Interrupt Enable Set"
|
|
bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1"
|
|
bitfld.word 0x2 9. "ALARM1,Alarm 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 8. "ALARM0,Alarm 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x2 7. "PER7,Periodic Interval 7 Enable" "0,1"
|
|
bitfld.word 0x2 6. "PER6,Periodic Interval 6 Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 5. "PER5,Periodic Interval 5 Enable" "0,1"
|
|
bitfld.word 0x2 4. "PER4,Periodic Interval 4 Enable" "0,1"
|
|
bitfld.word 0x2 3. "PER3,Periodic Interval 3 Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x2 2. "PER2,Periodic Interval 2 Enable" "0,1"
|
|
bitfld.word 0x2 1. "PER1,Periodic Interval 1 Enable" "0,1"
|
|
bitfld.word 0x2 0. "PER0,Periodic Interval 0 Enable" "0,1"
|
|
line.word 0x4 "INTFLAG,MODE2 Interrupt Flag Status and Clear"
|
|
bitfld.word 0x4 15. "OVF,Overflow" "0,1"
|
|
bitfld.word 0x4 14. "TAMPER,Tamper" "0,1"
|
|
bitfld.word 0x4 9. "ALARM1,Alarm 1" "0,1"
|
|
newline
|
|
bitfld.word 0x4 8. "ALARM0,Alarm 0" "0,1"
|
|
bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1"
|
|
bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1"
|
|
newline
|
|
bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1"
|
|
bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1"
|
|
bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1"
|
|
newline
|
|
bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1"
|
|
bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1"
|
|
bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,MODE2 Synchronization Busy Status"
|
|
bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1"
|
|
bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1"
|
|
bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1"
|
|
bitfld.long 0x0 15. "CLOCKSYNC,Clock Synchronization Enable Bit Busy" "0,1"
|
|
bitfld.long 0x0 12. "MASK1,MASK 1 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "MASK0,MASK 0 Register Busy" "0,1"
|
|
bitfld.long 0x0 6. "ALARM1,ALARM 1 Register Busy" "0,1"
|
|
bitfld.long 0x0 5. "ALARM0,ALARM 0 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CLOCK,CLOCK Register Busy" "0,1"
|
|
bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Bit Busy" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "FREQCORR,Frequency Correction"
|
|
bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1"
|
|
hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CLOCK,MODE2 Clock Value"
|
|
hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year"
|
|
hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month"
|
|
hexmask.long.byte 0x0 17.--21. 1. "DAY,Day"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour"
|
|
hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "GP[$1],General Purpose"
|
|
hexmask.long 0x0 0.--31. 1. "GP,General Purpose"
|
|
repeat.end
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "ALARM0,MODE2_ALARM Alarm n Value"
|
|
hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year"
|
|
hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month"
|
|
hexmask.long.byte 0x0 17.--21. 1. "DAY,Day"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour"
|
|
hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second"
|
|
group.byte 0x24++0x0
|
|
line.byte 0x0 "MASK0,MODE2_ALARM Alarm n Mask"
|
|
bitfld.byte 0x0 0.--2. "SEL,Alarm Mask Selection" "0: Alarm Disabled,1: Match seconds only,2: Match seconds and minutes only,3: Match seconds minutes and hours only,4: Match seconds minutes hours and days only,5: Match seconds minutes hours days and months only,6: Match seconds minutes hours days months and years,?"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "ALARM1,MODE2_ALARM Alarm n Value"
|
|
hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year"
|
|
hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month"
|
|
hexmask.long.byte 0x0 17.--21. 1. "DAY,Day"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour"
|
|
hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second"
|
|
group.byte 0x2C++0x0
|
|
line.byte 0x0 "MASK1,MODE2_ALARM Alarm n Mask"
|
|
bitfld.byte 0x0 0.--2. "SEL,Alarm Mask Selection" "0: Alarm Disabled,1: Match seconds only,2: Match seconds and minutes only,3: Match seconds minutes and hours only,4: Match seconds minutes hours and days only,5: Match seconds minutes hours days and months only,6: Match seconds minutes hours days months and years,?"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TAMPCTRL,Tamper Control"
|
|
bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1"
|
|
bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1"
|
|
bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1"
|
|
bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1"
|
|
bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1"
|
|
bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1"
|
|
bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN3 to OUT"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN2 to OUT"
|
|
bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN1 to OUT"
|
|
bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake without timestamp,2: Capture timestamp,3: Compare IN0 to OUT"
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x0 "TIMESTAMP,MODE2 Timestamp"
|
|
hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year Timestamp Value"
|
|
hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month Timestamp Value"
|
|
hexmask.long.byte 0x0 17.--21. 1. "DAY,Day Timestamp Value"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour Timestamp Value"
|
|
hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute Timestamp Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second Timestamp Value"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TAMPID,Tamper ID"
|
|
bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1"
|
|
bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1"
|
|
bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1"
|
|
bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "BKUP[$1],Backup"
|
|
hexmask.long 0x0 0.--31. 1. "BKUP,Backup"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "SERCOM (Serial Comunication Interface)"
|
|
base ad:0x0
|
|
tree "SERCOM0"
|
|
base ad:0x40000C00
|
|
tree "I2CM (I2C Master Mode)"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disabled,1: 5-6 SCL Time-Out(50-60us),2: 10-11 SCL Time-Out(100-110us),3: 20-21 SCL Time-Out(200-210us)"
|
|
newline
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
line.long 0xC "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CM Status"
|
|
bitfld.word 0x0 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LENEN,Length Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,I2CM Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "I2CS (I2C Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0,1,2,3"
|
|
bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "SR,Repeated Start" "0,1"
|
|
bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,I2CS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value"
|
|
newline
|
|
bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1"
|
|
line.long 0x4 "DATA,I2CS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
tree.end
|
|
tree "SPIM (SPI Master Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIM Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIM Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIM Address"
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|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIM Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "SPIS (SPI Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
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|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
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|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
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|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
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|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
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|
newline
|
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bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIS Baud Rate"
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|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
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|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_EXT (USART EXTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_EXT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_EXT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_EXT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_EXT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_INT (USART INTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_INT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_INT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "SERCOM1"
|
|
base ad:0x40001000
|
|
tree "I2CM (I2C Master Mode)"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disabled,1: 5-6 SCL Time-Out(50-60us),2: 10-11 SCL Time-Out(100-110us),3: 20-21 SCL Time-Out(200-210us)"
|
|
newline
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
line.long 0xC "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CM Status"
|
|
bitfld.word 0x0 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LENEN,Length Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,I2CM Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "I2CS (I2C Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0,1,2,3"
|
|
bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "SR,Repeated Start" "0,1"
|
|
bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,I2CS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value"
|
|
newline
|
|
bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1"
|
|
line.long 0x4 "DATA,I2CS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
tree.end
|
|
tree "SPIM (SPI Master Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIM Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIM Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIM Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "SPIS (SPI Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIS Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_EXT (USART EXTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_EXT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_EXT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_EXT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_EXT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_INT (USART INTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_INT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_INT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
sif (cpuis("PIC32C?1012BZ25048*"))
|
|
tree "SERCOM2"
|
|
base ad:0x42000C00
|
|
tree "I2CM (I2C Master Mode)"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disabled,1: 5-6 SCL Time-Out(50-60us),2: 10-11 SCL Time-Out(100-110us),3: 20-21 SCL Time-Out(200-210us)"
|
|
newline
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
line.long 0xC "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CM Status"
|
|
bitfld.word 0x0 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LENEN,Length Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,I2CM Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "I2CS (I2C Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0,1,2,3"
|
|
bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "SR,Repeated Start" "0,1"
|
|
bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,I2CS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value"
|
|
newline
|
|
bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1"
|
|
line.long 0x4 "DATA,I2CS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
tree.end
|
|
tree "SPIM (SPI Master Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIM Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIM Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIM Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "SPIS (SPI Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIS Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_EXT (USART EXTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
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|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
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|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
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|
newline
|
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bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
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|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
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|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
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|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
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|
group.byte 0x14++0x0
|
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line.byte 0x0 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
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bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
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|
newline
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bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
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|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
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|
newline
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bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
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|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
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|
newline
|
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bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
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|
group.byte 0x16++0x0
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line.byte 0x0 "INTENSET,USART_EXT Interrupt Enable Set"
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bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
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newline
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bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
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|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
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newline
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bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
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|
group.byte 0x18++0x0
|
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line.byte 0x0 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
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bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
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|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
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|
newline
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bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
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|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
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bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
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|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
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|
newline
|
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bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
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|
group.word 0x1A++0x1
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|
line.word 0x0 "STATUS,USART_EXT Status"
|
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bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
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|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
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|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
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|
newline
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bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
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|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
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|
rgroup.long 0x1C++0x3
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|
line.long 0x0 "SYNCBUSY,USART_EXT Synchronization Busy"
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|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
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bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
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newline
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bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
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|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
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|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_EXT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_INT (USART INTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
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|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
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|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
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|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
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|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_INT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_INT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "SERCOM3"
|
|
base ad:0x42001000
|
|
tree "I2CM (I2C Master Mode)"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disabled,1: 5-6 SCL Time-Out(50-60us),2: 10-11 SCL Time-Out(100-110us),3: 20-21 SCL Time-Out(200-210us)"
|
|
newline
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
line.long 0xC "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CM Status"
|
|
bitfld.word 0x0 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LENEN,Length Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,I2CM Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "I2CS (I2C Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0,1,2,3"
|
|
bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "SR,Repeated Start" "0,1"
|
|
bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,I2CS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value"
|
|
newline
|
|
bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1"
|
|
line.long 0x4 "DATA,I2CS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
tree.end
|
|
tree "SPIM (SPI Master Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIM Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIM Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIM Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "SPIS (SPI Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIS Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_EXT (USART EXTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_EXT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_EXT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_EXT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_EXT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_INT (USART INTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_INT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_INT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
tree "SERCOM2"
|
|
base ad:0x42000400
|
|
tree "I2CM (I2C Master Mode)"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disabled,1: 5-6 SCL Time-Out(50-60us),2: 10-11 SCL Time-Out(100-110us),3: 20-21 SCL Time-Out(200-210us)"
|
|
newline
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
line.long 0xC "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CM Status"
|
|
bitfld.word 0x0 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LENEN,Length Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,I2CM Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "I2CS (I2C Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm)..,1: Fast-mode Plus Upto 1MHz,?,?"
|
|
bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1"
|
|
bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0,1,2,3"
|
|
bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1"
|
|
bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1"
|
|
line.long 0x8 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Data transaction from/to DATA register are 8-bit,1: Data transaction from/to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,I2CS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1"
|
|
bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "SR,Repeated Start" "0,1"
|
|
bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,I2CS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value"
|
|
newline
|
|
bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1"
|
|
line.long 0x4 "DATA,I2CS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
tree.end
|
|
tree "SPIM (SPI Master Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIM Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIM Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIM Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIM Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "SPIS (SPI Slave Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transferred first,1: LSB is transferred first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: SPI Address mask,1: Two unique Addressess,2: Address Range,?"
|
|
newline
|
|
bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1"
|
|
bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?,?,?,?,?,?"
|
|
line.long 0x8 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0: Transaction from and to DATA register are 8-bit,1: Transaction from and to DATA register are 32-bit"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing"
|
|
group.byte 0xC++0x0
|
|
line.byte 0x0 "BAUD,SPIS Baud Rate"
|
|
hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,SPIS Status"
|
|
bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,SPIS Length"
|
|
bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value"
|
|
line.long 0x4 "DATA,SPIS Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_EXT (USART EXTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_EXT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_EXT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_EXT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_EXT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree "USART_INT (USART INTERNAL CLOCK Mode)"
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: TxD Change:- Rising XCK edge RxD Sample:-..,1: TxD Change:- Falling XCK edge RxD Sample:-.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous Communication,1: Synchronous Communication"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9; 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11; 8x Over-sampling =..,2: 16x Over-sampling = 11-12-13; 8x Over-sampling =..,3: 16x Over-sampling = 13-14-15; 8x Over-sampling =.."
|
|
bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE"
|
|
bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0,1"
|
|
bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
line.long 0x4 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?"
|
|
bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
newline
|
|
bitfld.long 0x4 10. "ENC,Encoding Format" "0,1"
|
|
bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
line.long 0x8 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0: Data reads and writes according CTRLB.CHSIZE,1: Data reads according CTRLB.CHSIZE and writes..,2: Data reads according 32-bit extension and writes..,3: Data reads and writes according 32-bit extension"
|
|
bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is 1..,1: Delay between break and sync transmission is 4..,2: Delay between break and sync transmission is 8..,3: Delay between break and sync transmission is 14.."
|
|
bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0xE++0x0
|
|
line.byte 0x0 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x0
|
|
line.byte 0x0 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x1
|
|
line.word 0x0 "STATUS,USART_INT Status"
|
|
bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x0 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x0 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x0 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x1
|
|
line.word 0x0 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0,1,2,3"
|
|
hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DATA,USART_INT Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif (cpuis("PIC32C?5109BZ31032*")||cpuis("PIC32C?5109BZ31048*"))
|
|
tree "SILEX"
|
|
base ad:0x43000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CRYPTOCON,Crypto control register."
|
|
bitfld.long 0x0 6. "RUNSTDBY,Enable clock in idle mode" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,Enable clock to SILEX" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
tree "SFR[0]"
|
|
base ad:0x43010000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "DMA_FETCH_ADDR_LSB,"
|
|
hexmask.long 0x0 0.--31. 1. "FETCH_ADDR_LSB,"
|
|
line.long 0x4 "DMA_FETCH_ADDR_MSB,"
|
|
hexmask.long 0x4 0.--31. 1. "FETCH_ADDR_MSB,"
|
|
line.long 0x8 "DMA_FETCH_LEN,"
|
|
bitfld.long 0x8 30. "FETCH_ZPADDING," "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "FETCH_REALIGN," "0,1"
|
|
newline
|
|
bitfld.long 0x8 28. "FETCH_CSTADDR," "0,1"
|
|
newline
|
|
hexmask.long 0x8 0.--27. 1. "FETCH_LEN,"
|
|
line.long 0xC "DMA_FETCH_TAG,"
|
|
hexmask.long 0xC 0.--31. 1. "FETCH_TAG,"
|
|
line.long 0x10 "DMA_PUSH_ADDR_LSB,"
|
|
hexmask.long 0x10 0.--31. 1. "PUSH_ADDR_LSB,"
|
|
line.long 0x14 "DMA_PUSH_ADDR_MSB,"
|
|
hexmask.long 0x14 0.--31. 1. "PUSH_ADDR_MSB,"
|
|
line.long 0x18 "DMA_PUSH_LEN,"
|
|
bitfld.long 0x18 30. "PUSH_DISCARD," "0,1"
|
|
newline
|
|
bitfld.long 0x18 29. "PUSH_REALIGN," "0,1"
|
|
newline
|
|
bitfld.long 0x18 28. "PUSH_CSTADDR," "0,1"
|
|
newline
|
|
hexmask.long 0x18 0.--27. 1. "PUSH_LEN,"
|
|
line.long 0x1C "DMA_INT_EN,"
|
|
hexmask.long 0x1C 0.--31. 1. "INT_EN,"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "DMA_INT_ENSET,"
|
|
hexmask.long 0x0 0.--31. 1. "INT_ENSET,"
|
|
line.long 0x4 "DMA_INT_ENCLR,"
|
|
hexmask.long 0x4 0.--31. 1. "INT_ENCLR,"
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x0 "DMA_INT_STATRAW,"
|
|
hexmask.long 0x0 0.--31. 1. "INT_STATRAW,"
|
|
line.long 0x4 "DMA_INT_STAT,"
|
|
hexmask.long 0x4 0.--31. 1. "INT_STAT,"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "DMA_INT_STATCLR,"
|
|
hexmask.long 0x0 0.--31. 1. "INT_STATCLR,"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "DMA_CONFIG,"
|
|
bitfld.long 0x0 4. "SOFT_RST," "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PUSH_STOP," "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "FETCH_STOP," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSH_CTRL_INDIRECT," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCH_CTRL_INDIRECT," "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "DMA_START,"
|
|
bitfld.long 0x0 1. "START_PUSH," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START_FETCH," "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "DMA_STATUS,"
|
|
hexmask.long.word 0x0 16.--31. 1. "PUSH_NBDATA,"
|
|
newline
|
|
bitfld.long 0x0 6. "SOFT_RST_BUSY," "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PUSH_WAITINGFIFO," "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FETCH_NOT_EMPTY," "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSH_BUSY," "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCH_BUSY," "0,1"
|
|
rgroup.long 0x400++0x1B
|
|
line.long 0x0 "HWCONF_INCL_IPS_HW_CFG,"
|
|
bitfld.long 0x0 13. "BA422_KASUMI_INCLUDED,Generic g_IncludeKasumi value. BA422-Kasumi IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "BA423_SNOW3G_INCLUDED,Generic g_IncludeSnow3G value. BA423-Snow3G IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BA420_HP_CHACHAPOLY_INCLUDED,Generic g_IncludeHPChachaPoly value. BA420-HP-ChaChaPoly IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BA431_NDRNG_INCLUDED,Generic g_IncludeNDRNG value. BA431-NDRNG IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "BA414EP_PKE_INCLUDED,Generic g_IncludePKE value. BA414EP-PKE IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "BA419_SM4_INCLUDED,Generic g_IncludeSM4 value. BA419-SM4 IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BA421_ZUC_INCLUDED,Generic g_IncludeZUC value. BA421-ZUC IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "BA418_SHA3_INCLUDED,Generic g_IncludeSHA3 value. BA418-SHA3 IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BA417_CHACHAPOLY_INCLUDED,Generic g_IncludeChachaPoly value. BA417-ChaChaPoly IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "BA413_HASH_INCLUDED,Generic g_IncludeHASH value. BA413-HASH IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BA412_DES_INCLUDED,Generic g_IncludeDES value. BA412-3DES IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "BA416_HP_AES_XTS_INCLUDED,Generic g_IncludeAESXTS value. BA416-HP-AES-XTS IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BA415_HP_AES_GCM_INCLUDED,Generic g_IncludeAESGCM value. BA415-HP-AES-GCM IP included if set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BA411_AES_INCLUDED,Generic g_IncludeAES value. BA411E-AES IP included if set" "0,1"
|
|
line.long 0x4 "HWCONF_BA411E_AES_HW_CFG_1,"
|
|
bitfld.long 0x4 24.--26. "BA411E_AES_HW_CFG_KEYSIZE,Generic g_Keysize value. BA411E-AES engine configuration." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 17. "BA411E_AES_HW_CFG_MASKING,Generic g_UseMasking value. BA411E-AES engine configuration." "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "BA411E_AES_HW_CFG_CS,Generic g_CS value. BA411E-AES engine configuration." "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "BA411E_AES_HW_CFG_MODE,Generic g_AesModesPoss value. BA411E-AES engine configuration."
|
|
line.long 0x8 "HWCONF_BA411E_AES_HW_CFG_2,Generic g_CtrSize value. BA411E-AES engine configuration."
|
|
hexmask.long.word 0x8 0.--15. 1. "BA411E_AES_HW_CFG_2,Generic g_CtrSize value. BA411E-AES engine configuration."
|
|
line.long 0xC "HWCONF_BA413_HASH_HW_CFG,"
|
|
bitfld.long 0xC 18. "BA413_HASH_HW_CFG_VERIFYDIGEST,Generic g_HashVerifyDigest value. BA413-Hash engine configuration." "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "BA413_HASH_HW_CFG_HMAC,Generic g_HMAC_enabled value. BA413-Hash engine configuration." "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "BA413_HASH_HW_CFG_PASSING,Generic g_HashPadding value. BA413-Hash engine configuration." "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "BA413_HASH_HW_CFG_MASK,Generic g_HashMaskFunc value. BA413-Hash engine configuration."
|
|
line.long 0x10 "HWCONF_BA418_SHA3_HW_CFG,Generic g_Sha3CtxtEn value. BA418-SHA3 configuration."
|
|
bitfld.long 0x10 0. "BA418_SHA3_HW_CFG,Generic g_Sha3CtxtEn value. BA418-SHA3 configuration." "0,1"
|
|
line.long 0x14 "HWCONF_BA419_SM4_HW_CFG,Generic g_SM4ModesPoss value. BA419-SM4 engine configuration."
|
|
hexmask.long.byte 0x14 0.--6. 1. "BA419_SM4_HW_CFG,Generic g_SM4ModesPoss value. BA419-SM4 engine configuration."
|
|
line.long 0x18 "HWCONF_BA424_ARIA_HW_CFG,Generic g_aria_modePoss value. BA424-Aria engine configuration."
|
|
hexmask.long.word 0x18 0.--8. 1. "BA424_ARIA_HW_CFG,Generic g_aria_modePoss value. BA424-Aria engine configuration."
|
|
group.long 0x1000++0xB
|
|
line.long 0x0 "RNG_CONTROL_CONTROL,Control register"
|
|
bitfld.long 0x0 20. "FIFOWRITESTARTUP,Enable write of the samples in the FIFO during start-up." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "NB128BITBLOCKS,Number of 128 bit blocks used in AES-CBCMAC post-processing. This value cannot be zero."
|
|
newline
|
|
bitfld.long 0x0 15. "AIS31TESTSEL,Select input to the AIS31 test module: 0: Before conditioning 1: After conditioning." "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 14. "HEALTHTESTSEL,Select input to health test module: 0: Before conditioning 1: After conditioning." "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 13. "AIS31BYPASS,Bypass AIS31 tests such that the results of the start-up and online tests do not affect the FSM state." "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "HEALTHTESTBYPASS,Bypass NIST tests such that the results of the start-up and online test do not affect the FSM state." "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FORCEACTIVEROS,Force oscillators to run when FIFO is full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INTENALM,Interrupt enable for AIS31 noise alarm." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "INTENPRE,Interrupt enable for AIS31 preliminary noise alarm." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SOFTRST,Software reset: 0: Normal mode 1: The continuous test the conditioning function and the FIFO are reset. This bit is not cleared automatically." "0: Normal mode,1: The continuous test"
|
|
newline
|
|
bitfld.long 0x0 7. "INTENFULL,Interrupt enable for FIFO full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "INTENPROP,Interrupt enable for Adaptive Proportion Test failure (1024-sample window)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INTENREP,Interrupt enable for Repetition Count Test failure." "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CONDBYPASS,0: the conditioning function is used (normal mode) 1: the conditioning function is bypassed (to observe entropy source directly)." "0: the conditioning function is used,1: the conditioning function is bypassed"
|
|
newline
|
|
bitfld.long 0x0 2. "TESTEN,Select input for conditioning function and continuous tests: 0: Noise source (normal mode) 1: Test data register (test mode)." "0: Noise source,1: Test data register"
|
|
newline
|
|
bitfld.long 0x0 1. "LFSREN,Select between the NDRNG with asynchronous free running oscillators (when '0') and the Pseudo-Random generator with synchronous oscillators for simulation purpose (when '1')." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Enable the NDRNG." "0,1"
|
|
line.long 0x4 "RNG_CONTROL_FIFOLEVEL,FIFO level register."
|
|
hexmask.long 0x4 0.--31. 1. "FIFOLEVEL,Number of 32 bits words of random available in the FIFO. Any write to this register clears the FullInt flag in the Status register."
|
|
line.long 0x8 "RNG_CONTROL_FIFOTHRESHOLD,FIFO threshold register."
|
|
hexmask.long 0x8 0.--31. 1. "FIFOTHRESHOLD,FIFO level below which the module leaves the idle state to refill the FIFO expressed in number of 128bit blocks."
|
|
rgroup.long 0x100C++0x3
|
|
line.long 0x0 "RNG_CONTROL_FIFODEPTH,FIFO depth register."
|
|
hexmask.long 0x0 0.--31. 1. "FIFODEPTH,Maximum number of 32 bits words that can be stored in the FIFO: 2**g_fifodepth."
|
|
group.long 0x1010++0xF
|
|
line.long 0x0 "RNG_CONTROL_KEY0,Key register (MSB)."
|
|
hexmask.long 0x0 0.--31. 1. "KEY0,Key register (MSB)."
|
|
line.long 0x4 "RNG_CONTROL_KEY1,Key register."
|
|
hexmask.long 0x4 0.--31. 1. "KEY1,Key register."
|
|
line.long 0x8 "RNG_CONTROL_KEY2,Key register."
|
|
hexmask.long 0x8 0.--31. 1. "KEY2,Key register."
|
|
line.long 0xC "RNG_CONTROL_KEY3,Key register (LSB)."
|
|
hexmask.long 0xC 0.--31. 1. "KEY3,Key register (LSB)."
|
|
wgroup.long 0x1020++0x3
|
|
line.long 0x0 "RNG_CONTROL_TESTDATA,Test data register."
|
|
hexmask.long 0x0 0.--31. 1. "TESTDATA,Test data register."
|
|
group.long 0x1024++0x7
|
|
line.long 0x0 "RNG_CONTROL_REPEATTHRESHOLD,Repetition Test Count Cut-Off value."
|
|
hexmask.long 0x0 0.--31. 1. "REPEATTHRESHOLD,Repetition Test Count Cut-Off value."
|
|
line.long 0x4 "RNG_CONTROL_PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value."
|
|
hexmask.long 0x4 0.--31. 1. "PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value."
|
|
group.long 0x1030++0x27
|
|
line.long 0x0 "RNG_CONTROL_STATUS,Status register."
|
|
bitfld.long 0x0 11. "FIFOACCFAIL,Set when a FIFO data read is performed while the NDRNG is disabled AND has its FIFO empty (FIFOLevel = 0)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STARTUPFAIL,Start-up test failure." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALMINT,AIS31 noise alarm interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PREINT,AIS31 preliminary noise alarm interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FULLINT,FIFO full status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PROPFAIL,NIST-800-90B adaptive Proportion Test (1024-sample window) interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REPFAIL,NIST-800-90B repetition Count Test interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 1.--3. "STATE,State of the control FSM: 000: Reset 001: Startup 010: Idle (Rings On) 011: Idle (Rings Off) 100: Fill FIFO 101: Error 110: Unused 111: Unused." "0: Reset,1: Startup,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "TESTDATABUSY,High when data written to TestData register is being processed. (see section 4.7)" "0,1"
|
|
line.long 0x4 "RNG_CONTROL_INITWAITVAL,Initial wait counter value."
|
|
hexmask.long.word 0x4 0.--15. 1. "INITWAITVAL,Number of clock cycles to wait before sampling data from the noise source."
|
|
line.long 0x8 "RNG_CONTROL_DISABLEOSC0,Disable oscillator rings #0 to #31."
|
|
hexmask.long 0x8 0.--31. 1. "DISABLEOSC0,Disable oscillator rings #0 to #31."
|
|
line.long 0xC "RNG_CONTROL_DISABLEOSC1,Disable oscillator rings #32 to #63."
|
|
hexmask.long 0xC 0.--31. 1. "DISABLEOSC1,Disable oscillator rings #32 to #63."
|
|
line.long 0x10 "RNG_CONTROL_SWOFFTMRVAL,Switch off timer value."
|
|
hexmask.long.word 0x10 0.--15. 1. "SWOFFTMRVAL,Number of clk cycles to wait before stopping the rings after the FIFO is full."
|
|
line.long 0x14 "RNG_CONTROL_CLKDIV,Sample clock divider."
|
|
hexmask.long.byte 0x14 0.--7. 1. "CLKDIV,Sample clock divider. The frequency at which the outputs of the rings are sampled is given by: Fs=Fpclk/(ClkDiv+1)."
|
|
line.long 0x18 "RNG_CONTROL_AIS31CONF0,AIS31 configuration register 0."
|
|
hexmask.long.word 0x18 16.--31. 1. "ONLINETHRESHOLD,Online threshold."
|
|
newline
|
|
hexmask.long.word 0x18 0.--15. 1. "STARTUPTHRESHOLD,Start-up test threshold."
|
|
line.long 0x1C "RNG_CONTROL_AIS31CONF1,AIS31 configuration register 1."
|
|
hexmask.long.word 0x1C 16.--31. 1. "HEXPECTEDVALUE,Expected history value."
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "ONLINEREPTHRESHOLD,Online repeat threshold."
|
|
line.long 0x20 "RNG_CONTROL_AIS31CONF2,AIS31 configuration register 2."
|
|
hexmask.long.word 0x20 16.--31. 1. "HMAX,Maximum allowed history value."
|
|
newline
|
|
hexmask.long.word 0x20 0.--15. 1. "HMIN,Minimum allowed history value."
|
|
line.long 0x24 "RNG_CONTROL_AIS31STATUS,AIS31 status register."
|
|
bitfld.long 0x24 17. "PRELIMNOISEALARMREP,Last preliminary noise alarm occurred due to consecutive high X**2." "0,1"
|
|
newline
|
|
bitfld.long 0x24 16. "PRELIMNOISEALARMRNG,Last preliminary noise alarm occurred due to history value out of range." "0,1"
|
|
newline
|
|
hexmask.long.word 0x24 0.--15. 1. "NUMPRELIMALARMS,Number of preliminary noise alarms since counter was last cleared."
|
|
rgroup.long 0x1058++0x3
|
|
line.long 0x0 "RNG_CONTROL_HWCONFIG,Hardware configuration register."
|
|
bitfld.long 0x0 9. "AIS31Full,Generic g_AIS31Full value." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "AIS31,Generic g_AIS31 value." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NUMBOFRINGS,Generic g_NumRings value."
|
|
group.long 0x2000++0x7
|
|
line.long 0x0 "PK_POINTERS,Pointers register."
|
|
hexmask.long.byte 0x0 24.--27. 1. "OPPTRN,When executing primitive arithmetic operations this pointer defines the location where the modulus is located in memory (location 0x0 to 0xF)."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "OPPTRC,When executing primitive arithmetic operations this pointer defines the location (0x0 to 0xF) where the result will be stored in memory."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "OPPTRB,When executing primitive arithmetic operations this pointer defines where operand B is located in memory (location 0x0 to 0xF)."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "OPPTRA,When executing primitive arithmetic operations this pointer defines where operand A is located in memory (location 0x0 to 0xF)."
|
|
line.long 0x4 "PK_COMMAND,Command register."
|
|
bitfld.long 0x4 31. "CALCR2,This bit indicates if the IP has to calculate R**2 mod N for the next operation. This bit must be set to '1' when a new prime number has been programmed. This bit is used for primitive operations and ignored for the other operations. '0': don't.." "0: don't recalculate R**2 mod N,1: re-calculate R**2 mod N"
|
|
newline
|
|
bitfld.long 0x4 30. "FLAGB,See operation description." "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "FLAGA,See operation description." "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "SWAPBYTES,Swap the bytes on AHB interface: '0': Native format (little endian) '1': Byte swapped (big endian) See also section 4.2.1. This bit must be programmed before writing/reading any data in data memory." "0: Native format,1: Byte swapped"
|
|
newline
|
|
bitfld.long 0x4 26. "EDWARDS,Enable Edwards curve (see operation description)." "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "RANDPROJ,Enable randomization of projective coordinates (counter-measure)." "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "RANDKE,Enable randomization of exponent/scalar (counter-measure)." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "SELCURVE,Enable accelerator for specific curve modulus: 0x0: No acceleration (default) 0x1: P256 0x2: P384 0x3: P521 0x4: P192 0x5: Curve25519 0x6: Ed25519 This field has no effect when the optional acceleration hardware is not included." "0: No acceleration,1: P256,2: P384,3: P521,4: P192,5: Curve25519,6: Ed25519 This field has no effect when the..,?"
|
|
newline
|
|
bitfld.long 0x4 19. "RANDMOD,Enable randomization of modulus (counter-measure)." "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 8.--17. 1. "OPBYTESM1,This field defines the size (= number of bytes minus one) of the operands for the current operation. Possible values are limited by the maximum supported operand size. Examples: - 0x014 -> ECC on curve K-163 - 0x01F -> ECC on curve P-256 -.."
|
|
newline
|
|
bitfld.long 0x4 7. "FIELDF,'0': Field is GF(p) '1': Field is GF(2**m)" "0: Field is GF,1: Field is GF"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "OPEADDR,This field defines the operation to be performed. See documentation for more details."
|
|
wgroup.long 0x2008++0x3
|
|
line.long 0x0 "PK_CONTROL,Command register."
|
|
bitfld.long 0x0 1. "CLEARIRQ,Writing a '1' clears the IRQ output." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Writing a '1' starts the processing." "0,1"
|
|
rgroup.long 0x200C++0x3
|
|
line.long 0x0 "PK_STATUS,Status register."
|
|
hexmask.long.byte 0x0 24.--28. 1. "FAILPTR,These bits indicate which data location generated the error flag. They are not available for all error flags."
|
|
newline
|
|
bitfld.long 0x0 17. "INTRPTSTATUS,This bit reflects the IRQ output value. It is set when the operation is finished. It is cleared when the CPU writes the bit 1 of Control Register." "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PK_BUSY,This bit reflects the BUSY output value. It is set when the operation starts and it is cleared when the operation is finished." "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 4.--15. 1. "ERRORFLAGS,These bits indicate an error condition. They are updated at the end of the operation. They are cleared when starting a new operation. See documentation for more details."
|
|
group.long 0x2014++0x3
|
|
line.long 0x0 "PK_TIMER,Timer register."
|
|
hexmask.long 0x0 0.--31. 1. "TIMER,Number of core clock cycles."
|
|
rgroup.long 0x2018++0x3
|
|
line.long 0x0 "PK_HWCONFIG,Hardware configuration register."
|
|
bitfld.long 0x0 31. "DISABLECM,State of DisableCM input (high when counter-measures are disabled)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DISABLECLRMEM,State of DisableClrMem input (high when automatic clear of the RAM after reset is disabled)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DISABLESMX,State of DisableSMx input (high when SM2/SM9 operations are disabled)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "AHBMASTER,'0': Memory access through AHB Slave and internally in the PKE. '1': Memory access through AHB Master outside the PKE." "0: Memory access through AHB Slave and internally..,1: Memory access through AHB Master"
|
|
newline
|
|
bitfld.long 0x0 24. "X25519,Support Curve25519/Ed25519 acceleration." "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "P192,Support ECC P192 acceleration." "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P521,Support ECC P521 acceleration." "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "P384,Support ECC P384 acceleration." "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "P256,Support ECC P256 acceleration." "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "BINARYFIELD,Support binary field." "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PRIMEFIELD,Support prime field." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "NBMULT,Number of multipliers: 0x0: 1 multiplier 0x1: 4 multipliers 0x2: 16 multipliers 0x4: 64 multipliers 0x8: 256 multipliers"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "MAXOPSIZE,Maximum operand size (number of bytes)."
|
|
group.long 0x201C++0xB
|
|
line.long 0x0 "PK_OPSIZE,Operand size register."
|
|
hexmask.long.word 0x0 0.--12. 1. "OPSIZE,Operand size (number of bytes): 0x0100: 256 0x0209: 521 0x0800: 2048 0x0C00: 3072 0x1000: 4096 This register is used when the memory is accessed via AHB Master"
|
|
line.long 0x4 "PK_MEMOFFSET,Memory offset register."
|
|
hexmask.long 0x4 0.--31. 1. "MEMOFFSET,Memory offset for AHB Master"
|
|
line.long 0x8 "PK_MICROCODEOFFSET,MicroCode offset register."
|
|
hexmask.long 0x8 0.--31. 1. "MICROCODEOFFSET,MicroCode offset for AHB Master"
|
|
group.long 0x4000++0xB
|
|
line.long 0x0 "RNG_DATA_CONTROL,Control register"
|
|
bitfld.long 0x0 20. "FIFOWRITESTARTUP,Enable write of the samples in the FIFO during start-up." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "NB128BITBLOCKS,Number of 128 bit blocks used in AES-CBCMAC post-processing. This value cannot be zero."
|
|
newline
|
|
bitfld.long 0x0 15. "AIS31TESTSEL,Select input to the AIS31 test module: 0: Before conditioning 1: After conditioning." "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 14. "HEALTHTESTSEL,Select input to health test module: 0: Before conditioning 1: After conditioning." "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 13. "AIS31BYPASS,Bypass AIS31 tests such that the results of the start-up and online tests do not affect the FSM state." "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "HEALTHTESTBYPASS,Bypass NIST tests such that the results of the start-up and online test do not affect the FSM state." "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FORCEACTIVEROS,Force oscillators to run when FIFO is full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INTENALM,Interrupt enable for AIS31 noise alarm." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "INTENPRE,Interrupt enable for AIS31 preliminary noise alarm." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SOFTRST,Software reset: 0: Normal mode 1: The continuous test the conditioning function and the FIFO are reset. This bit is not cleared automatically." "0: Normal mode,1: The continuous test"
|
|
newline
|
|
bitfld.long 0x0 7. "INTENFULL,Interrupt enable for FIFO full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "INTENPROP,Interrupt enable for Adaptive Proportion Test failure (1024-sample window)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INTENREP,Interrupt enable for Repetition Count Test failure." "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CONDBYPASS,0: the conditioning function is used (normal mode) 1: the conditioning function is bypassed (to observe entropy source directly)." "0: the conditioning function is used,1: the conditioning function is bypassed"
|
|
newline
|
|
bitfld.long 0x0 2. "TESTEN,Select input for conditioning function and continuous tests: 0: Noise source (normal mode) 1: Test data register (test mode)." "0: Noise source,1: Test data register"
|
|
newline
|
|
bitfld.long 0x0 1. "LFSREN,Select between the NDRNG with asynchronous free running oscillators (when '0') and the Pseudo-Random generator with synchronous oscillators for simulation purpose (when '1')." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Enable the NDRNG." "0,1"
|
|
line.long 0x4 "RNG_DATA_FIFOLEVEL,FIFO level register."
|
|
hexmask.long 0x4 0.--31. 1. "FIFOLEVEL,Number of 32 bits words of random available in the FIFO. Any write to this register clears the FullInt flag in the Status register."
|
|
line.long 0x8 "RNG_DATA_FIFOTHRESHOLD,FIFO threshold register."
|
|
hexmask.long 0x8 0.--31. 1. "FIFOTHRESHOLD,FIFO level below which the module leaves the idle state to refill the FIFO expressed in number of 128bit blocks."
|
|
rgroup.long 0x400C++0x3
|
|
line.long 0x0 "RNG_DATA_FIFODEPTH,FIFO depth register."
|
|
hexmask.long 0x0 0.--31. 1. "FIFODEPTH,Maximum number of 32 bits words that can be stored in the FIFO: 2**g_fifodepth."
|
|
group.long 0x4010++0xF
|
|
line.long 0x0 "RNG_DATA_KEY0,Key register (MSB)."
|
|
hexmask.long 0x0 0.--31. 1. "KEY0,Key register (MSB)."
|
|
line.long 0x4 "RNG_DATA_KEY1,Key register."
|
|
hexmask.long 0x4 0.--31. 1. "KEY1,Key register."
|
|
line.long 0x8 "RNG_DATA_KEY2,Key register."
|
|
hexmask.long 0x8 0.--31. 1. "KEY2,Key register."
|
|
line.long 0xC "RNG_DATA_KEY3,Key register (LSB)."
|
|
hexmask.long 0xC 0.--31. 1. "KEY3,Key register (LSB)."
|
|
wgroup.long 0x4020++0x3
|
|
line.long 0x0 "RNG_DATA_TESTDATA,Test data register."
|
|
hexmask.long 0x0 0.--31. 1. "TESTDATA,Test data register."
|
|
group.long 0x4024++0x7
|
|
line.long 0x0 "RNG_DATA_REPEATTHRESHOLD,Repetition Test Count Cut-Off value."
|
|
hexmask.long 0x0 0.--31. 1. "REPEATTHRESHOLD,Repetition Test Count Cut-Off value."
|
|
line.long 0x4 "RNG_DATA_PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value."
|
|
hexmask.long 0x4 0.--31. 1. "PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value."
|
|
group.long 0x4030++0x27
|
|
line.long 0x0 "RNG_DATA_STATUS,Status register."
|
|
bitfld.long 0x0 11. "FIFOACCFAIL,Set when a FIFO data read is performed while the NDRNG is disabled AND has its FIFO empty (FIFOLevel = 0)." "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STARTUPFAIL,Start-up test failure." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALMINT,AIS31 noise alarm interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PREINT,AIS31 preliminary noise alarm interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FULLINT,FIFO full status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PROPFAIL,NIST-800-90B adaptive Proportion Test (1024-sample window) interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REPFAIL,NIST-800-90B repetition Count Test interrupt status." "0,1"
|
|
newline
|
|
bitfld.long 0x0 1.--3. "STATE,State of the control FSM: 000: Reset 001: Startup 010: Idle (Rings On) 011: Idle (Rings Off) 100: Fill FIFO 101: Error 110: Unused 111: Unused." "0: Reset,1: Startup,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "TESTDATABUSY,High when data written to TestData register is being processed. (see section 4.7)" "0,1"
|
|
line.long 0x4 "RNG_DATA_INITWAITVAL,Initial wait counter value."
|
|
hexmask.long.word 0x4 0.--15. 1. "INITWAITVAL,Number of clock cycles to wait before sampling data from the noise source."
|
|
line.long 0x8 "RNG_DATA_DISABLEOSC0,Disable oscillator rings #0 to #31."
|
|
hexmask.long 0x8 0.--31. 1. "DISABLEOSC0,Disable oscillator rings #0 to #31."
|
|
line.long 0xC "RNG_DATA_DISABLEOSC1,Disable oscillator rings #32 to #63."
|
|
hexmask.long 0xC 0.--31. 1. "DISABLEOSC1,Disable oscillator rings #32 to #63."
|
|
line.long 0x10 "RNG_DATA_SWOFFTMRVAL,Switch off timer value."
|
|
hexmask.long.word 0x10 0.--15. 1. "SWOFFTMRVAL,Number of clk cycles to wait before stopping the rings after the FIFO is full."
|
|
line.long 0x14 "RNG_DATA_CLKDIV,Sample clock divider."
|
|
hexmask.long.byte 0x14 0.--7. 1. "CLKDIV,Sample clock divider. The frequency at which the outputs of the rings are sampled is given by: Fs=Fpclk/(ClkDiv+1)."
|
|
line.long 0x18 "RNG_DATA_AIS31CONF0,AIS31 configuration register 0."
|
|
hexmask.long.word 0x18 16.--31. 1. "ONLINETHRESHOLD,Online threshold."
|
|
newline
|
|
hexmask.long.word 0x18 0.--15. 1. "STARTUPTHRESHOLD,Start-up test threshold."
|
|
line.long 0x1C "RNG_DATA_AIS31CONF1,AIS31 configuration register 1."
|
|
hexmask.long.word 0x1C 16.--31. 1. "HEXPECTEDVALUE,Expected history value."
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "ONLINEREPTHRESHOLD,Online repeat threshold."
|
|
line.long 0x20 "RNG_DATA_AIS31CONF2,AIS31 configuration register 2."
|
|
hexmask.long.word 0x20 16.--31. 1. "HMAX,Maximum allowed history value."
|
|
newline
|
|
hexmask.long.word 0x20 0.--15. 1. "HMIN,Minimum allowed history value."
|
|
line.long 0x24 "RNG_DATA_AIS31STATUS,AIS31 status register."
|
|
bitfld.long 0x24 17. "PRELIMNOISEALARMREP,Last preliminary noise alarm occurred due to consecutive high X**2." "0,1"
|
|
newline
|
|
bitfld.long 0x24 16. "PRELIMNOISEALARMRNG,Last preliminary noise alarm occurred due to history value out of range." "0,1"
|
|
newline
|
|
hexmask.long.word 0x24 0.--15. 1. "NUMPRELIMALARMS,Number of preliminary noise alarms since counter was last cleared."
|
|
rgroup.long 0x4058++0x3
|
|
line.long 0x0 "RNG_DATA_HWCONFIG,Hardware configuration register."
|
|
bitfld.long 0x0 9. "AIS31FULL,Generic g_AIS31Full value." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "AIS31,Generic g_AIS31 value." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NUMBOFRINGS,Generic g_NumRings value."
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "SYSCON (System Control)"
|
|
base ad:0xE000E000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ICTR,Interrupt Controller Type Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "INTLINESNUM,"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x0 9. "DISOOFP,Disable out-of-order FP instructions" "0,1"
|
|
bitfld.long 0x0 8. "DISFPCA,Disable automatic update of CONTROL.FPCA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DISFOLD,Disable IT folding" "0,1"
|
|
bitfld.long 0x0 1. "DISDEFWBUF,Disable wruite buffer use during default memory map accesses" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DISMCYCINT,Disable interruption of LDM/STM instructions" "0,1"
|
|
rgroup.long 0xD00++0x3
|
|
line.long 0x0 "CPUID,CPUID Base Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IMPLEMENTER,Implementer code 0x41=ARM"
|
|
hexmask.long.byte 0x0 20.--23. 1. "VARIANT,Variant number"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "CONSTANT,Constant"
|
|
hexmask.long.word 0x0 4.--15. 1. "PARTNO,Process Part Number 0xC24=Cortex-M4"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "REVISION,Processor revision number"
|
|
group.long 0xD04++0x3B
|
|
line.long 0x0 "ICSR,Interrupt Control and State Register"
|
|
bitfld.long 0x0 31. "NMIPENDSET,NMI set-pending bit" "0: Write: no effect; read: NMI exception is not..,1: Write: changes NMI exception state to pending;.."
|
|
bitfld.long 0x0 28. "PENDSVSET,PendSV set-pending bit" "0: Write: no effect; read: PendSV exception is not..,1: Write: changes PendSV exception state to.."
|
|
newline
|
|
bitfld.long 0x0 27. "PENDSVCLR,PendSV clear-pending bit" "0: No effect,1: Removes the pending state from the PendSV.."
|
|
bitfld.long 0x0 26. "PENDSTSET,SysTick set-pending bit" "0: Write: no effect; read: SysTick exception is not..,1: Write: changes SysTick exception state to.."
|
|
newline
|
|
bitfld.long 0x0 25. "PENDSTCLR,SysTick clear-pending bit" "0: No effect,1: Removes the pending state from the SysTick.."
|
|
bitfld.long 0x0 23. "ISRPREEMPT,Debug only" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag" "0,1"
|
|
hexmask.long.byte 0x0 12.--17. 1. "VECTPENDING,Exception number of the highest priority pending enabled exception"
|
|
newline
|
|
bitfld.long 0x0 11. "RETTOBASE,No preempted active exceptions to execute" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number"
|
|
line.long 0x4 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x4 7.--31. 1. "TBLOFF,Vector table base offset"
|
|
line.long 0x8 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "VECTKEY,Register key"
|
|
bitfld.long 0x8 15. "ENDIANNESS,Data endianness 0=little 1=big" "0: little,1: big"
|
|
newline
|
|
bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 2. "SYSRESETREQ,System Reset Request" "0: No system reset request,1: Asserts a signal to the outer system that.."
|
|
newline
|
|
bitfld.long 0x8 1. "VECTCLRACTIVE,Must write 0" "0,1"
|
|
bitfld.long 0x8 0. "VECTRESET,Must write 0" "0,1"
|
|
line.long 0xC "SCR,System Control Register"
|
|
bitfld.long 0xC 4. "SEVONPEND,Send Event on Pending bit" "0: Only enabled interrupts or events can wakeup the..,1: Enabled events and all interrupts including.."
|
|
bitfld.long 0xC 2. "SLEEPDEEP,Deep Sleep used as low power mode" "0: Sleep,1: Deep sleep"
|
|
newline
|
|
bitfld.long 0xC 1. "SLEEPONEXIT,Sleep-on-exit on handler return" "0: Do not sleep when returning to Thread mode,1: Enter sleep or deep sleep on return from an ISR"
|
|
line.long 0x10 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x10 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned"
|
|
bitfld.long 0x10 8. "BFHFNMIGN,Ignore LDM/STM BusFault for -1/-2 priority handlers" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "DIV_0_TRP,Enables divide by 0 trap" "0,1"
|
|
bitfld.long 0x10 3. "UNALIGN_TRP,Enables unaligned access traps" "0: Do not trap unaligned halfword and word accesses,1: Trap unaligned halfword and word accesses"
|
|
newline
|
|
bitfld.long 0x10 1. "USERSETMPEND,Enables unprivileged software access to STIR register" "0,1"
|
|
bitfld.long 0x10 0. "NONBASETHRDENA,Indicates how processor enters Thread mode" "0,1"
|
|
line.long 0x14 "SHPR1,System Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault"
|
|
hexmask.long.byte 0x14 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. "PRI_11,Priority of system handler 11 SVCall"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "PRI_15,Priority of system handler 15 SysTick exception"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "PRI_14,Priority of system handler 14 PendSV"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. "USGFAULTENA,UsageFault enable bit" "0,1"
|
|
bitfld.long 0x20 17. "BUSFAULTENA,BusFault enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 16. "MEMFAULTENA,MemManage enable bit" "0,1"
|
|
bitfld.long 0x20 15. "SVCALLPENDED,SVCall pending bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 14. "BUSFAULTPENDED,BusFault exception pending bit" "0,1"
|
|
bitfld.long 0x20 13. "MEMFAULTPENDED,MemManage exception pending bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 12. "USGFAULTPENDED,UsageFault exception pending bit" "0,1"
|
|
bitfld.long 0x20 11. "SYSTICKACT,SysTick exception active bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 10. "PENDSVACT,PendSV exception active bit" "0,1"
|
|
bitfld.long 0x20 8. "MONITORACT,DebugMonitor exception active bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "SVCALLACT,SVCall active bit" "0,1"
|
|
bitfld.long 0x20 3. "USGFAULTACT,UsageFault exception active bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 1. "BUSFAULTACT,BusFault exception active bit" "0,1"
|
|
bitfld.long 0x20 0. "MEMFAULTACT,MemManage exception active bit" "0,1"
|
|
line.long 0x24 "CFSR,Configurable Fault Status Register"
|
|
bitfld.long 0x24 25. "DIVBYZERO,Divide by zero UsageFault" "0,1"
|
|
bitfld.long 0x24 24. "UNALIGNED,Unaligned access UsageFault" "0,1"
|
|
newline
|
|
bitfld.long 0x24 19. "NOCP,No coprocessor UsageFault" "0,1"
|
|
bitfld.long 0x24 18. "INVPC,Invalid PC load UsageFault" "0,1"
|
|
newline
|
|
bitfld.long 0x24 17. "INVSTATE,Invalid state UsageFault" "0,1"
|
|
bitfld.long 0x24 16. "UNDEFINSTR,Undefined instruction UsageFault" "0,1"
|
|
newline
|
|
bitfld.long 0x24 15. "BFARVALID,BusFault Address Register valid" "0,1"
|
|
bitfld.long 0x24 13. "LSPERR,BusFault occured during FP lazy state preservation" "0,1"
|
|
newline
|
|
bitfld.long 0x24 12. "STKERR,BusFault on stacking for exception entry" "0,1"
|
|
bitfld.long 0x24 11. "UNSTKERR,BusFault on unstacking for exception return" "0,1"
|
|
newline
|
|
bitfld.long 0x24 10. "IMPRECISERR,Imprecise data bus error" "0,1"
|
|
bitfld.long 0x24 9. "PRECISERR,Precise data bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x24 8. "IBUSERR,Instruction bus error" "0,1"
|
|
bitfld.long 0x24 7. "MMARVALID,MemManage Fault Address Register valid" "0,1"
|
|
newline
|
|
bitfld.long 0x24 5. "MLSPERR,MemManager Fault occured during FP lazy state preservation" "0,1"
|
|
bitfld.long 0x24 4. "MSTKERR,MemManage Fault on stacking for exception entry" "0,1"
|
|
newline
|
|
bitfld.long 0x24 3. "MUNSTKERR,MemManage Fault on unstacking for exception return" "0,1"
|
|
bitfld.long 0x24 1. "DACCVIOL,Data access violation" "0,1"
|
|
newline
|
|
bitfld.long 0x24 0. "IACCVIOL,Instruction access violation" "0,1"
|
|
line.long 0x28 "HFSR,HardFault Status Register"
|
|
bitfld.long 0x28 31. "DEBUGEVT,Debug: always write 0" "0,1"
|
|
bitfld.long 0x28 30. "FORCED,Forced Hard Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x28 1. "VECTTBL,BusFault on a Vector Table read during exception processing" "0,1"
|
|
line.long 0x2C "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x2C 4. "EXTERNAL," "0,1"
|
|
bitfld.long 0x2C 3. "VCATCH," "0,1"
|
|
newline
|
|
bitfld.long 0x2C 2. "DWTTRAP," "0,1"
|
|
bitfld.long 0x2C 1. "BKPT," "0,1"
|
|
newline
|
|
bitfld.long 0x2C 0. "HALTED," "0,1"
|
|
line.long 0x30 "MMFAR,MemManage Fault Address Register"
|
|
hexmask.long 0x30 0.--31. 1. "ADDRESS,Address that generated the MemManage fault"
|
|
line.long 0x34 "BFAR,BusFault Address Register"
|
|
hexmask.long 0x34 0.--31. 1. "ADDRESS,Address that generated the BusFault"
|
|
line.long 0x38 "AFSR,Auxiliary Fault Status Register"
|
|
hexmask.long 0x38 0.--31. 1. "IMPDEF,AUXFAULT input signals"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xD40)++0x3
|
|
line.long 0x0 "PFR[$1],Processor Feature Register"
|
|
repeat.end
|
|
rgroup.long 0xD48++0x7
|
|
line.long 0x0 "DFR,Debug Feature Register"
|
|
line.long 0x4 "ADR,Auxiliary Feature Register"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xD50)++0x3
|
|
line.long 0x0 "MMFR[$1],Memory Model Feature Register"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xD60)++0x3
|
|
line.long 0x0 "ISAR[$1],Instruction Set Attributes Register"
|
|
repeat.end
|
|
group.long 0xD88++0x3
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11" "0: Access denied,1: Privileged access only,?,3: Full access"
|
|
bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10" "0: Access denied,1: Privileged access only,?,3: Full access"
|
|
tree.end
|
|
tree "SYSTICK (System Timer)"
|
|
base ad:0xE000E010
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CSR,SysTick Control and Status Register"
|
|
bitfld.long 0x0 16. "COUNTFLAG,Timer counted to 0 since last read of register" "0,1"
|
|
bitfld.long 0x0 2. "CLKSOURCE,Clock Source 0=external 1=processor" "0: external,1: processor"
|
|
newline
|
|
bitfld.long 0x0 1. "TICKINT,SysTick Exception Request Enable" "0: Counting down to 0 does not assert the SysTick..,1: Counting down to 0 asserts the SysTick exception.."
|
|
bitfld.long 0x0 0. "ENABLE,SysTick Counter Enable" "0: Counter disabled,1: Counter enabled"
|
|
line.long 0x4 "RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "RELOAD,Value to load into the SysTick Current Value Register when the counter reaches 0"
|
|
line.long 0x8 "CVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "CURRENT,Current value at the time the register is accessed"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x0 31. "NOREF,No Separate Reference Clock" "0: The reference clock is provided,1: The reference clock is not provided"
|
|
bitfld.long 0x0 30. "SKEW,TENMS is rounded from non-integer ratio" "0: 10ms calibration value is exact,1: 10ms calibration value is inexact because of the.."
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Reload value to use for 10ms timing"
|
|
tree.end
|
|
tree "TC (Timer/Counter)"
|
|
base ad:0x0
|
|
tree "TC0"
|
|
base ad:0x40001400
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC1"
|
|
base ad:0x40001800
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC2"
|
|
base ad:0x40001C00
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC3"
|
|
base ad:0x40002000
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
tree "TC4"
|
|
base ad:0x40002400
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC5"
|
|
base ad:0x40002800
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC6"
|
|
base ad:0x40002C00
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC7"
|
|
base ad:0x40003000
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
tree "TC4"
|
|
base ad:0x40002400
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC5"
|
|
base ad:0x40002800
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC6"
|
|
base ad:0x40002C00
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "TC7"
|
|
base ad:0x40003000
|
|
tree "COUNT8 (8-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x0 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "PER,COUNT8 Period"
|
|
hexmask.byte 0x0 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x1C)++0x0
|
|
line.byte 0x0 "CC[$1],COUNT8 Compare and Capture"
|
|
hexmask.byte 0x0 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x0
|
|
line.byte 0x0 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x30)++0x0
|
|
line.byte 0x0 "CCBUF[$1],COUNT8 Compare and Capture Buffer"
|
|
hexmask.byte 0x0 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT16 (16-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "COUNT,COUNT16 Count"
|
|
hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1C)++0x1
|
|
line.word 0x0 "CC[$1],COUNT16 Compare and Capture"
|
|
hexmask.word 0x0 0.--15. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x30)++0x1
|
|
line.word 0x0 "CCBUF[$1],COUNT16 Compare and Capture Buffer"
|
|
hexmask.word 0x0 0.--15. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "COUNT32 (32-bit Counter Mode)"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
bitfld.long 0x0 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?"
|
|
newline
|
|
bitfld.long 0x0 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x0 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DMAOS,DMA One Shot" "0,1"
|
|
bitfld.long 0x0 11. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: Prescaler: GCLK_TC,1: Prescaler: GCLK_TC/2,2: Prescaler: GCLK_TC/4,3: Prescaler: GCLK_TC/8,4: Prescaler: GCLK_TC/16,5: Prescaler: GCLK_TC/64,6: Prescaler: GCLK_TC/256,7: Prescaler: GCLK_TC/1024"
|
|
bitfld.long 0x0 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x0 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic clock,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "EVCTRL,Event Control"
|
|
bitfld.word 0x0 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x0 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x0 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x0 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x8++0x5
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x0 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x0 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x1 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x1 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x2 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x2 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x2 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
line.byte 0x3 "STATUS,Status"
|
|
bitfld.byte 0x3 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x3 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x3 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x3 0. "STOP,Stop Status Flag" "0,1"
|
|
line.byte 0x4 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x4 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
line.byte 0x5 "DRVCTRL,Control C"
|
|
bitfld.byte 0x5 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x5 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0xF++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x0 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x0 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "COUNT,Counter" "0,1"
|
|
bitfld.long 0x0 3. "STATUS,STATUS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTRLB,CTRLB" "0,1"
|
|
bitfld.long 0x0 1. "ENABLE,enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,swrst" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "COUNT,COUNT32 Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CC[$1],COUNT32 Compare and Capture"
|
|
hexmask.long 0x0 0.--31. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CCBUF[$1],COUNT32 Compare and Capture Buffer"
|
|
hexmask.long 0x0 0.--31. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "TCC (Timer/Counter Control)"
|
|
base ad:0x0
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
base ad:0x40002400
|
|
elif (cpuis("PIC32C?5109BZ31032*"))
|
|
base ad:0x40003400
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*")||cpuis("PIC32C?5109BZ31032*"))
|
|
tree "TCC0"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
line.long 0xC "DRVCTRL,Driver Control"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1"
|
|
bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1"
|
|
bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1"
|
|
bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
|
|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1"
|
|
bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
base ad:0x40002800
|
|
elif (cpuis("PIC32C?5109BZ31032*"))
|
|
base ad:0x40003800
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*")||cpuis("PIC32C?5109BZ31032*"))
|
|
tree "TCC1"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
line.long 0xC "DRVCTRL,Driver Control"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1"
|
|
bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1"
|
|
bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1"
|
|
bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
|
|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1"
|
|
bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
base ad:0x40002C00
|
|
elif (cpuis("PIC32C?5109BZ31032*"))
|
|
base ad:0x40003C00
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*")||cpuis("PIC32C?5109BZ31032*"))
|
|
tree "TCC2"
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
line.long 0xC "DRVCTRL,Driver Control"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
|
|
newline
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1"
|
|
bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1"
|
|
bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1"
|
|
bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
|
|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1"
|
|
bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
tree "TCC0"
|
|
base ad:0x40003400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
line.long 0xC "DRVCTRL,Driver Control"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
|
|
newline
|
|
bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
|
|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
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|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
tree "TCC1"
|
|
base ad:0x40003800
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
|
|
newline
|
|
bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
|
|
line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
line.long 0xC "DRVCTRL,Driver Control"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
|
|
newline
|
|
bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
|
|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
tree "TCC2"
|
|
base ad:0x40003C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRLA,Control A"
|
|
bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
newline
|
|
bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
bitfld.long 0x0 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x4++0x1
|
|
line.byte 0x0 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
|
|
newline
|
|
bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1"
|
|
line.byte 0x1 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?"
|
|
bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.."
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newline
|
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bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1"
|
|
bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1"
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|
newline
|
|
bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1"
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|
newline
|
|
bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PER,Period Busy" "0,1"
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|
bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x0 4. "COUNT,Count Busy" "0,1"
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|
newline
|
|
bitfld.long 0x0 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1"
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|
newline
|
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bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1"
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|
bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "FCTRLA,Recoverable Fault A Configuration"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
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|
newline
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bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
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|
bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
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newline
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bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
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bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
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|
newline
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bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1"
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|
bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
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newline
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bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1"
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bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1"
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newline
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bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
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line.long 0x4 "FCTRLB,Recoverable Fault B Configuration"
|
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hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value"
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hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
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newline
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bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
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bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
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newline
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bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
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bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
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newline
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bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1"
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bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.."
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newline
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bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1"
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bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1"
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newline
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bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.."
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line.long 0x8 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
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newline
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bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
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newline
|
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bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
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newline
|
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bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3"
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|
line.long 0xC "DRVCTRL,Driver Control"
|
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hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value"
|
|
hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value"
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newline
|
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bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
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bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
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newline
|
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bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
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bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
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newline
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bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
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bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
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|
newline
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bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
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bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
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|
newline
|
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bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
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newline
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bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
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|
newline
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bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
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|
bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
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|
newline
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bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
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bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
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newline
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bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
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|
group.byte 0x1E++0x0
|
|
line.byte 0x0 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "EVCTRL,Event Control"
|
|
bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1"
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|
bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1"
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newline
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bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
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bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
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newline
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bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
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|
bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
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newline
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bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1"
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bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1"
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newline
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bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
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bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
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newline
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bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
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bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
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newline
|
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bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
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bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
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|
newline
|
|
bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
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|
newline
|
|
bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1"
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newline
|
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bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
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|
bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,2: An interrupt/event is generated when a counter..,3: An interrupt/event is generated when a new.."
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newline
|
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bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,5: Period capture value in CC0 register pulse width..,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault"
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|
bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
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line.long 0x4 "INTENCLR,Interrupt Enable Clear"
|
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bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
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bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
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|
newline
|
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bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
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bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
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bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
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bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1"
|
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bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1"
|
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line.long 0x8 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1"
|
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bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0xC "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1"
|
|
bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "ERR,Error" "0,1"
|
|
bitfld.long 0xC 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0xC 0. "OVF,Overflow" "0,1"
|
|
line.long 0x10 "STATUS,Status"
|
|
bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1"
|
|
bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x10 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "STOP,Stop" "0,1"
|
|
line.long 0x14 "COUNT,Count"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "PATT,Pattern"
|
|
bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "WAVE,Waveform Control"
|
|
bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1"
|
|
bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,?,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.."
|
|
line.long 0x4 "PER,Period"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PER,Period Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x44)++0x3
|
|
line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number"
|
|
repeat.end
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x0 15. "PGVB7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x0 14. "PGVB6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "PGVB5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x0 12. "PGVB4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "PGVB3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x0 10. "PGVB2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PGVB1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x0 8. "PGVB0,Pattern Generator 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "PGEB7,Pattern Generator 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 6. "PGEB6,Pattern Generator 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "PGEB5,Pattern Generator 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 4. "PGEB4,Pattern Generator 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PGEB3,Pattern Generator 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 2. "PGEB2,Pattern Generator 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PGEB1,Pattern Generator 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x0 0. "PGEB0,Pattern Generator 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 4.--23. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer"
|
|
hexmask.long.tbyte 0x0 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "TPIU (Trace Port Interface Unit)"
|
|
base ad:0xE0040000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "SSPSR,Supported Parallel Port Size Register"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CSPSR,Current Parallel Port Size Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "ACPR,Asynchronous Clock Prescaler Register"
|
|
hexmask.long.word 0x0 0.--12. 1. "PRESCALER,"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "SPPR,Selected Pin Protocol Register"
|
|
bitfld.long 0x0 0.--1. "TXMODE," "0,1,2,3"
|
|
rgroup.long 0x300++0x3
|
|
line.long 0x0 "FFSR,Formatter and Flush Status Register"
|
|
bitfld.long 0x0 3. "FtNonStop," "0,1"
|
|
bitfld.long 0x0 2. "TCPresent," "0,1"
|
|
bitfld.long 0x0 1. "FtStopped," "0,1"
|
|
bitfld.long 0x0 0. "FlInProg," "0,1"
|
|
group.long 0x304++0x3
|
|
line.long 0x0 "FFCR,Formatter and Flush Control Register"
|
|
bitfld.long 0x0 8. "TrigIn," "0,1"
|
|
bitfld.long 0x0 1. "EnFCont," "0,1"
|
|
rgroup.long 0x308++0x3
|
|
line.long 0x0 "FSCR,Formatter Synchronization Counter Register"
|
|
rgroup.long 0xEE8++0xB
|
|
line.long 0x0 "TRIGGER,TRIGGER"
|
|
bitfld.long 0x0 0. "TRIGGER," "0,1"
|
|
line.long 0x4 "FIFO0,Integration ETM Data"
|
|
bitfld.long 0x4 29. "ITM_ATVALID," "0,1"
|
|
bitfld.long 0x4 27.--28. "ITM_bytecount," "0,1,2,3"
|
|
bitfld.long 0x4 26. "ETM_ATVALID," "0,1"
|
|
bitfld.long 0x4 24.--25. "ETM_bytecount," "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "ETM2,"
|
|
hexmask.long.byte 0x4 8.--15. 1. "ETM1,"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ETM0,"
|
|
line.long 0x8 "ITATBCTR2,ITATBCTR2"
|
|
bitfld.long 0x8 0. "ATREADY," "0,1"
|
|
rgroup.long 0xEF8++0x7
|
|
line.long 0x0 "ITATBCTR0,ITATBCTR0"
|
|
bitfld.long 0x0 0. "ATREADY," "0,1"
|
|
line.long 0x4 "FIFO1,Integration ITM Data"
|
|
bitfld.long 0x4 29. "ITM_ATVALID," "0,1"
|
|
bitfld.long 0x4 27.--28. "ITM_bytecount," "0,1,2,3"
|
|
bitfld.long 0x4 26. "ETM_ATVALID," "0,1"
|
|
bitfld.long 0x4 24.--25. "ETM_bytecount," "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "ITM2,"
|
|
hexmask.long.byte 0x4 8.--15. 1. "ITM1,"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ITM0,"
|
|
group.long 0xF00++0x3
|
|
line.long 0x0 "ITCTRL,Integration Mode Control"
|
|
bitfld.long 0x0 0. "Mode," "0,1"
|
|
group.long 0xFA0++0x7
|
|
line.long 0x0 "CLAIMSET,Claim tag set"
|
|
line.long 0x4 "CLAIMCLR,Claim tag clear"
|
|
rgroup.long 0xFC8++0x7
|
|
line.long 0x0 "DEVID,TPIU_DEVID"
|
|
bitfld.long 0x0 11. "NRZVALID," "0,1"
|
|
bitfld.long 0x0 10. "MANCVALID," "0,1"
|
|
bitfld.long 0x0 9. "PTINVALID," "0,1"
|
|
bitfld.long 0x0 6.--8. "MinBufSz," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "AsynClkIn," "0,1"
|
|
bitfld.long 0x0 0. "NrTraceInput," "0,1"
|
|
line.long 0x4 "DEVTYPE,TPIU_DEVTYPE"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MajorType,"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SubType,"
|
|
tree.end
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
tree "TRNG (True Random Number Generator)"
|
|
base ad:0x42002800
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "CTRLA,Control A"
|
|
bitfld.byte 0x0 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.byte 0x0 1. "ENABLE,Enable" "0,1"
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "EVCTRL,Event Control"
|
|
bitfld.byte 0x0 0. "DATARDYEO,Data Ready Event Output" "0,1"
|
|
group.byte 0x8++0x2
|
|
line.byte 0x0 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x0 0. "DATARDY,Data Ready Interrupt Enable" "0,1"
|
|
line.byte 0x1 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x1 0. "DATARDY,Data Ready Interrupt Enable" "0,1"
|
|
line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x2 0. "DATARDY,Data Ready Interrupt Flag" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "DATA,Output Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Output Data"
|
|
tree.end
|
|
endif
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x44000500
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "WDTCON,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WDTCLRKEY,"
|
|
bitfld.long 0x0 15. "ON,Watchdog Timer Enable bit" "0: The WDT module is disabled,1: The WDT module is enabled"
|
|
hexmask.long.byte 0x0 8.--12. 1. "RUNDIV,"
|
|
bitfld.long 0x0 6.--7. "CLKSEL," "0,1,2,3"
|
|
hexmask.long.byte 0x0 1.--5. 1. "SLPDIV,"
|
|
newline
|
|
bitfld.long 0x0 0. "WDTWINEN,Watchdog Timer Window Enable bit" "0: Disable windowed Watchdog Timer,1: Enable windowed Watchdog Timer"
|
|
line.long 0x4 "WDTCONCLR,"
|
|
line.long 0x8 "WDTCONSET,"
|
|
line.long 0xC "WDTCONINV,"
|
|
tree.end
|
|
tree "ZBT (Zigbee Bluetooth Radio Subsystem)"
|
|
base ad:0x41014000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "SUBSYS_CNTRL_REG0,SUBSYS_CNTRL_REG0"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 31. "ant_div_sel_ovrd_en,ant_div_sel_ovrd_en" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 31. "ant_div_sel_ovrd_en,ant_div_sel_ovrd_en" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 29.--30. "ant_div_sel_ovrd_val,ant_div_sel_ovrd_val" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 29.--30. "ant_div_sel_ovrd_val,ant_div_sel_ovrd_val" "0,1,2,3"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 28. "disable_pclk_bt,disable_pclk_bt" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 28. "disable_pclk_bt,disable_pclk_bt" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 27. "disable_pclk_zb_mac,disable_pclk_zb_mac" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 27. "disable_pclk_zb_mac,disable_pclk_zb_mac" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 26. "disable_pclk_arb,disable_pclk_arb" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 26. "disable_pclk_arb,disable_pclk_arb" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 25. "subsys_dbg_bus_sel,subsys_dbg_bus_sel" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 25. "subsys_dbg_bus_sel,subsys_dbg_bus_sel" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 24. "aclb_pwr_rst_n,aclb_pwr_rst_n" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 24. "aclb_pwr_rst_n,aclb_pwr_rst_n" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 23. "aclb_soft_rst_n,aclb_soft_rst_n" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 23. "aclb_soft_rst_n,aclb_soft_rst_n" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x0 22. "subsys_dbg_bus_sel_top,subsys_dbg_bus_sel_top" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x0 22. "subsys_dbg_bus_sel_top,subsys_dbg_bus_sel_top" "0,1"
|
|
endif
|
|
bitfld.long 0x0 20. "bt_en_main_clk,bt_en_main_clk" "0,1"
|
|
bitfld.long 0x0 19. "bt_reset_by_fw,bt_reset_by_fw" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "bt_hw_rc_re_cal,bt_hw_rc_re_cal" "0,1"
|
|
bitfld.long 0x0 17. "bt_sfr_wakeup_bit,bt_sfr_wakeup_bit" "0,1"
|
|
bitfld.long 0x0 16. "bt_pdc_ov,bt_pdc_ov" "0,1"
|
|
bitfld.long 0x0 6. "ant_div_sel_2_iom_en,ant_div_sel_2_iom_en" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ant_div_sel_1_iom_en,ant_div_sel_1_iom_en" "0,1"
|
|
bitfld.long 0x0 4. "zb_en_main_clk,zb_en_main_clk" "0,1"
|
|
bitfld.long 0x0 3. "zb_reset_by_fw,zb_reset_by_fw" "0,1"
|
|
bitfld.long 0x0 1. "zb_soft_reset_in,zb_soft_reset_in" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "zb_slp_ctrl,zb_slp_ctrl" "0,1"
|
|
line.long 0x4 "SUBSYS_CNTRL_REG1,SUBSYS_CNTRL_REG1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 31. "disable_adc_clk_gating,disable_adc_clk_gating" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 31. "disable_adc_clk_gating,disable_adc_clk_gating" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 30. "die_clk_sel,die_clk_sel" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 30. "die_clk_sel,die_clk_sel" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 29. "pll_lock_flops_rstn_ovrd_val,pll_lock_flops_rstn_ovrd_val" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 29. "pll_lock_flops_rstn_ovrd_val,pll_lock_flops_rstn_ovrd_val" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 28. "pll_lock_flops_rstn_ovrd_en,pll_lock_flops_rstn_ovrd_en" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 28. "pll_lock_flops_rstn_ovrd_en,pll_lock_flops_rstn_ovrd_en" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 27. "xtal_lock_cnt_rstn_ovrd_val,xtal_lock_cnt_rstn_ovrd_val" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 27. "xtal_lock_cnt_rstn_ovrd_val,xtal_lock_cnt_rstn_ovrd_val" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 26. "xtal_lock_cnt_rstn_ovrd_en,xtal_lock_cnt_rstn_ovrd_en" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 26. "xtal_lock_cnt_rstn_ovrd_en,xtal_lock_cnt_rstn_ovrd_en" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x4 23. "clk_lp_req,clk_lp_req" "0,1"
|
|
bitfld.long 0x4 22. "invert_btadc_clk,invert_btadc_clk" "0,1"
|
|
bitfld.long 0x4 21. "zb_bt_bar_ovrd_val,zb_bt_bar_ovrd_val" "0,1"
|
|
bitfld.long 0x4 20. "zb_bt_bar_ovrd_en,zb_bt_bar_ovrd_en" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "lna_on_iom_en,lna_on_iom_en" "0,1"
|
|
bitfld.long 0x4 18. "pa_on_iom_en,pa_on_iom_en" "0,1"
|
|
bitfld.long 0x4 17. "tr_sw_n_iom_en,tr_sw_n_iom_en" "0,1"
|
|
bitfld.long 0x4 16. "tr_sw_iom_en,tr_sw_iom_en" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "subsys_xtal_ready_delay,subsys_xtal_ready_delay"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 11. "subsys_dbg_bus_en,subsys_dbg_bus_en" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 11. "subsys_dbg_bus_en,subsys_dbg_bus_en" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 10. "disable_one_sec_counter,disable_one_sec_counter" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 10. "disable_one_sec_counter,disable_one_sec_counter" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?1012BZ24032*")||cpuis("PIC32C?1012BZ25048*"))
|
|
bitfld.long 0x4 9. "subsys_bypass_pll_lock,subsys_bypass_pll_lock" "0,1"
|
|
bitfld.long 0x4 8. "subsys_bypass_xtal_ready,subsys_bypass_xtal_ready" "0,1"
|
|
bitfld.long 0x4 6.--7. "ssubsys_clk_div_sel,subsys_clk_div_sel" "0,1,2,3"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 6. "ssubsys_clk_div_sel,subsys_clk_div_sel" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 6. "ssubsys_clk_div_sel,subsys_clk_div_sel" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x4 4.--5. "subsys_clk_src_sel,subsys_clk_src_sel" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "subsys_dbg_bus_sel,subsys_dbg_bus_sel" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "subsys_dbg_bus_sel_top,subsys_dbg_bus_sel_top" "0,1,2,3"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "SUBSYS_CNTRL_REG2,SUBSYS_CNTRL_REG2"
|
|
hexmask.long.byte 0x0 26.--31. 1. "crossbar_data_invert,crossbar_data_invert"
|
|
bitfld.long 0x0 20.--22. "crossbar_data_line_sel_5,crossbar_data_line_sel_5" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "crossbar_data_line_sel_4,crossbar_data_line_sel_4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. "crossbar_data_line_sel_3,crossbar_data_line_sel_3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "crossbar_data_line_sel_2,crossbar_data_line_sel_2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--6. "crossbar_data_line_sel_1,crossbar_data_line_sel_1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "crossbar_data_line_sel_0,crossbar_data_line_sel_0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "SUBSYS_CNTRL_REG3,SUBSYS_CNTRL_REG3"
|
|
bitfld.long 0x4 13. "pll_lock_fifo_empty_rst_en,pll_lock_fifo_empty_rst_en" "0,1"
|
|
bitfld.long 0x4 12. "pll_lock_fifo_clk_src_sel,pll_lock_fifo_clk_src_sel" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "pll_lock_fifo_empty_soft_reset,pll_lock_fifo_empty_soft_reset" "0,1"
|
|
bitfld.long 0x4 10. "pll_auto_relock_en,pll_auto_relock_en" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "pll_lock_fifo_en,pll_lock_fifo_en" "0,1"
|
|
bitfld.long 0x4 8. "disable_pclk_zb_mdm,disable_pclk_zb_mdm" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "disable_pclk_dfe,disable_pclk_dfe" "0,1"
|
|
hexmask.long.byte 0x4 1.--6. 1. "subsys_pll_ready_delay,subsys_pll_ready_delay"
|
|
newline
|
|
bitfld.long 0x4 0. "le_2m_fpga_v1c0_mode,le_2m_fpga_v1c0_mode" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "SUBSYS_CNTRL_REG2,SUBSYS_CNTRL_REG2"
|
|
hexmask.long.byte 0x0 26.--31. 1. "crossbar_data_invert,crossbar_data_invert"
|
|
bitfld.long 0x0 20.--22. "crossbar_data_line_sel_5,crossbar_data_line_sel_5" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "crossbar_data_line_sel_4,crossbar_data_line_sel_4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. "crossbar_data_line_sel_3,crossbar_data_line_sel_3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "crossbar_data_line_sel_2,crossbar_data_line_sel_2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--6. "crossbar_data_line_sel_1,crossbar_data_line_sel_1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "crossbar_data_line_sel_0,crossbar_data_line_sel_0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "SUBSYS_CNTRL_REG3,SUBSYS_CNTRL_REG3"
|
|
bitfld.long 0x4 13. "pll_lock_fifo_empty_rst_en,pll_lock_fifo_empty_rst_en" "0,1"
|
|
bitfld.long 0x4 12. "pll_lock_fifo_clk_src_sel,pll_lock_fifo_clk_src_sel" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "pll_lock_fifo_empty_soft_reset,pll_lock_fifo_empty_soft_reset" "0,1"
|
|
bitfld.long 0x4 10. "pll_auto_relock_en,pll_auto_relock_en" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "pll_lock_fifo_en,pll_lock_fifo_en" "0,1"
|
|
bitfld.long 0x4 8. "disable_pclk_zb_mdm,disable_pclk_zb_mdm" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "disable_pclk_dfe,disable_pclk_dfe" "0,1"
|
|
hexmask.long.byte 0x4 1.--6. 1. "subsys_pll_ready_delay,subsys_pll_ready_delay"
|
|
newline
|
|
bitfld.long 0x4 0. "le_2m_fpga_v1c0_mode,le_2m_fpga_v1c0_mode" "0,1"
|
|
endif
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "SUBSYS_STATUS_REG0,SUBSYS_STATUS_REG0"
|
|
bitfld.long 0x0 17. "bt_rf_idle,bt_rf_idle" "0,1"
|
|
bitfld.long 0x0 16. "bt_low_power_mode,bt_low_power_mode" "0,1"
|
|
bitfld.long 0x0 2. "radio_idle_zb,radio_idle_zb" "0,1"
|
|
bitfld.long 0x0 1. "zb_deep_sleep_mode,zb_deep_sleep_mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "zb_sleep_mode,zb_sleep_mode" "0,1"
|
|
line.long 0x4 "SUBSYS_STATUS_REG1,SUBSYS_STATUS_REG1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 8. "pllc_ready_cnt_expire_raw,pllc_ready_cnt_expire_raw" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 8. "pllc_ready_cnt_expire_raw,pllc_ready_cnt_expire_raw" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 7. "pll_lock_fifo_empty,XTAL_ready" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 7. "pll_lock_fifo_empty,XTAL_ready" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
bitfld.long 0x4 5.--6. "clk_mux_sel,clk_mux_sel0" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
bitfld.long 0x4 5.--6. "clk_mux_sel,clk_mux_sel0" "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x4 4. "clk_lp_ready,clk_lp_ready" "0,1"
|
|
bitfld.long 0x4 3. "PLL_locked,PLL_locked" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "XTAL_ready,XTAL_ready" "0,1"
|
|
bitfld.long 0x4 1. "pll_lock_out,pll_lock_out" "0,1"
|
|
bitfld.long 0x4 0. "xtal_ready_out,xtal_ready_out" "0,1"
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SUBSYS_STATUS_REG0,SUBSYS_STATUS_REG0"
|
|
bitfld.long 0x0 17. "bt_rf_idle,bt_rf_idle" "0,1"
|
|
bitfld.long 0x0 16. "bt_low_power_mode,bt_low_power_mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "radio_idle_zb,radio_idle_zb" "0,1"
|
|
bitfld.long 0x0 1. "zb_deep_sleep_mode,zb_deep_sleep_mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "zb_sleep_mode,zb_sleep_mode" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31032*"))
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "SUBSYS_STATUS_REG1,SUBSYS_STATUS_REG1"
|
|
bitfld.long 0x0 4. "clk_lp_ready,clk_lp_ready" "0,1"
|
|
bitfld.long 0x0 3. "PLL_locked,PLL_locked" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "XTAL_ready,XTAL_ready" "0,1"
|
|
bitfld.long 0x0 1. "pll_lock_out,pll_lock_out" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "xtal_ready_out,xtal_ready_out" "0,1"
|
|
line.long 0x4 "SUBSYS_STATUS_REG2,SUBSYS_STATUS_REG2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "PART_NUM,PART_NUM"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VERSION_NUM,VERSION_NUM"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SUBSYS_STATUS_REG0,SUBSYS_STATUS_REG0"
|
|
bitfld.long 0x0 17. "bt_rf_idle,bt_rf_idle" "0,1"
|
|
bitfld.long 0x0 16. "bt_low_power_mode,bt_low_power_mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "radio_idle_zb,radio_idle_zb" "0,1"
|
|
bitfld.long 0x0 1. "zb_deep_sleep_mode,zb_deep_sleep_mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "zb_sleep_mode,zb_sleep_mode" "0,1"
|
|
endif
|
|
sif (cpuis("PIC32C?5109BZ31048*"))
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "SUBSYS_STATUS_REG1,SUBSYS_STATUS_REG1"
|
|
bitfld.long 0x0 4. "clk_lp_ready,clk_lp_ready" "0,1"
|
|
bitfld.long 0x0 3. "PLL_locked,PLL_locked" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "XTAL_ready,XTAL_ready" "0,1"
|
|
bitfld.long 0x0 1. "pll_lock_out,pll_lock_out" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "xtal_ready_out,xtal_ready_out" "0,1"
|
|
line.long 0x4 "SUBSYS_STATUS_REG2,SUBSYS_STATUS_REG2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "PART_NUM,PART_NUM"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VERSION_NUM,VERSION_NUM"
|
|
endif
|
|
tree.end
|
|
AUTOINDENT.OFF
|