24784 lines
1.6 MiB
24784 lines
1.6 MiB
; --------------------------------------------------------------------------------
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; @Title: NS9210/9215/9360/9750/9775 On-Chip Peripherals
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; @Props: Released
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; @Author: DAN
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; @Changelog: 2010-04-07 DAN
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; @Manufacturer: DIGI - Digi International Inc.
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; @Doc: 90000846_F.pdf(NS9210 2008-04-10)
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; 90000847_G.pdf(NS9215 2010-02); 90000675_C.pdf(NS9360 2006-03)
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; 90000737_a.pdf(NS9750 2005-07); 90000524_E.pdf (NS9775 2008-03)
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; @Core: ARM926EJ-S
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; @Chip:
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perns9xxx.per 15981 2023-04-17 07:25:16Z bschroefel $
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config 16. 8.
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tree "ARM Core Registers"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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width 8.
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tree "ID Registers"
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group c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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group c15:0x0100--0x0100
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line.long 0x0 "CTR,Cache Type"
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bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x0200--0x0200
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line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
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bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
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bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
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tree.end
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tree "MMU Control and Configuration"
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width 8.
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group c15:0x0001--0x0001
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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textline " "
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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textline " "
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group c15:0x0002--0x0002
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line.long 0x0 "TTBR,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x0005--0x0005
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0105--0x0105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0006--0x0006
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line.long 0x0 "DFAR,Data Fault Address Register"
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textline " "
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group c15:0x000a--0x000a
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line.long 0x0 "TLBR,TLB Lockdown Register"
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bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. " P ,P bit" "0,1"
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textline " "
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group c15:0x000d--0x000d
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line.long 0x0 "FCSEPID,FCSE Process ID"
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group c15:0x010d--0x010d
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line.long 0x0 "CONTEXT,Context ID"
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tree.end
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tree "Cache Control and Configuration"
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group c15:0x0009--0x0009
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line.long 0x0 "DCACHE,Data Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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group c15:0x0109--0x0109
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line.long 0x0 "ICACHE,Instruction Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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tree.end
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tree "TCM Control and Configuration"
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group c15:0x0019--0x0019
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line.long 0x0 "DTCM,Data TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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group c15:0x0119--0x0119
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line.long 0x0 "ITCM,Instruction TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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tree.end
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tree "Test and Debug"
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group c15:0x000f--0x000f
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line.long 0x0 "DOVRR,Debug Override Register"
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bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
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bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
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bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
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textline " "
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bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
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bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
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bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
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bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
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group c15:0x001f--0x001f
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line.long 0x0 "ADDRESS,Debug/Test Address"
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;wgroup c15:0x402f--0x402f
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; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
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;wgroup c15:0x403f--0x403f
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; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
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;wgroup c15:0x404f--0x404f
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; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
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;wgroup c15:0x405f--0x405f
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; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
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;wgroup c15:0x407f--0x407f
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; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
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;wgroup c15:0x412f--0x412f
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; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
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;wgroup c15:0x413f--0x413f
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; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
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;wgroup c15:0x414f--0x414f
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; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
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;wgroup c15:0x415f--0x415f
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; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
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;wgroup c15:0x417f--0x417f
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; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
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group c15:0x101f--0x101f
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line.long 0x0 "TRACE,Trace Control"
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bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
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bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
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group c15:0x700f--0x700f
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line.long 0x0 "CACHE,Cache Debug Control"
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bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
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bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
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bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
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group c15:0x701f--0x701f
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line.long 0x0 "MMU,MMU Debug Control"
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bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
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textline " "
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bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
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group c15:0x002f--0x002f
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line.long 0x0 "REMAP,Memory Region Remap"
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bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
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textline " "
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bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
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tree.end
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tree "ICEbreaker"
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width 8.
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group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x4 "DBGSTAT,Debug Status Register"
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bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
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bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
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bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
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bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
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line.long 0x14 "COMDATA,Debug Communication Data Register"
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports)"
|
|
base ad:0xa0902000
|
|
sif (cpu()=="NS9210")
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|
width 13.
|
|
group.long 0x00++0x33
|
|
line.long 0x00 "GPIOCONF0,GPIO Configuration Register 0"
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|
bitfld.long 0x00 27.--29. " FUNC ,GPIO3 Function" "RXD UART A,Ext DMA Pden Ch 0,PIC_0_GEN_IO[3],GPIO3,SPI RXD(dup),?..."
|
|
bitfld.long 0x00 26. " DIR ,GPIO3 Input/Output" "Input,Output"
|
|
textline " "
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|
bitfld.long 0x00 25. " INV ,Controls the inversion function of the GPIO3 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUDIS ,Controls the GPIO3 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " FUNC ,GPIO2 Function" "DSR UART A,Ext Int 1,PIC_0_GEN_IO[2],GPIO2,?..."
|
|
bitfld.long 0x00 18. " DIR ,GPIO2 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INV ,Controls the inversion function of the GPIO2 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PUDIS ,Controls the GPIO2 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " FUNC ,GPIO1 Function" "CTS UART A,Ext Int 0,PIC_0_GEN_IO[1],GPIO1,?..."
|
|
bitfld.long 0x00 10. " DIR ,GPIO1 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INV ,Controls the inversion function of the GPIO1 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUDIS ,Controls the GPIO1 pin pullup resistor operation" "Enabled,Disabled"
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|
textline " "
|
|
bitfld.long 0x00 3.--5. " FUNC ,GPIO0 Function" "DCD UART A,Ext DMA Done Ch 0,PIC_0_GEN_IO[0],GPIO0,SPI EN (dup),?..."
|
|
bitfld.long 0x00 2. " DIR ,GPIO0 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INV ,Controls the inversion function of the GPIO0 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUDIS ,Controls the GPIO0 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x04 "GPIOCONF1,GPIO Configuration Register 1"
|
|
bitfld.long 0x04 27.--29. " FUNC ,GPIO7 Function" "TXD UART A,Ext Timer Event In Ch 8,Ext Timer Event Out Ch 7,GPIO7,SPI TXD(dup),?..."
|
|
bitfld.long 0x04 26. " DIR ,GPIO7 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " INV ,Controls the inversion function of the GPIO7 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PUDIS ,Controls the GPIO7 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19.--21. " FUNC ,GPIO6 Function" "TXC/DTR UART A,Ext DMA Req Ch 0,Ext Timer Event In Ch 7,GPIO6,PIC_DBG_DATA_OUT,?..."
|
|
bitfld.long 0x04 18. " DIR ,GPIO6 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 17. " INV ,Controls the inversion function of the GPIO6 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PUDIS ,Controls the GPIO6 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11.--13. " FUNC ,GPIO5 Function" "RTS/RS485 Control UART A,Ext Int Ch 3,Ext Timer Event Out Ch 6,GPIO5,SPI CLK(dup),?..."
|
|
bitfld.long 0x04 10. " DIR ,GPIO5 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 9. " INV ,Controls the inversion function of the GPIO5 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PUDIS ,Controls the GPIO5 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3.--5. " FUNC ,GPIO4 Function" "RI UART A,Ext Int Ch 2,Ext Timer Event In Ch 6,GPIO4,SPI CLK(dup),?..."
|
|
bitfld.long 0x04 2. " DIR ,GPIO4 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " INV ,Controls the inversion function of the GPIO4 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PUDIS ,Controls the GPIO4 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x08 "GPIOCONF2,GPIO Configuration Register 2"
|
|
bitfld.long 0x08 27.--29. " FUNC ,GPIO11 Function" "RXD UART C,Ext DMA Pden Ch 1,Ext Int Ch 2 (dup),GPIO11,SPI RXD(boot),?..."
|
|
bitfld.long 0x08 26. " DIR ,GPIO11 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 25. " INV ,Controls the inversion function of the GPIO11 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " PUDIS ,Controls the GPIO11 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19.--21. " FUNC ,GPIO10 Function" "DSR UART C,QDC 1,Ext Int Ch 1 (dup),GPIO10,PIC_DBG_CLK,?..."
|
|
bitfld.long 0x08 18. " DIR ,GPIO10 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 17. " INV ,Controls the inversion function of the GPIO10 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PUDIS ,Controls the GPIO10 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11.--13. " FUNC ,GPIO9 Function" "CTS UART C,I2C SCL,Ext Int Ch 0 (dup),GPIO9,PIC_DBG_DATA_IN,?..."
|
|
bitfld.long 0x08 10. " DIR ,GPIO9 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 9. " INV ,Controls the inversion function of the GPIO9 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " PUDIS ,Controls the GPIO9 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3.--5. " FUNC ,GPIO8 Function" "DCD/TXC UART C,Ext DMA Done Ch 1,Ext Timer Event Out Ch 8,GPIO8,SPI EN(dup),?..."
|
|
bitfld.long 0x08 2. " DIR ,GPIO8 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INV ,Controls the inversion function of the GPIO8 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PUDIS ,Controls the GPIO8 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x0c "GPIOCONF3,GPIO Configuration Register 3"
|
|
bitfld.long 0x0c 27.--29. " FUNC ,GPIO15 Function" "TXD UART C,Ext Timer Event In Ch 9,PIC_0_CAN_TXD,GPIO15,SPI EN(boot),?..."
|
|
bitfld.long 0x0c 26. " DIR ,GPIO15 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " INV ,Controls the inversion function of the GPIO15 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " PUDIS ,Controls the GPIO15 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19.--21. " FUNC ,GPIO14 Function" "TXC/DTR UART C,DMA Req Ch 1,PIC_0_CAN_RXD,GPIO14,SPI TXD(boot),?..."
|
|
bitfld.long 0x0c 18. " DIR ,GPIO14 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 17. " INV ,Controls the inversion function of the GPIO14 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16. " PUDIS ,Controls the GPIO14 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 11.--13. " FUNC ,GPIO13 Function" "RXC/RTS/RS485 Control UART C,QDCQ,Ext Timer Event Out Ch 9,GPIO13,SPI CLK(boot),?..."
|
|
bitfld.long 0x0c 10. " DIR ,GPIO13 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " INV ,Controls the inversion function of the GPIO13 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " PUDIS ,Controls the GPIO13 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 3.--5. " FUNC ,GPIO12 Function" "RXC/RI UART C,I2C SDA,RESET_DONE,GPIO12,SPI CLK(dup),?..."
|
|
bitfld.long 0x0c 2. " DIR ,GPIO12 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " INV ,Controls the inversion function of the GPIO12 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " PUDIS ,Controls the GPIO12 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x10 "GPIOCONF4,GPIO Configuration Register 4"
|
|
bitfld.long 0x10 27.--29. " FUNC ,GPIO19 Function" "DATA3,RXD UART B,EXT INT CH 3 (dup),GPIO19,?..."
|
|
bitfld.long 0x10 26. " DIR ,GPIO19 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 25. " INV ,Controls the inversion function of the GPIO19 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " PUDIS ,Controls the GPIO19 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 19.--21. " FUNC ,GPIO18 Function" "DATA2,DSR UART B,Ext Int Ch 2 (dup),GPIO18,?..."
|
|
bitfld.long 0x10 18. " DIR ,GPIO18 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 17. " INV ,Controls the inversion function of the GPIO18 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " PUDIS ,Controls the GPIO18 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FUNC ,GPIO17 Function" "DATA1,CTS UART B,Ext Int Ch 1 (dup),GPIO17,?..."
|
|
bitfld.long 0x10 10. " DIR ,GPIO17 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 9. " INV ,Controls the inversion function of the GPIO17 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " PUDIS ,Controls the GPIO17 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " FUNC ,GPIO16 Function" "DATA0,DCD UART B,Ext Int Ch 0 (dup),GPIO16,?..."
|
|
bitfld.long 0x10 2. " DIR ,GPIO16 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 1. " INV ,Controls the inversion function of the GPIO16 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " PUDIS ,Controls the GPIO16 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x14 "GPIOCONF5,GPIO Configuration Register 5"
|
|
bitfld.long 0x14 27.--29. " FUNC ,GPIO23 Function" "DATA7,TXD UART B,PIC_1_CAN_RXD,GPIO23,?..."
|
|
bitfld.long 0x14 26. " DIR ,GPIO23 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 25. " INV ,Controls the inversion function of the GPIO23 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " PUDIS ,Controls the GPIO23 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 19.--21. " FUNC ,GPIO22 Function" "DATA6,TXC/DTR UART B,Ext DMA Done Ch 1 (dup),GPIO22,?..."
|
|
bitfld.long 0x14 18. " DIR ,GPIO22 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 17. " INV ,Controls the inversion function of the GPIO22 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " PUDIS ,Controls the GPIO22 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 11.--13. " FUNC ,GPIO21 Function" "DATA5,RTS/RS485 Control UART B,Ext DMA Pden Ch 0 (dup),GPIO21,?..."
|
|
bitfld.long 0x14 10. " DIR ,GPIO21 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 9. " INV ,Controls the inversion function of the GPIO21 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PUDIS ,Controls the GPIO21 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 3.--5. " FUNC ,GPIO20 Function" "DATA4,RI UART B,Ext DMA Done Ch 0 (dup),GPIO20,?..."
|
|
bitfld.long 0x14 2. " DIR ,GPIO20 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 1. " INV ,Controls the inversion function of the GPIO20 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " PUDIS ,Controls the GPIO20 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x18 "GPIOCONG6,GPIO Configuration Register 6"
|
|
bitfld.long 0x18 27.--29. " FUNC ,GPIO27 Function" "DATA11,RXD UART D,PIC_1_GEN_IO[1],GPIO27,?..."
|
|
bitfld.long 0x18 26. " DIR ,GPIO27 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 25. " INV ,Controls the inversion function of the GPIO27 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " PUDIS ,Controls the GPIO27 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 19.--21. " FUNC ,GPIO26 Function" "DATA10,DSR UART D,PIC_1_GEN_IO[0],GPIO26,?..."
|
|
bitfld.long 0x18 18. " DIR ,GPIO26 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 17. " INV ,Controls the inversion function of the GPIO26 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 16. " PUDIS ,Controls the GPIO26 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 11.--13. " FUNC ,GPIO25 Function" "DATA9,CTS UART D,RESET OUT(dup),GPIO25,?..."
|
|
bitfld.long 0x18 10. " DIR ,GPIO25 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 9. " INV ,Controls the inversion function of the GPIO25 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PUDIS ,Controls the GPIO25 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 3.--5. " FUNC ,GPIO24 Function" "DATA8,DCD UART D,PIC_1_CAN_TXD,GPIO24,?..."
|
|
bitfld.long 0x18 2. " DIR ,GPIO24 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 1. " INV ,Controls the inversion function of the GPIO24 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " PUDIS ,Controls the GPIO24 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x1c "GPIOCONF7,GPIO Configuration Register 7"
|
|
bitfld.long 0x1c 27.--29. " FUNC ,GPIO31 Function" "DATA15,TXD UART D,Reserved,GPIO31,?..."
|
|
bitfld.long 0x1c 26. " DIR ,GPIO31 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 25. " INV ,Controls the inversion function of the GPIO31 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 24. " PUDIS ,Controls the GPIO31 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 19.--21. " FUNC ,GPIO30 Function" "DATA14,TXC/DTR UART D,Reserved,GPIO30,?..."
|
|
bitfld.long 0x1c 18. " DIR ,GPIO30 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 17. " INV ,Controls the inversion function of the GPIO30 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16. " PUDIS ,Controls the GPIO30 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 11.--13. " FUNC ,GPIO29 Function" "DATA13,RTS/RS485 Control UART D,PIC_1_GEN_IO[3],GPIO29,?..."
|
|
bitfld.long 0x1c 10. " DIR ,GPIO29 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " INV ,Controls the inversion function of the GPIO29 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 8. " PUDIS ,Controls the GPIO29 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 3.--5. " FUNC ,GPIO28 Function" "DATA12,RI UART D,PIC_1_GEN_IO[2],GPIO28,?..."
|
|
bitfld.long 0x1c 2. " DIR ,GPIO28 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " INV ,Controls the inversion function of the GPIO28 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 0. " PUDIS ,Controls the GPIO28 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x20 "GPIOCONF8,GPIO Configuration Register 8"
|
|
bitfld.long 0x20 27.--29. " FUNC ,GPIO35 Function" "Ethernet MII MDIO,PIC_0_GEN_IO[3] (dup),Reserved,GPIO35,?..."
|
|
bitfld.long 0x20 26. " DIR ,GPIO35 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 25. " INV ,Controls the inversion function of the GPIO35 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " PUDIS ,Controls the GPIO35 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 19.--21. " FUNC ,GPIO34 Function" "Ethernet MII RXC,PIC_0_GEN_IO[2] (dup),Reserved,GPIO34,?..."
|
|
bitfld.long 0x20 18. " DIR ,GPIO34 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 17. " INV ,Controls the inversion function of the GPIO34 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " PUDIS ,Controls the GPIO34 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 11.--13. " FUNC ,GPIO33 Function" "Ethernet MII TXC,PIC_0_GEN_IO[1] (dup),Reserved,GPIO33,?..."
|
|
bitfld.long 0x20 10. " DIR ,GPIO33 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 9. " INV ,Controls the inversion function of the GPIO33 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " PUDIS ,Controls the GPIO33 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 3.--5. " FUNC ,GPIO32 Function" "Ethernet MII MDC,PIC_0_GEN_IO[0],Reserved,GPIO32,?..."
|
|
bitfld.long 0x20 2. " DIR ,GPIO32 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 1. " INV ,Controls the inversion function of the GPIO32 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " PUDIS ,Controls the GPIO32 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x24 "GPIOCONF9,GPIO Configuration Register 9"
|
|
bitfld.long 0x24 27.--29. " FUNC ,GPIO39 Function" "Ethernet MII RXD[1],PIC_0_GEN_IO[7] (dup),Reserved,GPIO39,?..."
|
|
bitfld.long 0x24 26. " DIR ,GPIO39 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 25. " INV ,Controls the inversion function of the GPIO39 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 24. " PUDIS ,Controls the GPIO39 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 19.--21. " FUNC ,GPIO38 Function" "Ethernet MII RXD[0],PIC_0_GEN_IO[6] (dup),Reserved,GPIO38,?..."
|
|
bitfld.long 0x24 18. " DIR ,GPIO38 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 17. " INV ,Controls the inversion function of the GPIO38 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 16. " PUDIS ,Controls the GPIO38 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 11.--13. " FUNC ,GPIO37 Function" "Ethernet MII RX ER,PIC_0_GEN_IO[5] (dup),Reserved,GPIO37,?..."
|
|
bitfld.long 0x24 10. " DIR ,GPIO37 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 9. " INV ,Controls the inversion function of the GPIO37 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " PUDIS ,Controls the GPIO37 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 3.--5. " FUNC ,GPIO36 Function" "Ethernet MII RX DV,PIC_0_GEN_IO[4] (dup),Reserved,GPIO36,?..."
|
|
bitfld.long 0x24 2. " DIR ,GPIO36 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 1. " INV ,Controls the inversion function of the GPIO36 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " PUDIS ,Controls the GPIO36 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x28 "GPIOCONF10,GPIO Configuration Register 10"
|
|
bitfld.long 0x28 27.--29. " FUNC ,GPIO43 Function" "Ethernet MII TX ER,PIC_1_GEN_IO[3] (dup),Reserved,GPIO43,?..."
|
|
bitfld.long 0x28 26. " DIR ,GPIO43 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 25. " INV ,Controls the inversion function of the GPIO43 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 24. " PUDIS ,Controls the GPIO43 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 19.--21. " FUNC ,GPIO42 Function" "Ethernet MII TX EN,PIC_1_GEN_IO[2] (dup),Reserved,GPIO42,?..."
|
|
bitfld.long 0x28 18. " DIR ,GPIO42 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 17. " INV ,Controls the inversion function of the GPIO42 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " PUDIS ,Controls the GPIO42 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 11.--13. " FUNC ,GPIO41 Function" "Ethernet MII RXD[3],PIC_1_GEN_IO[1] (dup),Reserved,GPIO41,?..."
|
|
bitfld.long 0x28 10. " DIR ,GPIO41 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 9. " INV ,Controls the inversion function of the GPIO41 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " PUDIS ,Controls the GPIO41 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 3.--5. " FUNC ,GPIO40 Function" "Ethernet MII RXD [2],PIC_1_GEN_IO[0] (dup),Reserved,GPIO40,?..."
|
|
bitfld.long 0x28 2. " DIR ,GPIO40 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 1. " INV ,Controls the inversion function of the GPIO40 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " PUDIS ,Controls the GPIO40 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x2c "GPIOCONF11,GPIO Configuration Register 11"
|
|
bitfld.long 0x2c 27.--29. " FUNC ,GPIO47 Function" "Ethernet MII TXD[3],PIC_1_GEN_IO[7] (dup),Reserved,GPIO47,?..."
|
|
bitfld.long 0x2c 26. " DIR ,GPIO47 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 25. " INV ,Controls the inversion function of the GPIO47 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 24. " PUDIS ,Controls the GPIO47 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 19.--21. " FUNC ,GPIO46 Function" "Ethernet MII TXD[2],PIC_1_GEN_IO[6] (dup),Reserved,GPIO46,?..."
|
|
bitfld.long 0x2c 18. " DIR ,GPIO46 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 17. " INV ,Controls the inversion function of the GPIO46 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 16. " PUDIS ,Controls the GPIO46 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 11.--13. " FUNC ,GPIO45 Function" "Ethernet MII TXD[1],PIC_1_GEN_IO[5] (dup),Reserved,GPIO45,?..."
|
|
bitfld.long 0x2c 10. " DIR ,GPIO45 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 9. " INV ,Controls the inversion function of the GPIO45 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 8. " PUDIS ,Controls the GPIO45 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 3.--5. " FUNC ,GPIO44 Function" "Ethernet MII TXD[0],PIC_1_GEN_IO[4] (dup),Reserved,GPIO44,?..."
|
|
bitfld.long 0x2c 2. " DIR ,GPIO44 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 1. " INV ,Controls the inversion function of the GPIO44 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 0. " PUDIS ,Controls the GPIO44 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x30 "GPIOCONF12,GPIO Configuration Register 12"
|
|
bitfld.long 0x30 11.--13. " FUNC ,GPIO49 Function" "Ethernet MII CRS,Reserved,Reserved,GPIO49,?..."
|
|
bitfld.long 0x30 10. " DIR ,GPIO49 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 9. " INV ,Controls the inversion function of the GPIO49 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " PUDIS ,Controls the GPIO49 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x30 3.--5. " FUNC ,GPIO48 Function" "Ethernet MII COL,Reserved,Reserved,GPIO48,?..."
|
|
bitfld.long 0x30 2. " DIR ,GPIO48 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 1. " INV ,Controls the inversion function of the GPIO48 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " PUDIS ,Controls the GPIO48 pin pullup resistor operation" "Enabled,Disabled"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "GPIOCONF13,GPIO Configuration Register 13"
|
|
bitfld.long 0x00 27.--29. " FUNC ,GPIOA3 Function" "ADDR27,Reserved,UART_REFCLK,GPIO_A3 Endian,?..."
|
|
bitfld.long 0x00 26. " DIR ,GPIOA3 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INV ,Controls the inversion function of the GPIOA3 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUDIS ,Controls the GPIOA3 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " FUNC ,GPIOA2 Function" "ADDR26,Reserved,Ext Int Ch 2 (dup),GPIO_A2 SPI Boot,?..."
|
|
bitfld.long 0x00 18. " DIR ,GPIOA2 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INV ,Controls the inversion function of the GPIOA2 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PUDIS ,Controls the GPIOA2 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " FUNC ,GPIOA1 Function" "ADDR25,I2C SDA(dup),Ext Int Ch 1 (dup),GPIO_A1,?..."
|
|
bitfld.long 0x00 10. " DIR ,GPIOA1 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INV ,Controls the inversion function of the GPIOA1 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUDIS ,Controls the GPIOA1 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " FUNC ,GPIOA0 Function" "ADDR24,I2C SCL(dup),Ext Int Ch 0 (dup),GPIO_A0 Boot Width [1],?..."
|
|
bitfld.long 0x00 2. " DIR ,GPIOA0 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INV ,Controls the inversion function of the GPIOA0 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUDIS ,Controls the GPIOA0 pin pullup resistor operation" "Enabled,Disabled"
|
|
width 13.
|
|
group.long 0x6c++0x07
|
|
line.long 0x00 "GPIOCTRL0,GPIO Control Register 0"
|
|
bitfld.long 0x00 31. " GPIO31 ,GPIO[31] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " GPIO30 ,GPIO[30] control bit" "Low,High"
|
|
bitfld.long 0x00 29. " GPIO29 ,GPIO[29] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " GPIO28 ,GPIO[28] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPIO27 ,GPIO[27] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " GPIO26 ,GPIO[26] control bit" "Low,High"
|
|
bitfld.long 0x00 25. " GPIO25 ,GPIO[25] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " GPIO24 ,GPIO[24] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPIO23 ,GPIO[23] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " GPIO22 ,GPIO[22] control bit" "Low,High"
|
|
bitfld.long 0x00 21. " GPIO21 ,GPIO[21] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " GPIO20 ,GPIO[20] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPIO19 ,GPIO[19] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " GPIO18 ,GPIO[18] control bit" "Low,High"
|
|
bitfld.long 0x00 17. " GPIO17 ,GPIO[17] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " GPIO16 ,GPIO[16] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO15 ,GPIO[15] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " GPIO14 ,GPIO[14] control bit" "Low,High"
|
|
bitfld.long 0x00 13. " GPIO13 ,GPIO[13] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " GPIO12 ,GPIO[12] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPIO11 ,GPIO[11] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO10 ,GPIO[10] control bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO9 ,GPIO[9] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO8 ,GPIO[8] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPIO7 ,GPIO[7] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " GPIO6 ,GPIO[6] control bit" "Low,High"
|
|
bitfld.long 0x00 5. " GPIO5 ,GPIO[5] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " GPIO4 ,GPIO[4] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO3 ,GPIO[3] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " GPIO2 ,GPIO[2] control bit" "Low,High"
|
|
bitfld.long 0x00 1. " GPIO1 ,GPIO[1] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " GPIO0 ,GPIO[0] control bit" "Low,High"
|
|
line.long 0x04 "GPIOCTRL1,GPIO Control Register 1"
|
|
bitfld.long 0x04 17. " GPIO49 ,GPIO[49] control bit" "Low,High"
|
|
bitfld.long 0x04 16. " GPIO48 ,GPIO[48] control bit" "Low,High"
|
|
bitfld.long 0x04 15. " GPIO47 ,GPIO[47] control bit" "Low,High"
|
|
bitfld.long 0x04 14. " GPIO46 ,GPIO[46] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPIO45 ,GPIO[45] control bit" "Low,High"
|
|
bitfld.long 0x04 12. " GPIO44 ,GPIO[44] control bit" "Low,High"
|
|
bitfld.long 0x04 11. " GPIO43 ,GPIO[43] control bit" "Low,High"
|
|
bitfld.long 0x04 10. " GPIO42 ,GPIO[42] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 9. " GPIO41 ,GPIO[41] control bit" "Low,High"
|
|
bitfld.long 0x04 8. " GPIO40 ,GPIO[40] control bit" "Low,High"
|
|
bitfld.long 0x04 7. " GPIO39 ,GPIO[39] control bit" "Low,High"
|
|
bitfld.long 0x04 6. " GPIO38 ,GPIO[38] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 5. " GPIO37 ,GPIO[37] control bit" "Low,High"
|
|
bitfld.long 0x04 4. " GPIO36 ,GPIO[36] control bit" "Low,High"
|
|
bitfld.long 0x04 3. " GPIO35 ,GPIO[35] control bit" "Low,High"
|
|
bitfld.long 0x04 2. " GPIO34 ,GPIO[34] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPIO33 ,GPIO[33] control bit" "Low,High"
|
|
bitfld.long 0x04 0. " GPIO32 ,GPIO[32] control bit" "Low,High"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "GPIOCTRL2,GPIO Control Register 2"
|
|
bitfld.long 0x00 11. " GPIO_A3 ,GPIO[A3] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO_A2 ,GPIO[A2] control bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO_A1 ,GPIO[A1] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO_A0 ,GPIO[A0] control bit" "Low,High"
|
|
rgroup.long 0x7c++0x07
|
|
line.long 0x00 "GPIOSTATUS0,GPIO Status Register 0"
|
|
bitfld.long 0x00 31. " GPIO31 ,GPIO[31] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " GPIO30 ,GPIO[30] status bit" "Low,High"
|
|
bitfld.long 0x00 29. " GPIO29 ,GPIO[29] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " GPIO28 ,GPIO[28] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPIO27 ,GPIO[27] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " GPIO26 ,GPIO[26] status bit" "Low,High"
|
|
bitfld.long 0x00 25. " GPIO25 ,GPIO[25] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " GPIO24 ,GPIO[24] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPIO23 ,GPIO[23] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " GPIO22 ,GPIO[22] status bit" "Low,High"
|
|
bitfld.long 0x00 21. " GPIO21 ,GPIO[21] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " GPIO20 ,GPIO[20] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPIO19 ,GPIO[19] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " GPIO18 ,GPIO[18] status bit" "Low,High"
|
|
bitfld.long 0x00 17. " GPIO17 ,GPIO[17] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " GPIO16 ,GPIO[16] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO15 ,GPIO[15] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " GPIO14 ,GPIO[14] status bit" "Low,High"
|
|
bitfld.long 0x00 13. " GPIO13 ,GPIO[13] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " GPIO12 ,GPIO[12] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPIO11 ,GPIO[11] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO10 ,GPIO[10] status bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO9 ,GPIO[9] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO8 ,GPIO[8] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPIO7 ,GPIO[7] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " GPIO6 ,GPIO[6] status bit" "Low,High"
|
|
bitfld.long 0x00 5. " GPIO5 ,GPIO[5] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " GPIO4 ,GPIO[4] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO3 ,GPIO[3] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " GPIO2 ,GPIO[2] status bit" "Low,High"
|
|
bitfld.long 0x00 1. " GPIO1 ,GPIO[1] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " GPIO0 ,GPIO[0] status bit" "Low,High"
|
|
line.long 0x04 "GPIOSTATUS1,GPIO Status Register 1"
|
|
bitfld.long 0x04 17. " GPIO49 ,GPIO[49] status bit" "Low,High"
|
|
bitfld.long 0x04 16. " GPIO48 ,GPIO[48] status bit" "Low,High"
|
|
bitfld.long 0x04 15. " GPIO47 ,GPIO[47] status bit" "Low,High"
|
|
bitfld.long 0x04 14. " GPIO46 ,GPIO[46] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPIO45 ,GPIO[45] status bit" "Low,High"
|
|
bitfld.long 0x04 12. " GPIO44 ,GPIO[44] status bit" "Low,High"
|
|
bitfld.long 0x04 11. " GPIO43 ,GPIO[43] status bit" "Low,High"
|
|
bitfld.long 0x04 10. " GPIO42 ,GPIO[42] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 9. " GPIO41 ,GPIO[41] status bit" "Low,High"
|
|
bitfld.long 0x04 8. " GPIO40 ,GPIO[40] status bit" "Low,High"
|
|
bitfld.long 0x04 7. " GPIO39 ,GPIO[39] status bit" "Low,High"
|
|
bitfld.long 0x04 6. " GPIO38 ,GPIO[38] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 5. " GPIO37 ,GPIO[37] status bit" "Low,High"
|
|
bitfld.long 0x04 4. " GPIO36 ,GPIO[36] status bit" "Low,High"
|
|
bitfld.long 0x04 3. " GPIO35 ,GPIO[35] status bit" "Low,High"
|
|
bitfld.long 0x04 2. " GPIO34 ,GPIO[34] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPIO33 ,GPIO[33] status bit" "Low,High"
|
|
bitfld.long 0x04 0. " GPIO32 ,GPIO[32] status bit" "Low,High"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "GPIOSTATUS2,GPIO Status Register 2"
|
|
bitfld.long 0x00 11. " GPIO_A3 ,GPIO[A3] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO_A2 ,GPIO[A2] status bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO_A1 ,GPIO[A1] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO_A0 ,GPIO[A0] status bit" "Low,High"
|
|
width 13.
|
|
group.long 0x8c++0x03
|
|
line.long 0x00 "MEMBUSCONF,Memory Bus Configuration Register"
|
|
bitfld.long 0x00 25. " APUDIS ,Address bus pullup control" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " DHPUDIS ,High data bus pullup control" "Enabled,Disabled"
|
|
bitfld.long 0x00 12.--14. " CS4 ,Controls which system memory chip select is routed to CS4" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CS3 ,Control which system memory chip select is routed to CS3" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 6.--8. " CS2 ,Controls which system memory chip select is routed to CS2" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 3.--5. " CS1 ,Controls which system memory chip select is routed to CS1" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " CS0 ,Controls which system memory chip select is routed to CS0" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
width 0xb
|
|
elif (cpu()=="NS9215")
|
|
width 13.
|
|
group.long 0x00++0x6B
|
|
line.long 0x00 "GPIOCONF0,GPIO Configuration Register 0"
|
|
bitfld.long 0x00 27.--29. " FUNC ,GPIO3 Function" "RXD UART A,Ext DMA Pden Ch 0,PIC_0_GEN_IO[3],GPIO3,SPI RXD(dup),?..."
|
|
bitfld.long 0x00 26. " DIR ,GPIO3 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INV ,Controls the inversion function of the GPIO3 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUDIS ,Controls the GPIO3 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " FUNC ,GPIO2 Function" "DSR UART A,Ext Int 1,PIC_0_GEN_IO[2],GPIO2,?..."
|
|
bitfld.long 0x00 18. " DIR ,GPIO2 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INV ,Controls the inversion function of the GPIO2 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PUDIS ,Controls the GPIO2 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " FUNC ,GPIO1 Function" "CTS UART A,Ext Int 0,PIC_0_GEN_IO[1],GPIO1,?..."
|
|
bitfld.long 0x00 10. " DIR ,GPIO1 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INV ,Controls the inversion function of the GPIO1 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUDIS ,Controls the GPIO1 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " FUNC ,GPIO0 Function" "DCD UART A,Ext DMA Done Ch 0,PIC_0_GEN_IO[0],GPIO0,SPI EN (dup),?..."
|
|
bitfld.long 0x00 2. " DIR ,GPIO0 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INV ,Controls the inversion function of the GPIO0 pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUDIS ,Controls the GPIO0 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x04 "GPIOCONF1,GPIO Configuration Register 1"
|
|
bitfld.long 0x04 27.--29. " FUNC ,GPIO7 Function" "TXD UART A,Ext Timer Event In Ch 8,Ext Timer Event Out Ch 7,GPIO7,SPI TXD(dup),?..."
|
|
bitfld.long 0x04 26. " DIR ,GPIO7 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " INV ,Controls the inversion function of the GPIO7 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PUDIS ,Controls the GPIO7 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19.--21. " FUNC ,GPIO6 Function" "TXC/DTR UART A,Ext DMA Req Ch 0,Ext Timer Event In Ch 7,GPIO6,PIC_DBG_DATA_OUT,?..."
|
|
bitfld.long 0x04 18. " DIR ,GPIO6 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 17. " INV ,Controls the inversion function of the GPIO6 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PUDIS ,Controls the GPIO6 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11.--13. " FUNC ,GPIO5 Function" "RTS/RS485 Control UART A,Ext Int Ch 3,Ext Timer Event Out Ch 6,GPIO5,SPI CLK(dup),?..."
|
|
bitfld.long 0x04 10. " DIR ,GPIO5 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 9. " INV ,Controls the inversion function of the GPIO5 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PUDIS ,Controls the GPIO5 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3.--5. " FUNC ,GPIO4 Function" "RI UART A,Ext Int Ch 2,Ext Timer Event In Ch 6,GPIO4,SPI CLK(dup),?..."
|
|
bitfld.long 0x04 2. " DIR ,GPIO4 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " INV ,Controls the inversion function of the GPIO4 pin" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PUDIS ,Controls the GPIO4 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x08 "GPIOCONF2,GPIO Configuration Register 2"
|
|
bitfld.long 0x08 27.--29. " FUNC ,GPIO11 Function" "RXD UART C,Ext DMA Pden Ch 1,Ext Int Ch 2 (dup),GPIO11,SPI RXD(boot),?..."
|
|
bitfld.long 0x08 26. " DIR ,GPIO11 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 25. " INV ,Controls the inversion function of the GPIO11 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " PUDIS ,Controls the GPIO11 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19.--21. " FUNC ,GPIO10 Function" "DSR UART C,QDC 1,Ext Int Ch 1 (dup),GPIO10,PIC_DBG_CLK,?..."
|
|
bitfld.long 0x08 18. " DIR ,GPIO10 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 17. " INV ,Controls the inversion function of the GPIO10 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PUDIS ,Controls the GPIO10 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11.--13. " FUNC ,GPIO9 Function" "CTS UART C,I2C SCL,Ext Int Ch 0 (dup),GPIO9,PIC_DBG_DATA_IN,?..."
|
|
bitfld.long 0x08 10. " DIR ,GPIO9 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 9. " INV ,Controls the inversion function of the GPIO9 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " PUDIS ,Controls the GPIO9 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3.--5. " FUNC ,GPIO8 Function" "DCD/TXC UART C,Ext DMA Done Ch 1,Ext Timer Event Out Ch 8,GPIO8,SPI EN(dup),?..."
|
|
bitfld.long 0x08 2. " DIR ,GPIO8 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INV ,Controls the inversion function of the GPIO8 pin" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PUDIS ,Controls the GPIO8 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x0c "GPIOCONF3,GPIO Configuration Register 3"
|
|
bitfld.long 0x0c 27.--29. " FUNC ,GPIO15 Function" "TXD UART C,Ext Timer Event In Ch 9,PIC_0_CAN_TXD,GPIO15,SPI EN(boot),?..."
|
|
bitfld.long 0x0c 26. " DIR ,GPIO15 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " INV ,Controls the inversion function of the GPIO15 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " PUDIS ,Controls the GPIO15 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19.--21. " FUNC ,GPIO14 Function" "TXC/DTR UART C,DMA Req Ch 1,PIC_0_CAN_RXD,GPIO14,SPI TXD(boot),?..."
|
|
bitfld.long 0x0c 18. " DIR ,GPIO14 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 17. " INV ,Controls the inversion function of the GPIO14 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16. " PUDIS ,Controls the GPIO14 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 11.--13. " FUNC ,GPIO13 Function" "RXC/RTS/RS485 Control UART C,QDCQ,Ext Timer Event Out Ch 9,GPIO13,SPI CLK(boot),?..."
|
|
bitfld.long 0x0c 10. " DIR ,GPIO13 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " INV ,Controls the inversion function of the GPIO13 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " PUDIS ,Controls the GPIO13 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0c 3.--5. " FUNC ,GPIO12 Function" "RXC/RI UART C,I2C SDA,RESET_DONE,GPIO12,SPI CLK(dup),?..."
|
|
bitfld.long 0x0c 2. " DIR ,GPIO12 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " INV ,Controls the inversion function of the GPIO12 pin" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " PUDIS ,Controls the GPIO12 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x10 "GPIOCONF4,GPIO Configuration Register 4"
|
|
bitfld.long 0x10 27.--29. " FUNC ,GPIO19 Function" "DATA3,RXD UART B,EXT INT CH 3 (dup),GPIO19,?..."
|
|
bitfld.long 0x10 26. " DIR ,GPIO19 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 25. " INV ,Controls the inversion function of the GPIO19 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " PUDIS ,Controls the GPIO19 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 19.--21. " FUNC ,GPIO18 Function" "DATA2,DSR UART B,Ext Int Ch 2 (dup),GPIO18,?..."
|
|
bitfld.long 0x10 18. " DIR ,GPIO18 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 17. " INV ,Controls the inversion function of the GPIO18 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " PUDIS ,Controls the GPIO18 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FUNC ,GPIO17 Function" "DATA1,CTS UART B,Ext Int Ch 1 (dup),GPIO17,?..."
|
|
bitfld.long 0x10 10. " DIR ,GPIO17 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 9. " INV ,Controls the inversion function of the GPIO17 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " PUDIS ,Controls the GPIO17 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " FUNC ,GPIO16 Function" "DATA0,DCD UART B,Ext Int Ch 0 (dup),GPIO16,?..."
|
|
bitfld.long 0x10 2. " DIR ,GPIO16 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x10 1. " INV ,Controls the inversion function of the GPIO16 pin" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " PUDIS ,Controls the GPIO16 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x14 "GPIOCONF5,GPIO Configuration Register 5"
|
|
bitfld.long 0x14 27.--29. " FUNC ,GPIO23 Function" "DATA7,TXD UART B,PIC_1_CAN_RXD,GPIO23,?..."
|
|
bitfld.long 0x14 26. " DIR ,GPIO23 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 25. " INV ,Controls the inversion function of the GPIO23 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " PUDIS ,Controls the GPIO23 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 19.--21. " FUNC ,GPIO22 Function" "DATA6,TXC/DTR UART B,Ext DMA Done Ch 1 (dup),GPIO22,?..."
|
|
bitfld.long 0x14 18. " DIR ,GPIO22 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 17. " INV ,Controls the inversion function of the GPIO22 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " PUDIS ,Controls the GPIO22 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 11.--13. " FUNC ,GPIO21 Function" "DATA5,RTS/RS485 Control UART B,Ext DMA Pden Ch 0 (dup),GPIO21,?..."
|
|
bitfld.long 0x14 10. " DIR ,GPIO21 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 9. " INV ,Controls the inversion function of the GPIO21 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PUDIS ,Controls the GPIO21 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 3.--5. " FUNC ,GPIO20 Function" "DATA4,RI UART B,Ext DMA Done Ch 0 (dup),GPIO20,?..."
|
|
bitfld.long 0x14 2. " DIR ,GPIO20 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x14 1. " INV ,Controls the inversion function of the GPIO20 pin" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " PUDIS ,Controls the GPIO20 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x18 "GPIOCONG6,GPIO Configuration Register 6"
|
|
bitfld.long 0x18 27.--29. " FUNC ,GPIO27 Function" "DATA11,RXD UART D,PIC_1_GEN_IO[1],GPIO27,?..."
|
|
bitfld.long 0x18 26. " DIR ,GPIO27 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 25. " INV ,Controls the inversion function of the GPIO27 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " PUDIS ,Controls the GPIO27 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 19.--21. " FUNC ,GPIO26 Function" "DATA10,DSR UART D,PIC_1_GEN_IO[0],GPIO26,?..."
|
|
bitfld.long 0x18 18. " DIR ,GPIO26 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 17. " INV ,Controls the inversion function of the GPIO26 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 16. " PUDIS ,Controls the GPIO26 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 11.--13. " FUNC ,GPIO25 Function" "DATA9,CTS UART D,RESET OUT(dup),GPIO25,?..."
|
|
bitfld.long 0x18 10. " DIR ,GPIO25 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 9. " INV ,Controls the inversion function of the GPIO25 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PUDIS ,Controls the GPIO25 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 3.--5. " FUNC ,GPIO24 Function" "DATA8,DCD UART D,PIC_1_CAN_TXD,GPIO24,?..."
|
|
bitfld.long 0x18 2. " DIR ,GPIO24 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x18 1. " INV ,Controls the inversion function of the GPIO24 pin" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " PUDIS ,Controls the GPIO24 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x1c "GPIOCONF7,GPIO Configuration Register 7"
|
|
bitfld.long 0x1c 27.--29. " FUNC ,GPIO31 Function" "DATA15,TXD UART D,Reserved,GPIO31,?..."
|
|
bitfld.long 0x1c 26. " DIR ,GPIO31 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 25. " INV ,Controls the inversion function of the GPIO31 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 24. " PUDIS ,Controls the GPIO31 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 19.--21. " FUNC ,GPIO30 Function" "DATA14,TXC/DTR UART D,Reserved,GPIO30,?..."
|
|
bitfld.long 0x1c 18. " DIR ,GPIO30 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 17. " INV ,Controls the inversion function of the GPIO30 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16. " PUDIS ,Controls the GPIO30 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 11.--13. " FUNC ,GPIO29 Function" "DATA13,RTS/RS485 Control UART D,PIC_1_GEN_IO[3],GPIO29,?..."
|
|
bitfld.long 0x1c 10. " DIR ,GPIO29 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " INV ,Controls the inversion function of the GPIO29 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 8. " PUDIS ,Controls the GPIO29 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1c 3.--5. " FUNC ,GPIO28 Function" "DATA12,RI UART D,PIC_1_GEN_IO[2],GPIO28,?..."
|
|
bitfld.long 0x1c 2. " DIR ,GPIO28 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " INV ,Controls the inversion function of the GPIO28 pin" "Disabled,Enabled"
|
|
bitfld.long 0x1c 0. " PUDIS ,Controls the GPIO28 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x20 "GPIOCONF8,GPIO Configuration Register 8"
|
|
bitfld.long 0x20 27.--29. " FUNC ,GPIO35 Function" "Ethernet MII MDIO,PIC_0_GEN_IO[3] (dup),Reserved,GPIO35,?..."
|
|
bitfld.long 0x20 26. " DIR ,GPIO35 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 25. " INV ,Controls the inversion function of the GPIO35 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " PUDIS ,Controls the GPIO35 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 19.--21. " FUNC ,GPIO34 Function" "Ethernet MII RXC,PIC_0_GEN_IO[2] (dup),Reserved,GPIO34,?..."
|
|
bitfld.long 0x20 18. " DIR ,GPIO34 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 17. " INV ,Controls the inversion function of the GPIO34 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " PUDIS ,Controls the GPIO34 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 11.--13. " FUNC ,GPIO33 Function" "Ethernet MII TXC,PIC_0_GEN_IO[1] (dup),Reserved,GPIO33,?..."
|
|
bitfld.long 0x20 10. " DIR ,GPIO33 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 9. " INV ,Controls the inversion function of the GPIO33 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " PUDIS ,Controls the GPIO33 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 3.--5. " FUNC ,GPIO32 Function" "Ethernet MII MDC,PIC_0_GEN_IO[0],Reserved,GPIO32,?..."
|
|
bitfld.long 0x20 2. " DIR ,GPIO32 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x20 1. " INV ,Controls the inversion function of the GPIO32 pin" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " PUDIS ,Controls the GPIO32 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x24 "GPIOCONF9,GPIO Configuration Register 9"
|
|
bitfld.long 0x24 27.--29. " FUNC ,GPIO39 Function" "Ethernet MII RXD[1],PIC_0_GEN_IO[7] (dup),Reserved,GPIO39,?..."
|
|
bitfld.long 0x24 26. " DIR ,GPIO39 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 25. " INV ,Controls the inversion function of the GPIO39 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 24. " PUDIS ,Controls the GPIO39 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 19.--21. " FUNC ,GPIO38 Function" "Ethernet MII RXD[0],PIC_0_GEN_IO[6] (dup),Reserved,GPIO38,?..."
|
|
bitfld.long 0x24 18. " DIR ,GPIO38 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 17. " INV ,Controls the inversion function of the GPIO38 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 16. " PUDIS ,Controls the GPIO38 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 11.--13. " FUNC ,GPIO37 Function" "Ethernet MII RX ER,PIC_0_GEN_IO[5] (dup),Reserved,GPIO37,?..."
|
|
bitfld.long 0x24 10. " DIR ,GPIO37 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 9. " INV ,Controls the inversion function of the GPIO37 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " PUDIS ,Controls the GPIO37 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 3.--5. " FUNC ,GPIO36 Function" "Ethernet MII RX DV,PIC_0_GEN_IO[4] (dup),Reserved,GPIO36,?..."
|
|
bitfld.long 0x24 2. " DIR ,GPIO36 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x24 1. " INV ,Controls the inversion function of the GPIO36 pin" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " PUDIS ,Controls the GPIO36 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x28 "GPIOCONF10,GPIO Configuration Register 10"
|
|
bitfld.long 0x28 27.--29. " FUNC ,GPIO43 Function" "Ethernet MII TX ER,PIC_1_GEN_IO[3] (dup),Reserved,GPIO43,?..."
|
|
bitfld.long 0x28 26. " DIR ,GPIO43 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 25. " INV ,Controls the inversion function of the GPIO43 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 24. " PUDIS ,Controls the GPIO43 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 19.--21. " FUNC ,GPIO42 Function" "Ethernet MII TX EN,PIC_1_GEN_IO[2] (dup),Reserved,GPIO42,?..."
|
|
bitfld.long 0x28 18. " DIR ,GPIO42 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 17. " INV ,Controls the inversion function of the GPIO42 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " PUDIS ,Controls the GPIO42 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 11.--13. " FUNC ,GPIO41 Function" "Ethernet MII RXD[3],PIC_1_GEN_IO[1] (dup),Reserved,GPIO41,?..."
|
|
bitfld.long 0x28 10. " DIR ,GPIO41 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 9. " INV ,Controls the inversion function of the GPIO41 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " PUDIS ,Controls the GPIO41 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 3.--5. " FUNC ,GPIO40 Function" "Ethernet MII RXD [2],PIC_1_GEN_IO[0] (dup),Reserved,GPIO40,?..."
|
|
bitfld.long 0x28 2. " DIR ,GPIO40 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x28 1. " INV ,Controls the inversion function of the GPIO40 pin" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " PUDIS ,Controls the GPIO40 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x2c "GPIOCONF11,GPIO Configuration Register 11"
|
|
bitfld.long 0x2c 27.--29. " FUNC ,GPIO47 Function" "Ethernet MII TXD[3],PIC_1_GEN_IO[7] (dup),Reserved,GPIO47,?..."
|
|
bitfld.long 0x2c 26. " DIR ,GPIO47 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 25. " INV ,Controls the inversion function of the GPIO47 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 24. " PUDIS ,Controls the GPIO47 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 19.--21. " FUNC ,GPIO46 Function" "Ethernet MII TXD[2],PIC_1_GEN_IO[6] (dup),Reserved,GPIO46,?..."
|
|
bitfld.long 0x2c 18. " DIR ,GPIO46 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 17. " INV ,Controls the inversion function of the GPIO46 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 16. " PUDIS ,Controls the GPIO46 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 11.--13. " FUNC ,GPIO45 Function" "Ethernet MII TXD[1],PIC_1_GEN_IO[5] (dup),Reserved,GPIO45,?..."
|
|
bitfld.long 0x2c 10. " DIR ,GPIO45 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 9. " INV ,Controls the inversion function of the GPIO45 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 8. " PUDIS ,Controls the GPIO45 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2c 3.--5. " FUNC ,GPIO44 Function" "Ethernet MII TXD[0],PIC_1_GEN_IO[4] (dup),Reserved,GPIO44,?..."
|
|
bitfld.long 0x2c 2. " DIR ,GPIO44 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x2c 1. " INV ,Controls the inversion function of the GPIO44 pin" "Disabled,Enabled"
|
|
bitfld.long 0x2c 0. " PUDIS ,Controls the GPIO44 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x30 "GPIOCONF12,GPIO Configuration Register 12"
|
|
bitfld.long 0x30 27.--29. " FUNC ,GPIO51 Function" "DCD UART B (dup),PIC_0_BUS_1[8](I/O),PIC_1_BUS_1[8](I/O),GPIO51,?..."
|
|
bitfld.long 0x30 26. " DIR ,GPIO51 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 25. " INV ,Controls the inversion function of the GPIO51 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 24. " PUDIS ,Controls the GPIO51 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x30 19.--21. " FUNC ,GPIO50 Function" "Ethernet MII PHY Int,PIC_1_CLK(I),PIC_1_CLK(O),GPIO50,?..."
|
|
bitfld.long 0x30 18. " DIR ,GPIO50 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 17. " INV ,Controls the inversion function of the GPIO50 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 16. " PUDIS ,Controls the GPIO50 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x30 11.--13. " FUNC ,GPIO49 Function" "Ethernet MII CRS,Reserved,Reserved,GPIO49,?..."
|
|
bitfld.long 0x30 10. " DIR ,GPIO49 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 9. " INV ,Controls the inversion function of the GPIO49 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " PUDIS ,Controls the GPIO49 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x30 3.--5. " FUNC ,GPIO48 Function" "Ethernet MII COL,Reserved,Reserved,GPIO48,?..."
|
|
bitfld.long 0x30 2. " DIR ,GPIO48 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x30 1. " INV ,Controls the inversion function of the GPIO48 pin" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " PUDIS ,Controls the GPIO48 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x34 "GPIOCONF13,GPIO Configuration Register 13"
|
|
bitfld.long 0x34 27.--29. " FUNC ,GPIO55 Function" "RI UART B (dup),PIC_0_BUS_1[12](I/O),PIC_1_BUS_1[12](I/O),GPIO55,?..."
|
|
bitfld.long 0x34 26. " DIR ,GPIO55 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x34 25. " INV ,Controls the inversion function of the GPIO55 pin" "Disabled,Enabled"
|
|
bitfld.long 0x34 24. " PUDIS ,Controls the GPIO55 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x34 19.--21. " FUNC ,GPIO54 Function" "RXD UART B (dup),RXD UART B (dup),PIC_1_BUS_1[11](I/O),GPIO54,?..."
|
|
bitfld.long 0x34 18. " DIR ,GPIO54 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x34 17. " INV ,Controls the inversion function of the GPIO54 pin" "Disabled,Enabled"
|
|
bitfld.long 0x34 16. " PUDIS ,Controls the GPIO54 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x34 11.--13. " FUNC ,GPIO53 Function" "DSR UART B (dup),PIC_0_BUS_1[10](I/O),PIC_1_BUS_1[10](I/O),GPIO53,?..."
|
|
bitfld.long 0x34 10. " DIR ,GPIO53 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x34 9. " INV ,Controls the inversion function of the GPIO53 pin" "Disabled,Enabled"
|
|
bitfld.long 0x34 8. " PUDIS ,Controls the GPIO53 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x34 3.--5. " FUNC ,GPIO52 Function" "CTS UART B (dup),PIC_0_BUS_1[9](I/O),PIC_1_BUS_1[9](I/O),GPIO52,?..."
|
|
bitfld.long 0x34 2. " DIR ,GPIO52 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x34 1. " INV ,Controls the inversion function of the GPIO52 pin" "Disabled,Enabled"
|
|
bitfld.long 0x34 0. " PUDIS ,Controls the GPIO52 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x38 "GPIOCONF14,GPIO Configuration Register 14"
|
|
bitfld.long 0x38 27.--29. " FUNC ,GPIO59 Function" "DCD UART D (dup),PIC_0_BUS_1[16](I/O),PIC_1_BUS_1[16](I/O),GPIO59,?..."
|
|
bitfld.long 0x38 26. " DIR ,GPIO59 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x38 25. " INV ,Controls the inversion function of the GPIO59 pin" "Disabled,Enabled"
|
|
bitfld.long 0x38 24. " PUDIS ,Controls the GPIO59 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x38 19.--21. " FUNC ,GPIO58 Function" "TXD UART B (dup),PIC_0_BUS_1[15](I/O),PIC_1_BUS_1[15](I/O),GPIO58,?..."
|
|
bitfld.long 0x38 18. " DIR ,GPIO58 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x38 17. " INV ,Controls the inversion function of the GPIO58 pin" "Disabled,Enabled"
|
|
bitfld.long 0x38 16. " PUDIS ,Controls the GPIO58 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x38 11.--13. " FUNC ,GPIO57 Function" "TXC/DTR UART B (dup),PIC_0_BUS_1[14](I/O),PIC_1_BUS_1[14](I/O),GPIO57,?..."
|
|
bitfld.long 0x38 10. " DIR ,GPIO57 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x38 9. " INV ,Controls the inversion function of the GPIO57 pin" "Disabled,Enabled"
|
|
bitfld.long 0x38 8. " PUDIS ,Controls the GPIO57 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x38 3.--5. " FUNC ,GPIO56 Function" "RTS/RS485 Control UART B (dup),PIC_0_BUS_1[13](I/O),PIC_1_BUS_1[13](I/O),GPIO56,?..."
|
|
bitfld.long 0x38 2. " DIR ,GPIO56 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x38 1. " INV ,Controls the inversion function of the GPIO56 pin" "Disabled,Enabled"
|
|
bitfld.long 0x38 0. " PUDIS ,Controls the GPIO56 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x3C "GPIOCONF15,GPIO Configuration Register 15"
|
|
bitfld.long 0x3C 27.--29. " FUNC ,GPIO63 Function" "RI UART D (dup),PIC_0_BUS_1[20](I/O),PIC_1_BUS_1[20](I/O),GPIO63,?..."
|
|
bitfld.long 0x3C 26. " DIR ,GPIO63 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " INV ,Controls the inversion function of the GPIO63 pin" "Disabled,Enabled"
|
|
bitfld.long 0x3C 24. " PUDIS ,Controls the GPIO63 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x3C 19.--21. " FUNC ,GPIO62 Function" "RXD UART D (dup),PIC_0_BUS_1[19](I/O),PIC_1_BUS_1[19](I/O),GPIO62,?..."
|
|
bitfld.long 0x3C 18. " DIR ,GPIO62 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x3C 17. " INV ,Controls the inversion function of the GPIO62 pin" "Disabled,Enabled"
|
|
bitfld.long 0x3C 16. " PUDIS ,Controls the GPIO62 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x3C 11.--13. " FUNC ,GPIO61 Function" "DSR UART D (dup),PIC_0_BUS_1[18](I/O),PIC_1_BUS_1[18](I/O),GPIO61,?..."
|
|
bitfld.long 0x3C 10. " DIR ,GPIO61 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x3C 9. " INV ,Controls the inversion function of the GPIO61 pin" "Disabled,Enabled"
|
|
bitfld.long 0x3C 8. " PUDIS ,Controls the GPIO61 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x3C 3.--5. " FUNC ,GPIO60 Function" "CTS UART D (dup),PIC_0_BUS_1[17](I/O),PIC_1_BUS_1[17](I/O),GPIO60,?..."
|
|
bitfld.long 0x3C 2. " DIR ,GPIO60 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " INV ,Controls the inversion function of the GPIO60 pin" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0. " PUDIS ,Controls the GPIO60 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x40 "GPIOCONF16,GPIO Configuration Register 16"
|
|
bitfld.long 0x40 27.--29. " FUNC ,GPIO67 Function" "PIC_0_CLK(I),PIC_0_CLK(O),Ext Int Ch 3 (dup),GPIO67,?..."
|
|
bitfld.long 0x40 26. " DIR ,GPIO67 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x40 25. " INV ,Controls the inversion function of the GPIO67 pin" "Disabled,Enabled"
|
|
bitfld.long 0x40 24. " PUDIS ,Controls the GPIO67 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x40 19.--21. " FUNC ,GPIO66 Function" "TXD UART D (dup),PIC_0_BUS_1[23](I/O),PIC_1_BUS_1[23](I/O),GPIO66,?..."
|
|
bitfld.long 0x40 18. " DIR ,GPIO66 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x40 17. " INV ,Controls the inversion function of the GPIO66 pin" "Disabled,Enabled"
|
|
bitfld.long 0x40 16. " PUDIS ,Controls the GPIO66 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x40 11.--13. " FUNC ,GPIO65 Function" "TXC/DTR UART D (dup),PIC_0_BUS_1[22](I/O),PIC_1_BUS_1[22](I/O),GPIO65,?..."
|
|
bitfld.long 0x40 10. " DIR ,GPIO65 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x40 9. " INV ,Controls the inversion function of the GPIO65 pin" "Disabled,Enabled"
|
|
bitfld.long 0x40 8. " PUDIS ,Controls the GPIO65 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x40 3.--5. " FUNC ,GPIO64 Function" "RTS/R5485 Control UART D (dup),PIC_0_BUS_1[21](I/O),PIC_1_BUS_1[21](I/O),GPIO64,?..."
|
|
bitfld.long 0x40 2. " DIR ,GPIO64 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x40 1. " INV ,Controls the inversion function of the GPIO64 pin" "Disabled,Enabled"
|
|
bitfld.long 0x40 0. " PUDIS ,Controls the GPIO64 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x44 "GPIOCONF17,GPIO Configuration Register 17"
|
|
bitfld.long 0x44 27.--29. " FUNC ,GPIO71 Function" "PIC_0_GEN_IO[3](I/O)(dup),PIC_1_GEN_IO[3](I/O),PWM Ch 1,GPIO71,?..."
|
|
bitfld.long 0x44 26. " DIR ,GPIO71 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x44 25. " INV ,Controls the inversion function of the GPIO71 pin" "Disabled,Enabled"
|
|
bitfld.long 0x44 24. " PUDIS ,Controls the GPIO71 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x44 19.--21. " FUNC ,GPIO70 Function" "PIC_0_GEN_IO[2](I/O)(dup),PIC_1_GEN_IO[2](I/O),PWM Ch 0,GPIO70,?..."
|
|
bitfld.long 0x44 18. " DIR ,GPIO70 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x44 17. " INV ,Controls the inversion function of the GPIO70 pin" "Disabled,Enabled"
|
|
bitfld.long 0x44 16. " PUDIS ,Controls the GPIO70 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x44 11.--13. " FUNC ,GPIO69 Function" "PIC_0_GEN_IO[1](I/O)(dup),PIC_1_GEN_IO[1](I/O),PIC_1_CAN_TXD(O)(dup),GPIO69,?..."
|
|
bitfld.long 0x44 10. " DIR ,GPIO69 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x44 9. " INV ,Controls the inversion function of the GPIO69 pin" "Disabled,Enabled"
|
|
bitfld.long 0x44 8. " PUDIS ,Controls the GPIO69 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x44 3.--5. " FUNC ,GPIO68 Function" "PIC_0_GEN_IO[0](I/O)(dup),PIC_1_GEN_IO[0](I/O),PIC_1_CAN_RXD(I)(dup),GPIO68,?..."
|
|
bitfld.long 0x44 2. " DIR ,GPIO68 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x44 1. " INV ,Controls the inversion function of the GPIO68 pin" "Disabled,Enabled"
|
|
bitfld.long 0x44 0. " PUDIS ,Controls the GPIO68 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x48 "GPIOCONF18,GPIO Configuration Register 18"
|
|
bitfld.long 0x48 27.--29. " FUNC ,GPIO75 Function" "PIC_0_GEN_IO[7](I/O),PIC_1_GEN_IO[7](I/O),Ext Timer Event in Ch 1,GPIO75,?..."
|
|
bitfld.long 0x48 26. " DIR ,GPIO75 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x48 25. " INV ,Controls the inversion function of the GPIO75 pin" "Disabled,Enabled"
|
|
bitfld.long 0x48 24. " PUDIS ,Controls the GPIO75 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x48 19.--21. " FUNC ,GPIO74 Function" "PIC_0_GEN_IO[6](I/O),PIC_1_GEN_IO[6](I/O),Ext Timer Event In Ch 0,GPIO74,?..."
|
|
bitfld.long 0x48 18. " DIR ,GPIO74 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x48 17. " INV ,Controls the inversion function of the GPIO74 pin" "Disabled,Enabled"
|
|
bitfld.long 0x48 16. " PUDIS ,Controls the GPIO74 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x48 11.--13. " FUNC ,GPIO73 Function" "PIC_0_GEN_IO[5](I/O),PIC_1_GEN_IO[5](I/O),PWM Ch 3,GPIO73,?..."
|
|
bitfld.long 0x48 10. " DIR ,GPIO73 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x48 9. " INV ,Controls the inversion function of the GPIO73 pin" "Disabled,Enabled"
|
|
bitfld.long 0x48 8. " PUDIS ,Controls the GPIO73 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x48 3.--5. " FUNC ,GPIO72 Function" "PIC_0_GEN_IO[4](I/O),PIC_1_GEN_IO[4](I/O),PWM Ch 2,GPIO72,?..."
|
|
bitfld.long 0x48 2. " DIR ,GPIO72 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x48 1. " INV ,Controls the inversion function of the GPIO72 pin" "Disabled,Enabled"
|
|
bitfld.long 0x48 0. " PUDIS ,Controls the GPIO72 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x4C "GPIOCONF19,GPIO Configuration Register 19"
|
|
bitfld.long 0x4C 27.--29. " FUNC ,GPIO79 Function" "PIC_0_CTL_IO[3](I/O),PIC_1_CTL_IO[3](I/O),Ext Timer Event in Ch 5,GPIO79,?..."
|
|
bitfld.long 0x4C 26. " DIR ,GPIO79 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x4C 25. " INV ,Controls the inversion function of the GPIO79 pin" "Disabled,Enabled"
|
|
bitfld.long 0x4C 24. " PUDIS ,Controls the GPIO79 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x4C 19.--21. " FUNC ,GPIO78 Function" "PIC_0_CTL_IO[2](I/O),PIC_1_CTL_IO[2](I/O),Ext Timer Event in Ch 4,GPIO78,?..."
|
|
bitfld.long 0x4C 18. " DIR ,GPIO78 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x4C 17. " INV ,Controls the inversion function of the GPIO78 pin" "Disabled,Enabled"
|
|
bitfld.long 0x4C 16. " PUDIS ,Controls the GPIO78 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x4C 11.--13. " FUNC ,GPIO77 Function" "PIC_0_CTL_IO[1](I/O),PIC_1_CTL_IO[1](I/O),Ext Timer Event in Ch 3,GPIO77,?..."
|
|
bitfld.long 0x4C 10. " DIR ,GPIO77 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x4C 9. " INV ,Controls the inversion function of the GPIO77 pin" "Disabled,Enabled"
|
|
bitfld.long 0x4C 8. " PUDIS ,Controls the GPIO77 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x4C 3.--5. " FUNC ,GPIO76 Function" "PIC_0_CTL_IO[0](I/O),PIC_1_CTL_IO[0](I/O),Ext Timer Event in Ch 2,GPIO76,?..."
|
|
bitfld.long 0x4C 2. " DIR ,GPIO76 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x4C 1. " INV ,Controls the inversion function of the GPIO76 pin" "Disabled,Enabled"
|
|
bitfld.long 0x4C 0. " PUDIS ,Controls the GPIO76 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x50 "GPIOCONF20,GPIO Configuration Register 20"
|
|
bitfld.long 0x50 27.--29. " FUNC ,GPIO83 Function" "PIC_0_BUS_0[3](I/O),PIC_1_BUS_0[3](I/O),Ext Timer Event in Ch 9 (dup),GPIO83,?..."
|
|
bitfld.long 0x50 26. " DIR ,GPIO83 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x50 25. " INV ,Controls the inversion function of the GPIO83 pin" "Disabled,Enabled"
|
|
bitfld.long 0x50 24. " PUDIS ,Controls the GPIO83 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x50 19.--21. " FUNC ,GPIO82 Function" "PIC_0_BUS_0[2](I/O),PIC_1_BUS_0[2](I/O),Ext Timer Event in Ch 8 (dup),GPIO82,?..."
|
|
bitfld.long 0x50 18. " DIR ,GPIO82 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x50 17. " INV ,Controls the inversion function of the GPIO82 pin" "Disabled,Enabled"
|
|
bitfld.long 0x50 16. " PUDIS ,Controls the GPIO82 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x50 11.--13. " FUNC ,GPIO81 Function" "PIC_0_BUS_0[1](I/O),PIC_1_BUS_0[1](I/O),Ext Timer Event in Ch 7(dup),GPIO81,?..."
|
|
bitfld.long 0x50 10. " DIR ,GPIO81 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x50 9. " INV ,Controls the inversion function of the GPIO81 pin" "Disabled,Enabled"
|
|
bitfld.long 0x50 8. " PUDIS ,Controls the GPIO81 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x50 3.--5. " FUNC ,GPIO80 Function" "PIC_0_BUS_0[0](I/O),PIC_1_BUS_0[0](I/O),Ext Timer Event in Ch 6 (dup),GPIO80,?..."
|
|
bitfld.long 0x50 2. " DIR ,GPIO80 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x50 1. " INV ,Controls the inversion function of the GPIO80 pin" "Disabled,Enabled"
|
|
bitfld.long 0x50 0. " PUDIS ,Controls the GPIO80 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x54 "GPIOCONF21,GPIO Configuration Register 21"
|
|
bitfld.long 0x54 27.--29. " FUNC ,GPIO87 Function" "PIC_0_BUS_0[7](I/O),PIC_1_BUS_0[7](I/O),Ext Timer Event Out Ch 3,GPIO87,?..."
|
|
bitfld.long 0x54 26. " DIR ,GPIO87 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x54 25. " INV ,Controls the inversion function of the GPIO87 pin" "Disabled,Enabled"
|
|
bitfld.long 0x54 24. " PUDIS ,Controls the GPIO87 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x54 19.--21. " FUNC ,GPIO86 Function" "PIC_0_BUS_0[6](I/O),PIC_1_BUS_0[6](I/O),Ext Timer Event Out Ch 2,GPIO86,?..."
|
|
bitfld.long 0x54 18. " DIR ,GPIO86 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x54 17. " INV ,Controls the inversion function of the GPIO86 pin" "Disabled,Enabled"
|
|
bitfld.long 0x54 16. " PUDIS ,Controls the GPIO86 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x54 11.--13. " FUNC ,GPIO85 Function" "PIC_0_BUS_0[5](I/O),PIC_1_BUS_0[5](I/O),Ext Timer Event Out Ch 1,GPIO85,?..."
|
|
bitfld.long 0x54 10. " DIR ,GPIO85 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x54 9. " INV ,Controls the inversion function of the GPIO85 pin" "Disabled,Enabled"
|
|
bitfld.long 0x54 8. " PUDIS ,Controls the GPIO85 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x54 3.--5. " FUNC ,GPIO84 Function" "PIC_0_BUS_0[4](I/O),PIC_1_BUS_0[4](I/O),Ext Timer Event Out Ch 0,GPIO84,?..."
|
|
bitfld.long 0x54 2. " DIR ,GPIO84 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x54 1. " INV ,Controls the inversion function of the GPIO84 pin" "Disabled,Enabled"
|
|
bitfld.long 0x54 0. " PUDIS ,Controls the GPIO84 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x58 "GPIOCONF22,GPIO Configuration Register 22"
|
|
bitfld.long 0x58 27.--29. " FUNC ,GPIO91 Function" "PIC_0_BUS_0[11](I/O),PIC_1_BUS_0[11](I/O),Ext Timer Event Out Ch 7,GPIO91,?..."
|
|
bitfld.long 0x58 26. " DIR ,GPIO91 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x58 25. " INV ,Controls the inversion function of the GPIO91 pin" "Disabled,Enabled"
|
|
bitfld.long 0x58 24. " PUDIS ,Controls the GPIO91 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x58 19.--21. " FUNC ,GPIO90 Function" "PIC_0_BUS_0[10](I/O),PIC_1_BUS_0[10](I/O),Ext Timer Event Out Ch 6,GPIO90,?..."
|
|
bitfld.long 0x58 18. " DIR ,GPIO90 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x58 17. " INV ,Controls the inversion function of the GPIO90 pin" "Disabled,Enabled"
|
|
bitfld.long 0x58 16. " PUDIS ,Controls the GPIO90 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x58 11.--13. " FUNC ,GPIO89 Function" "PIC_0_BUS_0[9](I/O),PIC_1_BUS_0[9](I/O),Ext Timer Event Out Ch 5,GPIO89,?..."
|
|
bitfld.long 0x58 10. " DIR ,GPIO89 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x58 9. " INV ,Controls the inversion function of the GPIO89 pin" "Disabled,Enabled"
|
|
bitfld.long 0x58 8. " PUDIS ,Controls the GPIO89 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x58 3.--5. " FUNC ,GPIO88 Function" "PIC_0_BUS_0[8](I/O),PIC_1_BUS_0[8](I/O),Ext Timer Event Out Ch 4,GPIO88,?..."
|
|
bitfld.long 0x58 2. " DIR ,GPIO88 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x58 1. " INV ,Controls the inversion function of the GPIO88 pin" "Disabled,Enabled"
|
|
bitfld.long 0x58 0. " PUDIS ,Controls the GPIO88 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x5C "GPIOCONF23,GPIO Configuration Register 23"
|
|
bitfld.long 0x5C 27.--29. " FUNC ,GPIO95 Function" "PIC_0_BUS_0[15](I/O),PIC_1_BUS_0[15](I/O),QDC Q (dup),GPIO95,?..."
|
|
bitfld.long 0x5C 26. " DIR ,GPIO95 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 25. " INV ,Controls the inversion function of the GPIO95 pin" "Disabled,Enabled"
|
|
bitfld.long 0x5C 24. " PUDIS ,Controls the GPIO95 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x5C 19.--21. " FUNC ,GPIO94 Function" "PIC_0_BUS_0[14](I/O),PIC_1_BUS_0[14](I/O),QDC I (dup),GPIO94,?..."
|
|
bitfld.long 0x5C 18. " DIR ,GPIO94 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 17. " INV ,Controls the inversion function of the GPIO94 pin" "Disabled,Enabled"
|
|
bitfld.long 0x5C 16. " PUDIS ,Controls the GPIO94 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x5C 11.--13. " FUNC ,GPIO93 Function" "PIC_0_BUS_0[13](I/O),PIC_1_BUS_0[13](I/O),Ext Timer Event Out Ch 9,GPIO93,?..."
|
|
bitfld.long 0x5C 10. " DIR ,GPIO93 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 9. " INV ,Controls the inversion function of the GPIO93 pin" "Disabled,Enabled"
|
|
bitfld.long 0x5C 8. " PUDIS ,Controls the GPIO93 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x5C 3.--5. " FUNC ,GPIO92 Function" "PIC_0_BUS_0[12](I/O),PIC_1_BUS_0[12](I/O),Ext Timer Event Out Ch 8,GPIO92,?..."
|
|
bitfld.long 0x5C 2. " DIR ,GPIO92 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 1. " INV ,Controls the inversion function of the GPIO92 pin" "Disabled,Enabled"
|
|
bitfld.long 0x5C 0. " PUDIS ,Controls the GPIO92 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x60 "GPIOCONF24,GPIO Configuration Register 24"
|
|
bitfld.long 0x60 27.--29. " FUNC ,GPIO99 Function" "PIC_0_BUS_1[3](I/O),PIC_1_BUS_1[3](I/O),PIC_1_CAN_TXD(O)(dup),GPIO99,?..."
|
|
bitfld.long 0x60 26. " DIR ,GPIO99 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x60 25. " INV ,Controls the inversion function of the GPIO99 pin" "Disabled,Enabled"
|
|
bitfld.long 0x60 24. " PUDIS ,Controls the GPIO99 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x60 19.--21. " FUNC ,GPIO98 Function" "PIC_0_BUS_1[2](I/O),PIC_1_BUS_1[2](I/O),PIC_1_CAN_RXD(I)(dup),GPIO98,?..."
|
|
bitfld.long 0x60 18. " DIR ,GPIO98 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x60 17. " INV ,Controls the inversion function of the GPIO98 pin" "Disabled,Enabled"
|
|
bitfld.long 0x60 16. " PUDIS ,Controls the GPIO98 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x60 11.--13. " FUNC ,GPIO97 Function" "PIC_0_BUS_1[1](I/O),PIC_1_BUS_1[1](I/O),PIC_0_CAN_TXD(O)(dup),GPIO97,?..."
|
|
bitfld.long 0x60 10. " DIR ,GPIO97 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x60 9. " INV ,Controls the inversion function of the GPIO97 pin" "Disabled,Enabled"
|
|
bitfld.long 0x60 8. " PUDIS ,Controls the GPIO97 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x60 3.--5. " FUNC ,GPIO96 Function" "PIC_0_BUS_1[0](I/O),PIC_1_BUS_1[0](I/O),PIC_0_CAN_RXD(I)(dup),GPIO96,?..."
|
|
bitfld.long 0x60 2. " DIR ,GPIO96 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x60 1. " INV ,Controls the inversion function of the GPIO96 pin" "Disabled,Enabled"
|
|
bitfld.long 0x60 0. " PUDIS ,Controls the GPIO96 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x64 "GPIOCONF25,GPIO Configuration Register 25"
|
|
bitfld.long 0x64 27.--29. " FUNC ,GPIO103 Function" "PIC_0_BUS_1[7](I/O),PIC_1_BUS_1[7](I/O),I2C SDA (dup),GPIO103,?..."
|
|
bitfld.long 0x64 26. " DIR ,GPIO103 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x64 25. " INV ,Controls the inversion function of the GPIO103 pin" "Disabled,Enabled"
|
|
bitfld.long 0x64 24. " PUDIS ,Controls the GPIO103 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x64 19.--21. " FUNC ,GPIO102 Function" "PIC_0_BUS_1[6](I/O),PIC_1_BUS_1[6](I/O),I2C SCL (dup),GPIO102,?..."
|
|
bitfld.long 0x64 18. " DIR ,GPIO102 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x64 17. " INV ,Controls the inversion function of the GPIO102 pin" "Disabled,Enabled"
|
|
bitfld.long 0x64 16. " PUDIS ,Controls the GPIO102 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x64 11.--13. " FUNC ,GPIO101 Function" "PIC_0_BUS_1[5](I/O),PIC_1_BUS_1[5](I/O),Ext Int Ch 3 (dup),GPIO101,?..."
|
|
bitfld.long 0x64 10. " DIR ,GPIO101 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x64 9. " INV ,Controls the inversion function of the GPIO101 pin" "Disabled,Enabled"
|
|
bitfld.long 0x64 8. " PUDIS ,Controls the GPIO101 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x64 3.--5. " FUNC ,GPIO100 Function" "PIC_0_BUS_1[4](I/O),PIC_1_BUS_1[4](I/O),PWM Ch 4,GPIO100,?..."
|
|
bitfld.long 0x64 2. " DIR ,GPIO100 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x64 1. " INV ,Controls the inversion function of the GPIO100 pin" "Disabled,Enabled"
|
|
bitfld.long 0x64 0. " PUDIS ,Controls the GPIO100 pin pullup resistor operation" "Enabled,Disabled"
|
|
line.long 0x68 "GPIOCONF26,GPIO Configuration Register 26"
|
|
bitfld.long 0x68 27.--29. " FUNC ,GPIOA3 Function" "ADDR27,Reserved,UART_REFCLK,GPIO_A3 Endian,?..."
|
|
bitfld.long 0x68 26. " DIR ,GPIOA3 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x68 25. " INV ,Controls the inversion function of the GPIOA3 pin" "Disabled,Enabled"
|
|
bitfld.long 0x68 24. " PUDIS ,Controls the GPIOA3 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x68 19.--21. " FUNC ,GPIOA2 Function" "ADDR26,Reserved,Ext Int Ch 2 (dup),GPIO_A2 SPI Boot,?..."
|
|
bitfld.long 0x68 18. " DIR ,GPIOA2 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x68 17. " INV ,Controls the inversion function of the GPIOA2 pin" "Disabled,Enabled"
|
|
bitfld.long 0x68 16. " PUDIS ,Controls the GPIOA2 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x68 11.--13. " FUNC ,GPIOA1 Function" "ADDR25,I2C SDA(dup),Ext Int Ch 1 (dup),GPIO_A1,?..."
|
|
bitfld.long 0x68 10. " DIR ,GPIOA1 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x68 9. " INV ,Controls the inversion function of the GPIOA1 pin" "Disabled,Enabled"
|
|
bitfld.long 0x68 8. " PUDIS ,Controls the GPIOA1 pin pullup resistor operation" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x68 3.--5. " FUNC ,GPIOA0 Function" "ADDR24,I2C SCL(dup),Ext Int Ch 0 (dup),GPIO_A0 Boot Width [1],?..."
|
|
bitfld.long 0x68 2. " DIR ,GPIOA0 Input/Output" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x68 1. " INV ,Controls the inversion function of the GPIOA0 pin" "Disabled,Enabled"
|
|
bitfld.long 0x68 0. " PUDIS ,Controls the GPIOA0 pin pullup resistor operation" "Enabled,Disabled"
|
|
width 13.
|
|
group.long 0x6c++0x0F
|
|
line.long 0x00 "GPIOCTRL0,GPIO Control Register 0"
|
|
bitfld.long 0x00 31. " GPIO31 ,GPIO[31] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " GPIO30 ,GPIO[30] control bit" "Low,High"
|
|
bitfld.long 0x00 29. " GPIO29 ,GPIO[29] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " GPIO28 ,GPIO[28] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPIO27 ,GPIO[27] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " GPIO26 ,GPIO[26] control bit" "Low,High"
|
|
bitfld.long 0x00 25. " GPIO25 ,GPIO[25] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " GPIO24 ,GPIO[24] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPIO23 ,GPIO[23] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " GPIO22 ,GPIO[22] control bit" "Low,High"
|
|
bitfld.long 0x00 21. " GPIO21 ,GPIO[21] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " GPIO20 ,GPIO[20] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPIO19 ,GPIO[19] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " GPIO18 ,GPIO[18] control bit" "Low,High"
|
|
bitfld.long 0x00 17. " GPIO17 ,GPIO[17] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " GPIO16 ,GPIO[16] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO15 ,GPIO[15] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " GPIO14 ,GPIO[14] control bit" "Low,High"
|
|
bitfld.long 0x00 13. " GPIO13 ,GPIO[13] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " GPIO12 ,GPIO[12] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPIO11 ,GPIO[11] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO10 ,GPIO[10] control bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO9 ,GPIO[9] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO8 ,GPIO[8] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPIO7 ,GPIO[7] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " GPIO6 ,GPIO[6] control bit" "Low,High"
|
|
bitfld.long 0x00 5. " GPIO5 ,GPIO[5] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " GPIO4 ,GPIO[4] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO3 ,GPIO[3] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " GPIO2 ,GPIO[2] control bit" "Low,High"
|
|
bitfld.long 0x00 1. " GPIO1 ,GPIO[1] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " GPIO0 ,GPIO[0] control bit" "Low,High"
|
|
line.long 0x04 "GPIOCTRL1,GPIO Control Register 1"
|
|
bitfld.long 0x04 31. " GPIO63 ,GPIO[63] control bit" "Low,High"
|
|
bitfld.long 0x04 30. " GPIO62 ,GPIO[62] control bit" "Low,High"
|
|
bitfld.long 0x04 29. " GPIO61 ,GPIO[61] control bit" "Low,High"
|
|
bitfld.long 0x04 28. " GPIO60 ,GPIO[60] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPIO59 ,GPIO[59] control bit" "Low,High"
|
|
bitfld.long 0x04 26. " GPIO58 ,GPIO[58] control bit" "Low,High"
|
|
bitfld.long 0x04 25. " GPIO57 ,GPIO[57] control bit" "Low,High"
|
|
bitfld.long 0x04 24. " GPIO56 ,GPIO[56] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPIO55 ,GPIO[55] control bit" "Low,High"
|
|
bitfld.long 0x04 22. " GPIO54 ,GPIO[54] control bit" "Low,High"
|
|
bitfld.long 0x04 21. " GPIO53 ,GPIO[53] control bit" "Low,High"
|
|
bitfld.long 0x04 20. " GPIO52 ,GPIO[52] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPIO51 ,GPIO[51] control bit" "Low,High"
|
|
bitfld.long 0x04 18. " GPIO50 ,GPIO[50] control bit" "Low,High"
|
|
bitfld.long 0x04 17. " GPIO49 ,GPIO[49] control bit" "Low,High"
|
|
bitfld.long 0x04 16. " GPIO48 ,GPIO[48] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPIO47 ,GPIO[47] control bit" "Low,High"
|
|
bitfld.long 0x04 14. " GPIO46 ,GPIO[46] control bit" "Low,High"
|
|
bitfld.long 0x04 13. " GPIO45 ,GPIO[45] control bit" "Low,High"
|
|
bitfld.long 0x04 12. " GPIO44 ,GPIO[44] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPIO43 ,GPIO[43] control bit" "Low,High"
|
|
bitfld.long 0x04 10. " GPIO42 ,GPIO[42] control bit" "Low,High"
|
|
bitfld.long 0x04 9. " GPIO41 ,GPIO[41] control bit" "Low,High"
|
|
bitfld.long 0x04 8. " GPIO40 ,GPIO[40] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPIO39 ,GPIO[39] control bit" "Low,High"
|
|
bitfld.long 0x04 6. " GPIO38 ,GPIO[38] control bit" "Low,High"
|
|
bitfld.long 0x04 5. " GPIO37 ,GPIO[37] control bit" "Low,High"
|
|
bitfld.long 0x04 4. " GPIO36 ,GPIO[36] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPIO35 ,GPIO[35] control bit" "Low,High"
|
|
bitfld.long 0x04 2. " GPIO34 ,GPIO[34] control bit" "Low,High"
|
|
bitfld.long 0x04 1. " GPIO33 ,GPIO[33] control bit" "Low,High"
|
|
bitfld.long 0x04 0. " GPIO32 ,GPIO[32] control bit" "Low,High"
|
|
line.long 0x08 "GPIOCTRL2,GPIO Control Register 2"
|
|
bitfld.long 0x08 31. " GPIO95 ,GPIO[95] control bit" "Low,High"
|
|
bitfld.long 0x08 30. " GPIO94 ,GPIO[94] control bit" "Low,High"
|
|
bitfld.long 0x08 29. " GPIO93 ,GPIO[93] control bit" "Low,High"
|
|
bitfld.long 0x08 28. " GPIO92 ,GPIO[92] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 27. " GPIO91 ,GPIO[91] control bit" "Low,High"
|
|
bitfld.long 0x08 26. " GPIO90 ,GPIO[90] control bit" "Low,High"
|
|
bitfld.long 0x08 25. " GPIO89 ,GPIO[89] control bit" "Low,High"
|
|
bitfld.long 0x08 24. " GPIO88 ,GPIO[88] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 23. " GPIO87 ,GPIO[87] control bit" "Low,High"
|
|
bitfld.long 0x08 22. " GPIO86 ,GPIO[86] control bit" "Low,High"
|
|
bitfld.long 0x08 21. " GPIO85 ,GPIO[85] control bit" "Low,High"
|
|
bitfld.long 0x08 20. " GPIO84 ,GPIO[84] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " GPIO83 ,GPIO[83] control bit" "Low,High"
|
|
bitfld.long 0x08 18. " GPIO82 ,GPIO[82] control bit" "Low,High"
|
|
bitfld.long 0x08 17. " GPIO81 ,GPIO[81] control bit" "Low,High"
|
|
bitfld.long 0x08 16. " GPIO80 ,GPIO[80] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " GPIO79 ,GPIO[79] control bit" "Low,High"
|
|
bitfld.long 0x08 14. " GPIO78 ,GPIO[78] control bit" "Low,High"
|
|
bitfld.long 0x08 13. " GPIO77 ,GPIO[77] control bit" "Low,High"
|
|
bitfld.long 0x08 12. " GPIO76 ,GPIO[76] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPIO75 ,GPIO[75] control bit" "Low,High"
|
|
bitfld.long 0x08 10. " GPIO74 ,GPIO[74] control bit" "Low,High"
|
|
bitfld.long 0x08 9. " GPIO73 ,GPIO[73] control bit" "Low,High"
|
|
bitfld.long 0x08 8. " GPIO72 ,GPIO[72] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPIO71 ,GPIO[71] control bit" "Low,High"
|
|
bitfld.long 0x08 6. " GPIO70 ,GPIO[70] control bit" "Low,High"
|
|
bitfld.long 0x08 5. " GPIO69 ,GPIO[69] control bit" "Low,High"
|
|
bitfld.long 0x08 4. " GPIO68 ,GPIO[68] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPIO67 ,GPIO[67] control bit" "Low,High"
|
|
bitfld.long 0x08 2. " GPIO66 ,GPIO[66] control bit" "Low,High"
|
|
bitfld.long 0x08 1. " GPIO65 ,GPIO[65] control bit" "Low,High"
|
|
bitfld.long 0x08 0. " GPIO64 ,GPIO[64] control bit" "Low,High"
|
|
line.long 0x0C "GPIOCTRL3,GPIO Control Register 3"
|
|
bitfld.long 0x0C 11. " GPIO_A3 ,GPIO[A3] control bit" "Low,High"
|
|
bitfld.long 0x0C 10. " GPIO_A2 ,GPIO[A2] control bit" "Low,High"
|
|
bitfld.long 0x0C 9. " GPIO_A1 ,GPIO[A1] control bit" "Low,High"
|
|
bitfld.long 0x0C 8. " GPIO_A0 ,GPIO[A0] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " GPIO103 ,GPIO[103] control bit" "Low,High"
|
|
bitfld.long 0x0C 6. " GPIO102 ,GPIO[102] control bit" "Low,High"
|
|
bitfld.long 0x0C 5. " GPIO101 ,GPIO[101] control bit" "Low,High"
|
|
bitfld.long 0x0C 4. " GPIO100 ,GPIO[100] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " GPIO99 ,GPIO[99] control bit" "Low,High"
|
|
bitfld.long 0x0C 2. " GPIO98 ,GPIO[98] control bit" "Low,High"
|
|
bitfld.long 0x0C 1. " GPIO97 ,GPIO[97] control bit" "Low,High"
|
|
bitfld.long 0x0C 0. " GPIO96 ,GPIO[96] control bit" "Low,High"
|
|
rgroup.long 0x7c++0x0F
|
|
line.long 0x00 "GPIOSTATUS0,GPIO Status Register 0"
|
|
bitfld.long 0x00 31. " GPIO31 ,GPIO[31] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " GPIO30 ,GPIO[30] status bit" "Low,High"
|
|
bitfld.long 0x00 29. " GPIO29 ,GPIO[29] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " GPIO28 ,GPIO[28] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPIO27 ,GPIO[27] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " GPIO26 ,GPIO[26] status bit" "Low,High"
|
|
bitfld.long 0x00 25. " GPIO25 ,GPIO[25] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " GPIO24 ,GPIO[24] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPIO23 ,GPIO[23] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " GPIO22 ,GPIO[22] status bit" "Low,High"
|
|
bitfld.long 0x00 21. " GPIO21 ,GPIO[21] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " GPIO20 ,GPIO[20] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPIO19 ,GPIO[19] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " GPIO18 ,GPIO[18] status bit" "Low,High"
|
|
bitfld.long 0x00 17. " GPIO17 ,GPIO[17] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " GPIO16 ,GPIO[16] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO15 ,GPIO[15] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " GPIO14 ,GPIO[14] status bit" "Low,High"
|
|
bitfld.long 0x00 13. " GPIO13 ,GPIO[13] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " GPIO12 ,GPIO[12] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPIO11 ,GPIO[11] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " GPIO10 ,GPIO[10] status bit" "Low,High"
|
|
bitfld.long 0x00 9. " GPIO9 ,GPIO[9] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " GPIO8 ,GPIO[8] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPIO7 ,GPIO[7] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " GPIO6 ,GPIO[6] status bit" "Low,High"
|
|
bitfld.long 0x00 5. " GPIO5 ,GPIO[5] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " GPIO4 ,GPIO[4] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO3 ,GPIO[3] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " GPIO2 ,GPIO[2] status bit" "Low,High"
|
|
bitfld.long 0x00 1. " GPIO1 ,GPIO[1] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " GPIO0 ,GPIO[0] status bit" "Low,High"
|
|
line.long 0x04 "GPIOSTATUS1,GPIO Status Register 1"
|
|
bitfld.long 0x04 31. " GPIO63 ,GPIO[63] status bit" "Low,High"
|
|
bitfld.long 0x04 30. " GPIO62 ,GPIO[62] status bit" "Low,High"
|
|
bitfld.long 0x04 29. " GPIO61 ,GPIO[61] status bit" "Low,High"
|
|
bitfld.long 0x04 28. " GPIO60 ,GPIO[60] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPIO59 ,GPIO[59] status bit" "Low,High"
|
|
bitfld.long 0x04 26. " GPIO58 ,GPIO[58] status bit" "Low,High"
|
|
bitfld.long 0x04 25. " GPIO57 ,GPIO[57] status bit" "Low,High"
|
|
bitfld.long 0x04 24. " GPIO56 ,GPIO[56] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPIO55 ,GPIO[55] status bit" "Low,High"
|
|
bitfld.long 0x04 22. " GPIO54 ,GPIO[54] status bit" "Low,High"
|
|
bitfld.long 0x04 21. " GPIO53 ,GPIO[53] status bit" "Low,High"
|
|
bitfld.long 0x04 20. " GPIO52 ,GPIO[52] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPIO51 ,GPIO[51] status bit" "Low,High"
|
|
bitfld.long 0x04 18. " GPIO50 ,GPIO[50] status bit" "Low,High"
|
|
bitfld.long 0x04 17. " GPIO49 ,GPIO[49] status bit" "Low,High"
|
|
bitfld.long 0x04 16. " GPIO48 ,GPIO[48] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPIO47 ,GPIO[47] status bit" "Low,High"
|
|
bitfld.long 0x04 14. " GPIO46 ,GPIO[46] status bit" "Low,High"
|
|
bitfld.long 0x04 13. " GPIO45 ,GPIO[45] status bit" "Low,High"
|
|
bitfld.long 0x04 12. " GPIO44 ,GPIO[44] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPIO43 ,GPIO[43] status bit" "Low,High"
|
|
bitfld.long 0x04 10. " GPIO42 ,GPIO[42] status bit" "Low,High"
|
|
bitfld.long 0x04 9. " GPIO41 ,GPIO[41] status bit" "Low,High"
|
|
bitfld.long 0x04 8. " GPIO40 ,GPIO[40] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPIO39 ,GPIO[39] status bit" "Low,High"
|
|
bitfld.long 0x04 6. " GPIO38 ,GPIO[38] status bit" "Low,High"
|
|
bitfld.long 0x04 5. " GPIO37 ,GPIO[37] status bit" "Low,High"
|
|
bitfld.long 0x04 4. " GPIO36 ,GPIO[36] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPIO35 ,GPIO[35] status bit" "Low,High"
|
|
bitfld.long 0x04 2. " GPIO34 ,GPIO[34] status bit" "Low,High"
|
|
bitfld.long 0x04 1. " GPIO33 ,GPIO[33] status bit" "Low,High"
|
|
bitfld.long 0x04 0. " GPIO32 ,GPIO[32] status bit" "Low,High"
|
|
line.long 0x08 "GPIOSTATUS2,GPIO Status Register 2"
|
|
bitfld.long 0x08 31. " GPIO95 ,GPIO[95] status bit" "Low,High"
|
|
bitfld.long 0x08 30. " GPIO94 ,GPIO[94] status bit" "Low,High"
|
|
bitfld.long 0x08 29. " GPIO93 ,GPIO[93] status bit" "Low,High"
|
|
bitfld.long 0x08 28. " GPIO92 ,GPIO[92] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 27. " GPIO91 ,GPIO[91] status bit" "Low,High"
|
|
bitfld.long 0x08 26. " GPIO90 ,GPIO[90] status bit" "Low,High"
|
|
bitfld.long 0x08 25. " GPIO89 ,GPIO[89] status bit" "Low,High"
|
|
bitfld.long 0x08 24. " GPIO88 ,GPIO[88] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 23. " GPIO87 ,GPIO[87] status bit" "Low,High"
|
|
bitfld.long 0x08 22. " GPIO86 ,GPIO[86] status bit" "Low,High"
|
|
bitfld.long 0x08 21. " GPIO85 ,GPIO[85] status bit" "Low,High"
|
|
bitfld.long 0x08 20. " GPIO84 ,GPIO[84] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " GPIO83 ,GPIO[83] status bit" "Low,High"
|
|
bitfld.long 0x08 18. " GPIO82 ,GPIO[82] status bit" "Low,High"
|
|
bitfld.long 0x08 17. " GPIO81 ,GPIO[81] status bit" "Low,High"
|
|
bitfld.long 0x08 16. " GPIO80 ,GPIO[80] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " GPIO79 ,GPIO[79] status bit" "Low,High"
|
|
bitfld.long 0x08 14. " GPIO78 ,GPIO[78] status bit" "Low,High"
|
|
bitfld.long 0x08 13. " GPIO77 ,GPIO[77] status bit" "Low,High"
|
|
bitfld.long 0x08 12. " GPIO76 ,GPIO[76] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPIO75 ,GPIO[75] status bit" "Low,High"
|
|
bitfld.long 0x08 10. " GPIO74 ,GPIO[74] status bit" "Low,High"
|
|
bitfld.long 0x08 9. " GPIO73 ,GPIO[73] status bit" "Low,High"
|
|
bitfld.long 0x08 8. " GPIO72 ,GPIO[72] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPIO71 ,GPIO[71] status bit" "Low,High"
|
|
bitfld.long 0x08 6. " GPIO70 ,GPIO[70] status bit" "Low,High"
|
|
bitfld.long 0x08 5. " GPIO69 ,GPIO[69] status bit" "Low,High"
|
|
bitfld.long 0x08 4. " GPIO68 ,GPIO[68] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPIO67 ,GPIO[67] status bit" "Low,High"
|
|
bitfld.long 0x08 2. " GPIO66 ,GPIO[66] status bit" "Low,High"
|
|
bitfld.long 0x08 1. " GPIO65 ,GPIO[65] status bit" "Low,High"
|
|
bitfld.long 0x08 0. " GPIO64 ,GPIO[64] status bit" "Low,High"
|
|
line.long 0x0C "GPIOSTATUS3,GPIO Status Register 3"
|
|
bitfld.long 0x0C 11. " GPIO_A3 ,GPIO[A3] status bit" "Low,High"
|
|
bitfld.long 0x0C 10. " GPIO_A2 ,GPIO[A2] status bit" "Low,High"
|
|
bitfld.long 0x0C 9. " GPIO_A1 ,GPIO[A1] status bit" "Low,High"
|
|
bitfld.long 0x0C 8. " GPIO_A0 ,GPIO[A0] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " GPIO103 ,GPIO[103] status bit" "Low,High"
|
|
bitfld.long 0x0C 6. " GPIO102 ,GPIO[102] status bit" "Low,High"
|
|
bitfld.long 0x0C 5. " GPIO101 ,GPIO[101] status bit" "Low,High"
|
|
bitfld.long 0x0C 4. " GPIO100 ,GPIO[100] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " GPIO99 ,GPIO[99] status bit" "Low,High"
|
|
bitfld.long 0x0C 2. " GPIO98 ,GPIO[98] status bit" "Low,High"
|
|
bitfld.long 0x0C 1. " GPIO97 ,GPIO[97] status bit" "Low,High"
|
|
bitfld.long 0x0C 0. " GPIO96 ,GPIO[96] status bit" "Low,High"
|
|
width 13.
|
|
group.long 0x8c++0x03
|
|
line.long 0x00 "MEMBUSCONF,Memory Bus Configuration Register"
|
|
bitfld.long 0x00 25. " APUDIS ,Address bus pullup control" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " DHPUDIS ,High data bus pullup control" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--23. " CS7 ,Controls which system memory chip select is routed to CS7" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
textline " "
|
|
bitfld.long 0x00 18.--20. " CS6 ,Controls which system memory chip select is routed to CS6" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 15.--17. " CS5 ,Controls which system memory chip select is routed to CS5" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 12.--14. " CS4 ,Controls which system memory chip select is routed to CS4" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CS3 ,Control which system memory chip select is routed to CS3" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 6.--8. " CS2 ,Controls which system memory chip select is routed to CS2" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
bitfld.long 0x00 3.--5. " CS1 ,Controls which system memory chip select is routed to CS1" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " CS0 ,Controls which system memory chip select is routed to CS0" "dy_cs_0,dy_cs_1,dy_cs_2,dy_cs_3,st_cs_0,st_cs_1,st_cs_2,st_cs_3"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "System Control Module"
|
|
base ad:0xa0900000
|
|
sif (cpu()=="NS9210")
|
|
width 15.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "GENARBCTRL,General Arbiter Control Register"
|
|
bitfld.long 0x00 0. " ArbControl ,Arbiter control" "Memory controller,Main arbiter"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BRC0,BRC0 Register"
|
|
bitfld.long 0x00 31. " CEB0 ,Channel 0 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF0 ,Bandwidth reduction field channel 0" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR0 ,Hmaster channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB1 ,Channel 1 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF1 ,Bandwidth reduction field channel 1" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR1 ,Hmaster channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB2 ,Channel 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF2 ,Bandwidth reduction field channel 2" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR2 ,Hmaster channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB3 ,Channel 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF3 ,Bandwidth reduction field channel 3" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR3 ,Hmaster channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BRC1,BRC1 Register"
|
|
bitfld.long 0x00 31. " CEB4 ,Channel 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF4 ,Bandwidth reduction field channel 4" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR4 ,Hmaster channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB5 ,Channel 5 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF5 ,Bandwidth reduction field channel 5" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR5 ,Hmaster channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB6 ,Channel 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF6 ,Bandwidth reduction field channel 6" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR6 ,Hmaster channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB7 ,Channel 7 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF7 ,Bandwidth reduction field channel 7" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR7 ,Hmaster channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "BRC2,BRC2 Register"
|
|
bitfld.long 0x00 31. " CEB8 ,Channel 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF8 ,Bandwidth reduction field channel 8" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR8 ,Hmaster channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB9 ,Channel 9 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF9 ,Bandwidth reduction field channel 9" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR9 ,Hmaster channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB10 ,Channel 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF10 ,Bandwidth reduction field channel 10" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR10 ,Hmaster channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB11 ,Channel 11 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF11 ,Bandwidth reduction field channel 11" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR11 ,Hmaster channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "BRC3,BRC3 Register"
|
|
bitfld.long 0x04 31. " CEB12 ,Channel 12 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--29. " BRF12 ,Bandwidth reduction field channel 12" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 24.--27. " HMSTR12 ,Hmaster channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 23. " CEB13 ,Channel 13 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " BRF13 ,Bandwidth reduction field channel 13" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 16.--19. " HMSTR13 ,Hmaster channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CEB14 ,Channel 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--13. " BRF14 ,Bandwidth reduction field channel 14" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " HMSTR14 ,Hmaster channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " CEB15 ,Channel 15 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " BRF15 ,Bandwidth reduction field channel 15" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 0.--3. " HMSTR15 ,Hmaster channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "AHBERRSTATUS1,AHB Error Detect Status Register 1"
|
|
line.long 0x04 "AHBERRSTATUS2,AHB Error Detect Status Register 2"
|
|
bitfld.long 0x04 19. " IE ,CPU instruction error" "No error,Error"
|
|
bitfld.long 0x04 18. " DE ,CPU data error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ER ,AHB error response" "No error,Error"
|
|
bitfld.long 0x04 14. " HWR ,Hwrite" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 10.--13. " HMSTR ,Hmaster[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 6.--9. " HPR ,Hprot[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 3.--5. " HSZ ,Hsize[2:0]" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " HBRST ,Hburst[2:0]" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "AHBERRMONCONF,AHB Error Monitoring Configuration Register"
|
|
bitfld.long 0x00 23. " EIC ,AHB Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 4. " SERDC ,AHB Slave Error Response Detect Config" "Error only,Generate IRQ"
|
|
line.long 0x04 "TIMMASTERCTRL,Timer Master Control Register"
|
|
bitfld.long 0x04 21. " T9RSE ,Timer 9 reload step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " T9LSE ,Timer 9 low step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " T9HSE ,Timer 9 high step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " T8RSE ,Timer 8 reload step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " T8LSE ,Timer 8 low step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " T8HSE ,Timer 8 high step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " T7RSE ,Timer 7 reload step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " T7LSE ,Timer 7 low step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " T7HSE ,Timer 7 high step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " T6RSE ,Timer 6 reload step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " T6LSE ,Timer 6 low step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " T6HSE ,Timer 6 high step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " T9E ,Timer 9 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 8. " T8E ,Timer 8 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " T7E ,Timer 7 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 6. " T6E ,Timer 6 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " T5E ,Timer 5 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 4. " T4E ,Timer 4 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " T3E ,Timer 3 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 2. " T2E ,Timer 2 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " T1E ,Timer 1 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 0. " T0E ,Timer 0 enable" "Reset,Enabled"
|
|
width 15.
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "TIMCTRL0,Timer 0 Control Register"
|
|
bitfld.long 0x00 15. " TE0 ,Timer 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "TIMCTRL1,Timer 1 Control Register"
|
|
bitfld.long 0x00 15. " TE1 ,Timer 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "TIMCTRL2,Timer 2 Control Register"
|
|
bitfld.long 0x00 15. " TE2 ,Timer 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "TIMCTRL3,Timer 3 Control Register"
|
|
bitfld.long 0x00 15. " TE3 ,Timer 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "TIMCTRL4,Timer 4 Control Register"
|
|
bitfld.long 0x00 15. " TE4 ,Timer 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "TIMCTRL5,Timer 5 Control Register"
|
|
bitfld.long 0x00 18. " Rel_mode ,Reload mode" "Full,Half"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,Reserved,Reserved,Quadrature decoder/counter"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "TIMCTRL6,Timer 6 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "TIMCTRL7,Timer 7 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "TIMCTRL8,Timer 8 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "TIMCTRL9,Timer 9 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TIM6H,Timer 6 High Register"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "TIM7H,Timer 7 High Register"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TIM8H,Timer 8 High Register"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TIM9H,Timer 9 High Register"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "TIM6L,Timer 6 Low Register"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "TIM7L,Timer 7 Low Register"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "TIM8L,Timer 8 Low Register"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "TIM9L,Timer 9 Low Register"
|
|
width 15.
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "TIM6HLSTEP,Timer 6 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "TIM7HLSTEP,Timer 7 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "TIM8HLSTEP,Timer 8 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "TIM9HLSTEP,Timer 9 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "TIM6RELSTEP,Timer 6 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "TIM7RELSTEP,Timer 7 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "TIM8RELSTEP,Timer 8 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "TIM9RELSTEP,Timer 9 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TIM0RELCC,Timer 0 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TIM1RELCC,Timer 1 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TIM2RELCC,Timer 2 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TIM3RELCC,Timer 3 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TIM4RELCC,Timer 4 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TIM5RELCC,Timer 5 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TIM6RELCC,Timer 6 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TIM7RELCC,Timer 7 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TIM8RELCC,Timer 8 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TIM9RELCC,Timer 9 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIM0RDCAP,Timer 0 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TIM1RDCAP,Timer 1 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TIM2RDCAP,Timer 2 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TIM3RDCAP,Timer 3 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TIM4RDCAP,Timer 4 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TIM5RDCAP,Timer 5 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TIM6RDCAP,Timer 6 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TIM7RDCAP,Timer 7 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TIM8RDCAP,Timer 8 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "TIM9RDCAP,Timer 9 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTVADDR0,Interrupt Vector Address Register Level 0"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTVADDR1,Interrupt Vector Address Register Level 1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTVADDR2,Interrupt Vector Address Register Level 2"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "INTVADDR3,Interrupt Vector Address Register Level 3"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "INTVADDR4,Interrupt Vector Address Register Level 4"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INTVADDR5,Interrupt Vector Address Register Level 5"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "INTVADDR6,Interrupt Vector Address Register Level 6"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "INTVADDR7,Interrupt Vector Address Register Level 7"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "INTVADDR8,Interrupt Vector Address Register Level 8"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "INTVADDR9,Interrupt Vector Address Register Level 9"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "INTVADDR10,Interrupt Vector Address Register Level 10"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "INTVADDR11,Interrupt Vector Address Register Level 11"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "INTVADDR12,Interrupt Vector Address Register Level 12"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "INTVADDR13,Interrupt Vector Address Register Level 13"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "INTVADDR14,Interrupt Vector Address Register Level 14"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTVADDR15,Interrupt Vector Address Register Level 15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTVADDR16,Interrupt Vector Address Register Level 16"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTVADDR17,Interrupt Vector Address Register Level 17"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTVADDR18,Interrupt Vector Address Register Level 18"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "INTVADDR19,Interrupt Vector Address Register Level 19"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "INTVADDR20,Interrupt Vector Address Register Level 20"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "INTVADDR21,Interrupt Vector Address Register Level 21"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "INTVADDR22,Interrupt Vector Address Register Level 22"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "INTVADDR23,Interrupt Vector Address Register Level 23"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "INTVADDR24,Interrupt Vector Address Register Level 24"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "INTVADDR25,Interrupt Vector Address Register Level 25"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "INTVADDR26,Interrupt Vector Address Register Level 26"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTVADDR27,Interrupt Vector Address Register Level 27"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTVADDR28,Interrupt Vector Address Register Level 28"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "INTVADDR29,Interrupt Vector Address Register Level 29"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "INTVADDR30,Interrupt Vector Address Register Level 30"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "INTVADDR31,Interrupt Vector Address Register Level 31"
|
|
width 15.
|
|
group.long 0x144++0x0b
|
|
line.long 0x00 "INTCONFIG0,Interrupt Configuration 0 Register"
|
|
bitfld.long 0x00 31. " IE0 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV0 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT0 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD0 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IE1 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INV1 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IT1 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 16.--20. " ISD1 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE2 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV2 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT2 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD2 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE3 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV3 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT3 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD3 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG1,Interrupt Configuration 1 Register"
|
|
bitfld.long 0x04 31. " IE4 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV4 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT4 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD4 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE5 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV5 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT5 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD5 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE7 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV7 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT7 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD7 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG2,Interrupt Configuration 2 Register"
|
|
bitfld.long 0x08 31. " IE8 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV8 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT8 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD8 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE9 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV9 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT9 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD9 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE10 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV10 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT10 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD10 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE11 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV11 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT11 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD11 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x154++0xf
|
|
line.long 0x00 "INTCONFIG4,Interrupt Configuration 4 Register"
|
|
bitfld.long 0x00 31. " IE16 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV16 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT16 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD16 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE18 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV18 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT18 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD18 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE19 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV19 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT19 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD19 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG5,Interrupt Configuration 5 Register"
|
|
bitfld.long 0x04 31. " IE20 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV20 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT20 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD20 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE21 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV21 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT21 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD21 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IE22 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " INV22 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IT22 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 8.--12. " ISD22 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE23 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV23 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT23 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD23 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG6,Interrupt Configuration 6 Register"
|
|
bitfld.long 0x08 31. " IE24 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV24 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT24 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD24 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE25 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV25 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT25 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD25 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE26 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV26 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT26 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD26 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE27 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV27 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT27 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD27 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x0c "INTCONFIG7,Interrupt Configuration 7 Register"
|
|
bitfld.long 0x0c 31. " IE28 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " INV28 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " IT28 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 24.--28. " ISD28 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
textline " "
|
|
bitfld.long 0x0c 23. " IE29 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 22. " INV29 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " IT29 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 16.--20. " ISD29 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " IE30 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " INV30 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IT30 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 8.--12. " ISD30 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IE31 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " INV31 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " IT31 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 0.--4. " ISD31 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Reserved,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,Reserved,Reserved,I2C Interrupt,Reserved,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
group.long 0x164++0x03
|
|
line.long 0x00 "ISADDR,Interrupt Service Routine Address Register"
|
|
rgroup.long 0x168++0x07
|
|
line.long 0x00 "ISAR,Interrupt Status Active"
|
|
bitfld.long 0x00 31. " ISA31 ,Interrupt status active level 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ISA30 ,Interrupt status active level 30" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ISA29 ,Interrupt status active level 29" "Not active,Active"
|
|
bitfld.long 0x00 28. " ISA28 ,Interrupt status active level 28" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ISA27 ,Interrupt status active level 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ISA26 ,Interrupt status active level 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISA25 ,Interrupt status active level 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ISA24 ,Interrupt status active level 24" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ISA23 ,Interrupt status active level 23" "Not active,Active"
|
|
bitfld.long 0x00 22. " ISA22 ,Interrupt status active level 22" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISA21 ,Interrupt status active level 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ISA20 ,Interrupt status active level 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISA19 ,Interrupt status active level 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ISA18 ,Interrupt status active level 18" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ISA16 ,Interrupt status active level 16" "Not active,Active"
|
|
bitfld.long 0x00 11. " ISA11 ,Interrupt status active level 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISA10 ,Interrupt status active level 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ISA9 ,Interrupt status active level 9" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ISA8 ,Interrupt status active level 8" "Not active,Active"
|
|
bitfld.long 0x00 7. " ISA7 ,Interrupt status active level 7" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ISA5 ,Interrupt status active level 5" "Not active,Active"
|
|
bitfld.long 0x00 4. " ISA4 ,Interrupt status active level 4" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISA3 ,Interrupt status active level 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ISA2 ,Interrupt status active level 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISA1 ,Interrupt status active level 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ISA0 ,Interrupt status active level 0" "Not active,Active"
|
|
line.long 0x04 "ISRAW,Interrupt Status Raw Register"
|
|
bitfld.long 0x04 31. " ISRAW31 ,Interrupt status raw level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " ISRAW30 ,Interrupt status raw level 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " ISRAW29 ,Interrupt status raw level 29" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " ISRAW28 ,Interrupt status raw level 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " ISRAW27 ,Interrupt status raw level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " ISRAW26 ,Interrupt status raw level 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ISRAW25 ,Interrupt status raw level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " ISRAW24 ,Interrupt status raw level 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ISRAW23 ,Interrupt status raw level 23" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " ISRAW22 ,Interrupt status raw level 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ISRAW21 ,Interrupt status raw level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " ISRAW20 ,Interrupt status raw level 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ISRAW19 ,Interrupt status raw level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " ISRAW18 ,Interrupt status raw level 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ISRAW16 ,Interrupt status raw level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " ISRAW11 ,Interrupt status raw level 11" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ISRAW10 ,Interrupt status raw level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " ISRAW9 ,Interrupt status raw level 9" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ISRAW8 ,Interrupt status raw level 8" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " ISRAW7 ,Interrupt status raw level 7" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ISRAW5 ,Interrupt status raw level 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ISRAW4 ,Interrupt status raw level 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ISRAW3 ,Interrupt status raw level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " ISRAW2 ,Interrupt status raw level 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ISRAW1 ,Interrupt status raw level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ISRAW0 ,Interrupt status raw level 0" "No interrupt,Interrupt"
|
|
width 15.
|
|
group.long 0x174++0x0b
|
|
line.long 0x00 "SWC,Software Watchdog Configuration"
|
|
bitfld.long 0x00 8. " Debug ,Debug mode" "Enabled,Disabled"
|
|
bitfld.long 0x00 7. " SWWE ,Software watchdog enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWWI ,Software watchdog interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWWIC ,Software watchdog interrupt response" "Interrupt,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SWTCS ,Software watchdog timer clock select" "System memory clock/2,System memory clock/4,System memory clock/8,System memory clock/16,System memory clock/32,System memory clock/64,?..."
|
|
line.long 0x04 "SWT,Software Watchdog Timer"
|
|
line.long 0x08 "CCR,Clock Configuration Register"
|
|
bitfld.long 0x08 29.--31. " CSC ,Clock scale control" "Full speed,Div by 2,Div by 4,Div by 8,Div by 16,?..."
|
|
bitfld.long 0x08 26.--28. " Max_CSC ,Max clock scale control" "Full speed,Div by 2,Div by 4,Div by 8,Div by 16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 25. " CCSel ,CPU clock select" "AHB,2 x AHB"
|
|
bitfld.long 0x08 16. " MCOut_0 ,Memory clock out 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 14. " EXT_DMA ,External DMA" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " IO_hub ,IO hub" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " I2C ,I2C" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " AES ,AES" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " SPI ,SPI" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " UART_D ,UART D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " UART_C ,UART C" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " UART_B ,UART B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " UART_A ,UART A" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " Eth_MAC ,Ethernet MAC" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "MRR,Module Reset Register"
|
|
bitfld.long 0x00 29.--31. " RST_STAT ,Reset status" "Reserved,External reset_n,External sreset_n,PLL,Software watchdog,AHB,?..."
|
|
bitfld.long 0x00 14. " EXT_DMA ,External DMA" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IO_hub ,IO hub" "Reset,Enabled"
|
|
bitfld.long 0x00 11. " I2C ,I2C" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " AES ,AES" "Reset,Enabled"
|
|
bitfld.long 0x00 5. " SPI ,SPI" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART_D ,UART D" "Reset,Enabled"
|
|
bitfld.long 0x00 3. " UART_C ,UART C" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_B ,UART B" "Reset,Enabled"
|
|
bitfld.long 0x00 1. " UART_A ,UART A" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Eth_MAC ,Ethernet MAC" "Reset,Enabled"
|
|
if ((d.l(ad:(0xa0900000+0x184))&0x20)==0x0)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ID ,Identification"
|
|
textline " "
|
|
bitfld.long 0x00 5. " Boot_mode ,Boot mode" "SPI,Flash"
|
|
bitfld.long 0x00 3.--4. " Boot_width ,Boot width" "Reserved,8-bit,24-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 2. " End_mode ,Endian mode" "Little,Big"
|
|
bitfld.long 0x00 1. " Mis_bus_resp ,Misaligned bus address response mode" "Allowed,Not allowed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Int_reg_acc ,Internal register access mode bit 0" "PRIVILEGED only,PRIVILEGED/USER"
|
|
else
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ID ,Identification"
|
|
textline " "
|
|
bitfld.long 0x00 5. " Boot_mode ,Boot mode" "SPI,Flash"
|
|
bitfld.long 0x00 3.--4. " Boot_width ,Boot width" "8-bit,32-bit,32-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 2. " End_mode ,Endian mode" "Little,Big"
|
|
bitfld.long 0x00 1. " Mis_bus_resp ,Misaligned bus address response mode" "Allowed,Not allowed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Int_reg_acc ,Internal register access mode bit 0" "PRIVILEGED only,PRIVILEGED/USER"
|
|
endif
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "PLLCONF,PLL Configuration Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " NF ,PLL feedback divider"
|
|
bitfld.long 0x00 7. " BP ,PLL bypass" "Enabled,Bypassed"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " OD ,PLL output divider" "0,1,2,3"
|
|
bitfld.long 0x00 0.--4. " NR ,PLL reference clock divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 15.
|
|
rgroup.long 0x18c++0x03
|
|
line.long 0x00 "ACTINTLIDSTAT,Active Interrupt Level ID Status Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INTID ,Interrupt ID"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "PWRMAN,Power Managment"
|
|
bitfld.long 0x00 31. " Slp_en ,Deprecated Chip sleep enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " HW_clk_scale ,Hardware clock scale control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " MemSRFEn ,SDRAM self refresh control" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WakeIntClr ,CPU wake interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " Ext_Int_3 ,External interrupt 3 interrupt wakeup" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " Ext_Int_2 ,External interrupt 2 interrupt wakeup" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " Ext_Int_1 ,External interrupt 1 interrupt wakeup" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " Ext_Int_0 ,External interrupt 0 interrupt wakeup" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I2C ,I2C wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 5. " SPI ,SPI wakeup" "Not wakeup,Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART_D ,UART D wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 3. " UART_C ,UART C wakeup" "Not wakeup,Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_B ,UART B wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 1. " UART_A ,UART A wakeup" "Not wakeup,Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Enet ,Ethernet wakeup" "Not wakeup,Wakeup"
|
|
rgroup.long 0x22c++0x03
|
|
line.long 0x00 "AHBBUSACTSTAT,AHB Bus Activity Status"
|
|
group.long 0x1D0++0x07
|
|
line.long 0x00 "SMCS0DMB,System Memory Chip Select 0 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0MMSK,System Memory Chip Select 0 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD0 ,Chip select 0 disable" "Yes,No"
|
|
group.long 0x1D8++0x07
|
|
line.long 0x00 "SMCS1DMB,System Memory Chip Select 1 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1MMSK,System Memory Chip Select 1 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD1 ,Chip select 1 disable" "Yes,No"
|
|
group.long 0x1E0++0x07
|
|
line.long 0x00 "SMCS2DMB,System Memory Chip Select 2 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2MMSK,System Memory Chip Select 2 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD2 ,Chip select 2 disable" "Yes,No"
|
|
group.long 0x1E8++0x07
|
|
line.long 0x00 "SMCS3DMB,System Memory Chip Select 3 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3MMSK,System Memory Chip Select 3 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD3 ,Chip select 3 disable" "Yes,No"
|
|
group.long 0x1F0++0x07
|
|
line.long 0x00 "SMCS0SMB,System Memory Chip Select 0 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0SMMSK,System Memory Chip Select 0 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD0 ,Chip select 0 disable" "Yes,No"
|
|
group.long 0x1F8++0x07
|
|
line.long 0x00 "SMCS1SMB,System Memory Chip Select 1 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1SMMSK,System Memory Chip Select 1 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD1 ,Chip select 1 disable" "Yes,No"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "SMCS2SMB,System Memory Chip Select 2 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2SMMSK,System Memory Chip Select 2 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD2 ,Chip select 2 disable" "Yes,No"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "SMCS3SMB,System Memory Chip Select 3 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3SMMSK,System Memory Chip Select 3 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD3 ,Chip select 3 disable" "Yes,No"
|
|
rgroup.long 0x210++0x03
|
|
line.long 0x000 "GENID,Gen ID Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " GENID ,General Purpose ID register"
|
|
width 15.
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity (Level/Edge)" "Active high/Interrupt rising edge,Active low/Interrupt falling edge"
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity (Level/Edge)" "Active high/Interrupt rising edge,Active low/Interrupt falling edge"
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity (Level/Edge)" "Active high/Interrupt rising edge,Active low/Interrupt falling edge"
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity (Level/Edge)" "Active high/Interrupt rising edge,Active low/Interrupt falling edge"
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
width 0xb
|
|
elif (cpu()=="NS9215")
|
|
width 15.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "GENARBCTRL,General Arbiter Control Register"
|
|
bitfld.long 0x00 0. " ArbControl ,Arbiter control" "Memory controller,Main arbiter"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BRC0,BRC0 Register"
|
|
bitfld.long 0x00 31. " CEB0 ,Channel 0 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF0 ,Bandwidth reduction field channel 0" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR0 ,Hmaster channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB1 ,Channel 1 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF1 ,Bandwidth reduction field channel 1" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR1 ,Hmaster channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB2 ,Channel 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF2 ,Bandwidth reduction field channel 2" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR2 ,Hmaster channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB3 ,Channel 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF3 ,Bandwidth reduction field channel 3" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR3 ,Hmaster channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BRC1,BRC1 Register"
|
|
bitfld.long 0x00 31. " CEB4 ,Channel 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF4 ,Bandwidth reduction field channel 4" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR4 ,Hmaster channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB5 ,Channel 5 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF5 ,Bandwidth reduction field channel 5" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR5 ,Hmaster channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB6 ,Channel 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF6 ,Bandwidth reduction field channel 6" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR6 ,Hmaster channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB7 ,Channel 7 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF7 ,Bandwidth reduction field channel 7" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR7 ,Hmaster channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "BRC2,BRC2 Register"
|
|
bitfld.long 0x00 31. " CEB8 ,Channel 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF8 ,Bandwidth reduction field channel 8" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR8 ,Hmaster channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB9 ,Channel 9 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF9 ,Bandwidth reduction field channel 9" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR9 ,Hmaster channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB10 ,Channel 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF10 ,Bandwidth reduction field channel 10" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR10 ,Hmaster channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB11 ,Channel 11 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF11 ,Bandwidth reduction field channel 11" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR11 ,Hmaster channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "BRC3,BRC3 Register"
|
|
bitfld.long 0x04 31. " CEB12 ,Channel 12 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--29. " BRF12 ,Bandwidth reduction field channel 12" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 24.--27. " HMSTR12 ,Hmaster channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 23. " CEB13 ,Channel 13 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " BRF13 ,Bandwidth reduction field channel 13" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 16.--19. " HMSTR13 ,Hmaster channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CEB14 ,Channel 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--13. " BRF14 ,Bandwidth reduction field channel 14" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " HMSTR14 ,Hmaster channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " CEB15 ,Channel 15 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " BRF15 ,Bandwidth reduction field channel 15" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 0.--3. " HMSTR15 ,Hmaster channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "AHBERRSTATUS1,AHB Error Detect Status Register 1"
|
|
hexmask.long.long 0x00 0.--31. 1. " EDS1 ,The haddr[31:0] value recorded during a slave error response"
|
|
line.long 0x04 "AHBERRSTATUS2,AHB Error Detect Status Register 2"
|
|
bitfld.long 0x04 19. " IE ,CPU instruction error" "No error,Error"
|
|
bitfld.long 0x04 18. " DE ,CPU data error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ER ,AHB error response" "No error,Error"
|
|
bitfld.long 0x04 14. " HWR ,Hwrite" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 10.--13. " HMSTR ,Hmaster[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 6.--9. " HPR ,Hprot[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 3.--5. " HSZ ,Hsize[2:0]" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " HBRST ,Hburst[2:0]" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "AHBERRMONCONF,AHB Error Monitoring Configuration Register"
|
|
bitfld.long 0x00 23. " EIC ,AHB Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 4. " SERDC ,AHB Slave Error Response Detect Config" "Error only,Generate IRQ"
|
|
line.long 0x04 "TIMMASTERCTRL,Timer Master Control Register"
|
|
bitfld.long 0x04 21. " T9RSE ,Timer 9 reload step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " T9LSE ,Timer 9 low step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " T9HSE ,Timer 9 high step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " T8RSE ,Timer 8 reload step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " T8LSE ,Timer 8 low step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " T8HSE ,Timer 8 high step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " T7RSE ,Timer 7 reload step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " T7LSE ,Timer 7 low step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " T7HSE ,Timer 7 high step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " T6RSE ,Timer 6 reload step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " T6LSE ,Timer 6 low step enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " T6HSE ,Timer 6 high step enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " T9E ,Timer 9 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 8. " T8E ,Timer 8 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " T7E ,Timer 7 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 6. " T6E ,Timer 6 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " T5E ,Timer 5 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 4. " T4E ,Timer 4 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " T3E ,Timer 3 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 2. " T2E ,Timer 2 enable" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " T1E ,Timer 1 enable" "Reset,Enabled"
|
|
bitfld.long 0x04 0. " T0E ,Timer 0 enable" "Reset,Enabled"
|
|
width 15.
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "TIMCTRL0,Timer 0 Control Register"
|
|
bitfld.long 0x00 15. " TE0 ,Timer 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "TIMCTRL1,Timer 1 Control Register"
|
|
bitfld.long 0x00 15. " TE1 ,Timer 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "TIMCTRL2,Timer 2 Control Register"
|
|
bitfld.long 0x00 15. " TE2 ,Timer 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "TIMCTRL3,Timer 3 Control Register"
|
|
bitfld.long 0x00 15. " TE3 ,Timer 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "TIMCTRL4,Timer 4 Control Register"
|
|
bitfld.long 0x00 15. " TE4 ,Timer 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "TIMCTRL5,Timer 5 Control Register"
|
|
bitfld.long 0x00 18. " Rel_mode ,Reload mode" "Full,Half"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,Reserved,Reserved,Quadrature decoder/counter"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "TIMCTRL6,Timer 6 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "TIMCTRL7,Timer 7 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "TIMCTRL8,Timer 8 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "TIMCTRL9,Timer 9 Control Register"
|
|
bitfld.long 0x00 16.--17. " TM2 ,Timer mode 2" "Timer mode 1,PWM,Clock,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " TE ,Timer 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " Cap_Comp ,Capture and compare mode functions" "Normal,Compare/toggle output,Compare/pulse output,Capture/input falling edge,Capture/input rising edge,Capture/every 2nd rising edge,Capture/every 4th rising edge,Capture/every 8th rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Debug ,Debug mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Int_Clr ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TCS ,Timer clock select" "AHB clock x2,AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,AHB clock/16,AHB clock/32,AHB clock/64,AHB clock/128,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM1 ,Timer mode 1" "Internal/External,External low-level,External high-level,Concatenate the lower timer"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Int_Sel ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Up_Down ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Bit_timer ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Rel_Enbl ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TIM6H,Timer 6 High Register"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "TIM7H,Timer 7 High Register"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TIM8H,Timer 8 High Register"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TIM9H,Timer 9 High Register"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "TIM6L,Timer 6 Low Register"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "TIM7L,Timer 7 Low Register"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "TIM8L,Timer 8 Low Register"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "TIM9L,Timer 9 Low Register"
|
|
width 15.
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "TIM6HLSTEP,Timer 6 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "TIM7HLSTEP,Timer 7 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "TIM8HLSTEP,Timer 8 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "TIM9HLSTEP,Timer 9 High and Low Register"
|
|
bitfld.long 0x00 31. " Hi_Step_Dir ,High step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 16.--30. 1. " Hi_Step ,High step"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Lo_Step_Dir ,Low step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Lo_Step ,Low step"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "TIM6RELSTEP,Timer 6 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "TIM7RELSTEP,Timer 7 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "TIM8RELSTEP,Timer 8 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "TIM9RELSTEP,Timer 9 Reload Step Register"
|
|
bitfld.long 0x00 15. " Rel_Dir ,Reload step direction" "Subtract,Add"
|
|
hexmask.long.word 0x00 0.--14. 1. " Rel_Step ,Reload step"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TIM0RELCC,Timer 0 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TIM1RELCC,Timer 1 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TIM2RELCC,Timer 2 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TIM3RELCC,Timer 3 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TIM4RELCC,Timer 4 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TIM5RELCC,Timer 5 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TIM6RELCC,Timer 6 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TIM7RELCC,Timer 7 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TIM8RELCC,Timer 8 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TIM9RELCC,Timer 9 Reload Count and Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Comp_Rel_Cnt ,Timer Compare register or Timer Reload Bits 31:16 Count register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Rel_15:0 ,Timer Reload Bits 15:00 Count register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIM0RDCAP,Timer 0 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TIM1RDCAP,Timer 1 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TIM2RDCAP,Timer 2 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TIM3RDCAP,Timer 3 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TIM4RDCAP,Timer 4 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TIM5RDCAP,Timer 5 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TIM6RDCAP,Timer 6 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TIM7RDCAP,Timer 7 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TIM8RDCAP,Timer 8 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "TIM9RDCAP,Timer 9 Read and Capture Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " Cap_Read ,Timer Capture register or Timer Read Bits 31:16 register"
|
|
hexmask.long.word 0x00 0.--15. 1. " Read_15:0 ,Timer Read Bits 15:00 register"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTVADDR0,Interrupt Vector Address Register Level 0"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTVADDR1,Interrupt Vector Address Register Level 1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTVADDR2,Interrupt Vector Address Register Level 2"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "INTVADDR3,Interrupt Vector Address Register Level 3"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "INTVADDR4,Interrupt Vector Address Register Level 4"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INTVADDR5,Interrupt Vector Address Register Level 5"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "INTVADDR6,Interrupt Vector Address Register Level 6"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "INTVADDR7,Interrupt Vector Address Register Level 7"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "INTVADDR8,Interrupt Vector Address Register Level 8"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "INTVADDR9,Interrupt Vector Address Register Level 9"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "INTVADDR10,Interrupt Vector Address Register Level 10"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "INTVADDR11,Interrupt Vector Address Register Level 11"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "INTVADDR14,Interrupt Vector Address Register Level 14"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTVADDR15,Interrupt Vector Address Register Level 15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTVADDR16,Interrupt Vector Address Register Level 16"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTVADDR17,Interrupt Vector Address Register Level 17"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTVADDR18,Interrupt Vector Address Register Level 18"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "INTVADDR19,Interrupt Vector Address Register Level 19"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "INTVADDR20,Interrupt Vector Address Register Level 20"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "INTVADDR21,Interrupt Vector Address Register Level 21"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "INTVADDR22,Interrupt Vector Address Register Level 22"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "INTVADDR23,Interrupt Vector Address Register Level 23"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "INTVADDR24,Interrupt Vector Address Register Level 24"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "INTVADDR25,Interrupt Vector Address Register Level 25"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "INTVADDR26,Interrupt Vector Address Register Level 26"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTVADDR27,Interrupt Vector Address Register Level 27"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTVADDR28,Interrupt Vector Address Register Level 28"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "INTVADDR29,Interrupt Vector Address Register Level 29"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "INTVADDR30,Interrupt Vector Address Register Level 30"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "INTVADDR31,Interrupt Vector Address Register Level 31"
|
|
width 15.
|
|
group.long 0x144++0x0b
|
|
line.long 0x00 "INTCONFIG0,Interrupt Configuration 0 Register"
|
|
bitfld.long 0x00 31. " IE0 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV0 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT0 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD0 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IE1 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INV1 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IT1 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 16.--20. " ISD1 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE2 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV2 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT2 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD2 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE3 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV3 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT3 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD3 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG1,Interrupt Configuration 1 Register"
|
|
bitfld.long 0x04 31. " IE4 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV4 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT4 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD4 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE5 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV5 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT5 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD5 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE7 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV7 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT7 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD7 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG2,Interrupt Configuration 2 Register"
|
|
bitfld.long 0x08 31. " IE8 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV8 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT8 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD8 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE9 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV9 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT9 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD9 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE10 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV10 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT10 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD10 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE11 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV11 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT11 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD11 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x154++0xf
|
|
line.long 0x00 "INTCONFIG4,Interrupt Configuration 4 Register"
|
|
bitfld.long 0x00 31. " IE16 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV16 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT16 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD16 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE18 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV18 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT18 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD18 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE19 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV19 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT19 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD19 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG5,Interrupt Configuration 5 Register"
|
|
bitfld.long 0x04 31. " IE20 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV20 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT20 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD20 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE21 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV21 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT21 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD21 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IE22 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " INV22 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IT22 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 8.--12. " ISD22 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE23 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV23 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT23 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD23 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG6,Interrupt Configuration 6 Register"
|
|
bitfld.long 0x08 31. " IE24 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV24 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT24 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD24 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE25 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV25 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT25 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD25 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE26 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV26 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT26 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD26 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE27 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV27 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT27 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD27 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x0c "INTCONFIG7,Interrupt Configuration 7 Register"
|
|
bitfld.long 0x0c 31. " IE28 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " INV28 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " IT28 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 24.--28. " ISD28 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 23. " IE29 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 22. " INV29 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " IT29 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 16.--20. " ISD29 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " IE30 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " INV30 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IT30 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 8.--12. " ISD30 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IE31 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " INV31 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " IT31 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 0.--4. " ISD31 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,Ext DMA,CPU Wake Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,UART A Interrupt,UART B Interrupt,UART C Interrupt,UART D Interrupt,SPI Interrupt,Reserved,Reserved,ADC Interrupt,Early Power Loss Interrupt,I2C Interrupt,RTC Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8,Timer Interrupt 9,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ISADDR,Interrupt Service Routine Address Register"
|
|
rgroup.long 0x168++0x07
|
|
line.long 0x00 "ISAR,Interrupt Status Active"
|
|
bitfld.long 0x00 31. " ISA31 ,External Interrupt 3 status" "Not active,Active"
|
|
bitfld.long 0x00 30. " ISA30 ,External Interrupt 2 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ISA29 ,External Interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 28. " ISA28 ,External Interrupt 0 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ISA27 ,Timer Interrupt 9 status" "Not active,Active"
|
|
bitfld.long 0x00 26. " ISA26 ,Timer Interrupt 8 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISA25 ,Timer Interrupt 7 status " "Not active,Active"
|
|
bitfld.long 0x00 24. " ISA24 ,Timer Interrupt 6 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ISA23 ,Timer Interrupt 5 status " "Not active,Active"
|
|
bitfld.long 0x00 22. " ISA22 ,Timer Interrupt 4 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISA21 ,Timer Interrupt 3 status " "Not active,Active"
|
|
bitfld.long 0x00 20. " ISA20 ,Timer Interrupt 2 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISA19 ,Timer Interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 18. " ISA18 ,Timer Interrupt 0 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ISA17 ,RTC Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 16. " ISA16 ,I2C Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISA15 ,Early Power Loss Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 14. " ISA14 ,ADC Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ISA11 ,SPI Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 10. " ISA10 ,UART D Interrupt " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISA9 ,UART C Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 8. " ISA8 ,UART B Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISA7 ,UART A Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 6. " ISA6 ,Ethernet Phy Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ISA5 ,Ethernet Module Transmit Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 4. " ISA4 ,Ethernet Module Receive Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISA3 ,CPU Wake Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 2. " ISA2 ,Ext DMA Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISA1 ,AHB Bus Error Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 0. " ISA0 ,Watchdog Timer Interrupt status " "Not active,Active"
|
|
line.long 0x04 "ISRAW,Interrupt Status Raw Register"
|
|
bitfld.long 0x04 31. " ISRAW31 ,External Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " ISRAW30 ,External Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " ISRAW29 ,External Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " ISRAW28 ,External Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " ISRAW27 ,Timer Interrupt 9 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " ISRAW26 ,Timer Interrupt 8 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ISRAW25 ,Timer Interrupt 7 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " ISRAW24 ,Timer Interrupt 6 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ISRAW23 ,Timer Interrupt 5 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " ISRAW22 ,Timer Interrupt 4 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ISRAW21 ,Timer Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " ISRAW20 ,Timer Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ISRAW19 ,Timer Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " ISRAW18 ,Timer Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ISRAW17 ,RTC Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " ISRAW16 ,I2C Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ISRAW15 ,Early Power Loss Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " ISRAW14 ,ADC Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " ISRAW11 ,SPI Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " ISRAW10 ,UART D Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ISRAW9 ,UART C Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " ISRAW8 ,UART B Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ISRAW7 ,UART A Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " ISRAW6 ,Ethernet Phy Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ISRAW5 ,Ethernet Module Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ISRAW4 ,Ethernet Module Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ISRAW3 ,CPU Wake Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " ISRAW2 ,Ext DMA Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ISRAW1 ,AHB Bus Error Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ISRAW0 ,Watchdog Timer Interrupt status " "No interrupt,Interrupt"
|
|
width 15.
|
|
group.long 0x174++0x0b
|
|
line.long 0x00 "SWC,Software Watchdog Configuration"
|
|
bitfld.long 0x00 8. " Debug ,Debug mode" "Enabled,Disabled"
|
|
bitfld.long 0x00 7. " SWWE ,Software watchdog enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWWI ,Software watchdog interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWWIC ,Software watchdog interrupt response" "Interrupt,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SWTCS ,Software watchdog timer clock select" "System memory clock/2,System memory clock/4,System memory clock/8,System memory clock/16,System memory clock/32,System memory clock/64,?..."
|
|
line.long 0x04 "SWT,Software Watchdog Timer"
|
|
line.long 0x08 "CCR,Clock Configuration Register"
|
|
bitfld.long 0x08 29.--31. " CSC ,Clock scale control" "Full speed,Div by 2,Div by 4,Div by 8,Div by 16,?..."
|
|
bitfld.long 0x08 26.--28. " Max_CSC ,Max clock scale control" "Full speed,Div by 2,Div by 4,Div by 8,Div by 16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 25. " CCSel ,CPU clock select" "AHB,2 x AHB"
|
|
bitfld.long 0x08 17. " MCOut_1 ,Memory clock out 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " MCOut_0 ,Memory clock out 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " EXT_DMA ,External DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IO_hub ,IO hub" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RTC , RTC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " I2C ,I2C" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " AES ,AES" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " ADC ,ADC" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SPI ,SPI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " UART_D ,UART D" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " UART_C ,UART C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " UART_B ,UART B" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UART_A ,UART A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " Eth_MAC ,Ethernet MAC" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "MRR,Module Reset Register"
|
|
bitfld.long 0x00 29.--31. " RST_STAT ,Reset status" "Reserved,External reset_n,External sreset_n,PLL,Software watchdog,AHB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14. " EXT_DMA ,External DMA" "Reset,Enabled"
|
|
bitfld.long 0x00 13. " IO_hub ,IO hub" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I2C ,I2C" "Reset,Enabled"
|
|
bitfld.long 0x00 9. " AES ,AES" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADC , ADC " "Reset,Enabled"
|
|
bitfld.long 0x00 5. " SPI ,SPI" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART_D ,UART D" "Reset,Enabled"
|
|
bitfld.long 0x00 3. " UART_C ,UART C" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_B ,UART B" "Reset,Enabled"
|
|
bitfld.long 0x00 1. " UART_A ,UART A" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Eth_MAC ,Ethernet MAC" "Reset,Enabled"
|
|
if ((d.l(ad:(0xa0900000+0x184))&0x20)==0x0)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ID ,Identification"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AUX/COMP ,Auxiliary analog comparator status" "Level is below 2.4V,Level is above 2.4V"
|
|
bitfld.long 0x00 5. " Boot_mode ,Boot mode" "SPI,Flash"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " Boot_width ,Boot width" "Reserved,8-bit,24-bit,16-bit"
|
|
bitfld.long 0x00 2. " End_mode ,Endian mode" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Mis_bus_resp ,Misaligned bus address response mode" "Allowed,Not allowed"
|
|
bitfld.long 0x00 0. " Int_reg_acc ,Internal register access mode bit 0" "PRIVILEGED only,PRIVILEGED/USER"
|
|
else
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ID ,Identification"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AUX/COMP ,Auxiliary analog comparator status" "Level is below 2.4V,Level is above 2.4V"
|
|
bitfld.long 0x00 5. " Boot_mode ,Boot mode" "SPI,Flash"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " Boot_width ,Boot width" "8-bit,32-bit,32-bit,16-bit"
|
|
bitfld.long 0x00 2. " End_mode ,Endian mode" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Mis_bus_resp ,Misaligned bus address response mode" "Allowed,Not allowed"
|
|
bitfld.long 0x00 0. " Int_reg_acc ,Internal register access mode bit 0" "PRIVILEGED only,PRIVILEGED/USER"
|
|
endif
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "PLLCONF,PLL Configuration Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " NF ,PLL feedback divider"
|
|
bitfld.long 0x00 7. " BP ,PLL bypass" "Enabled,Bypassed"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " OD ,PLL output divider" "0,1,2,3"
|
|
bitfld.long 0x00 0.--4. " NR ,PLL reference clock divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 15.
|
|
rgroup.long 0x18c++0x03
|
|
line.long 0x00 "ACTINTLIDSTAT,Active Interrupt Level ID Status Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INTID ,Interrupt ID"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "PWRMAN,Power Managment"
|
|
bitfld.long 0x00 31. " Slp_en ,Deprecated Chip sleep enable" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 30. " HW_clk_scale ,Hardware clock scale control" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 21. " MemSRFEn ,SDRAM self refresh control" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WakeIntClr ,CPU wake interrupt clear" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 19. " Ext_Int_3 ,External interrupt 3 interrupt wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 18. " Ext_Int_2 ,External interrupt 2 interrupt wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 17. " Ext_Int_1 ,External interrupt 1 interrupt wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 16. " Ext_Int_0 ,External interrupt 0 interrupt wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RTC ,RTC wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I2C ,I2C wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SPI ,SPI wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART_D ,UART D wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 3. " UART_C ,UART C wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_B ,UART B wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UART_A ,UART A wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Enet ,Ethernet wakeup" "No interrupt -> Not wakeup,Interrupt -> Wakeup"
|
|
rgroup.long 0x22c++0x03
|
|
line.long 0x00 "AHBBUSACTSTAT,AHB Bus Activity Status"
|
|
hexmask.long.long 0x00 0.--31. 1. " Act_stat ,Bus activity status"
|
|
group.long 0x1D0++0x07
|
|
line.long 0x00 "SMCS0DMB,System Memory Chip Select 0 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0MMSK,System Memory Chip Select 0 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD0 ,Chip select 0 disable" "Yes,No"
|
|
group.long 0x1D8++0x07
|
|
line.long 0x00 "SMCS1DMB,System Memory Chip Select 1 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1MMSK,System Memory Chip Select 1 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD1 ,Chip select 1 disable" "Yes,No"
|
|
group.long 0x1E0++0x07
|
|
line.long 0x00 "SMCS2DMB,System Memory Chip Select 2 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2MMSK,System Memory Chip Select 2 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD2 ,Chip select 2 disable" "Yes,No"
|
|
group.long 0x1E8++0x07
|
|
line.long 0x00 "SMCS3DMB,System Memory Chip Select 3 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3MMSK,System Memory Chip Select 3 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD3 ,Chip select 3 disable" "Yes,No"
|
|
group.long 0x1F0++0x07
|
|
line.long 0x00 "SMCS0SMB,System Memory Chip Select 0 Static Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0SMMSK,System Memory Chip Select 0 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD0 ,Chip select 0 disable" "Yes,No"
|
|
group.long 0x1F8++0x07
|
|
line.long 0x00 "SMCS1SMB,System Memory Chip Select 1 Static Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1SMMSK,System Memory Chip Select 1 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD1 ,Chip select 1 disable" "Yes,No"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "SMCS2SMB,System Memory Chip Select 2 Static Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2SMMSK,System Memory Chip Select 2 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD2 ,Chip select 2 disable" "Yes,No"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "SMCS3SMB,System Memory Chip Select 3 Static Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3SMMSK,System Memory Chip Select 3 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSD3 ,Chip select 3 disable" "Yes,No"
|
|
rgroup.long 0x210++0x03
|
|
line.long 0x000 "GENID,Gen ID Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " GENID ,General Purpose ID register"
|
|
width 15.
|
|
if ((d.l(ad:(0xa0900000+0x214))&0x1)==0x1)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x218))&0x1)==0x1)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x21C))&0x1)==0x1)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x220))&0x1)==0x1)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "RTCMCTRL,RTC Module Control Register"
|
|
bitfld.long 0x00 4. " Standby_status ,RTC standby mode status" "Standby,Active"
|
|
bitfld.long 0x00 3. " Rdy_int ,RTC clock ready interrupt status" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Int_stat ,RTC module interrupt status" "Not asserted,Asserted"
|
|
bitfld.long 0x00 1. " Standby_mode ,RTC standby mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Clk_rdy_int ,RTC clock ready interrupt clear" "Enabled,Cleared"
|
|
width 0xb
|
|
elif (cpu()=="NS9360")
|
|
width 15.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "GENCR,AHB Arbiter Gen Configuration Register"
|
|
bitfld.long 0x00 0. " EXMA ,Arbiter control" "Slv1,Slv0"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BRC0,BRC0 Register"
|
|
bitfld.long 0x00 31. " CEB0 ,Channel 0 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF0 ,Bandwidth reduction field channel 0" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR0 ,Hmaster channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB1 ,Channel 1 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF1 ,Bandwidth reduction field channel 1" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR1 ,Hmaster channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB2 ,Channel 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF2 ,Bandwidth reduction field channel 2" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR2 ,Hmaster channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB3 ,Channel 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF3 ,Bandwidth reduction field channel 3" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR3 ,Hmaster channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BRC1,BRC1 Register"
|
|
bitfld.long 0x00 31. " CEB4 ,Channel 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF4 ,Bandwidth reduction field channel 4" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR4 ,Hmaster channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB5 ,Channel 5 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF5 ,Bandwidth reduction field channel 5" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR5 ,Hmaster channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB6 ,Channel 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF6 ,Bandwidth reduction field channel 6" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR6 ,Hmaster channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB7 ,Channel 7 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF7 ,Bandwidth reduction field channel 7" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR7 ,Hmaster channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "BRC2,BRC2 Register"
|
|
bitfld.long 0x00 31. " CEB8 ,Channel 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF8 ,Bandwidth reduction field channel 8" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR8 ,Hmaster channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB9 ,Channel 9 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF9 ,Bandwidth reduction field channel 9" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR9 ,Hmaster channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB10 ,Channel 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF10 ,Bandwidth reduction field channel 10" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR10 ,Hmaster channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB11 ,Channel 11 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF11 ,Bandwidth reduction field channel 11" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR11 ,Hmaster channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "BRC3,BRC3 Register"
|
|
bitfld.long 0x04 31. " CEB12 ,Channel 12 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--29. " BRF12 ,Bandwidth reduction field channel 12" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 24.--27. " HMSTR12 ,Hmaster channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 23. " CEB13 ,Channel 13 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " BRF13 ,Bandwidth reduction field channel 13" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 16.--19. " HMSTR13 ,Hmaster channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CEB14 ,Channel 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--13. " BRF14 ,Bandwidth reduction field channel 14" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " HMSTR14 ,Hmaster channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " CEB15 ,Channel 15 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " BRF15 ,Bandwidth reduction field channel 15" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 0.--3. " HMSTR15 ,Hmaster channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x1F
|
|
line.long 0x0 "TRC0,Timer 0 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x4 "TRC1,Timer 1 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x8 "TRC2,Timer 2 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0xC "TRC3,Timer 3 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x10 "TRC4,Timer 4 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x14 "TRC5,Timer 5 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x18 "TRC6,Timer 6 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x1C "TRC7,Timer 7 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
group.long 0x84++0x1F
|
|
line.long 0x0 "TR0,Timer 0 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x4 "TR1,Timer 1 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x8 "TR2,Timer 2 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0xC "TR3,Timer 3 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x10 "TR4,Timer 4 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x14 "TR5,Timer 5 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x18 "TR6,Timer 6 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x1C "TR7,Timer 7 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "TIMCTRL0,Timer 0 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "TIMCTRL1,Timer 1 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "TIMCTRL2,Timer 2 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "TIMCTRL3,Timer 3 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "TIMCTRL4,Timer 4 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "TIMCTRL5,Timer 5 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "TIMCTRL6,Timer 6 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock / 64,External"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTVADDR0,Interrupt Vector Address Register Level 0"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTVADDR1,Interrupt Vector Address Register Level 1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTVADDR2,Interrupt Vector Address Register Level 2"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "INTVADDR4,Interrupt Vector Address Register Level 4"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INTVADDR5,Interrupt Vector Address Register Level 5"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "INTVADDR6,Interrupt Vector Address Register Level 6"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "INTVADDR7,Interrupt Vector Address Register Level 7"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "INTVADDR8,Interrupt Vector Address Register Level 8"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "INTVADDR9,Interrupt Vector Address Register Level 9"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "INTVADDR10,Interrupt Vector Address Register Level 10"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "INTVADDR11,Interrupt Vector Address Register Level 11"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "INTVADDR12,Interrupt Vector Address Register Level 12"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "INTVADDR13,Interrupt Vector Address Register Level 13"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "INTVADDR14,Interrupt Vector Address Register Level 14"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTVADDR15,Interrupt Vector Address Register Level 15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTVADDR16,Interrupt Vector Address Register Level 16"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTVADDR17,Interrupt Vector Address Register Level 17"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTVADDR18,Interrupt Vector Address Register Level 18"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "INTVADDR19,Interrupt Vector Address Register Level 19"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "INTVADDR20,Interrupt Vector Address Register Level 20"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "INTVADDR21,Interrupt Vector Address Register Level 21"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "INTVADDR22,Interrupt Vector Address Register Level 22"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "INTVADDR23,Interrupt Vector Address Register Level 23"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "INTVADDR24,Interrupt Vector Address Register Level 24"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "INTVADDR25,Interrupt Vector Address Register Level 25"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "INTVADDR26,Interrupt Vector Address Register Level 26"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTVADDR27,Interrupt Vector Address Register Level 27"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTVADDR28,Interrupt Vector Address Register Level 28"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "INTVADDR29,Interrupt Vector Address Register Level 29"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "INTVADDR30,Interrupt Vector Address Register Level 30"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "INTVADDR31,Interrupt Vector Address Register Level 31"
|
|
width 15.
|
|
group.long 0x144++0x0b
|
|
line.long 0x00 "INTCONFIG0,Interrupt Configuration 0 Register"
|
|
bitfld.long 0x00 31. " IE0 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV0 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT0 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD0 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IE1 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INV1 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IT1 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 16.--20. " ISD1 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE2 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV2 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT2 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD2 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE3 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV3 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT3 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD3 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG1,Interrupt Configuration 1 Register"
|
|
bitfld.long 0x04 31. " IE4 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV4 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT4 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD4 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE5 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV5 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT5 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD5 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
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bitfld.long 0x04 7. " IE7 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV7 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT7 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD7 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG2,Interrupt Configuration 2 Register"
|
|
bitfld.long 0x08 31. " IE8 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV8 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT8 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD8 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
textline " "
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bitfld.long 0x08 23. " IE9 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV9 ,Invert" "Not inverted,Inverted"
|
|
textline " "
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bitfld.long 0x08 21. " IT9 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD9 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
textline " "
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bitfld.long 0x08 15. " IE10 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV10 ,Invert" "Not inverted,Inverted"
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|
textline " "
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bitfld.long 0x08 13. " IT10 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD10 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
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bitfld.long 0x08 7. " IE11 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV11 ,Invert" "Not inverted,Inverted"
|
|
textline " "
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bitfld.long 0x08 5. " IT11 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD11 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
group.long 0x154++0xf
|
|
line.long 0x00 "INTCONFIG4,Interrupt Configuration 4 Register"
|
|
bitfld.long 0x00 31. " IE16 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV16 ,Invert" "Not inverted,Inverted"
|
|
textline " "
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bitfld.long 0x00 29. " IT16 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD16 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
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bitfld.long 0x00 15. " IE18 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV18 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT18 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD18 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE19 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV19 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT19 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD19 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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line.long 0x04 "INTCONFIG5,Interrupt Configuration 5 Register"
|
|
bitfld.long 0x04 31. " IE20 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV20 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT20 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD20 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
|
|
bitfld.long 0x04 23. " IE21 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV21 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT21 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD21 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
|
|
bitfld.long 0x04 15. " IE22 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " INV22 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IT22 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 8.--12. " ISD22 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
|
|
bitfld.long 0x04 7. " IE23 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV23 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
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bitfld.long 0x04 5. " IT23 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD23 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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line.long 0x08 "INTCONFIG6,Interrupt Configuration 6 Register"
|
|
bitfld.long 0x08 31. " IE24 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV24 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT24 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD24 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
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bitfld.long 0x08 23. " IE25 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV25 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT25 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD25 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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textline " "
|
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bitfld.long 0x08 15. " IE26 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV26 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT26 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD26 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
textline " "
|
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bitfld.long 0x08 7. " IE27 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV27 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT27 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD27 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
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line.long 0x0c "INTCONFIG7,Interrupt Configuration 7 Register"
|
|
bitfld.long 0x0c 31. " IE28 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " INV28 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " IT28 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 24.--28. " ISD28 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 23. " IE29 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 22. " INV29 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " IT29 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 16.--20. " ISD29 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " IE30 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " INV30 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IT30 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 8.--12. " ISD30 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
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textline " "
|
|
bitfld.long 0x0c 7. " IE31 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " INV31 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " IT31 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 0.--4. " ISD31 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Bridge Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,Serial Port B Receive Interrupt,Serial Port B Transmit Interrupt,Serial Port A Receive Interrupt,Serial Port A Transmit Interrupt,Serial Port C Receive Interrupt,Serial Port C Transmit Interrupt,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,RTC Interrupt,USB Host Interrupt,USB Device Interrupt,IEEE 1284 Interrupt,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ISADDR,Interrupt Service Routine Address Register"
|
|
rgroup.long 0x168++0x07
|
|
line.long 0x00 "ISAR,Interrupt Status Active"
|
|
bitfld.long 0x00 31. " ISA31 ,External Interrupt 3 status active level 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ISA30 ,External Interrupt 2 status active level 30" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ISA29 ,External Interrupt 1 status active level 29" "Not active,Active"
|
|
bitfld.long 0x00 28. " ISA28 ,External Interrupt 0 status active level 28" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ISA27 ,IEEE 1284 Interrupt status active level 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ISA26 ,USB Device Interrupt status active level 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISA25 ,USB Host Interrupt status active level 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ISA24 ,RTC Interrupt status active level 24" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ISA23 ,Timer Interrupt 7 status active level 23" "Not active,Active"
|
|
bitfld.long 0x00 22. " ISA22 ,Timer Interrupt 6 status active level 22" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISA21 ,Timer Interrupt 5 status active level 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ISA20 ,Timer Interrupt 4 status active level 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISA19 ,Timer Interrupt 3 status active level 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ISA18 ,Timer Interrupt 2 status active level 18" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ISA17 ,Timer Interrupt 1 status active level 17" "Not active,Active"
|
|
bitfld.long 0x00 16. " ISA16 ,Timer Interrupt 0 status active level 16" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISA15 ,BBus DMA Interrupt status active level 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ISA14 ,I2C Interrupt status active level 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISA13 ,Serial Port C Transmit Interrupt status active level 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ISA12 ,Serial Port C Receive Interrupt status active level 12" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ISA11 ,Serial Port A Transmit Interrupt status active level 11" "Not active,Active"
|
|
bitfld.long 0x00 10. " ISA10 ,Serial Port A Receive Interrupt status active level 10" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISA9 ,Serial Port B Transmit Interrupt status active level 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ISA8 ,Serial Port B Receive Interrupt status active level 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISA7 ,LCD Module interrupt status active level 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ISA6 ,Ethernet Phy Interrupt status active level 6" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ISA5 ,Ethernet Module Transmit Interrupt status active level 5" "Not active,Active"
|
|
bitfld.long 0x00 4. " ISA4 ,Ethernet Module Receive Interrupt status active level 4" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ISA2 ,BBus Bridge Aggregate Interrupt status active level 2" "Not active,Active"
|
|
bitfld.long 0x00 1. " ISA1 ,AHB Bus Error Interrupt status active level 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISA0 ,Watchdog Timer Interrupt status active level 0" "Not active,Active"
|
|
line.long 0x04 "ISRAW,Interrupt Status Raw Register"
|
|
bitfld.long 0x04 31. " ISRAW31 ,External Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " ISRAW30 ,External Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " ISRAW29 ,External Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " ISRAW28 ,External Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " ISRAW27 ,IEEE 1284 Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " ISRAW26 ,USB Device Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ISRAW25 ,USB Host Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " ISRAW24 ,RTC Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ISRAW23 ,Timer Interrupt 7 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " ISRAW22 ,Timer Interrupt 6 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ISRAW21 ,Timer Interrupt 5 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " ISRAW20 ,Timer Interrupt 4 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ISRAW19 ,Timer Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " ISRAW18 ,Timer Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ISRAW17 ,Timer Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " ISRAW16 ,Timer Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ISRAW15 ,BBus DMA Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " ISRAW14 ,I2C Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ISRAW13 ,Serial Port C Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " ISRAW12 ,Serial Port C Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " ISRAW11 ,Serial Port A Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " ISRAW10 ,Serial Port A Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ISRAW9 ,Serial Port B Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " ISRAW8 ,Serial Port B Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ISRAW7 ,LCD Module interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " ISRAW6 ,Ethernet Phy Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ISRAW5 ,Ethernet Module Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ISRAW4 ,Ethernet Module Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ISRAW2 ,BBus Bridge Aggregate Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ISRAW1 ,AHB Bus Error Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ISRAW0 ,Watchdog Timer Interrupt status " "No interrupt,Interrupt"
|
|
width 15.
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "TIS,Timer Interrupt Status Register"
|
|
bitfld.long 0x00 15. " TIS15 ,Timer interrupt requests timer 15," "Not active,Active"
|
|
bitfld.long 0x00 14. " TIS14 ,Timer interrupt requests timer 14," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TIS13 ,Timer interrupt requests timer 13," "Not active,Active"
|
|
bitfld.long 0x00 12. " TIS12 ,Timer interrupt requests timer 12," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TIS11 ,Timer interrupt requests timer 11," "Not active,Active"
|
|
bitfld.long 0x00 10. " TIS10 ,Timer interrupt requests timer 10," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TIS9 ,Timer interrupt requests timer 9," "Not active,Active"
|
|
bitfld.long 0x00 8. " TIS8 ,Timer interrupt requests timer 8," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIS7 ,Timer interrupt requests timer 7," "Not active,Active"
|
|
bitfld.long 0x00 6. " TIS6 ,Timer interrupt requests timer 6," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIS5 ,Timer interrupt requests timer 5," "Not active,Active"
|
|
bitfld.long 0x00 4. " TIS4 ,Timer interrupt requests timer 4," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIS3 ,Timer interrupt requests timer 3," "Not active,Active"
|
|
bitfld.long 0x00 2. " TIS2 ,Timer interrupt requests timer 2," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIS1 ,Timer interrupt requests timer 1," "Not active,Active"
|
|
bitfld.long 0x00 0. " TIS0 ,Timer interrupt requests timer 0," "Not active,Active"
|
|
group.long 0x174++0x0b
|
|
line.long 0x00 "SWC,Software Watchdog Configuration"
|
|
bitfld.long 0x00 8. " SDBG ,CPU debug mode" "Timer run,Timer stops"
|
|
bitfld.long 0x00 7. " SWWE ,Software watchdog enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWWI ,Software watchdog interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWWIC ,Software watchdog interrupt response" "Interrupt,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SWTCS ,Software watchdog timer clock select" "CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,?..."
|
|
line.long 0x04 "SWT,Software Watchdog Timer"
|
|
line.long 0x08 "CCR,Clock Configuration Register"
|
|
bitfld.long 0x08 18. " MC0 ,Memory clock 0" "Enabled,Disabled"
|
|
bitfld.long 0x08 17. " BBDMA ,BBus DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " 1284 ,IEEE 1284" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " USBD ,USB device" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 14. " USBH ,USB host" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " SERCD ,Serial C/D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 12. " SERAB ,Serial A/B" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RTC ,Real time clock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " I2C ,I2C" "Disabled,Enabled"
|
|
bitfld.long 0x08 7.--9. " LPCS ,LCD panel clock select" "AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,LCD clock,LCD clock,LCD clock,LCD clock"
|
|
textline " "
|
|
bitfld.long 0x08 6. " BBC ,BBus" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " LCC ,LCD controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " MCC ,Memory controller" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " MACC ,Ethernet MAC" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RSC,Reset and Sleep Control Register"
|
|
bitfld.long 0x00 24.--26. " RST_STAT ,Reset status" "Reserved,External reset_n,External sreset_n,PLL,Software watchdog,AHB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 21. " BBW ,BBus aggregate interrupt wakeup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " I2CW ,I2C interrupt wake up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CSE ,CPU sleep enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SMWE ,Serial character match wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EWE ,Ethernet wake-up enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EI0WE ,Ext interrupt 0 wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BBT ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 5. " LCDC ,LCD controller" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MEMC ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 0. " MACM ,Ethernet MAC" "Reset,Enabled"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ID ,Identification"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BMM ,Bootup memory mode" "SPI,Flash"
|
|
bitfld.long 0x00 10. " CS1DB ,Chip select 1 configuration HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CS1DW ,Chip select 1 data width HW strap setting" "8 bits,16 bits,32 bits,?..."
|
|
bitfld.long 0x00 5. " CS1P ,Chip select 1 polarity HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDM ,Endian mode" "Little,Big"
|
|
bitfld.long 0x00 0. " IRAM0 ,Internal register access mode bit 0" "PRIVILEGED only,PRIVILEGED/USER"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "PLLCONF,PLL Configuration Register"
|
|
bitfld.long 0x00 23.--24. " PLLFS ,PLL FS status [1:0]" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. " PLLND ,PLL ND status[4:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PLLSW ,PLL SW change" "Not changed,Changed"
|
|
bitfld.long 0x00 9. " PLLBW ,PLL bypass SW" "Low,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " FSEL ,PLL frequency select (FS) [1:0] PLL Output divider value" "1,2,4,8"
|
|
bitfld.long 0x00 0.--4. " NDSW ,PLL ND SW [4:0]" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 15.
|
|
rgroup.long 0x18c++0x03
|
|
line.long 0x00 "ACTINTLIDSTAT,Active Interrupt Level Status Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INTID ,Interrupt ID"
|
|
group.long 0x1D0++0x07
|
|
line.long 0x00 "SMCS0DMB,System Memory Chip Select 0 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0MMSK,System Memory Chip Select 0 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE0 ,Chip select 0 enable" "Disabled,Enabled"
|
|
group.long 0x1D8++0x07
|
|
line.long 0x00 "SMCS1DMB,System Memory Chip Select 1 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1MMSK,System Memory Chip Select 1 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE1 ,Chip select 1 enable" "Disabled,Enabled"
|
|
group.long 0x1E0++0x07
|
|
line.long 0x00 "SMCS2DMB,System Memory Chip Select 2 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2MMSK,System Memory Chip Select 2 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE2 ,Chip select 2 enable" "Disabled,Enabled"
|
|
group.long 0x1E8++0x07
|
|
line.long 0x00 "SMCS3DMB,System Memory Chip Select 3 Dynamic Memory Base"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3MMSK,System Memory Chip Select 3 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE3 ,Chip select 3 enable" "Disabled,Enabled"
|
|
group.long 0x1F0++0x07
|
|
line.long 0x00 "SMCS0SMB,System Memory Chip Select 0 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0SMMSK,System Memory Chip Select 0 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE0 ,Chip select 0 enable" "Disabled,Enabled"
|
|
group.long 0x1F8++0x07
|
|
line.long 0x00 "SMCS1SMB,System Memory Chip Select 1 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1SMMSK,System Memory Chip Select 1 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE1 ,Chip select 1 enable" "Disabled,Enabled"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "SMCS2SMB,System Memory Chip Select 2 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2SMMSK,System Memory Chip Select 2 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE2 ,Chip select 2 enable" "Disabled,Enabled"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "SMCS3SMB,System Memory Chip Select 3 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3SMMSK,System Memory Chip Select 3 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
bitfld.long 0x04 0. " CSE3 ,Chip select 3 enable" "Disabled,Enabled"
|
|
width 15.
|
|
rgroup.long 0x210++0x03
|
|
line.long 0x000 "GENID,Gen ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " GENID ,General Purpose ID register"
|
|
width 15.
|
|
if ((d.l(ad:(0xa0900000+0x214))&0x1)==0x1)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x218))&0x1)==0x1)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x21C))&0x1)==0x1)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x220))&0x1)==0x1)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "RTCCC,RTC Clock Control Register"
|
|
hexmask.long 0x00 0.--31. 1. " RTCCLK ,RTC clock"
|
|
width 0xb
|
|
elif (cpu()=="NS9750")
|
|
width 15.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "GENCR,AHB Arbiter Gen Configuration Register"
|
|
bitfld.long 0x00 0. " EXMA ,Arbiter control" "Slv1,Slv0"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BRC0,BRC0 Register"
|
|
bitfld.long 0x00 31. " CEB0 ,Channel 0 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF0 ,Bandwidth reduction field channel 0" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR0 ,Hmaster channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB1 ,Channel 1 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF1 ,Bandwidth reduction field channel 1" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR1 ,Hmaster channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB2 ,Channel 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF2 ,Bandwidth reduction field channel 2" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR2 ,Hmaster channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB3 ,Channel 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF3 ,Bandwidth reduction field channel 3" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR3 ,Hmaster channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BRC1,BRC1 Register"
|
|
bitfld.long 0x00 31. " CEB4 ,Channel 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF4 ,Bandwidth reduction field channel 4" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR4 ,Hmaster channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB5 ,Channel 5 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF5 ,Bandwidth reduction field channel 5" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR5 ,Hmaster channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB6 ,Channel 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF6 ,Bandwidth reduction field channel 6" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR6 ,Hmaster channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB7 ,Channel 7 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF7 ,Bandwidth reduction field channel 7" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR7 ,Hmaster channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "BRC2,BRC2 Register"
|
|
bitfld.long 0x00 31. " CEB8 ,Channel 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF8 ,Bandwidth reduction field channel 8" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR8 ,Hmaster channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB9 ,Channel 9 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF9 ,Bandwidth reduction field channel 9" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR9 ,Hmaster channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB10 ,Channel 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF10 ,Bandwidth reduction field channel 10" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR10 ,Hmaster channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB11 ,Channel 11 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF11 ,Bandwidth reduction field channel 11" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR11 ,Hmaster channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "BRC3,BRC3 Register"
|
|
bitfld.long 0x04 31. " CEB12 ,Channel 12 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--29. " BRF12 ,Bandwidth reduction field channel 12" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 24.--27. " HMSTR12 ,Hmaster channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 23. " CEB13 ,Channel 13 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " BRF13 ,Bandwidth reduction field channel 13" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 16.--19. " HMSTR13 ,Hmaster channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CEB14 ,Channel 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--13. " BRF14 ,Bandwidth reduction field channel 14" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " HMSTR14 ,Hmaster channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " CEB15 ,Channel 15 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " BRF15 ,Bandwidth reduction field channel 15" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 0.--3. " HMSTR15 ,Hmaster channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x3F
|
|
line.long 0x0 "TRC0,Timer 0 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x4 "TRC1,Timer 1 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x8 "TRC2,Timer 2 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0xC "TRC3,Timer 3 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x10 "TRC4,Timer 4 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x14 "TRC5,Timer 5 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x18 "TRC6,Timer 6 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x1C "TRC7,Timer 7 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x20 "TRC8,Timer 8 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x24 "TRC9,Timer 9 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x28 "TRC10,Timer 10 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x2C "TRC11,Timer 11 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x30 "TRC12,Timer 12 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x34 "TRC13,Timer 13 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x38 "TRC14,Timer 14 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x3C "TRC15,Timer 15 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
group.long 0x84++0x3F
|
|
line.long 0x0 "TR0,Timer 0 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x4 "TR1,Timer 1 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x8 "TR2,Timer 2 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0xC "TR3,Timer 3 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x10 "TR4,Timer 4 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x14 "TR5,Timer 5 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x18 "TR6,Timer 6 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x1C "TR7,Timer 7 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x20 "TR8,Timer 8 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x24 "TR9,Timer 9 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x28 "TR10,Timer 10 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x2C "TR11,Timer 11 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x30 "TR12,Timer 12 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x34 "TR13,Timer 13 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x38 "TR14,Timer 14 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x3C "TR15,Timer 15 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTVADDR0,Interrupt Vector Address Register Level 0"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTVADDR1,Interrupt Vector Address Register Level 1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTVADDR2,Interrupt Vector Address Register Level 2"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "INTVADDR4,Interrupt Vector Address Register Level 4"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INTVADDR5,Interrupt Vector Address Register Level 5"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "INTVADDR6,Interrupt Vector Address Register Level 6"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "INTVADDR7,Interrupt Vector Address Register Level 7"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "INTVADDR8,Interrupt Vector Address Register Level 8"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "INTVADDR9,Interrupt Vector Address Register Level 9"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "INTVADDR10,Interrupt Vector Address Register Level 10"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "INTVADDR11,Interrupt Vector Address Register Level 11"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "INTVADDR12,Interrupt Vector Address Register Level 12"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "INTVADDR13,Interrupt Vector Address Register Level 13"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "INTVADDR14,Interrupt Vector Address Register Level 14"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTVADDR15,Interrupt Vector Address Register Level 15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTVADDR16,Interrupt Vector Address Register Level 16"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTVADDR17,Interrupt Vector Address Register Level 17"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTVADDR18,Interrupt Vector Address Register Level 18"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "INTVADDR19,Interrupt Vector Address Register Level 19"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "INTVADDR20,Interrupt Vector Address Register Level 20"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "INTVADDR21,Interrupt Vector Address Register Level 21"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "INTVADDR22,Interrupt Vector Address Register Level 22"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "INTVADDR23,Interrupt Vector Address Register Level 23"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "INTVADDR24,Interrupt Vector Address Register Level 24"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "INTVADDR25,Interrupt Vector Address Register Level 25"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "INTVADDR26,Interrupt Vector Address Register Level 26"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTVADDR27,Interrupt Vector Address Register Level 27"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTVADDR28,Interrupt Vector Address Register Level 28"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "INTVADDR29,Interrupt Vector Address Register Level 29"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "INTVADDR30,Interrupt Vector Address Register Level 30"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "INTVADDR31,Interrupt Vector Address Register Level 31"
|
|
width 15.
|
|
group.long 0x144++0x0b
|
|
line.long 0x00 "INTCONFIG0,Interrupt Configuration 0 Register"
|
|
bitfld.long 0x00 31. " IE0 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV0 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT0 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD0 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IE1 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INV1 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IT1 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 16.--20. " ISD1 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE2 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV2 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT2 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD2 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE3 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV3 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT3 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD3 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG1,Interrupt Configuration 1 Register"
|
|
bitfld.long 0x04 31. " IE4 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV4 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT4 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD4 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE5 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV5 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT5 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD5 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE7 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV7 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT7 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD7 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG2,Interrupt Configuration 2 Register"
|
|
bitfld.long 0x08 31. " IE8 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV8 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT8 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD8 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE9 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV9 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT9 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD9 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE10 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV10 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT10 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD10 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE11 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV11 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT11 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD11 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x154++0xf
|
|
line.long 0x00 "INTCONFIG4,Interrupt Configuration 4 Register"
|
|
bitfld.long 0x00 31. " IE16 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV16 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT16 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD16 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE18 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV18 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT18 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD18 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE19 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV19 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT19 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD19 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG5,Interrupt Configuration 5 Register"
|
|
bitfld.long 0x04 31. " IE20 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV20 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT20 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD20 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE21 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV21 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT21 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD21 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IE22 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " INV22 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IT22 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 8.--12. " ISD22 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE23 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV23 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT23 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD23 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG6,Interrupt Configuration 6 Register"
|
|
bitfld.long 0x08 31. " IE24 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV24 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT24 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD24 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE25 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV25 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT25 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD25 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE26 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV26 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT26 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD26 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE27 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV27 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT27 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD27 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x0c "INTCONFIG7,Interrupt Configuration 7 Register"
|
|
bitfld.long 0x0c 31. " IE28 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " INV28 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " IT28 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 24.--28. " ISD28 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 23. " IE29 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 22. " INV29 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " IT29 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 16.--20. " ISD29 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " IE30 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " INV30 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IT30 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 8.--12. " ISD30 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
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|
textline " "
|
|
bitfld.long 0x0c 7. " IE31 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " INV31 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " IT31 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 0.--4. " ISD31 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,Reserved,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ISADDR,Interrupt Service Routine Address Register"
|
|
rgroup.long 0x168++0x07
|
|
line.long 0x00 "ISAR,Interrupt Status Active"
|
|
bitfld.long 0x00 31. " ISA31 ,External Interrupt 3 status" "Not active,Active"
|
|
bitfld.long 0x00 30. " ISA30 ,External Interrupt 2 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ISA29 ,External Interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 28. " ISA28 ,External Interrupt 0 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ISA27 ,Timer Interrupt 14 and 15 status" "Not active,Active"
|
|
bitfld.long 0x00 26. " ISA26 ,Timer Interrupt 12 and 13 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISA25 ,Timer Interrupt 10 and 11 status" "Not active,Active"
|
|
bitfld.long 0x00 24. " ISA24 ,Timer Interrupt 8 and 9 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ISA23 ,Timer Interrupt 7 status" "Not active,Active"
|
|
bitfld.long 0x00 22. " ISA22 ,Timer Interrupt 6 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISA21 ,Timer Interrupt 5 status" "Not active,Active"
|
|
bitfld.long 0x00 20. " ISA20 ,Timer Interrupt 4 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISA19 ,Timer Interrupt 3 status" "Not active,Active"
|
|
bitfld.long 0x00 18. " ISA18 ,Timer Interrupt 2 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ISA17 ,Timer Interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 16. " ISA16 ,Timer Interrupt 0 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISA15 ,BBus DMA Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 14. " ISA14 ,I2C Interrupt status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISA13 ,PCI External Interrupt 3 status" "Not active,Active"
|
|
bitfld.long 0x00 12. " ISA12 ,PCI External Interrupt 2 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ISA11 ,PCI External Interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 10. " ISA10 ,PCI External Interrupt 0 status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISA9 ,PCI Arbiter Module Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 8. " ISA8 ,PCI Bridge Module Interrupt status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISA7 ,LCD Module Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 6. " ISA6 ,Ethernet Phy Interrupt status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ISA5 ,Ethernet Module Transmit Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 4. " ISA4 ,Ethernet Module Receive Interrupt status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ISA2 ,BBus Aggregate Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 1. " ISA1 ,AHB Bus Error status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISA0 ,Watchdog Timer status" "Not active,Active"
|
|
line.long 0x04 "ISRAW,Interrupt Status Raw Register"
|
|
bitfld.long 0x04 31. " ISRAW31 ,External Interrupt 3 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " ISRAW30 ,External Interrupt 2 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " ISRAW29 ,External Interrupt 1 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " ISRAW28 ,External Interrupt 0 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " ISRAW27 ,Timer Interrupt 14 and 15 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " ISRAW26 ,Timer Interrupt 12 and 13 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ISRAW25 ,Timer Interrupt 10 and 11 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " ISRAW24 ,Timer Interrupt 8 and 9 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ISRAW23 ,Timer Interrupt 7 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " ISRAW22 ,Timer Interrupt 6 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ISRAW21 ,Timer Interrupt 5 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " ISRAW20 ,Timer Interrupt 4 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ISRAW19 ,Timer Interrupt 3 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " ISRAW18 ,Timer Interrupt 2 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ISRAW17 ,Timer Interrupt 1 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " ISRAW16 ,Timer Interrupt 0 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ISRAW15 ,BBus DMA Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " ISRAW14 ,I2C Interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ISRAW13 ,PCI External Interrupt 3 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " ISRAW12 ,PCI External Interrupt 2 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " ISRAW11 ,PCI External Interrupt 1 status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " ISRAW10 ,PCI External Interrupt 0 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ISRAW9 ,PCI Arbiter Module Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " ISRAW8 ,PCI Bridge Module Interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ISRAW7 ,LCD Module Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " ISRAW6 ,Ethernet Phy Interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ISRAW5 ,Ethernet Module Transmit Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ISRAW4 ,Ethernet Module Receive Interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ISRAW2 ,BBus Aggregate Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ISRAW1 ,AHB Bus Error status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ISRAW0 ,Watchdog Timer status" "No interrupt,Interrupt"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "TIS,Timer Interrupt Status Register"
|
|
bitfld.long 0x00 15. " TIS15 ,Timer interrupt requests timer 15," "Not active,Active"
|
|
bitfld.long 0x00 14. " TIS14 ,Timer interrupt requests timer 14," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TIS13 ,Timer interrupt requests timer 13," "Not active,Active"
|
|
bitfld.long 0x00 12. " TIS12 ,Timer interrupt requests timer 12," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TIS11 ,Timer interrupt requests timer 11," "Not active,Active"
|
|
bitfld.long 0x00 10. " TIS10 ,Timer interrupt requests timer 10," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TIS9 ,Timer interrupt requests timer 9," "Not active,Active"
|
|
bitfld.long 0x00 8. " TIS8 ,Timer interrupt requests timer 8," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIS7 ,Timer interrupt requests timer 7," "Not active,Active"
|
|
bitfld.long 0x00 6. " TIS6 ,Timer interrupt requests timer 6," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIS5 ,Timer interrupt requests timer 5," "Not active,Active"
|
|
bitfld.long 0x00 4. " TIS4 ,Timer interrupt requests timer 4," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIS3 ,Timer interrupt requests timer 3," "Not active,Active"
|
|
bitfld.long 0x00 2. " TIS2 ,Timer interrupt requests timer 2," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIS1 ,Timer interrupt requests timer 1," "Not active,Active"
|
|
bitfld.long 0x00 0. " TIS0 ,Timer interrupt requests timer 0," "Not active,Active"
|
|
group.long 0x174++0x0b
|
|
line.long 0x00 "SWC,Software Watchdog Configuration"
|
|
bitfld.long 0x00 7. " SWWE ,Software watchdog enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SWWI ,Software watchdog interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SWWIC ,Software watchdog interrupt response" "Interrupt,Reset"
|
|
bitfld.long 0x00 0.--2. " SWTCS ,Software watchdog timer clock select" "CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,?..."
|
|
line.long 0x04 "SWT,Software Watchdog Timer"
|
|
line.long 0x08 "CCR,Clock Configuration Register"
|
|
bitfld.long 0x08 7.--9. " LPCS ,LCD panel clock select" "AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,LCD clock,LCD clock,LCD clock,LCD clock"
|
|
bitfld.long 0x08 6. " BBC ,BBus" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " LCC ,LCD controller" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " MCC ,Memory controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PARBC ,PCI arbiter" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PC ,PCI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " MACC ,Ethernet MAC" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RSC,Reset and Sleep Control Register"
|
|
bitfld.long 0x00 21. " BBW ,BBus aggregate interrupt wakeup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " I2CW ,I2C interrupt wake up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CSE ,CPU sleep enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SMWE ,Serial character match wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EWE ,Ethernet wake-up enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PI3WE ,PCI interrupt 3 wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BBT ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 5. " LCDC ,LCD controller" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MEMC ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 2. " PCIM ,PCI module" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MACM ,Ethernet MAC" "Reset,Enabled"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
bitfld.long 0x00 13. " PCIA , PCI arbiter configuration" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BMM ,Bootup memory mode" "SPI,Flash"
|
|
bitfld.long 0x00 10. " CS1DB ,Chip select 1 configuration HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CS1DW ,Chip select 1 data width HW strap setting" "8 bits,16 bits,32 bits,?..."
|
|
bitfld.long 0x00 7. " MCCM , Memory controller clocking mode HW strap setting" "Command delayed,Clock delayed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PMSS ,PCI mode HW strap setting" "Card bus,PCI"
|
|
bitfld.long 0x00 5. " CS1P ,Chip select 1 polarity HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDM ,Endian mode" "Little,Big"
|
|
bitfld.long 0x00 2. " MBAR ,Misaligned bus address response mode" "Allow misaligned,Generate error"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "PLLCONF,PLL Configuration Register"
|
|
bitfld.long 0x00 23.--24. " PLLFS ,PLL FS status [1:0]" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. " PLLIS ,PLL IS status[1:0]" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " PLLND ,PLL ND status[4:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " PLLSW ,PLL SW change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PLLBW ,PLL bypass SW" "Low,?..."
|
|
bitfld.long 0x00 7.--8. " FSEL ,PLL frequency select (FS) [1:0] PLL Output divider value" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " CPCC ,PLL charge pump current control (IS) [1:0]" "0-3,4-7,8-15,16-31"
|
|
bitfld.long 0x00 0.--4. " NDSW ,PLL ND SW [4:0]" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,?..."
|
|
width 15.
|
|
rgroup.long 0x18c++0x03
|
|
line.long 0x00 "ACTINTLIDSTAT,Active Interrupt Level Status Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INTID ,Interrupt ID"
|
|
group.long 0x190++0x3F
|
|
line.long 0x0 "TIMCTRL0,Timer 0 Control Register"
|
|
bitfld.long 0x0 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x0 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x0 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x0 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x0 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x4 "TIMCTRL1,Timer 1 Control Register"
|
|
bitfld.long 0x4 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x4 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x4 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x4 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x4 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x4 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x4 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x8 "TIMCTRL2,Timer 2 Control Register"
|
|
bitfld.long 0x8 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x8 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x8 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x8 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x8 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x8 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x8 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0xC "TIMCTRL3,Timer 3 Control Register"
|
|
bitfld.long 0xC 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0xC 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0xC 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0xC 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0xC 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0xC 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0xC 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x10 "TIMCTRL4,Timer 4 Control Register"
|
|
bitfld.long 0x10 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x10 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x10 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x10 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x10 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x10 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x10 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x14 "TIMCTRL5,Timer 5 Control Register"
|
|
bitfld.long 0x14 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x14 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x14 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x14 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x14 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x14 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x14 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x18 "TIMCTRL6,Timer 6 Control Register"
|
|
bitfld.long 0x18 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x18 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x18 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x18 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x18 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x18 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x18 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x1C "TIMCTRL7,Timer 7 Control Register"
|
|
bitfld.long 0x1C 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x1C 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x1C 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x1C 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x20 "TIMCTRL8,Timer 8 Control Register"
|
|
bitfld.long 0x20 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x20 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x20 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x20 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x20 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x20 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x20 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x24 "TIMCTRL9,Timer 9 Control Register"
|
|
bitfld.long 0x24 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x24 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x24 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x24 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x24 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x24 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x24 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x28 "TIMCTRL10,Timer 10 Control Register"
|
|
bitfld.long 0x28 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x28 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x28 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x28 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x28 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x28 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x28 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x2C "TIMCTRL11,Timer 11 Control Register"
|
|
bitfld.long 0x2C 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x2C 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x2C 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x2C 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x2C 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x30 "TIMCTRL12,Timer 12 Control Register"
|
|
bitfld.long 0x30 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x30 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x30 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x30 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x30 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x30 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x30 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x34 "TIMCTRL13,Timer 13 Control Register"
|
|
bitfld.long 0x34 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x34 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x34 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x34 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x34 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x34 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x34 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x38 "TIMCTRL14,Timer 14 Control Register"
|
|
bitfld.long 0x38 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x38 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x38 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x38 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x38 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x38 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x38 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
line.long 0x3C "TIMCTRL15,Timer 15 Control Register"
|
|
bitfld.long 0x3C 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x3C 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x3C 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x3C 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x3C 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x3C 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1D0++0x07
|
|
line.long 0x00 "SMCS0DMB,System Memory Chip Select 0 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0MMSK,System Memory Chip Select 0 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1D8++0x07
|
|
line.long 0x00 "SMCS1DMB,System Memory Chip Select 1 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1MMSK,System Memory Chip Select 1 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1E0++0x07
|
|
line.long 0x00 "SMCS2DMB,System Memory Chip Select 2 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2MMSK,System Memory Chip Select 2 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1E8++0x07
|
|
line.long 0x00 "SMCS3DMB,System Memory Chip Select 3 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3MMSK,System Memory Chip Select 3 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1F0++0x07
|
|
line.long 0x00 "SMCS0SMB,System Memory Chip Select 0 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0SMMSK,System Memory Chip Select 0 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1F8++0x07
|
|
line.long 0x00 "SMCS1SMB,System Memory Chip Select 1 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1SMMSK,System Memory Chip Select 1 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "SMCS2SMB,System Memory Chip Select 2 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2SMMSK,System Memory Chip Select 2 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "SMCS3SMB,System Memory Chip Select 3 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3SMMSK,System Memory Chip Select 3 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
width 15.
|
|
rgroup.long 0x210++0x03
|
|
line.long 0x000 "GENID,Gen ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " GENID ,General Purpose ID register"
|
|
width 15.
|
|
if ((d.l(ad:(0xa0900000+0x214))&0x1)==0x1)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x218))&0x1)==0x1)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x21C))&0x1)==0x1)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x220))&0x1)==0x1)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
width 0xb
|
|
elif (cpu()=="NS9775")
|
|
width 15.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "GENCR,AHB Arbiter Gen Configuration Register"
|
|
bitfld.long 0x00 0. " EXMA ,Arbiter control" "Slv1,Slv0"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BRC0,BRC0 Register"
|
|
bitfld.long 0x00 31. " CEB0 ,Channel 0 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF0 ,Bandwidth reduction field channel 0" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR0 ,Hmaster channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB1 ,Channel 1 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF1 ,Bandwidth reduction field channel 1" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR1 ,Hmaster channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB2 ,Channel 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF2 ,Bandwidth reduction field channel 2" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR2 ,Hmaster channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB3 ,Channel 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF3 ,Bandwidth reduction field channel 3" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR3 ,Hmaster channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BRC1,BRC1 Register"
|
|
bitfld.long 0x00 31. " CEB4 ,Channel 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF4 ,Bandwidth reduction field channel 4" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR4 ,Hmaster channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB5 ,Channel 5 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF5 ,Bandwidth reduction field channel 5" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR5 ,Hmaster channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB6 ,Channel 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF6 ,Bandwidth reduction field channel 6" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR6 ,Hmaster channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB7 ,Channel 7 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF7 ,Bandwidth reduction field channel 7" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR7 ,Hmaster channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "BRC2,BRC2 Register"
|
|
bitfld.long 0x00 31. " CEB8 ,Channel 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " BRF8 ,Bandwidth reduction field channel 8" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HMSTR8 ,Hmaster channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. " CEB9 ,Channel 9 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " BRF9 ,Bandwidth reduction field channel 9" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 16.--19. " HMSTR9 ,Hmaster channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CEB10 ,Channel 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " BRF10 ,Bandwidth reduction field channel 10" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " HMSTR10 ,Hmaster channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. " CEB11 ,Channel 11 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BRF11 ,Bandwidth reduction field channel 11" "100%,75%,50%,25%"
|
|
bitfld.long 0x00 0.--3. " HMSTR11 ,Hmaster channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "BRC3,BRC3 Register"
|
|
bitfld.long 0x04 31. " CEB12 ,Channel 12 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--29. " BRF12 ,Bandwidth reduction field channel 12" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 24.--27. " HMSTR12 ,Hmaster channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 23. " CEB13 ,Channel 13 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " BRF13 ,Bandwidth reduction field channel 13" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 16.--19. " HMSTR13 ,Hmaster channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CEB14 ,Channel 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--13. " BRF14 ,Bandwidth reduction field channel 14" "100%,75%,50%,25%"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " HMSTR14 ,Hmaster channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " CEB15 ,Channel 15 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " BRF15 ,Bandwidth reduction field channel 15" "100%,75%,50%,25%"
|
|
bitfld.long 0x04 0.--3. " HMSTR15 ,Hmaster channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHBBATPBMTP,AHB Bus Arbiter Timeout Period/AHB Bus Monitor Timeout Period Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BAT ,AHB bus arbiter timeout period"
|
|
hexmask.long.word 0x00 0.--15. 1. " BMT ,AHB bus monitor timeout period"
|
|
hgroup.long 0x18++0x7
|
|
hide.long 0x00 "AHBES1,AHB Error Status 1"
|
|
in
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "AHBES2,AHB Error Status 2"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AHBEMC,AHB Error Monitoring Configuration Register"
|
|
bitfld.long 0x00 23. " EIC ,AHB error interrupt clear" "Low,High"
|
|
bitfld.long 0x00 22. " MBII ,AHB max burst INCR ignore" "Included,Ignored"
|
|
textline " "
|
|
hexmask.long.word 0x00 6.--21. 1. " MBL ,AHB max burst length"
|
|
bitfld.long 0x00 5. " MBLDC ,AHB max burst length detect config" "Record error only,Generate IRQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SERDC ,AHB slave error response detect config" "Record error only,Generate IRQ"
|
|
bitfld.long 0x00 2.--3. " BMTC ,AHB bus monitor timeout config" "Record error only,Generate IRQ,Generate reset,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " BATC ,AHB bus arbiter timeout config" "Record error only,Generate IRQ,Generate reset,?..."
|
|
group.long 0x44++0x3F
|
|
line.long 0x0 "TRC0,Timer 0 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x4 "TRC1,Timer 1 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x8 "TRC2,Timer 2 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0xC "TRC3,Timer 3 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x10 "TRC4,Timer 4 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x14 "TRC5,Timer 5 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x18 "TRC6,Timer 6 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x1C "TRC7,Timer 7 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x20 "TRC8,Timer 8 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x24 "TRC9,Timer 9 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x28 "TRC10,Timer 10 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x2C "TRC11,Timer 11 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x30 "TRC12,Timer 12 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x34 "TRC13,Timer 13 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x38 "TRC14,Timer 14 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
line.long 0x3C "TRC15,Timer 15 Reload Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRCV ,Timer Reload Count Register Value"
|
|
group.long 0x84++0x3F
|
|
line.long 0x0 "TR0,Timer 0 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x4 "TR1,Timer 1 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x8 "TR2,Timer 2 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0xC "TR3,Timer 3 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x10 "TR4,Timer 4 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x14 "TR5,Timer 5 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x18 "TR6,Timer 6 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x1C "TR7,Timer 7 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x20 "TR8,Timer 8 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x24 "TR9,Timer 9 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x28 "TR10,Timer 10 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x2C "TR11,Timer 11 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x30 "TR12,Timer 12 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x34 "TR13,Timer 13 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x38 "TR14,Timer 14 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
line.long 0x3C "TR15,Timer 15 Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " TRR ,Timer Read register"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTVADDR0,Interrupt Vector Address Register Level 0"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTVADDR1,Interrupt Vector Address Register Level 1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTVADDR2,Interrupt Vector Address Register Level 2"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "INTVADDR3,Interrupt Vector Address Register Level 3"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "INTVADDR4,Interrupt Vector Address Register Level 4"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INTVADDR5,Interrupt Vector Address Register Level 5"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "INTVADDR6,Interrupt Vector Address Register Level 6"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "INTVADDR7,Interrupt Vector Address Register Level 7"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "INTVADDR8,Interrupt Vector Address Register Level 8"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "INTVADDR9,Interrupt Vector Address Register Level 9"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "INTVADDR10,Interrupt Vector Address Register Level 10"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "INTVADDR11,Interrupt Vector Address Register Level 11"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "INTVADDR12,Interrupt Vector Address Register Level 12"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "INTVADDR13,Interrupt Vector Address Register Level 13"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "INTVADDR14,Interrupt Vector Address Register Level 14"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTVADDR15,Interrupt Vector Address Register Level 15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTVADDR16,Interrupt Vector Address Register Level 16"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTVADDR17,Interrupt Vector Address Register Level 17"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTVADDR18,Interrupt Vector Address Register Level 18"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "INTVADDR19,Interrupt Vector Address Register Level 19"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "INTVADDR20,Interrupt Vector Address Register Level 20"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "INTVADDR21,Interrupt Vector Address Register Level 21"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "INTVADDR22,Interrupt Vector Address Register Level 22"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "INTVADDR23,Interrupt Vector Address Register Level 23"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "INTVADDR24,Interrupt Vector Address Register Level 24"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "INTVADDR25,Interrupt Vector Address Register Level 25"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "INTVADDR26,Interrupt Vector Address Register Level 26"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "INTVADDR27,Interrupt Vector Address Register Level 27"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "INTVADDR28,Interrupt Vector Address Register Level 28"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "INTVADDR29,Interrupt Vector Address Register Level 29"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "INTVADDR30,Interrupt Vector Address Register Level 30"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "INTVADDR31,Interrupt Vector Address Register Level 31"
|
|
width 15.
|
|
group.long 0x144++0x0b
|
|
line.long 0x00 "INTCONFIG0,Interrupt Configuration 0 Register"
|
|
bitfld.long 0x00 31. " IE0 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV0 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT0 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD0 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IE1 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INV1 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IT1 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 16.--20. " ISD1 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE2 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV2 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT2 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD2 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE3 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV3 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT3 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD3 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG1,Interrupt Configuration 1 Register"
|
|
bitfld.long 0x04 31. " IE4 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV4 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT4 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD4 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE5 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV5 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT5 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD5 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE7 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV7 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT7 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD7 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG2,Interrupt Configuration 2 Register"
|
|
bitfld.long 0x08 31. " IE8 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV8 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT8 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD8 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE9 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV9 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT9 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD9 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE10 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV10 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT10 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD10 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE11 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV11 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT11 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD11 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x154++0xf
|
|
line.long 0x00 "INTCONFIG4,Interrupt Configuration 4 Register"
|
|
bitfld.long 0x00 31. " IE16 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INV16 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IT16 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 24.--28. " ISD16 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IE18 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INV18 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IT18 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 8.--12. " ISD18 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IE19 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INV19 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IT19 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x00 0.--4. " ISD19 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x04 "INTCONFIG5,Interrupt Configuration 5 Register"
|
|
bitfld.long 0x04 31. " IE20 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " INV20 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " IT20 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 24.--28. " ISD20 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IE21 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " INV21 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IT21 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 16.--20. " ISD21 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IE22 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " INV22 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IT22 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 8.--12. " ISD22 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IE23 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " INV23 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IT23 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x04 0.--4. " ISD23 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x08 "INTCONFIG6,Interrupt Configuration 6 Register"
|
|
bitfld.long 0x08 31. " IE24 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " INV24 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 29. " IT24 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 24.--28. " ISD24 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IE25 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " INV25 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 21. " IT25 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 16.--20. " ISD25 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IE26 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " INV26 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IT26 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 8.--12. " ISD26 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IE27 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " INV27 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " IT27 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x08 0.--4. " ISD27 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
line.long 0x0c "INTCONFIG7,Interrupt Configuration 7 Register"
|
|
bitfld.long 0x0c 31. " IE28 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " INV28 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " IT28 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 24.--28. " ISD28 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 23. " IE29 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 22. " INV29 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " IT29 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 16.--20. " ISD29 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " IE30 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " INV30 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IT30 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 8.--12. " ISD30 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IE31 ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " INV31 ,Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " IT31 ,Interrupt type" "IRQ,FIQ"
|
|
bitfld.long 0x0c 0.--4. " ISD31 ,Interrupt source ID" "Watchdog Timer,AHB Bus Error,BBus Aggregate Interrupt,JBIG Module Interrupt,Ethernet RxD Interrupt,Ethernet TxD Interrupt,Ethernet Phy Interrupt,LCD Module interrupt,PCI Bridge Module Interrupt,PCI Arbiter Module Interrupt,PCI External Interrupt 0,PCI External Interrupt 1,PCI External Interrupt 2,PCI External Interrupt 3,I2C Interrupt,BBus DMA Interrupt,Timer Interrupt 0,Timer Interrupt 1,Timer Interrupt 2,Timer Interrupt 3,Timer Interrupt 4,Timer Interrupt 5,Timer Interrupt 6,Timer Interrupt 7,Timer Interrupt 8 and 9,Timer Interrupt 10 and 11,Timer Interrupt 12 and 13,Timer Interrupt 14 and 15,External Interrupt 0,External Interrupt 1,External Interrupt 2,External Interrupt 3"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ISADDR,Interrupt Service Routine Address Register"
|
|
rgroup.long 0x168++0x07
|
|
line.long 0x00 "ISAR,Interrupt Status Active"
|
|
bitfld.long 0x00 31. " ISA31 ,External Interrupt 3 status " "Not active,Active"
|
|
bitfld.long 0x00 30. " ISA30 ,External Interrupt 2 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ISA29 ,External Interrupt 1 status " "Not active,Active"
|
|
bitfld.long 0x00 28. " ISA28 ,External Interrupt 0 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ISA27 ,Timer Interrupt 14 and 15 status " "Not active,Active"
|
|
bitfld.long 0x00 26. " ISA26 ,Timer Interrupt 12 and 13 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISA25 ,Timer Interrupt 10 and 11 status " "Not active,Active"
|
|
bitfld.long 0x00 24. " ISA24 ,Timer Interrupt 8 and 9 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ISA23 ,Timer Interrupt 7 status " "Not active,Active"
|
|
bitfld.long 0x00 22. " ISA22 ,Timer Interrupt 6 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISA21 ,Timer Interrupt 5 status " "Not active,Active"
|
|
bitfld.long 0x00 20. " ISA20 ,Timer Interrupt 4 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISA19 ,Timer Interrupt 3 status " "Not active,Active"
|
|
bitfld.long 0x00 18. " ISA18 ,Timer Interrupt 2 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ISA17 ,Timer Interrupt 1 status " "Not active,Active"
|
|
bitfld.long 0x00 16. " ISA16 ,Timer Interrupt 0 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISA15 ,BBus DMA Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 14. " ISA14 ,I2C Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISA13 ,PCI External Interrupt 3 status " "Not active,Active"
|
|
bitfld.long 0x00 12. " ISA12 ,PCI External Interrupt 2 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ISA11 ,PCI External Interrupt 1 status " "Not active,Active"
|
|
bitfld.long 0x00 10. " ISA10 ,PCI External Interrupt 0 status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISA9 ,PCI Arbiter Module Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 8. " ISA8 ,PCI Bridge Module Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISA7 ,LCD Module interrupt status active " "Not active,Active"
|
|
bitfld.long 0x00 6. " ISA6 ,Ethernet Phy Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ISA5 ,Ethernet Module Transmit Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 4. " ISA4 ,Ethernet Module Receive Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISA3 ,JBIG Module Interrupt status" "Not active,Active"
|
|
bitfld.long 0x00 2. " ISA2 ,BBus Aggregate Interrupt status " "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISA1 ,AHB Bus Error Interrupt status " "Not active,Active"
|
|
bitfld.long 0x00 0. " ISA0 ,Watchdog Timer Interrupt status " "Not active,Active"
|
|
line.long 0x04 "ISRAW,Interrupt Status Raw Register"
|
|
bitfld.long 0x04 31. " ISRAW31 ,External Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " ISRAW30 ,External Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " ISRAW29 ,External Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " ISRAW28 ,External Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " ISRAW27 ,Timer Interrupt 14 and 15 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " ISRAW26 ,Timer Interrupt 12 and 13 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ISRAW25 ,Timer Interrupt 10 and 11 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " ISRAW24 ,Timer Interrupt 8 and 9 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ISRAW23 ,Timer Interrupt 7 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " ISRAW22 ,Timer Interrupt 6 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ISRAW21 ,Timer Interrupt 5 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " ISRAW20 ,Timer Interrupt 4 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ISRAW19 ,Timer Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " ISRAW18 ,Timer Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ISRAW17 ,Timer Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " ISRAW16 ,Timer Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ISRAW15 ,BBus DMA Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " ISRAW14 ,I2C Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ISRAW13 ,PCI External Interrupt 3 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " ISRAW12 ,PCI External Interrupt 2 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " ISRAW11 ,PCI External Interrupt 1 status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " ISRAW10 ,PCI External Interrupt 0 status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ISRAW9 ,PCI Arbiter Module Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " ISRAW8 ,PCI Bridge Module Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ISRAW7 ,LCD Module interrupt status active " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " ISRAW6 ,Ethernet Phy Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ISRAW5 ,Ethernet Module Transmit Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ISRAW4 ,Ethernet Module Receive Interrupt status " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ISRAW3 ,JBIG Module Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " ISRAW2 ,BBus Aggregate Interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ISRAW1 ,AHB Bus Error Interrupt status " "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ISRAW0 ,Watchdog Timer Interrupt status " "No interrupt,Interrupt"
|
|
width 15.
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "TIS,Timer Interrupt Status Register"
|
|
bitfld.long 0x00 15. " TIS15 ,Timer interrupt requests timer 15," "Not active,Active"
|
|
bitfld.long 0x00 14. " TIS14 ,Timer interrupt requests timer 14," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TIS13 ,Timer interrupt requests timer 13," "Not active,Active"
|
|
bitfld.long 0x00 12. " TIS12 ,Timer interrupt requests timer 12," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TIS11 ,Timer interrupt requests timer 11," "Not active,Active"
|
|
bitfld.long 0x00 10. " TIS10 ,Timer interrupt requests timer 10," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TIS9 ,Timer interrupt requests timer 9," "Not active,Active"
|
|
bitfld.long 0x00 8. " TIS8 ,Timer interrupt requests timer 8," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIS7 ,Timer interrupt requests timer 7," "Not active,Active"
|
|
bitfld.long 0x00 6. " TIS6 ,Timer interrupt requests timer 6," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIS5 ,Timer interrupt requests timer 5," "Not active,Active"
|
|
bitfld.long 0x00 4. " TIS4 ,Timer interrupt requests timer 4," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIS3 ,Timer interrupt requests timer 3," "Not active,Active"
|
|
bitfld.long 0x00 2. " TIS2 ,Timer interrupt requests timer 2," "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIS1 ,Timer interrupt requests timer 1," "Not active,Active"
|
|
bitfld.long 0x00 0. " TIS0 ,Timer interrupt requests timer 0," "Not active,Active"
|
|
group.long 0x174++0x0b
|
|
line.long 0x00 "SWC,Software Watchdog Configuration"
|
|
bitfld.long 0x00 7. " SWWE ,Software watchdog enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SWWI ,Software watchdog interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SWWIC ,Software watchdog interrupt response" "Interrupt,Reset"
|
|
bitfld.long 0x00 0.--2. " SWTCS ,Software watchdog timer clock select" "CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,?..."
|
|
line.long 0x04 "SWT,Software Watchdog Timer"
|
|
line.long 0x08 "CCR,Clock Configuration Register"
|
|
bitfld.long 0x08 7.--9. " LPCS ,LCD panel clock select" "AHB clock,AHB clock/2,AHB clock/4,AHB clock/8,LCD clock,LCD clock,LCD clock,LCD clock"
|
|
bitfld.long 0x08 6. " BBC ,BBus" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " LCC ,LCD controller" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " MCC ,Memory controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PARBC ,PCI arbiter" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PC ,PCI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " JBIGC ,JBIG" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " MACC ,Ethernet MAC" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RSC,Reset and Sleep Control Register"
|
|
bitfld.long 0x00 21. " BBW ,BBus aggregate interrupt wakeup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " I2CW ,I2C interrupt wake up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CSE ,CPU sleep enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SMWE ,Serial character match wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EWE ,Ethernet wake-up enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PI3WE ,PCI interrupt 3 wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BBT ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 5. " LCDC ,LCD controller" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MEMC ,BBus top" "Reset,Enabled"
|
|
bitfld.long 0x00 2. " PCIM ,PCI module" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " JBIGM ,JBIG" "Reset,Enabled"
|
|
bitfld.long 0x00 0. " MACM ,Ethernet MAC" "Reset,Enabled"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "MSCSR,Miscellaneous System Configuration and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " REV ,Revision"
|
|
bitfld.long 0x00 13. " PCIA , PCI arbiter configuration" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BMM ,Bootup memory mode" "SPI,Flash"
|
|
bitfld.long 0x00 10. " CS1DB ,Chip select 1 configuration HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CS1DW ,Chip select 1 data width HW strap setting" "8 bits,16 bits,32 bits,?..."
|
|
bitfld.long 0x00 7. " MCCM , Memory controller clocking mode HW strap setting" "Command delayed,Clock delayed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PMSS ,PCI mode HW strap setting" "Card bus,PCI"
|
|
bitfld.long 0x00 5. " CS1P ,Chip select 1 polarity HW strap setting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDM ,Endian mode" "Little,Big"
|
|
bitfld.long 0x00 2. " MBAR ,Misaligned bus address response mode" "Allow misaligned,Generate error"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRAM0 ,Internal register access mode bit 0" "PRIVILEGED,PRIVILEGED/USER"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "PLLCONF,PLL Configuration Register"
|
|
bitfld.long 0x00 25. " PLLBS , PLL bypass status" "Low,High"
|
|
bitfld.long 0x00 23.--24. " PLLFS ,PLL FS status [1:0]" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " PLLIS ,PLL IS status[1:0]" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. " PLLND ,PLL ND status[4:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PLLSW ,PLL SW change" "Not changed,Changed"
|
|
bitfld.long 0x00 9. " PLLBW ,PLL bypass SW" "Operation,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " FSEL ,PLL frequency select (FS) [1:0] PLL Output divider value" "1,2,4,8"
|
|
bitfld.long 0x00 5.--6. " CPCC ,PLL charge pump current control (IS) [1:0]" "0-3,4-7,8-15,16-31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " NDSW ,PLL ND SW [4:0]" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 15.
|
|
rgroup.long 0x18c++0x03
|
|
line.long 0x00 "ACTINTLIDSTAT,Active Interrupt Level Status Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INTID ,Interrupt ID"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "TIMCTRL0,Timer 0 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "TIMCTRL1,Timer 1 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "TIMCTRL2,Timer 2 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "TIMCTRL3,Timer 3 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "TIMCTRL4,Timer 4 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "TIMCTRL5,Timer 5 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "TIMCTRL6,Timer 6 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "TIMCTRL7,Timer 7 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "TIMCTRL8,Timer 8 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "TIMCTRL9,Timer 9 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "TIMCTRL10,Timer 10 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "TIMCTRL11,Timer 11 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "TIMCTRL12,Timer 12 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "TIMCTRL13,Timer 13 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "TIMCTRL14,Timer 14 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "TIMCTRL15,Timer 15 Control Register"
|
|
bitfld.long 0x00 15. " TEN ,Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " INTC ,Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TLCS ,Timer clock select" "CPU clock,CPU clock/2,CPU clock/4,CPU clock/8,CPU clock/16,CPU clock/32,CPU clock/64,External"
|
|
bitfld.long 0x00 4.--5. " TM ,Timer mode" "Internal/External,External low-level,External high-level,Concatenate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INTS ,Interrupt select" "Disabled,IRQ"
|
|
bitfld.long 0x00 2. " UDS ,Up/Down select" "Up,Down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TSZ ,32 or 16 bit timer" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " REN ,Reload enable" "Disabled,Enabled"
|
|
group.long 0x1D0++0x07
|
|
line.long 0x00 "SMCS0DMB,System Memory Chip Select 0 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0MMSK,System Memory Chip Select 0 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1D8++0x07
|
|
line.long 0x00 "SMCS1DMB,System Memory Chip Select 1 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1MMSK,System Memory Chip Select 1 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1E0++0x07
|
|
line.long 0x00 "SMCS2DMB,System Memory Chip Select 2 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2MMSK,System Memory Chip Select 2 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1E8++0x07
|
|
line.long 0x00 "SMCS3DMB,System Memory Chip Select 3 Dynamic Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3MMSK,System Memory Chip Select 3 Dynamic Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1F0++0x07
|
|
line.long 0x00 "SMCS0SMB,System Memory Chip Select 0 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS0B ,Chip select 0 base"
|
|
line.long 0x04 "SMCS0SMMSK,System Memory Chip Select 0 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x1F8++0x07
|
|
line.long 0x00 "SMCS1SMB,System Memory Chip Select 1 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS1B ,Chip select 1 base"
|
|
line.long 0x04 "SMCS1SMMSK,System Memory Chip Select 1 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "SMCS2SMB,System Memory Chip Select 2 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS2B ,Chip select 2 base"
|
|
line.long 0x04 "SMCS2SMMSK,System Memory Chip Select 2 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "SMCS3SMB,System Memory Chip Select 3 Static Memory Base"
|
|
hexmask.long 0x00 12.--31. 0x1000 " CS3B ,Chip select 3 base"
|
|
line.long 0x04 "SMCS3SMMSK,System Memory Chip Select 3 Static Memory Mask"
|
|
bitfld.long 0x04 31. " CSM ,Chip Select Bit31 Mask" "0,1"
|
|
bitfld.long 0x04 30. ",Chip Select Bit30 Mask" "0,1"
|
|
bitfld.long 0x04 29. ",Chip Select Bit29 Mask" "0,1"
|
|
bitfld.long 0x04 28. ",Chip Select Bit28 Mask" "0,1"
|
|
bitfld.long 0x04 27. ",Chip Select Bit27 Mask" "0,1"
|
|
bitfld.long 0x04 26. ",Chip Select Bit26 Mask" "0,1"
|
|
bitfld.long 0x04 25. ",Chip Select Bit25 Mask" "0,1"
|
|
bitfld.long 0x04 24. ",Chip Select Bit24 Mask" "0,1"
|
|
bitfld.long 0x04 23. ",Chip Select Bit23 Mask" "0,1"
|
|
bitfld.long 0x04 22. ",Chip Select Bit22 Mask" "0,1"
|
|
bitfld.long 0x04 21. ",Chip Select Bit21 Mask" "0,1"
|
|
bitfld.long 0x04 20. ",Chip Select Bit20 Mask" "0,1"
|
|
bitfld.long 0x04 19. ",Chip Select Bit19 Mask" "0,1"
|
|
bitfld.long 0x04 18. ",Chip Select Bit18 Mask" "0,1"
|
|
bitfld.long 0x04 17. ",Chip Select Bit17 Mask" "0,1"
|
|
bitfld.long 0x04 16. ",Chip Select Bit16 Mask" "0,1"
|
|
bitfld.long 0x04 15. ",Chip Select Bit15 Mask" "0,1"
|
|
bitfld.long 0x04 14. ",Chip Select Bit14 Mask" "0,1"
|
|
bitfld.long 0x04 13. ",Chip Select Bit13 Mask" "0,1"
|
|
bitfld.long 0x04 12. ",Chip Select Bit12 Mask" "0,1"
|
|
width 15.
|
|
rgroup.long 0x210++0x03
|
|
line.long 0x000 "GENID,Gen ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " GENID ,General Purpose ID register"
|
|
width 15.
|
|
if ((d.l(ad:(0xa0900000+0x214))&0x1)==0x1)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EXTINT0CTRL,External Interrupt 0 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x218))&0x1)==0x1)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EXTINT1CTRL,External Interrupt 1 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x21C))&0x1)==0x1)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "EXTINT2CTRL,External Interrupt 2 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
if ((d.l(ad:(0xa0900000+0x220))&0x1)==0x1)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
else
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EXTINT3CTRL,External Interrupt 3 Control Register"
|
|
bitfld.long 0x00 3. " STS ,Status" "Low,High"
|
|
bitfld.long 0x00 2. " CLR ,Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLTY ,Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LVEDG ,Level edge" "Level,Edge"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Memory Control"
|
|
base ad:0xa0700000
|
|
width 20.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONTROL,Control Register"
|
|
bitfld.long 0x00 2. " LPM ,Low-power mode" "Normal,Low-power"
|
|
bitfld.long 0x00 1. " ADDM ,Address mirror" "Normal,Reset memory map"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MCEN ,Memory controller enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " SA ,Self-refresh acknowledge (SREFACK)" "Normal,Self refresh"
|
|
bitfld.long 0x00 1. " WBS ,Write buffer status" "Empty,Contain data"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BUSY ,Busy" "Idle,Busy"
|
|
sif (cpu()=="NS9775")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 8. " CLK ,Clock ratio (HCLK:clk-out[3:0]) ratio" "1:1,1:2"
|
|
bitfld.long 0x00 0. " END ,Endian mode" "Little,Big"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 0. " END ,Endian mode" "Little,Big"
|
|
endif
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DYNAMICCONTROL,Dynamic Memory Control Register"
|
|
bitfld.long 0x00 14. " nRP ,Sync/Flash reset/power down signal (dy_pwr_n)" "Low,High"
|
|
bitfld.long 0x00 7.--8. " SDRAMInit ,SDRAM initialization" "SDRAM Normal,SDRAM MODE,SDRAM PALL,SDRAM NOP"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SR ,Self-refresh request (SREFREQ)" "Normal,Self refresh"
|
|
bitfld.long 0x00 0. " CE ,Dynamic memory clock enable" "Disabled,Enabled"
|
|
width 20.
|
|
line.long 0x04 "DYNAMICREFRESH,Dynamic Memory Refresh Timer Register"
|
|
hexmask.long.word 0x04 0.--10. 1. " REFRESH ,Refresh timer"
|
|
line.long 0x08 "DYNAMICREADCONFIG,Dynamic Memory Read Configuration Register"
|
|
bitfld.long 0x08 0.--1. " RD ,Read data strategy" "Reserved,Command delayed,Command delayed +1 cycle,Command delayed +2 cycles"
|
|
width 20.
|
|
group.long 0x30++0x2b
|
|
line.long 0x00 "DYNAMICTRP,Dynamic Memory Precharge Command Period Register"
|
|
bitfld.long 0x00 0.--3. " RP ,Precharge command period (tRP)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x04 "DYNAMICTRAS,Dynamic Memory Active to Precharge Command Period Register"
|
|
bitfld.long 0x04 0.--3. " RAS ,Active to precharge command period (tRAS)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "DYNAMICTSREX,Dynamic Memory Self-refresh Exit Time Register"
|
|
bitfld.long 0x08 0.--3. " SREX ,Self-refresh exit time (tSREX)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x0c "DYNAMICTAPR,Dynamic Memory Last Data Out to Active Time Register"
|
|
bitfld.long 0x0c 0.--3. " APR ,Last-data-out to active command time (tAPR)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x10 "DYNAMICTDAL,Dynamic Memory Data-in to Active Command Time Register"
|
|
bitfld.long 0x10 0.--3. " DAL ,Data-in to active command (tDAL or tAPW)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x14 "DYNAMICTWR,Dynamic Memory Write Recovery Time Register"
|
|
bitfld.long 0x14 0.--3. " WR ,Write recovery time (tWR, tDPL, tRWL, or tRDL)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x18 "DYNAMICTRC,Dynamic Memory Active to Active Command Period Register"
|
|
bitfld.long 0x18 0.--4. " RC ,Active to active command period (tRC)" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x1c "DYNAMICTRFC,Dynamic Memory Auto Refresh Period Register"
|
|
bitfld.long 0x1c 0.--4. " RFC ,Auto-refresh period and auto-refresh to active command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x20 "DYNAMICTXSR,Dynamic Memory Exit Self-refresh Register"
|
|
bitfld.long 0x20 0.--4. " XSR ,Exit self-refresh to active time command" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x24 "DYNAMICTRRD,Dynamic Memory Active Bank A to Active Bank B Time Register"
|
|
bitfld.long 0x24 0.--3. " RRD ,Active Bank A to Active Bank B" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x28 "DYNAMICTMRD,Dyanmic Memory Load Mode Register to Active Command Time Register"
|
|
bitfld.long 0x28 0.--3. " MRD ,Load mode register to Active Command Time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "STATICEXTENDEDWAIT,Static Memory Extended Wait Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " EXTW ,External wait timeout"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "DYNAMICCONFIG0,Dynamic Memory Configuration 0 Register"
|
|
bitfld.long 0x00 20. " Protect ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BDMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM ,Address mapping" "Reset,No reset"
|
|
hexmask.long.word 0x00 7.--12. 0x80 " AM1 ,Address mapping 1"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..."
|
|
line.long 0x04 "DYNAMICRASCAS0,Dynamic Memory RAS and CAS Delay 0 Register"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS latency" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "DYNAMICCONFIG1,Dynamic Memory Configuration 1 Register"
|
|
bitfld.long 0x00 20. " Protect ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BDMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM ,Address mapping" "Reset,No reset"
|
|
hexmask.long.word 0x00 7.--12. 0x80 " AM1 ,Address mapping 1"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..."
|
|
line.long 0x04 "DYNAMICRASCAS1,Dynamic Memory RAS and CAS Delay 1 Register"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS latency" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "DYNAMICCONFIG2,Dynamic Memory Configuration 2 Register"
|
|
bitfld.long 0x00 20. " Protect ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BDMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM ,Address mapping" "Reset,No reset"
|
|
hexmask.long.word 0x00 7.--12. 0x80 " AM1 ,Address mapping 1"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..."
|
|
line.long 0x04 "DYNAMICRASCAS2,Dynamic Memory RAS and CAS Delay 2 Register"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS latency" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "DYNAMICCONFIG3,Dynamic Memory Configuration 3 Register"
|
|
bitfld.long 0x00 20. " Protect ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BDMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM ,Address mapping" "Reset,No reset"
|
|
hexmask.long.word 0x00 7.--12. 0x80 " AM1 ,Address mapping 1"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..."
|
|
line.long 0x04 "DYNAMICRASCAS3,Dynamic Memory RAS and CAS Delay 3 Register"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS latency" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 clock cycle,2 clock cycles,3 clock cycles"
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
group.long 0x200++0x1b
|
|
line.long 0x00 "STATICCONFIG0,Static Memory Configuration 0 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN0,Static Memory Write Enable Delay 0 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
line.long 0x08 "STATICWAITOEN0,Static Memory Output Enable Delay 0 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD0,Static Memory Read Delay 0 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x10 "STATICWAITPAGE0,Static Memory Page Mode Read Delay 0 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x14 "STATICWAITWR0,Static Memory Write Delay 0 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles,33 hlck cycles"
|
|
line.long 0x18 "STATICWAITTURN0,Static Memory Turn Round Delay 0 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
else
|
|
group.long 0x200++0x1b
|
|
line.long 0x00 "STATICCONFIG0,Static Memory Configuration 0 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BMODE ,Burst mode" "Not toggled,Toggled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN0,Static Memory Write Enable Delay 0 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
line.long 0x08 "STATICWAITOEN0,Static Memory Output Enable Delay 0 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD0,Static Memory Read Delay 0 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x10 "STATICWAITPAGE0,Static Memory Page Mode Read Delay 0 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x14 "STATICWAITWR0,Static Memory Write Delay 0 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles,33 clk_out cycles"
|
|
line.long 0x18 "STATICWAITTURN0,Static Memory Turn Round Delay 0 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
endif
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
group.long 0x220++0x1b
|
|
line.long 0x00 "STATICCONFIG1,Static Memory Configuration 1 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN1,Static Memory Write Enable Delay 1 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
line.long 0x08 "STATICWAITOEN1,Static Memory Output Enable Delay 1 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD1,Static Memory Read Delay 1 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x10 "STATICWAITPAGE1,Static Memory Page Mode Read Delay 1 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x14 "STATICWAITWR1,Static Memory Write Delay 1 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles,33 hlck cycles"
|
|
line.long 0x18 "STATICWAITTURN1,Static Memory Turn Round Delay 1 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
else
|
|
group.long 0x220++0x1b
|
|
line.long 0x00 "STATICCONFIG1,Static Memory Configuration 1 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BMODE ,Burst mode" "Not toggled,Toggled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN1,Static Memory Write Enable Delay 1 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
line.long 0x08 "STATICWAITOEN1,Static Memory Output Enable Delay 1 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD1,Static Memory Read Delay 1 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x10 "STATICWAITPAGE1,Static Memory Page Mode Read Delay 1 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x14 "STATICWAITWR1,Static Memory Write Delay 1 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles,33 clk_out cycles"
|
|
line.long 0x18 "STATICWAITTURN1,Static Memory Turn Round Delay 1 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
endif
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
group.long 0x240++0x1b
|
|
line.long 0x00 "STATICCONFIG2,Static Memory Configuration 2 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN2,Static Memory Write Enable Delay 2 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
line.long 0x08 "STATICWAITOEN2,Static Memory Output Enable Delay 2 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD2,Static Memory Read Delay 2 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x10 "STATICWAITPAGE2,Static Memory Page Mode Read Delay 2 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x14 "STATICWAITWR2,Static Memory Write Delay 2 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles,33 hlck cycles"
|
|
line.long 0x18 "STATICWAITTURN2,Static Memory Turn Round Delay 2 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
else
|
|
group.long 0x240++0x1b
|
|
line.long 0x00 "STATICCONFIG2,Static Memory Configuration 2 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BMODE ,Burst mode" "Not toggled,Toggled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN2,Static Memory Write Enable Delay 2 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
line.long 0x08 "STATICWAITOEN2,Static Memory Output Enable Delay 2 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD2,Static Memory Read Delay 2 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x10 "STATICWAITPAGE2,Static Memory Page Mode Read Delay 2 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x14 "STATICWAITWR2,Static Memory Write Delay 2 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles,33 clk_out cycles"
|
|
line.long 0x18 "STATICWAITTURN2,Static Memory Turn Round Delay 2 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
endif
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
group.long 0x260++0x1b
|
|
line.long 0x00 "STATICCONFIG3,Static Memory Configuration 3 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN3,Static Memory Write Enable Delay 3 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
line.long 0x08 "STATICWAITOEN3,Static Memory Output Enable Delay 3 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD3,Static Memory Read Delay 3 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x10 "STATICWAITPAGE3,Static Memory Page Mode Read Delay 3 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles"
|
|
line.long 0x14 "STATICWAITWR3,Static Memory Write Delay 3 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles,17 hlck cycles,18 hlck cycles,19 hlck cycles,20 hlck cycles,21 hlck cycles,22 hlck cycles,23 hlck cycles,24 hlck cycles,25 hlck cycles,26 hlck cycles,27 hlck cycles,28 hlck cycles,29 hlck cycles,30 hlck cycles,31 hlck cycles,32 hlck cycles,33 hlck cycles"
|
|
line.long 0x18 "STATICWAITTURN3,Static Memory Turn Round Delay 3 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 hlck cycle,2 hlck cycles,3 hlck cycles,4 hlck cycles,5 hlck cycles,6 hlck cycles,7 hlck cycles,8 hlck cycles,9 hlck cycles,10 hlck cycles,11 hlck cycles,12 hlck cycles,13 hlck cycles,14 hlck cycles,15 hlck cycles,16 hlck cycles"
|
|
else
|
|
group.long 0x260++0x1b
|
|
line.long 0x00 "STATICCONFIG3,Static Memory Configuration 3 Register"
|
|
bitfld.long 0x00 20. " PSMC ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " BSMC ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PB ,Byte lane state (R/W)" "High/Low,Low/Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x00 3. " PM ,Asynchronous page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BMODE ,Burst mode" "Not toggled,Toggled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
line.long 0x04 "STATICWAITWEN3,Static Memory Write Enable Delay 3 Register"
|
|
bitfld.long 0x04 0.--3. " WWEN ,Wait write enable (WAITWEN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
line.long 0x08 "STATICWAITOEN3,Static Memory Output Enable Delay 3 Register"
|
|
bitfld.long 0x08 0.--3. " WOEN ,Wait output enable (WAITOEN)" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0c "STATICWAITRD3,Static Memory Read Delay 3 Register"
|
|
bitfld.long 0x0c 0.--4. " WTRD ,Nonpage mode read wait states or asynchronous page mode read first access wait state (WAITRD)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x10 "STATICWAITPAGE3,Static Memory Page Mode Read Delay 3 Register"
|
|
bitfld.long 0x10 0.--4. " WTPG ,Asynchronous page mode read after the first wait state (WAITPAGE)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles"
|
|
line.long 0x14 "STATICWAITWR3,Static Memory Write Delay 3 Register"
|
|
bitfld.long 0x14 0.--4. " WTWR ,Write wait states (WAITWR)" "2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles,17 clk_out cycles,18 clk_out cycles,19 clk_out cycles,20 clk_out cycles,21 clk_out cycles,22 clk_out cycles,23 clk_out cycles,24 clk_out cycles,25 clk_out cycles,26 clk_out cycles,27 clk_out cycles,28 clk_out cycles,29 clk_out cycles,30 clk_out cycles,31 clk_out cycles,32 clk_out cycles,33 clk_out cycles"
|
|
line.long 0x18 "STATICWAITTURN3,Static Memory Turn Round Delay 3 Register"
|
|
bitfld.long 0x18 0.--3. " WTTN ,Bus turnaround cycles (WAITTURN)" "1 clk_out cycle,2 clk_out cycles,3 clk_out cycles,4 clk_out cycles,5 clk_out cycles,6 clk_out cycles,7 clk_out cycles,8 clk_out cycles,9 clk_out cycles,10 clk_out cycles,11 clk_out cycles,12 clk_out cycles,13 clk_out cycles,14 clk_out cycles,15 clk_out cycles,16 clk_out cycles"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "Ethernet"
|
|
base ad:0xa0600000
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "EGCR1,Ethernet General Control Register 1"
|
|
bitfld.long 0x00 31. " ERX ,Enable RX packet processing" "Reset,Enabled"
|
|
bitfld.long 0x00 30. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ERXSHT ,Accept short (<64) receive frames" "Not accepted,Accepted"
|
|
bitfld.long 0x00 23. " ETX ,Enable TX packet processing" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " ERXINIT ,Enable initialization of RX buffer descriptors" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PHY_MODE ,Ethernet interface mode" "10/100 Mbit MII,10/100 Mbit RMII,?..."
|
|
bitfld.long 0x00 10. " RXALIGN ,Align RX data" "Standard,2-byte padding between"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MAC_HRST ,MAC host interface soft reset" "Restored,Reset"
|
|
bitfld.long 0x00 8. " ITXA ,Insert transmit source address" "TX_FIFO,MAC Ethernet address"
|
|
line.long 0x04 "EGCR2,Ethernet General Control Register 2"
|
|
bitfld.long 0x04 3. " TCLER ,Clear transmit error" "No effect,Clear"
|
|
bitfld.long 0x04 2. " AUTOZ ,Enable statistics counter clear on read" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CLRCNT ,Clear statistics counters" "No effect,Clear"
|
|
bitfld.long 0x04 0. " STEN ,Enable statistics counters" "Disabled,Enabled"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "EGSR,Ethernet General Status Register"
|
|
in
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "ETSR,Ethernet Transmit Status Register"
|
|
bitfld.long 0x00 15. " TXOK ,Frame transmitted OK" "Not ok,Ok"
|
|
bitfld.long 0x00 14. " TXBR ,Broadcast frame transmitted" "Not broadcast,Broadcast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXMC ,Multicast frame transmitted" "Not multicast,Multicast"
|
|
bitfld.long 0x00 12. " TXAL ,TX abort - late collision" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TXAED ,TX abort - excessive deferral" "Not aborted,Aborted"
|
|
bitfld.long 0x00 10. " TXAEC ,TX abort - excessive collisions" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXAUR ,TX abort - underrun" "Not aborted,Aborted"
|
|
bitfld.long 0x00 8. " TXAJ ,TX abort - jumbo" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXDEF ,Transmit frame deferred" "Not deferred,Deferred"
|
|
bitfld.long 0x00 5. " TXCRC ,Transmit CRC error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TXCOLC ,Transmit collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ERSR,Ethernet Receive Status Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RXSIZE ,Receive frame size in bytes"
|
|
bitfld.long 0x04 15. " RXCE ,Receive carrier event previously seen" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RXDV ,Receive data violation event previously seen" "Not active,Active"
|
|
bitfld.long 0x04 13. " RXOK ,Receive frame OK" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x04 12. " RXBR ,Receive broadcast frame" "Not valid,Valid"
|
|
bitfld.long 0x04 11. " RXMC ,Receive multicast frame" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RXDR ,Receive frame has dribble bits" "Not received,Received"
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x04 6. " RXSHT ,Receive frame is too short" "Correct,Too short"
|
|
endif
|
|
group.long 0x400++0x1B
|
|
line.long 0x00 "MAC1,MAC Configuration Register 1"
|
|
bitfld.long 0x00 15. " SRST ,Soft reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " RPERFUN ,Reset PERFUN" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RPEMCST ,Reset PEMCS/TX" "No reset,Reset"
|
|
bitfld.long 0x00 8. " RPETFUN ,Reset PETFUN" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LOOPBK ,Internal loopback" "Normal,Loopback"
|
|
bitfld.long 0x00 0. " RXEN ,Receive enable" "Disabled,Enabled"
|
|
line.long 0x04 "MAC2,MAC Configuration Register 2"
|
|
bitfld.long 0x04 14. " EDEFER ,Excess deferral" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " NOBO ,No backoff" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 9. " LONGP ,Long preamble enforcement" "Any length,<=12 bytes"
|
|
bitfld.long 0x04 8. " PUREP ,Pure preamble enforcement" "No preamble,Preamble"
|
|
textline " "
|
|
bitfld.long 0x04 7. " AUTOP ,Auto detect pad enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " VLANP ,VLAN pad enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PADEN ,Pad/CRC enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CRCEN ,CRC enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " HUGE ,Huge frame enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FULLD ,Full-duplex" "Half-duplex,Full-duplex"
|
|
line.long 0x08 "IPGT,Back-to-Back Inter-Packet-Gap Register"
|
|
hexmask.long.byte 0x08 0.--6. 1. " IPGT ,Back-to-back inter-packet-gap"
|
|
line.long 0x0c "IPGR,Non Back-to-Back Inter-Packet-Gap Register"
|
|
hexmask.long.byte 0x0c 8.--14. 1. " IPGR1 ,Non back-to-back inter-packet-gap part 1"
|
|
hexmask.long.byte 0x0c 0.--6. 1. " IPGR2 ,Non back-to-back inter-packet-gap part 2"
|
|
line.long 0x10 "CLRT,Collision Window/Retry Register"
|
|
hexmask.long.byte 0x10 8.--13. 1. " CWIN ,Collision window"
|
|
hexmask.long.byte 0x10 0.--3. 1. " RETX ,Retransmission maximum"
|
|
line.long 0x14 "MAXF,Maximum Frame Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " MAXF ,Maximum frame length"
|
|
line.long 0x18 "PHYS,PHY Support Register"
|
|
bitfld.long 0x18 15. " RPERMI ,Reset RMII module" "No effect,Reset"
|
|
bitfld.long 0x18 8. " SPEED ,Speed select (RMII)" "10 Mbps,100 Mbps"
|
|
group.long 0x420++0x0f
|
|
line.long 0x00 "MCFG,MII Management Configuration Register"
|
|
bitfld.long 0x00 15. " RMIIM ,Reset MII management block" "No reset,Reset"
|
|
bitfld.long 0x00 2.--4. " CLKS ,Clock select (AHB bus clock 2.5MHz/12.5MHz)" "Reserved,Reserved,Reserved/51.6 MHz,Reserved/88.5 MHz 77.4 MHz,Reserved,Reserved,51.6 MHz/Reserved,88.5 MHz 77.4 MHz/Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPRE ,Suppress preamble" "Normal,32-bit preamble"
|
|
line.long 0x04 "MCMD,MII Management Command Register"
|
|
bitfld.long 0x04 1. " SCAN ,Automatically scan for read data" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " READ ,Single scan for read data" "Disabled,Enabled"
|
|
line.long 0x08 "MADR,MII Management Address Register"
|
|
hexmask.long.byte 0x08 8.--12. 1. " DADR ,MII PHY device address"
|
|
hexmask.long.byte 0x08 0.--4. 1. " RADR ,MII PHY register address"
|
|
line.long 0x0c "MWTD,MII Management Write Data Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " MWTD ,MII write data"
|
|
rgroup.long 0x430++0x07
|
|
line.long 0x00 "MRDD,MII Management Read Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MRDD ,MII read data"
|
|
line.long 0x04 "MIND,MII Management Indicators Register"
|
|
bitfld.long 0x04 3. " MIILF ,MII link failure" "Not failed,Failed"
|
|
bitfld.long 0x04 2. " NVALID ,Read data not valid" "Valid,Not valid"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SCAN ,Automatically scan for read data in progress" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " BUSY ,MII interface BUSY with read/write operation" "Not busy,Busy"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "SA1,Station Address 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET1 ,Station address octet 1 stad[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET2 ,Station address octet 2 stad[15:8]"
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "SA2,Station Address 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET3 ,Station address octet 3 stad[23:16]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET4 ,Station address octet 4 stad[31:24]"
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "SA3,Station Address 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET5 ,Station address octet 5 stad[39:32]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET6 ,Station address octet 6 stad[47:40]"
|
|
group.long 0x500++0x0b
|
|
line.long 0x00 "SAFR,Station Address Filter Register"
|
|
bitfld.long 0x00 3. " PRO ,Enable promiscuous mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PRM ,Accept all multicast frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRA ,Accept multicast frames using the hash table" "Not accepted,Accepted"
|
|
bitfld.long 0x00 0. " BROAD ,Accept all broadcast frames" "Not accepted,Accepted"
|
|
width 10.
|
|
line.long 0x04 "HT1,Hash Table Register 1"
|
|
bitfld.long 0x04 31. " HT1[31] ,Hash table 1 bit 31 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 30. " HT1[30] ,Hash table 1 bit 30 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 29. " HT1[29] ,Hash table 1 bit 29 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " HT1[28] ,Hash table 1 bit 28 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 27. " HT1[27] ,Hash table 1 bit 27 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 26. " HT1[26] ,Hash table 1 bit 26 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " HT1[25] ,Hash table 1 bit 25 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 24. " HT1[24] ,Hash table 1 bit 24 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 23. " HT1[23] ,Hash table 1 bit 23 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " HT1[22] ,Hash table 1 bit 22 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 21. " HT1[21] ,Hash table 1 bit 21 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 20. " HT1[20] ,Hash table 1 bit 20 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " HT1[19] ,Hash table 1 bit 19 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 18. " HT1[18] ,Hash table 1 bit 18 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 17. " HT1[17] ,Hash table 1 bit 17 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " HT1[16] ,Hash table 1 bit 16 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 15. " HT1[15] ,Hash table 1 bit 15 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 14. " HT1[14] ,Hash table 1 bit 14 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " HT1[13] ,Hash table 1 bit 13 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 12. " HT1[12] ,Hash table 1 bit 12 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 11. " HT1[11] ,Hash table 1 bit 11 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " HT1[10] ,Hash table 1 bit 10 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 9. " HT1[9] ,Hash table 1 bit 9 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 8. " HT1[8] ,Hash table 1 bit 8 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HT1[7] ,Hash table 1 bit 7 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 6. " HT1[6] ,Hash table 1 bit 6 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 5. " HT1[5] ,Hash table 1 bit 5 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " HT1[4] ,Hash table 1 bit 4 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 3. " HT1[3] ,Hash table 1 bit 3 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 2. " HT1[2] ,Hash table 1 bit 2 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HT1[1] ,Hash table 1 bit 1 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 0. " HT1[0] ,Hash table 1 bit 0 (Receive frame)" "Accepted,Rejected"
|
|
line.long 0x08 "HT2,Hash Table Register 2"
|
|
bitfld.long 0x08 31. " HT2[63] ,Hash table 2 bit 63 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 30. " HT2[62] ,Hash table 2 bit 62 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 29. " HT2[61] ,Hash table 2 bit 61 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 28. " HT2[60] ,Hash table 2 bit 60 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 27. " HT2[59] ,Hash table 2 bit 59 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 26. " HT2[58] ,Hash table 2 bit 58 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 25. " HT2[57] ,Hash table 2 bit 57 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 24. " HT2[56] ,Hash table 2 bit 56 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 23. " HT2[55] ,Hash table 2 bit 55 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 22. " HT2[54] ,Hash table 2 bit 54 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 21. " HT2[53] ,Hash table 2 bit 53 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 20. " HT2[52] ,Hash table 2 bit 52 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 19. " HT2[51] ,Hash table 2 bit 51 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 18. " HT2[50] ,Hash table 2 bit 50 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 17. " HT2[49] ,Hash table 2 bit 49 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 16. " HT2[48] ,Hash table 2 bit 48 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 15. " HT2[47] ,Hash table 2 bit 47 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 14. " HT2[46] ,Hash table 2 bit 46 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 13. " HT2[45] ,Hash table 2 bit 45 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 12. " HT2[44] ,Hash table 2 bit 44 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 11. " HT2[43] ,Hash table 2 bit 43 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 10. " HT2[42] ,Hash table 2 bit 42 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 9. " HT2[41] ,Hash table 2 bit 41 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 8. " HT2[40] ,Hash table 2 bit 40 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HT2[39] ,Hash table 2 bit 39 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 6. " HT2[38] ,Hash table 2 bit 38 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 5. " HT2[37] ,Hash table 2 bit 37 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 4. " HT2[36] ,Hash table 2 bit 36 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 3. " HT2[35] ,Hash table 2 bit 35 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 2. " HT2[34] ,Hash table 2 bit 34 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 1. " HT2[33] ,Hash table 2 bit 33 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 0. " HT2[32] ,Hash table 2 bit 32 (Receive frame)" "Accepted,Rejected"
|
|
width 10.
|
|
tree "Statistics Registers"
|
|
tree "Transmit and Receive Counters"
|
|
group.long 0x680++0x1b
|
|
line.long 0x00 "TR64,Transmit & receive 0-64"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " Count ,0-64 Byte frame counter"
|
|
line.long 0x04 "TR127,Transmit & receive 65-127"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " Count ,65-127 Byte frame counter"
|
|
line.long 0x08 "TR255,Transmit & receive 128-255"
|
|
hexmask.long.tbyte 0x08 0.--17. 1. " Count ,128-255 Byte frame counter"
|
|
line.long 0x0c "TR511,Transmit & receive 256-511"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " Count ,256-511 Byte frame counter"
|
|
line.long 0x10 "TR1K,Transmit & receive 512-1023"
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " Count ,512-1023 Byte frame counter"
|
|
line.long 0x14 "TRMAX,Transmit & receive 1024-1518"
|
|
hexmask.long.tbyte 0x14 0.--17. 1. " Count ,1024-1518 Byte frame counter"
|
|
line.long 0x18 "TRMGV,Transmit & receive 1519-1522"
|
|
hexmask.long.tbyte 0x18 0.--17. 1. " Count ,1519-1522 Byte good VLAN frame count"
|
|
group.long 0x69c++0x23 "Receive Counters"
|
|
line.long 0x00 "RBYT,Receive byte counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " RBYT ,Receive byte counter"
|
|
line.long 0x04 "RPKT,Receive packet counter"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " RPKT ,Receive packet counter"
|
|
line.long 0x08 "RFCS,Receive FCS error counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " RFCS ,Receive FCS error counter"
|
|
line.long 0x0c "RMCA,Receive multicast packet counter"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " RMCA ,Receive multicast packet counter"
|
|
line.long 0x10 "RBCA,Receive broadcast packet counter"
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " RBCA ,Receive broadcast packet counter"
|
|
line.long 0x14 "RXCF,Receive control frame packet counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " RXCF ,Receive control frame packet counter"
|
|
line.long 0x18 "RXPF,Receive PAUSE frame packet counter"
|
|
hexmask.long.word 0x18 0.--11. 1. " RXPF ,Receive PAUSE frame packet counter"
|
|
line.long 0x1c "RXUO,Receive unknown OPCODE counter"
|
|
hexmask.long.word 0x1c 0.--11. 1. " RBUO ,Receive unknown OPCODE counter"
|
|
line.long 0x20 "RALN,Receive alignment error counter"
|
|
hexmask.long.word 0x20 0.--11. 1. " RALN ,Receive alignment error counter"
|
|
group.long 0x6c4++0x17
|
|
line.long 0x00 "RCDE,Receive code error counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " RCDE ,Receive code error counter"
|
|
line.long 0x04 "RCSE,Receive carrier sense error counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " RCSE ,Receive carrier sense error counter"
|
|
line.long 0x08 "RUND,Receive undersize packet counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " RUND ,Receive undersize packet counter"
|
|
line.long 0x0c "ROVR,Receive oversize packet counter"
|
|
hexmask.long.word 0x0c 0.--11. 1. " ROVR ,Receive oversize packet counter"
|
|
line.long 0x10 "RFRG,Receive fragments counter"
|
|
hexmask.long.word 0x10 0.--11. 1. " RFRG ,Receive fragments counter"
|
|
line.long 0x14 "RJBR,Receive jabber counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " RJBR ,Receive jabber counter"
|
|
group.long 0x6e0++0x0f "Transmit Counters"
|
|
line.long 0x00 "TBYT,Transmit byte counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TBYT ,Transmit byte counter"
|
|
line.long 0x04 "TPKT,Transmit packet counter"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " TPKT ,Transmit packet counter"
|
|
line.long 0x08 "TMCA,Transmit multicast packet counter"
|
|
hexmask.long.tbyte 0x08 0.--17. 1. " TMCA ,Transmit multicast packet counter"
|
|
line.long 0x0c "TBCA,Transmit broadcast packet counter"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " TBCA ,Transmit broadcast packet counter"
|
|
group.long 0x6f4++0x1b
|
|
line.long 0x00 "TDFR,Transmit deferral packet counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TDFR ,Transmit deferral packet counter"
|
|
line.long 0x04 "TEDF,Transmit excessive deferral packet counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TEDF ,Transmit excessive deferral packet counter"
|
|
line.long 0x08 "TSCL,Transmit single collision packet counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " TSCL ,Transmit single collision packet counter"
|
|
line.long 0x0c "TMCL,Transmit multiple collision packet counter"
|
|
hexmask.long.word 0x0c 0.--11. 1. " TMCL ,Transmit multiple collision packet counter"
|
|
line.long 0x10 "TLCL,Transmit late collision packet counter"
|
|
hexmask.long.word 0x10 0.--11. 1. " TLCL ,Transmit late collision packet counter"
|
|
line.long 0x14 "TXCL,Transmit excessive collision packet counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " TXCL ,Transmit excessive collision packet counter"
|
|
line.long 0x18 "TNCL,Transmit total collision counter"
|
|
hexmask.long.word 0x18 0.--11. 1. " TNCL ,Transmit total collision counter"
|
|
group.long 0x718++0x07
|
|
line.long 0x00 "TJBR,Transmit jabber frame counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TJBR ,Transmit jabber frame counter"
|
|
line.long 0x04 "TFCS,Transmit FCS error counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TFCS ,Transmit FCS error counter"
|
|
group.long 0x724++0x0b
|
|
line.long 0x00 "TOVR,Transmit oversize frame counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TOVR ,Transmit oversize frame counter"
|
|
line.long 0x04 "TUND,Transmit undersize frame counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TUND ,Transmit undersize frame counter"
|
|
line.long 0x08 "TFRG,Transmit fragments frame counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " TFRG ,Transmit fragments frame counter"
|
|
tree.end
|
|
width 10.
|
|
tree "General Statistics Registers"
|
|
hgroup.long 0x730++0x03
|
|
hide.long 0x00 "CAR1,Carry Register 1"
|
|
in
|
|
hgroup.long 0x734++0x03
|
|
hide.long 0x00 "CAR2,Carry Register 2"
|
|
in
|
|
group.long 0x738++0x07
|
|
line.long 0x00 "CAM1,Carry Register 1 Mask register"
|
|
bitfld.long 0x00 31. " M164 ,Mask register 1 TR64 counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " M1127 ,Mask register 1 TR127 counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " M1255 ,Mask register 1 TR255 counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " M1511 ,Mask register 1 TR511 counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " M11K ,Mask register 1 TR1K counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " M1MAX ,Mask register 1 TRMAX counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " M1MGV ,Mask register 1 TRMGV counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " M1RBY ,Mask register 1 RBYT counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " M1RPK ,Mask register 1 RPKT counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " M1RFC ,Mask register 1 RFCS counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " M1RMC ,Mask register 1 RMCA counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " M1RBC ,Mask register 1 RBCA counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " M1RXC ,Mask register 1 RXCF counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " M1RXP ,Mask register 1 RXPF counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " M1RXU ,Mask register 1 RXUO counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " M1RAL ,Mask register 1 RALN counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " M1RCD ,Mask register 1 RCDE counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " M1RCS ,Mask register 1 RCSE counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " M1RUN ,Mask register 1 RUND counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " M1ROV ,Mask register 1 ROVR counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " M1RFR ,Mask register 1 RFRG counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " M1RJB ,Mask register 1 RJBR counter carry bit mask" "Not masked,Masked"
|
|
line.long 0x04 "CAM2,Carry Register 2 Mask register"
|
|
bitfld.long 0x04 19. " M2TJB ,Mask register 2 TJBR counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " M2TFC ,Mask register 2 TFCS counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " M2TOV ,Mask register 2 TOVR counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " M2TUN ,Mask register 2 TUND counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 14. " M2TFG ,Mask register 2 TFRG counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " M2TBY ,Mask register 2 TBYT counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " M2TPK ,Mask register 2 TPKT counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " M2TMC ,Mask register 2 TMCA counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " M2TBC ,Mask register 2 TBCA counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " M2TDF ,Mask register 2 TDFR counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " M2TED ,Mask register 2 TEDF counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " M2TSC ,Mask register 2 TSCL counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " M2TMA ,Mask register 2 TMCL counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " M2TLC ,Mask register 2 TLCL counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " M2TXC ,Mask register 2 TXCL counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " M2TNC ,Mask register 2 TNCL counter carry bit mask" "Not masked,Masked"
|
|
tree.end
|
|
tree.end
|
|
textline " "
|
|
width 10.
|
|
group.long 0xa00++0x03
|
|
line.long 0x00 "RXAPTR,RX_A Buffer Descriptor Pointer Register"
|
|
group.long 0xa04++0x03
|
|
line.long 0x00 "RXBPTR,RX_B Buffer Descriptor Pointer Register"
|
|
group.long 0xa08++0x03
|
|
line.long 0x00 "RXCPTR,RX_C Buffer Descriptor Pointer Register"
|
|
group.long 0xa0c++0x03
|
|
line.long 0x00 "RXDPTR,RX_D Buffer Descriptor Pointer Register"
|
|
hgroup.long 0xa10++0x03
|
|
hide.long 0x00 "EINTR,Ethernet Interrupt Status Register"
|
|
in
|
|
group.long 0xa14++0x0b
|
|
line.long 0x00 "EINTREN,Ethernet Interrupt Enable Register"
|
|
bitfld.long 0x00 25. " EN_RXOVFL_DATA ,Enable the RXOVFL_DATA interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_RXOVFL_STAT ,Enable the RXOVFL_STATUS interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EN_RXBUFC ,Enable the RXBUFC interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EN_RXDONEA ,Enable the RXDONEA interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EN_RXDONEB ,Enable the RXDONEB interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_RXDONEC ,Enable the RXDONEC interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_RXDONED ,Enable the RXDONED interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_RXNOBUF ,Enable the RXNOBUF interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EN_RXBUFFUL ,Enable the RXBUFFUL interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_RXBR ,Enable the RXBR interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EN_STOVFL ,Enable the STOVFL interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN_TXBUFC ,Enable the TXBUFC interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EN_TXBUFNR ,Enable the TXBUFNR interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TXDONE ,Enable the TXDONE interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_TXERR ,Enable the TXERR interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_TXIDLE ,Enable the TXIDLE interrupt bit" "Disabled,Enabled"
|
|
line.long 0x04 "TXPTR,TX Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXPTR ,TX Buffer Descriptor Pointer"
|
|
line.long 0x08 "TXRPTR,Transmit Recover Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TXRPTR ,Transmit Recover Buffer Descriptor Pointer"
|
|
rgroup.long 0xa20++0x03
|
|
line.long 0x00 "TXERBD,TX Error Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXERBD ,TX Error Buffer Descriptor Pointer"
|
|
sif (cpu()=="NS9775")
|
|
rgroup.long 0xa24++0x03
|
|
line.long 0x00 "TXSPTR,TX Stall Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXSPTR ,TX Stall Buffer Descriptor Pointer"
|
|
endif
|
|
group.long 0xa28++0x03
|
|
line.long 0x00 "RXAOFF,RX_A Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXAOFF ,Contains an 11-bit byte offset from the start of the pool A ring"
|
|
group.long 0xa2c++0x03
|
|
line.long 0x00 "RXBOFF,RX_B Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXBOFF ,Contains an 11-bit byte offset from the start of the pool B ring"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RXCOFF,RX_C Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXCOFF ,Contains an 11-bit byte offset from the start of the pool C ring"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "RXDOFF,RX_D Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXDOFF ,Contains an 11-bit byte offset from the start of the pool D ring"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "TXOFF,Transmit Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " TXOFF ,Transmit Buffer Descriptor Pointer Offset"
|
|
wgroup.long 0xa3c++0x03
|
|
line.long 0x00 "RXFREE,RX Free Buffer Register"
|
|
bitfld.long 0x00 3. " RXFREED ,Pool D free bit" "Low,High"
|
|
bitfld.long 0x00 2. " RXFREEC ,Pool C free bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFREEB ,Pool B free bit" "Low,High"
|
|
bitfld.long 0x00 0. " RXFREEA ,Pool A free bit" "Low,High"
|
|
width 10.
|
|
tree "TX Buffer Descriptor RAM"
|
|
group.long 0x1000++0x0f "Transmit Buffer Descriptor RAM 0"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1010++0x0f "Transmit Buffer Descriptor RAM 1"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1020++0x0f "Transmit Buffer Descriptor RAM 2"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1030++0x0f "Transmit Buffer Descriptor RAM 3"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1040++0x0f "Transmit Buffer Descriptor RAM 4"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1050++0x0f "Transmit Buffer Descriptor RAM 5"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1060++0x0f "Transmit Buffer Descriptor RAM 6"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1070++0x0f "Transmit Buffer Descriptor RAM 7"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1080++0x0f "Transmit Buffer Descriptor RAM 8"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1090++0x0f "Transmit Buffer Descriptor RAM 9"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10A0++0x0f "Transmit Buffer Descriptor RAM 10"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10B0++0x0f "Transmit Buffer Descriptor RAM 11"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10C0++0x0f "Transmit Buffer Descriptor RAM 12"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10D0++0x0f "Transmit Buffer Descriptor RAM 13"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10E0++0x0f "Transmit Buffer Descriptor RAM 14"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10F0++0x0f "Transmit Buffer Descriptor RAM 15"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1100++0x0f "Transmit Buffer Descriptor RAM 16"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1110++0x0f "Transmit Buffer Descriptor RAM 17"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1120++0x0f "Transmit Buffer Descriptor RAM 18"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1130++0x0f "Transmit Buffer Descriptor RAM 19"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1140++0x0f "Transmit Buffer Descriptor RAM 20"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1150++0x0f "Transmit Buffer Descriptor RAM 21"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1160++0x0f "Transmit Buffer Descriptor RAM 22"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1170++0x0f "Transmit Buffer Descriptor RAM 23"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1180++0x0f "Transmit Buffer Descriptor RAM 24"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1190++0x0f "Transmit Buffer Descriptor RAM 25"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11A0++0x0f "Transmit Buffer Descriptor RAM 26"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11B0++0x0f "Transmit Buffer Descriptor RAM 27"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11C0++0x0f "Transmit Buffer Descriptor RAM 28"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11D0++0x0f "Transmit Buffer Descriptor RAM 29"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11E0++0x0f "Transmit Buffer Descriptor RAM 30"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11F0++0x0f "Transmit Buffer Descriptor RAM 31"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1200++0x0f "Transmit Buffer Descriptor RAM 32"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1210++0x0f "Transmit Buffer Descriptor RAM 33"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1220++0x0f "Transmit Buffer Descriptor RAM 34"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1230++0x0f "Transmit Buffer Descriptor RAM 35"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1240++0x0f "Transmit Buffer Descriptor RAM 36"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1250++0x0f "Transmit Buffer Descriptor RAM 37"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1260++0x0f "Transmit Buffer Descriptor RAM 38"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1270++0x0f "Transmit Buffer Descriptor RAM 39"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1280++0x0f "Transmit Buffer Descriptor RAM 40"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1290++0x0f "Transmit Buffer Descriptor RAM 41"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12A0++0x0f "Transmit Buffer Descriptor RAM 42"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12B0++0x0f "Transmit Buffer Descriptor RAM 43"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12C0++0x0f "Transmit Buffer Descriptor RAM 44"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12D0++0x0f "Transmit Buffer Descriptor RAM 45"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12E0++0x0f "Transmit Buffer Descriptor RAM 46"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12F0++0x0f "Transmit Buffer Descriptor RAM 47"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1300++0x0f "Transmit Buffer Descriptor RAM 48"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1310++0x0f "Transmit Buffer Descriptor RAM 49"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1320++0x0f "Transmit Buffer Descriptor RAM 50"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1330++0x0f "Transmit Buffer Descriptor RAM 51"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1340++0x0f "Transmit Buffer Descriptor RAM 52"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1350++0x0f "Transmit Buffer Descriptor RAM 53"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1360++0x0f "Transmit Buffer Descriptor RAM 54"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1370++0x0f "Transmit Buffer Descriptor RAM 55"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1380++0x0f "Transmit Buffer Descriptor RAM 56"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1390++0x0f "Transmit Buffer Descriptor RAM 57"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13A0++0x0f "Transmit Buffer Descriptor RAM 58"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13B0++0x0f "Transmit Buffer Descriptor RAM 59"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13C0++0x0f "Transmit Buffer Descriptor RAM 60"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13D0++0x0f "Transmit Buffer Descriptor RAM 61"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13E0++0x0f "Transmit Buffer Descriptor RAM 62"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13F0++0x0f "Transmit Buffer Descriptor RAM 63"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
tree.end
|
|
width 0xb
|
|
elif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "EGCR1,Ethernet General Control Register 1"
|
|
bitfld.long 0x00 31. " ERX ,Enable RX packet processing" "Reset,Enabled"
|
|
bitfld.long 0x00 30. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ERXSHT ,Accept short (<64) receive frames" "Not accepted,Accepted"
|
|
bitfld.long 0x00 23. " ETX ,Enable TX packet processing" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " ERXINIT ,Enable initialization of RX buffer descriptors" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXSHFT ,Shift RX data" "Standard,2-byte padding before"
|
|
bitfld.long 0x00 10. " RXALIGN ,Align RX data" "Standard,2-byte padding between"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MAC_HRST ,MAC host interface soft reset" "Restored,Reset"
|
|
bitfld.long 0x00 8. " ITXA ,Insert transmit source address" "TX_FIFO,MAC Ethernet address"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXRAM ,RX FIFO RAM access" "Disabled,Enabled"
|
|
line.long 0x04 "EGCR2,Ethernet General Control Register 2"
|
|
bitfld.long 0x04 7. " TCLER ,Clear transmit error" "No effect,Clear"
|
|
bitfld.long 0x04 3. " TKICK ,Transmit DMA state machine enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AUTOZ ,Enable statistics counter clear on read" "No effect,Clear"
|
|
bitfld.long 0x04 1. " CLRCNT ,Clear statistics counters" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STEN ,Enable statistics counters" "Disabled,Enabled"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "EGSR,Ethernet General Status Register"
|
|
in
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "ETSR,Ethernet Transmit Status Register"
|
|
bitfld.long 0x00 15. " TXOK ,Frame transmitted OK" "Not ok,Ok"
|
|
bitfld.long 0x00 14. " TXBR ,Broadcast frame transmitted" "Not broadcast,Broadcast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXMC ,Multicast frame transmitted" "Not multicast,Multicast"
|
|
bitfld.long 0x00 12. " TXAL ,TX abort - late collision" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TXAED ,TX abort - excessive deferral" "Not aborted,Aborted"
|
|
bitfld.long 0x00 10. " TXAEC ,TX abort - excessive collisions" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXAUR ,TX abort - underrun" "Not aborted,Aborted"
|
|
bitfld.long 0x00 8. " TXAJ ,TX abort - jumbo" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXDEF ,Transmit frame deferred" "Not deferred,Deferred"
|
|
bitfld.long 0x00 5. " TXCRC ,Transmit CRC error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TXCOLC ,Transmit collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ERSR,Ethernet Receive Status Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RXSIZE ,Receive frame size in bytes"
|
|
bitfld.long 0x04 15. " RXCE ,Receive carrier event previously seen" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RXDV ,Receive data violation event previously seen" "Not active,Active"
|
|
bitfld.long 0x04 13. " RXOK ,Receive frame OK" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x04 12. " RXBR ,Receive broadcast frame" "Not valid,Valid"
|
|
bitfld.long 0x04 11. " RXMC ,Receive multicast frame" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RXDR ,Receive frame has dribble bits" "Not received,Received"
|
|
bitfld.long 0x04 6. " RXSHT ,Receive frame is too short" "Correct,Too short"
|
|
group.long 0x400++0x17
|
|
line.long 0x00 "MAC1,MAC Configuration Register 1"
|
|
bitfld.long 0x00 15. " SRST ,Soft reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " RPERFUN ,Reset PERFUN" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RPEMCST ,Reset PEMCS/TX" "No reset,Reset"
|
|
bitfld.long 0x00 8. " RPETFUN ,Reset PETFUN" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LOOPBK ,Internal loopback" "Normal,Loopback"
|
|
bitfld.long 0x00 0. " RXEN ,Receive enable" "Disabled,Enabled"
|
|
line.long 0x04 "MAC2,MAC Configuration Register 2"
|
|
bitfld.long 0x04 14. " EDEFER ,Excess deferral" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " NOBO ,No backoff" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 9. " LONGP ,Long preamble enforcement" "Any length,<=12 bytes"
|
|
bitfld.long 0x04 8. " PUREP ,Pure preamble enforcement" "No preamble,Preamble"
|
|
textline " "
|
|
bitfld.long 0x04 7. " AUTOP ,Auto detect pad enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " VLANP ,VLAN pad enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PADEN ,Pad/CRC enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CRCEN ,CRC enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " HUGE ,Huge frame enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FULLD ,Full-duplex" "Half-duplex,Full-duplex"
|
|
line.long 0x08 "IPGT,Back-to-Back Inter-Packet-Gap Register"
|
|
hexmask.long.byte 0x08 0.--6. 1. " IPGT ,Back-to-back inter-packet-gap"
|
|
line.long 0x0c "IPGR,Non Back-to-Back Inter-Packet-Gap Register"
|
|
hexmask.long.byte 0x0c 8.--14. 1. " IPGR1 ,Non back-to-back inter-packet-gap part 1"
|
|
hexmask.long.byte 0x0c 0.--6. 1. " IPGR2 ,Non back-to-back inter-packet-gap part 2"
|
|
line.long 0x10 "CLRT,Collision Window/Retry Register"
|
|
hexmask.long.byte 0x10 8.--13. 1. " CWIN ,Collision window"
|
|
hexmask.long.byte 0x10 0.--3. 1. " RETX ,Retransmission maximum"
|
|
line.long 0x14 "MAXF,Maximum Frame Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " MAXF ,Maximum frame length"
|
|
group.long 0x420++0x0f
|
|
line.long 0x00 "MCFG,MII Management Configuration Register"
|
|
bitfld.long 0x00 15. " RMIIM ,Reset MII management block" "No reset,Reset"
|
|
bitfld.long 0x00 2.--4. " CLKS ,Clock select (AHB bus clock 2.5MHz/12.5MHz)" "Reserved,Reserved/37.5 MHz,Reserved/74.9 MHz,Reserved,Reserved,37.5 MHz/Reserved,74.9 MHz/Reserved,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPRE ,Suppress preamble" "Normal,32-bit preamble"
|
|
line.long 0x04 "MCMD,MII Management Command Register"
|
|
bitfld.long 0x04 1. " SCAN ,Automatically scan for read data" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " READ ,Single scan for read data" "Disabled,Enabled"
|
|
line.long 0x08 "MADR,MII Management Address Register"
|
|
hexmask.long.byte 0x08 8.--12. 1. " DADR ,MII PHY device address"
|
|
hexmask.long.byte 0x08 0.--4. 1. " RADR ,MII PHY register address"
|
|
line.long 0x0c "MWTD,MII Management Write Data Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " MWTD ,MII write data"
|
|
rgroup.long 0x430++0x07
|
|
line.long 0x00 "MRDD,MII Management Read Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MRDD ,MII read data"
|
|
line.long 0x04 "MIND,MII Management Indicators Register"
|
|
bitfld.long 0x04 3. " MIILF ,MII link failure" "Not failed,Failed"
|
|
bitfld.long 0x04 2. " NVALID ,Read data not valid" "Valid,Not valid"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SCAN ,Automatically scan for read data in progress" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " BUSY ,MII interface BUSY with read/write operation" "Not busy,Busy"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "SA1,Station Address 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET1 ,Station address octet 1 stad[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET2 ,Station address octet 2 stad[15:8]"
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "SA2,Station Address 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET3 ,Station address octet 3 stad[23:16]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET4 ,Station address octet 4 stad[31:24]"
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "SA3,Station Address 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OCTET5 ,Station address octet 5 stad[39:32]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OCTET6 ,Station address octet 6 stad[47:40]"
|
|
group.long 0x500++0x0b
|
|
line.long 0x00 "SAFR,Station Address Filter Register"
|
|
bitfld.long 0x00 3. " PRO ,Enable promiscuous mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PRM ,Accept all multicast frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRA ,Accept multicast frames using the hash table" "Not accepted,Accepted"
|
|
bitfld.long 0x00 0. " BROAD ,Accept all broadcast frames" "Not accepted,Accepted"
|
|
width 10.
|
|
line.long 0x04 "HT1,Hash Table Register 1"
|
|
bitfld.long 0x04 31. " HT1[31] ,Hash table 1 bit 31 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 30. " HT1[30] ,Hash table 1 bit 30 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 29. " HT1[29] ,Hash table 1 bit 29 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " HT1[28] ,Hash table 1 bit 28 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 27. " HT1[27] ,Hash table 1 bit 27 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 26. " HT1[26] ,Hash table 1 bit 26 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " HT1[25] ,Hash table 1 bit 25 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 24. " HT1[24] ,Hash table 1 bit 24 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 23. " HT1[23] ,Hash table 1 bit 23 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " HT1[22] ,Hash table 1 bit 22 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 21. " HT1[21] ,Hash table 1 bit 21 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 20. " HT1[20] ,Hash table 1 bit 20 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " HT1[19] ,Hash table 1 bit 19 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 18. " HT1[18] ,Hash table 1 bit 18 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 17. " HT1[17] ,Hash table 1 bit 17 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " HT1[16] ,Hash table 1 bit 16 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 15. " HT1[15] ,Hash table 1 bit 15 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 14. " HT1[14] ,Hash table 1 bit 14 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " HT1[13] ,Hash table 1 bit 13 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 12. " HT1[12] ,Hash table 1 bit 12 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 11. " HT1[11] ,Hash table 1 bit 11 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " HT1[10] ,Hash table 1 bit 10 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 9. " HT1[9] ,Hash table 1 bit 9 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 8. " HT1[8] ,Hash table 1 bit 8 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HT1[7] ,Hash table 1 bit 7 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 6. " HT1[6] ,Hash table 1 bit 6 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 5. " HT1[5] ,Hash table 1 bit 5 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " HT1[4] ,Hash table 1 bit 4 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 3. " HT1[3] ,Hash table 1 bit 3 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 2. " HT1[2] ,Hash table 1 bit 2 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HT1[1] ,Hash table 1 bit 1 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x04 0. " HT1[0] ,Hash table 1 bit 0 (Receive frame)" "Accepted,Rejected"
|
|
line.long 0x08 "HT2,Hash Table Register 2"
|
|
bitfld.long 0x08 31. " HT2[63] ,Hash table 2 bit 63 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 30. " HT2[62] ,Hash table 2 bit 62 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 29. " HT2[61] ,Hash table 2 bit 61 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 28. " HT2[60] ,Hash table 2 bit 60 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 27. " HT2[59] ,Hash table 2 bit 59 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 26. " HT2[58] ,Hash table 2 bit 58 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 25. " HT2[57] ,Hash table 2 bit 57 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 24. " HT2[56] ,Hash table 2 bit 56 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 23. " HT2[55] ,Hash table 2 bit 55 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 22. " HT2[54] ,Hash table 2 bit 54 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 21. " HT2[53] ,Hash table 2 bit 53 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 20. " HT2[52] ,Hash table 2 bit 52 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 19. " HT2[51] ,Hash table 2 bit 51 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 18. " HT2[50] ,Hash table 2 bit 50 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 17. " HT2[49] ,Hash table 2 bit 49 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 16. " HT2[48] ,Hash table 2 bit 48 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 15. " HT2[47] ,Hash table 2 bit 47 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 14. " HT2[46] ,Hash table 2 bit 46 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 13. " HT2[45] ,Hash table 2 bit 45 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 12. " HT2[44] ,Hash table 2 bit 44 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 11. " HT2[43] ,Hash table 2 bit 43 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 10. " HT2[42] ,Hash table 2 bit 42 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 9. " HT2[41] ,Hash table 2 bit 41 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 8. " HT2[40] ,Hash table 2 bit 40 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HT2[39] ,Hash table 2 bit 39 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 6. " HT2[38] ,Hash table 2 bit 38 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 5. " HT2[37] ,Hash table 2 bit 37 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 4. " HT2[36] ,Hash table 2 bit 36 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 3. " HT2[35] ,Hash table 2 bit 35 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 2. " HT2[34] ,Hash table 2 bit 34 (Receive frame)" "Accepted,Rejected"
|
|
textline " "
|
|
bitfld.long 0x08 1. " HT2[33] ,Hash table 2 bit 33 (Receive frame)" "Accepted,Rejected"
|
|
bitfld.long 0x08 0. " HT2[32] ,Hash table 2 bit 32 (Receive frame)" "Accepted,Rejected"
|
|
width 10.
|
|
tree "Statistics Registers"
|
|
tree "Transmit and Receive Counters"
|
|
group.long 0x680++0x1b
|
|
line.long 0x00 "TR64,Transmit & receive 0-64"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " Count ,0-64 Byte frame counter"
|
|
line.long 0x04 "TR127,Transmit & receive 65-127"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " Count ,65-127 Byte frame counter"
|
|
line.long 0x08 "TR255,Transmit & receive 128-255"
|
|
hexmask.long.tbyte 0x08 0.--17. 1. " Count ,128-255 Byte frame counter"
|
|
line.long 0x0c "TR511,Transmit & receive 256-511"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " Count ,256-511 Byte frame counter"
|
|
line.long 0x10 "TR1K,Transmit & receive 512-1023"
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " Count ,512-1023 Byte frame counter"
|
|
line.long 0x14 "TRMAX,Transmit & receive 1024-1518"
|
|
hexmask.long.tbyte 0x14 0.--17. 1. " Count ,1024-1518 Byte frame counter"
|
|
line.long 0x18 "TRMGV,Transmit & receive 1519-1522"
|
|
hexmask.long.tbyte 0x18 0.--17. 1. " Count ,1519-1522 Byte good VLAN frame count"
|
|
group.long 0x69c++0x23 "Receive Counters"
|
|
line.long 0x00 "RBYT,Receive byte counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " RBYT ,Receive byte counter"
|
|
line.long 0x04 "RPKT,Receive packet counter"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " RPKT ,Receive packet counter"
|
|
line.long 0x08 "RFCS,Receive FCS error counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " RFCS ,Receive FCS error counter"
|
|
line.long 0x0c "RMCA,Receive multicast packet counter"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " RMCA ,Receive multicast packet counter"
|
|
line.long 0x10 "RBCA,Receive broadcast packet counter"
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " RBCA ,Receive broadcast packet counter"
|
|
line.long 0x14 "RXCF,Receive control frame packet counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " RXCF ,Receive control frame packet counter"
|
|
line.long 0x18 "RXPF,Receive PAUSE frame packet counter"
|
|
hexmask.long.word 0x18 0.--11. 1. " RXPF ,Receive PAUSE frame packet counter"
|
|
line.long 0x1c "RXUO,Receive unknown OPCODE counter"
|
|
hexmask.long.word 0x1c 0.--11. 1. " RBUO ,Receive unknown OPCODE counter"
|
|
line.long 0x20 "RALN,Receive alignment error counter"
|
|
hexmask.long.word 0x20 0.--11. 1. " RALN ,Receive alignment error counter"
|
|
group.long 0x6c4++0x17
|
|
line.long 0x00 "RCDE,Receive code error counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " RCDE ,Receive code error counter"
|
|
line.long 0x04 "RCSE,Receive carrier sense error counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " RCSE ,Receive carrier sense error counter"
|
|
line.long 0x08 "RUND,Receive undersize packet counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " RUND ,Receive undersize packet counter"
|
|
line.long 0x0c "ROVR,Receive oversize packet counter"
|
|
hexmask.long.word 0x0c 0.--11. 1. " ROVR ,Receive oversize packet counter"
|
|
line.long 0x10 "RFRG,Receive fragments counter"
|
|
hexmask.long.word 0x10 0.--11. 1. " RFRG ,Receive fragments counter"
|
|
line.long 0x14 "RJBR,Receive jabber counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " RJBR ,Receive jabber counter"
|
|
group.long 0x6e0++0x0f "Transmit Counters"
|
|
line.long 0x00 "TBYT,Transmit byte counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TBYT ,Transmit byte counter"
|
|
line.long 0x04 "TPKT,Transmit packet counter"
|
|
hexmask.long.tbyte 0x04 0.--17. 1. " TPKT ,Transmit packet counter"
|
|
line.long 0x08 "TMCA,Transmit multicast packet counter"
|
|
hexmask.long.tbyte 0x08 0.--17. 1. " TMCA ,Transmit multicast packet counter"
|
|
line.long 0x0c "TBCA,Transmit broadcast packet counter"
|
|
hexmask.long.tbyte 0x0c 0.--17. 1. " TBCA ,Transmit broadcast packet counter"
|
|
group.long 0x6f4++0x1b
|
|
line.long 0x00 "TDFR,Transmit deferral packet counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TDFR ,Transmit deferral packet counter"
|
|
line.long 0x04 "TEDF,Transmit excessive deferral packet counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TEDF ,Transmit excessive deferral packet counter"
|
|
line.long 0x08 "TSCL,Transmit single collision packet counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " TSCL ,Transmit single collision packet counter"
|
|
line.long 0x0c "TMCL,Transmit multiple collision packet counter"
|
|
hexmask.long.word 0x0c 0.--11. 1. " TMCL ,Transmit multiple collision packet counter"
|
|
line.long 0x10 "TLCL,Transmit late collision packet counter"
|
|
hexmask.long.word 0x10 0.--11. 1. " TLCL ,Transmit late collision packet counter"
|
|
line.long 0x14 "TXCL,Transmit excessive collision packet counter"
|
|
hexmask.long.word 0x14 0.--11. 1. " TXCL ,Transmit excessive collision packet counter"
|
|
line.long 0x18 "TNCL,Transmit total collision counter"
|
|
hexmask.long.word 0x18 0.--11. 1. " TNCL ,Transmit total collision counter"
|
|
group.long 0x718++0x07
|
|
line.long 0x00 "TJBR,Transmit jabber frame counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TJBR ,Transmit jabber frame counter"
|
|
line.long 0x04 "TFCS,Transmit FCS error counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TFCS ,Transmit FCS error counter"
|
|
group.long 0x724++0x0b
|
|
line.long 0x00 "TOVR,Transmit oversize frame counter"
|
|
hexmask.long.word 0x00 0.--11. 1. " TOVR ,Transmit oversize frame counter"
|
|
line.long 0x04 "TUND,Transmit undersize frame counter"
|
|
hexmask.long.word 0x04 0.--11. 1. " TUND ,Transmit undersize frame counter"
|
|
line.long 0x08 "TFRG,Transmit fragments frame counter"
|
|
hexmask.long.word 0x08 0.--11. 1. " TFRG ,Transmit fragments frame counter"
|
|
tree.end
|
|
width 10.
|
|
tree "General Statistics Registers"
|
|
hgroup.long 0x730++0x03
|
|
hide.long 0x00 "CAR1,Carry Register 1"
|
|
in
|
|
hgroup.long 0x734++0x03
|
|
hide.long 0x00 "CAR2,Carry Register 2"
|
|
in
|
|
group.long 0x738++0x07
|
|
line.long 0x00 "CAM1,Carry Register 1 Mask register"
|
|
bitfld.long 0x00 31. " M164 ,Mask register 1 TR64 counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " M1127 ,Mask register 1 TR127 counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " M1255 ,Mask register 1 TR255 counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " M1511 ,Mask register 1 TR511 counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " M11K ,Mask register 1 TR1K counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " M1MAX ,Mask register 1 TRMAX counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " M1MGV ,Mask register 1 TRMGV counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " M1RBY ,Mask register 1 RBYT counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " M1RPK ,Mask register 1 RPKT counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " M1RFC ,Mask register 1 RFCS counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " M1RMC ,Mask register 1 RMCA counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " M1RBC ,Mask register 1 RBCA counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " M1RXC ,Mask register 1 RXCF counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " M1RXP ,Mask register 1 RXPF counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " M1RXU ,Mask register 1 RXUO counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " M1RAL ,Mask register 1 RALN counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " M1RCD ,Mask register 1 RCDE counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " M1RCS ,Mask register 1 RCSE counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " M1RUN ,Mask register 1 RUND counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " M1ROV ,Mask register 1 ROVR counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " M1RFR ,Mask register 1 RFRG counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " M1RJB ,Mask register 1 RJBR counter carry bit mask" "Not masked,Masked"
|
|
line.long 0x04 "CAM2,Carry Register 2 Mask register"
|
|
bitfld.long 0x04 19. " M2TJB ,Mask register 2 TJBR counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " M2TFC ,Mask register 2 TFCS counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " M2TOV ,Mask register 2 TOVR counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " M2TUN ,Mask register 2 TUND counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 14. " M2TFG ,Mask register 2 TFRG counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " M2TBY ,Mask register 2 TBYT counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " M2TPK ,Mask register 2 TPKT counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " M2TMC ,Mask register 2 TMCA counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " M2TBC ,Mask register 2 TBCA counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " M2TDF ,Mask register 2 TDFR counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " M2TED ,Mask register 2 TEDF counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " M2TSC ,Mask register 2 TSCL counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " M2TMA ,Mask register 2 TMCL counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " M2TLC ,Mask register 2 TLCL counter carry bit mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " M2TXC ,Mask register 2 TXCL counter carry bit mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " M2TNC ,Mask register 2 TNCL counter carry bit mask" "Not masked,Masked"
|
|
tree.end
|
|
tree.end
|
|
textline " "
|
|
width 10.
|
|
group.long 0xa00++0x03
|
|
line.long 0x00 "RXAPTR,RX_A Buffer Descriptor Pointer Register"
|
|
group.long 0xa04++0x03
|
|
line.long 0x00 "RXBPTR,RX_B Buffer Descriptor Pointer Register"
|
|
group.long 0xa08++0x03
|
|
line.long 0x00 "RXCPTR,RX_C Buffer Descriptor Pointer Register"
|
|
group.long 0xa0c++0x03
|
|
line.long 0x00 "RXDPTR,RX_D Buffer Descriptor Pointer Register"
|
|
hgroup.long 0xa10++0x03
|
|
hide.long 0x00 "EINTR,Ethernet Interrupt Status Register"
|
|
in
|
|
group.long 0xa14++0x0b
|
|
line.long 0x00 "EINTREN,Ethernet Interrupt Enable Register"
|
|
bitfld.long 0x00 25. " EN_RXOVFL_DATA ,Enable the RXOVFL_DATA interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_RXOVFL_STAT ,Enable the RXOVFL_STATUS interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EN_RXBUFC ,Enable the RXBUFC interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EN_RXDONEA ,Enable the RXDONEA interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EN_RXDONEB ,Enable the RXDONEB interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_RXDONEC ,Enable the RXDONEC interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_RXDONED ,Enable the RXDONED interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_RXNOBUF ,Enable the RXNOBUF interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EN_RXBUFFUL ,Enable the RXBUFFUL interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_RXBR ,Enable the RXBR interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EN_STOVFL ,Enable the STOVFL interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN_TXBUFC ,Enable the TXBUFC interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EN_TXBUFNR ,Enable the TXBUFNR interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TXDONE ,Enable the TXDONE interrupt bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_TXERR ,Enable the TXERR interrupt bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_TXIDLE ,Enable the TXIDLE interrupt bit" "Disabled,Enabled"
|
|
line.long 0x04 "TXPTR,TX Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXPTR ,TX Buffer Descriptor Pointer"
|
|
line.long 0x08 "TXRPTR,Transmit Recover Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TXRPTR ,Transmit Recover Buffer Descriptor Pointer"
|
|
rgroup.long 0xa20++0x07
|
|
line.long 0x00 "TXERBD,TX Error Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXERBD ,TX Error Buffer Descriptor Pointer"
|
|
line.long 0x04 "TXSPTR,TX Stall Buffer Descriptor Pointer Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSPTR ,TX Stall Buffer Descriptor Pointer"
|
|
group.long 0xa28++0x03
|
|
line.long 0x00 "RXAOFF,RX_A Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXAOFF ,Contains an 11-bit byte offset from the start of the pool A ring"
|
|
group.long 0xa2c++0x03
|
|
line.long 0x00 "RXBOFF,RX_B Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXBOFF ,Contains an 11-bit byte offset from the start of the pool B ring"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RXCOFF,RX_C Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXCOFF ,Contains an 11-bit byte offset from the start of the pool C ring"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "RXDOFF,RX_D Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " RXDOFF ,Contains an 11-bit byte offset from the start of the pool D ring"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "TXOFF,Transmit Buffer Descriptor Pointer Offset Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " TXOFF ,Transmit Buffer Descriptor Pointer Offset"
|
|
wgroup.long 0xa3c++0x03
|
|
line.long 0x00 "RXFREE,RX Free Buffer Register"
|
|
bitfld.long 0x00 3. " RXFREED ,Pool D free bit" "Low,High"
|
|
bitfld.long 0x00 2. " RXFREEC ,Pool C free bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFREEB ,Pool B free bit" "Low,High"
|
|
bitfld.long 0x00 0. " RXFREEA ,Pool A free bit" "Low,High"
|
|
width 10.
|
|
tree "Multicast Address Filter Registers"
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "MFILTL0,Multicast Low Address Filter Registeer 0"
|
|
group.long (0xA40+0x20)++0x03
|
|
line.long 0x00 "MFILTH0,Multicast High Address Filter Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH0 ,Multicast High Address Filter"
|
|
group.long (0xA40+0x40)++0x03
|
|
line.long 0x00 "MFMSKL0,Multicast Low Address Mask Register 0"
|
|
bitfld.long 0x00 31. " MFMSKL0 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA40+0x80)++0x03
|
|
line.long 0x00 "MFMSKH0,Multicast High Address Mask Register 0"
|
|
bitfld.long 0x00 15. " MFMSKH0 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "MFILTL1,Multicast Low Address Filter Registeer 1"
|
|
group.long (0xA44+0x20)++0x03
|
|
line.long 0x00 "MFILTH1,Multicast High Address Filter Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH1 ,Multicast High Address Filter"
|
|
group.long (0xA44+0x40)++0x03
|
|
line.long 0x00 "MFMSKL1,Multicast Low Address Mask Register 1"
|
|
bitfld.long 0x00 31. " MFMSKL1 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA44+0x80)++0x03
|
|
line.long 0x00 "MFMSKH1,Multicast High Address Mask Register 1"
|
|
bitfld.long 0x00 15. " MFMSKH1 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "MFILTL2,Multicast Low Address Filter Registeer 2"
|
|
group.long (0xA48+0x20)++0x03
|
|
line.long 0x00 "MFILTH2,Multicast High Address Filter Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH2 ,Multicast High Address Filter"
|
|
group.long (0xA48+0x40)++0x03
|
|
line.long 0x00 "MFMSKL2,Multicast Low Address Mask Register 2"
|
|
bitfld.long 0x00 31. " MFMSKL2 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA48+0x80)++0x03
|
|
line.long 0x00 "MFMSKH2,Multicast High Address Mask Register 2"
|
|
bitfld.long 0x00 15. " MFMSKH2 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "MFILTL3,Multicast Low Address Filter Registeer 3"
|
|
group.long (0xA4C+0x20)++0x03
|
|
line.long 0x00 "MFILTH3,Multicast High Address Filter Register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH3 ,Multicast High Address Filter"
|
|
group.long (0xA4C+0x40)++0x03
|
|
line.long 0x00 "MFMSKL3,Multicast Low Address Mask Register 3"
|
|
bitfld.long 0x00 31. " MFMSKL3 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA4C+0x80)++0x03
|
|
line.long 0x00 "MFMSKH3,Multicast High Address Mask Register 3"
|
|
bitfld.long 0x00 15. " MFMSKH3 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "MFILTL4,Multicast Low Address Filter Registeer 4"
|
|
group.long (0xA50+0x20)++0x03
|
|
line.long 0x00 "MFILTH4,Multicast High Address Filter Register 4"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH4 ,Multicast High Address Filter"
|
|
group.long (0xA50+0x40)++0x03
|
|
line.long 0x00 "MFMSKL4,Multicast Low Address Mask Register 4"
|
|
bitfld.long 0x00 31. " MFMSKL4 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA50+0x80)++0x03
|
|
line.long 0x00 "MFMSKH4,Multicast High Address Mask Register 4"
|
|
bitfld.long 0x00 15. " MFMSKH4 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "MFILTL5,Multicast Low Address Filter Registeer 5"
|
|
group.long (0xA54+0x20)++0x03
|
|
line.long 0x00 "MFILTH5,Multicast High Address Filter Register 5"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH5 ,Multicast High Address Filter"
|
|
group.long (0xA54+0x40)++0x03
|
|
line.long 0x00 "MFMSKL5,Multicast Low Address Mask Register 5"
|
|
bitfld.long 0x00 31. " MFMSKL5 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA54+0x80)++0x03
|
|
line.long 0x00 "MFMSKH5,Multicast High Address Mask Register 5"
|
|
bitfld.long 0x00 15. " MFMSKH5 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "MFILTL6,Multicast Low Address Filter Registeer 6"
|
|
group.long (0xA58+0x20)++0x03
|
|
line.long 0x00 "MFILTH6,Multicast High Address Filter Register 6"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH6 ,Multicast High Address Filter"
|
|
group.long (0xA58+0x40)++0x03
|
|
line.long 0x00 "MFMSKL6,Multicast Low Address Mask Register 6"
|
|
bitfld.long 0x00 31. " MFMSKL6 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA58+0x80)++0x03
|
|
line.long 0x00 "MFMSKH6,Multicast High Address Mask Register 6"
|
|
bitfld.long 0x00 15. " MFMSKH6 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "MFILTL7,Multicast Low Address Filter Registeer 7"
|
|
group.long (0xA5C+0x20)++0x03
|
|
line.long 0x00 "MFILTH7,Multicast High Address Filter Register 7"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFILTH7 ,Multicast High Address Filter"
|
|
group.long (0xA5C+0x40)++0x03
|
|
line.long 0x00 "MFMSKL7,Multicast Low Address Mask Register 7"
|
|
bitfld.long 0x00 31. " MFMSKL7 ,Multicast Low Address Mask Bit 31" "0,1"
|
|
bitfld.long 0x00 30. ",Multicast Low Address Mask Bit 30" "0,1"
|
|
bitfld.long 0x00 29. ",Multicast Low Address Mask Bit 29" "0,1"
|
|
bitfld.long 0x00 28. ",Multicast Low Address Mask Bit 28" "0,1"
|
|
bitfld.long 0x00 27. ",Multicast Low Address Mask Bit 27" "0,1"
|
|
bitfld.long 0x00 26. ",Multicast Low Address Mask Bit 26" "0,1"
|
|
bitfld.long 0x00 25. ",Multicast Low Address Mask Bit 25" "0,1"
|
|
bitfld.long 0x00 24. ",Multicast Low Address Mask Bit 24" "0,1"
|
|
bitfld.long 0x00 23. ",Multicast Low Address Mask Bit 23" "0,1"
|
|
bitfld.long 0x00 22. ",Multicast Low Address Mask Bit 22" "0,1"
|
|
bitfld.long 0x00 21. ",Multicast Low Address Mask Bit 21" "0,1"
|
|
bitfld.long 0x00 20. ",Multicast Low Address Mask Bit 20" "0,1"
|
|
bitfld.long 0x00 19. ",Multicast Low Address Mask Bit 19" "0,1"
|
|
bitfld.long 0x00 18. ",Multicast Low Address Mask Bit 18" "0,1"
|
|
bitfld.long 0x00 17. ",Multicast Low Address Mask Bit 17" "0,1"
|
|
bitfld.long 0x00 16. ",Multicast Low Address Mask Bit 16" "0,1"
|
|
bitfld.long 0x00 15. ",Multicast Low Address Mask Bit 15" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast Low Address Mask Bit 14" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast Low Address Mask Bit 13" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast Low Address Mask Bit 12" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast Low Address Mask Bit 11" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast Low Address Mask Bit 10" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast Low Address Mask Bit 9" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast Low Address Mask Bit 8" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast Low Address Mask Bit 7" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast Low Address Mask Bit 6" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast Low Address Mask Bit 5" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast Low Address Mask Bit 4" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast Low Address Mask Bit 3" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast Low Address Mask Bit 2" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast Low Address Mask Bit 1" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast Low Address Mask Bit 0" "0,1"
|
|
group.long (0xA5C+0x80)++0x03
|
|
line.long 0x00 "MFMSKH7,Multicast High Address Mask Register 7"
|
|
bitfld.long 0x00 15. " MFMSKH7 ,Multicast High Address Mask Bit 47" "0,1"
|
|
bitfld.long 0x00 14. ",Multicast High Address Mask Bit 46" "0,1"
|
|
bitfld.long 0x00 13. ",Multicast High Address Mask Bit 45" "0,1"
|
|
bitfld.long 0x00 12. ",Multicast High Address Mask Bit 44" "0,1"
|
|
bitfld.long 0x00 11. ",Multicast High Address Mask Bit 43" "0,1"
|
|
bitfld.long 0x00 10. ",Multicast High Address Mask Bit 42" "0,1"
|
|
bitfld.long 0x00 9. ",Multicast High Address Mask Bit 41" "0,1"
|
|
bitfld.long 0x00 8. ",Multicast High Address Mask Bit 40" "0,1"
|
|
bitfld.long 0x00 7. ",Multicast High Address Mask Bit 39" "0,1"
|
|
bitfld.long 0x00 6. ",Multicast High Address Mask Bit 38" "0,1"
|
|
bitfld.long 0x00 5. ",Multicast High Address Mask Bit 37" "0,1"
|
|
bitfld.long 0x00 4. ",Multicast High Address Mask Bit 36" "0,1"
|
|
bitfld.long 0x00 3. ",Multicast High Address Mask Bit 35" "0,1"
|
|
bitfld.long 0x00 2. ",Multicast High Address Mask Bit 34" "0,1"
|
|
bitfld.long 0x00 1. ",Multicast High Address Mask Bit 33" "0,1"
|
|
bitfld.long 0x00 0. ",Multicast High Address Mask Bit 32" "0,1"
|
|
group.long 0xac0++0x03
|
|
line.long 0x00 "MFILTEN,Multicast Address Filter Enable Register"
|
|
bitfld.long 0x00 7. " MFILTEN7 ,Enable entry 7 of multicast address filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MFILTEN6 ,Enable entry 6 of multicast address filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MFILTEN5 ,Enable entry 5 of multicast address filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MFILTEN4 ,Enable entry 4 of multicast address filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MFILTEN3 ,Enable entry 3 of multicast address filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MFILTEN2 ,Enable entry 2 of multicast address filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MFILTEN1 ,Enable entry 1 of multicast address filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MFILTEN0 ,Enable entry 0 of multicast address filter" "Disabled,Enabled"
|
|
tree.end
|
|
width 10.
|
|
tree "TX Buffer Descriptor RAM"
|
|
group.long 0x1000++0x0f "Transmit Buffer Descriptor RAM 0"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1010++0x0f "Transmit Buffer Descriptor RAM 1"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1020++0x0f "Transmit Buffer Descriptor RAM 2"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1030++0x0f "Transmit Buffer Descriptor RAM 3"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1040++0x0f "Transmit Buffer Descriptor RAM 4"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1050++0x0f "Transmit Buffer Descriptor RAM 5"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1060++0x0f "Transmit Buffer Descriptor RAM 6"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1070++0x0f "Transmit Buffer Descriptor RAM 7"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1080++0x0f "Transmit Buffer Descriptor RAM 8"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1090++0x0f "Transmit Buffer Descriptor RAM 9"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10A0++0x0f "Transmit Buffer Descriptor RAM 10"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10B0++0x0f "Transmit Buffer Descriptor RAM 11"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10C0++0x0f "Transmit Buffer Descriptor RAM 12"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10D0++0x0f "Transmit Buffer Descriptor RAM 13"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10E0++0x0f "Transmit Buffer Descriptor RAM 14"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x10F0++0x0f "Transmit Buffer Descriptor RAM 15"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1100++0x0f "Transmit Buffer Descriptor RAM 16"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1110++0x0f "Transmit Buffer Descriptor RAM 17"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1120++0x0f "Transmit Buffer Descriptor RAM 18"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1130++0x0f "Transmit Buffer Descriptor RAM 19"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1140++0x0f "Transmit Buffer Descriptor RAM 20"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1150++0x0f "Transmit Buffer Descriptor RAM 21"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1160++0x0f "Transmit Buffer Descriptor RAM 22"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1170++0x0f "Transmit Buffer Descriptor RAM 23"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1180++0x0f "Transmit Buffer Descriptor RAM 24"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1190++0x0f "Transmit Buffer Descriptor RAM 25"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11A0++0x0f "Transmit Buffer Descriptor RAM 26"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11B0++0x0f "Transmit Buffer Descriptor RAM 27"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11C0++0x0f "Transmit Buffer Descriptor RAM 28"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11D0++0x0f "Transmit Buffer Descriptor RAM 29"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11E0++0x0f "Transmit Buffer Descriptor RAM 30"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x11F0++0x0f "Transmit Buffer Descriptor RAM 31"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1200++0x0f "Transmit Buffer Descriptor RAM 32"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1210++0x0f "Transmit Buffer Descriptor RAM 33"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1220++0x0f "Transmit Buffer Descriptor RAM 34"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1230++0x0f "Transmit Buffer Descriptor RAM 35"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1240++0x0f "Transmit Buffer Descriptor RAM 36"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1250++0x0f "Transmit Buffer Descriptor RAM 37"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1260++0x0f "Transmit Buffer Descriptor RAM 38"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1270++0x0f "Transmit Buffer Descriptor RAM 39"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1280++0x0f "Transmit Buffer Descriptor RAM 40"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1290++0x0f "Transmit Buffer Descriptor RAM 41"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12A0++0x0f "Transmit Buffer Descriptor RAM 42"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12B0++0x0f "Transmit Buffer Descriptor RAM 43"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12C0++0x0f "Transmit Buffer Descriptor RAM 44"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12D0++0x0f "Transmit Buffer Descriptor RAM 45"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12E0++0x0f "Transmit Buffer Descriptor RAM 46"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x12F0++0x0f "Transmit Buffer Descriptor RAM 47"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1300++0x0f "Transmit Buffer Descriptor RAM 48"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1310++0x0f "Transmit Buffer Descriptor RAM 49"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1320++0x0f "Transmit Buffer Descriptor RAM 50"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1330++0x0f "Transmit Buffer Descriptor RAM 51"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1340++0x0f "Transmit Buffer Descriptor RAM 52"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1350++0x0f "Transmit Buffer Descriptor RAM 53"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1360++0x0f "Transmit Buffer Descriptor RAM 54"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1370++0x0f "Transmit Buffer Descriptor RAM 55"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1380++0x0f "Transmit Buffer Descriptor RAM 56"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x1390++0x0f "Transmit Buffer Descriptor RAM 57"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13A0++0x0f "Transmit Buffer Descriptor RAM 58"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13B0++0x0f "Transmit Buffer Descriptor RAM 59"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13C0++0x0f "Transmit Buffer Descriptor RAM 60"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13D0++0x0f "Transmit Buffer Descriptor RAM 61"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13E0++0x0f "Transmit Buffer Descriptor RAM 62"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
group.long 0x13F0++0x0f "Transmit Buffer Descriptor RAM 63"
|
|
line.long 0x00 "TXBD1,Transmit Buffer Descriptor Register 1"
|
|
line.long 0x04 "TXBD2,Transmit Buffer Descriptor Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " BL ,Buffer Length"
|
|
line.long 0x08 "TXBD3,Transmit Buffer Descriptor Register 3"
|
|
line.long 0x0c "TXBD4,Transmit Buffer Descriptor Register 4"
|
|
bitfld.long 0x0c 31. " W ,Wrap" "Not wrapped,Wrapped"
|
|
bitfld.long 0x0c 30. " I ,Interrupt on buffer completion" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " L ,Last buffer on transmit frame" "Not completed,Completed"
|
|
bitfld.long 0x0c 28. " F ,Buffer full" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--15. 1. " Status ,Transmit status from MAC"
|
|
width 10.
|
|
tree.end
|
|
tree "RX FIFO RAM"
|
|
hgroup.long 0x2000++0x03
|
|
hide.long 0x00 "RXRAM0,RX FIFO RAM 0 Register"
|
|
in
|
|
hgroup.long 0x2004++0x03
|
|
hide.long 0x00 "RXRAM1,RX FIFO RAM 1 Register"
|
|
in
|
|
hgroup.long 0x2008++0x03
|
|
hide.long 0x00 "RXRAM2,RX FIFO RAM 2 Register"
|
|
in
|
|
hgroup.long 0x200C++0x03
|
|
hide.long 0x00 "RXRAM3,RX FIFO RAM 3 Register"
|
|
in
|
|
hgroup.long 0x2010++0x03
|
|
hide.long 0x00 "RXRAM4,RX FIFO RAM 4 Register"
|
|
in
|
|
hgroup.long 0x2014++0x03
|
|
hide.long 0x00 "RXRAM5,RX FIFO RAM 5 Register"
|
|
in
|
|
hgroup.long 0x2018++0x03
|
|
hide.long 0x00 "RXRAM6,RX FIFO RAM 6 Register"
|
|
in
|
|
hgroup.long 0x201C++0x03
|
|
hide.long 0x00 "RXRAM7,RX FIFO RAM 7 Register"
|
|
in
|
|
hgroup.long 0x2020++0x03
|
|
hide.long 0x00 "RXRAM8,RX FIFO RAM 8 Register"
|
|
in
|
|
hgroup.long 0x2024++0x03
|
|
hide.long 0x00 "RXRAM9,RX FIFO RAM 9 Register"
|
|
in
|
|
hgroup.long 0x2028++0x03
|
|
hide.long 0x00 "RXRAM10,RX FIFO RAM 10 Register"
|
|
in
|
|
hgroup.long 0x202C++0x03
|
|
hide.long 0x00 "RXRAM11,RX FIFO RAM 11 Register"
|
|
in
|
|
hgroup.long 0x2030++0x03
|
|
hide.long 0x00 "RXRAM12,RX FIFO RAM 12 Register"
|
|
in
|
|
hgroup.long 0x2034++0x03
|
|
hide.long 0x00 "RXRAM13,RX FIFO RAM 13 Register"
|
|
in
|
|
hgroup.long 0x2038++0x03
|
|
hide.long 0x00 "RXRAM14,RX FIFO RAM 14 Register"
|
|
in
|
|
hgroup.long 0x203C++0x03
|
|
hide.long 0x00 "RXRAM15,RX FIFO RAM 15 Register"
|
|
in
|
|
hgroup.long 0x2040++0x03
|
|
hide.long 0x00 "RXRAM16,RX FIFO RAM 16 Register"
|
|
in
|
|
hgroup.long 0x2044++0x03
|
|
hide.long 0x00 "RXRAM17,RX FIFO RAM 17 Register"
|
|
in
|
|
hgroup.long 0x2048++0x03
|
|
hide.long 0x00 "RXRAM18,RX FIFO RAM 18 Register"
|
|
in
|
|
hgroup.long 0x204C++0x03
|
|
hide.long 0x00 "RXRAM19,RX FIFO RAM 19 Register"
|
|
in
|
|
hgroup.long 0x2050++0x03
|
|
hide.long 0x00 "RXRAM20,RX FIFO RAM 20 Register"
|
|
in
|
|
hgroup.long 0x2054++0x03
|
|
hide.long 0x00 "RXRAM21,RX FIFO RAM 21 Register"
|
|
in
|
|
hgroup.long 0x2058++0x03
|
|
hide.long 0x00 "RXRAM22,RX FIFO RAM 22 Register"
|
|
in
|
|
hgroup.long 0x205C++0x03
|
|
hide.long 0x00 "RXRAM23,RX FIFO RAM 23 Register"
|
|
in
|
|
hgroup.long 0x2060++0x03
|
|
hide.long 0x00 "RXRAM24,RX FIFO RAM 24 Register"
|
|
in
|
|
hgroup.long 0x2064++0x03
|
|
hide.long 0x00 "RXRAM25,RX FIFO RAM 25 Register"
|
|
in
|
|
hgroup.long 0x2068++0x03
|
|
hide.long 0x00 "RXRAM26,RX FIFO RAM 26 Register"
|
|
in
|
|
hgroup.long 0x206C++0x03
|
|
hide.long 0x00 "RXRAM27,RX FIFO RAM 27 Register"
|
|
in
|
|
hgroup.long 0x2070++0x03
|
|
hide.long 0x00 "RXRAM28,RX FIFO RAM 28 Register"
|
|
in
|
|
hgroup.long 0x2074++0x03
|
|
hide.long 0x00 "RXRAM29,RX FIFO RAM 29 Register"
|
|
in
|
|
hgroup.long 0x2078++0x03
|
|
hide.long 0x00 "RXRAM30,RX FIFO RAM 30 Register"
|
|
in
|
|
hgroup.long 0x207C++0x03
|
|
hide.long 0x00 "RXRAM31,RX FIFO RAM 31 Register"
|
|
in
|
|
hgroup.long 0x2080++0x03
|
|
hide.long 0x00 "RXRAM32,RX FIFO RAM 32 Register"
|
|
in
|
|
hgroup.long 0x2084++0x03
|
|
hide.long 0x00 "RXRAM33,RX FIFO RAM 33 Register"
|
|
in
|
|
hgroup.long 0x2088++0x03
|
|
hide.long 0x00 "RXRAM34,RX FIFO RAM 34 Register"
|
|
in
|
|
hgroup.long 0x208C++0x03
|
|
hide.long 0x00 "RXRAM35,RX FIFO RAM 35 Register"
|
|
in
|
|
hgroup.long 0x2090++0x03
|
|
hide.long 0x00 "RXRAM36,RX FIFO RAM 36 Register"
|
|
in
|
|
hgroup.long 0x2094++0x03
|
|
hide.long 0x00 "RXRAM37,RX FIFO RAM 37 Register"
|
|
in
|
|
hgroup.long 0x2098++0x03
|
|
hide.long 0x00 "RXRAM38,RX FIFO RAM 38 Register"
|
|
in
|
|
hgroup.long 0x209C++0x03
|
|
hide.long 0x00 "RXRAM39,RX FIFO RAM 39 Register"
|
|
in
|
|
hgroup.long 0x20A0++0x03
|
|
hide.long 0x00 "RXRAM40,RX FIFO RAM 40 Register"
|
|
in
|
|
hgroup.long 0x20A4++0x03
|
|
hide.long 0x00 "RXRAM41,RX FIFO RAM 41 Register"
|
|
in
|
|
hgroup.long 0x20A8++0x03
|
|
hide.long 0x00 "RXRAM42,RX FIFO RAM 42 Register"
|
|
in
|
|
hgroup.long 0x20AC++0x03
|
|
hide.long 0x00 "RXRAM43,RX FIFO RAM 43 Register"
|
|
in
|
|
hgroup.long 0x20B0++0x03
|
|
hide.long 0x00 "RXRAM44,RX FIFO RAM 44 Register"
|
|
in
|
|
hgroup.long 0x20B4++0x03
|
|
hide.long 0x00 "RXRAM45,RX FIFO RAM 45 Register"
|
|
in
|
|
hgroup.long 0x20B8++0x03
|
|
hide.long 0x00 "RXRAM46,RX FIFO RAM 46 Register"
|
|
in
|
|
hgroup.long 0x20BC++0x03
|
|
hide.long 0x00 "RXRAM47,RX FIFO RAM 47 Register"
|
|
in
|
|
hgroup.long 0x20C0++0x03
|
|
hide.long 0x00 "RXRAM48,RX FIFO RAM 48 Register"
|
|
in
|
|
hgroup.long 0x20C4++0x03
|
|
hide.long 0x00 "RXRAM49,RX FIFO RAM 49 Register"
|
|
in
|
|
hgroup.long 0x20C8++0x03
|
|
hide.long 0x00 "RXRAM50,RX FIFO RAM 50 Register"
|
|
in
|
|
hgroup.long 0x20CC++0x03
|
|
hide.long 0x00 "RXRAM51,RX FIFO RAM 51 Register"
|
|
in
|
|
hgroup.long 0x20D0++0x03
|
|
hide.long 0x00 "RXRAM52,RX FIFO RAM 52 Register"
|
|
in
|
|
hgroup.long 0x20D4++0x03
|
|
hide.long 0x00 "RXRAM53,RX FIFO RAM 53 Register"
|
|
in
|
|
hgroup.long 0x20D8++0x03
|
|
hide.long 0x00 "RXRAM54,RX FIFO RAM 54 Register"
|
|
in
|
|
hgroup.long 0x20DC++0x03
|
|
hide.long 0x00 "RXRAM55,RX FIFO RAM 55 Register"
|
|
in
|
|
hgroup.long 0x20E0++0x03
|
|
hide.long 0x00 "RXRAM56,RX FIFO RAM 56 Register"
|
|
in
|
|
hgroup.long 0x20E4++0x03
|
|
hide.long 0x00 "RXRAM57,RX FIFO RAM 57 Register"
|
|
in
|
|
hgroup.long 0x20E8++0x03
|
|
hide.long 0x00 "RXRAM58,RX FIFO RAM 58 Register"
|
|
in
|
|
hgroup.long 0x20EC++0x03
|
|
hide.long 0x00 "RXRAM59,RX FIFO RAM 59 Register"
|
|
in
|
|
hgroup.long 0x20F0++0x03
|
|
hide.long 0x00 "RXRAM60,RX FIFO RAM 60 Register"
|
|
in
|
|
hgroup.long 0x20F4++0x03
|
|
hide.long 0x00 "RXRAM61,RX FIFO RAM 61 Register"
|
|
in
|
|
hgroup.long 0x20F8++0x03
|
|
hide.long 0x00 "RXRAM62,RX FIFO RAM 62 Register"
|
|
in
|
|
hgroup.long 0x20FC++0x03
|
|
hide.long 0x00 "RXRAM63,RX FIFO RAM 63 Register"
|
|
in
|
|
hgroup.long 0x2100++0x03
|
|
hide.long 0x00 "RXRAM64,RX FIFO RAM 64 Register"
|
|
in
|
|
hgroup.long 0x2104++0x03
|
|
hide.long 0x00 "RXRAM65,RX FIFO RAM 65 Register"
|
|
in
|
|
hgroup.long 0x2108++0x03
|
|
hide.long 0x00 "RXRAM66,RX FIFO RAM 66 Register"
|
|
in
|
|
hgroup.long 0x210C++0x03
|
|
hide.long 0x00 "RXRAM67,RX FIFO RAM 67 Register"
|
|
in
|
|
hgroup.long 0x2110++0x03
|
|
hide.long 0x00 "RXRAM68,RX FIFO RAM 68 Register"
|
|
in
|
|
hgroup.long 0x2114++0x03
|
|
hide.long 0x00 "RXRAM69,RX FIFO RAM 69 Register"
|
|
in
|
|
hgroup.long 0x2118++0x03
|
|
hide.long 0x00 "RXRAM70,RX FIFO RAM 70 Register"
|
|
in
|
|
hgroup.long 0x211C++0x03
|
|
hide.long 0x00 "RXRAM71,RX FIFO RAM 71 Register"
|
|
in
|
|
hgroup.long 0x2120++0x03
|
|
hide.long 0x00 "RXRAM72,RX FIFO RAM 72 Register"
|
|
in
|
|
hgroup.long 0x2124++0x03
|
|
hide.long 0x00 "RXRAM73,RX FIFO RAM 73 Register"
|
|
in
|
|
hgroup.long 0x2128++0x03
|
|
hide.long 0x00 "RXRAM74,RX FIFO RAM 74 Register"
|
|
in
|
|
hgroup.long 0x212C++0x03
|
|
hide.long 0x00 "RXRAM75,RX FIFO RAM 75 Register"
|
|
in
|
|
hgroup.long 0x2130++0x03
|
|
hide.long 0x00 "RXRAM76,RX FIFO RAM 76 Register"
|
|
in
|
|
hgroup.long 0x2134++0x03
|
|
hide.long 0x00 "RXRAM77,RX FIFO RAM 77 Register"
|
|
in
|
|
hgroup.long 0x2138++0x03
|
|
hide.long 0x00 "RXRAM78,RX FIFO RAM 78 Register"
|
|
in
|
|
hgroup.long 0x213C++0x03
|
|
hide.long 0x00 "RXRAM79,RX FIFO RAM 79 Register"
|
|
in
|
|
hgroup.long 0x2140++0x03
|
|
hide.long 0x00 "RXRAM80,RX FIFO RAM 80 Register"
|
|
in
|
|
hgroup.long 0x2144++0x03
|
|
hide.long 0x00 "RXRAM81,RX FIFO RAM 81 Register"
|
|
in
|
|
hgroup.long 0x2148++0x03
|
|
hide.long 0x00 "RXRAM82,RX FIFO RAM 82 Register"
|
|
in
|
|
hgroup.long 0x214C++0x03
|
|
hide.long 0x00 "RXRAM83,RX FIFO RAM 83 Register"
|
|
in
|
|
hgroup.long 0x2150++0x03
|
|
hide.long 0x00 "RXRAM84,RX FIFO RAM 84 Register"
|
|
in
|
|
hgroup.long 0x2154++0x03
|
|
hide.long 0x00 "RXRAM85,RX FIFO RAM 85 Register"
|
|
in
|
|
hgroup.long 0x2158++0x03
|
|
hide.long 0x00 "RXRAM86,RX FIFO RAM 86 Register"
|
|
in
|
|
hgroup.long 0x215C++0x03
|
|
hide.long 0x00 "RXRAM87,RX FIFO RAM 87 Register"
|
|
in
|
|
hgroup.long 0x2160++0x03
|
|
hide.long 0x00 "RXRAM88,RX FIFO RAM 88 Register"
|
|
in
|
|
hgroup.long 0x2164++0x03
|
|
hide.long 0x00 "RXRAM89,RX FIFO RAM 89 Register"
|
|
in
|
|
hgroup.long 0x2168++0x03
|
|
hide.long 0x00 "RXRAM90,RX FIFO RAM 90 Register"
|
|
in
|
|
hgroup.long 0x216C++0x03
|
|
hide.long 0x00 "RXRAM91,RX FIFO RAM 91 Register"
|
|
in
|
|
hgroup.long 0x2170++0x03
|
|
hide.long 0x00 "RXRAM92,RX FIFO RAM 92 Register"
|
|
in
|
|
hgroup.long 0x2174++0x03
|
|
hide.long 0x00 "RXRAM93,RX FIFO RAM 93 Register"
|
|
in
|
|
hgroup.long 0x2178++0x03
|
|
hide.long 0x00 "RXRAM94,RX FIFO RAM 94 Register"
|
|
in
|
|
hgroup.long 0x217C++0x03
|
|
hide.long 0x00 "RXRAM95,RX FIFO RAM 95 Register"
|
|
in
|
|
hgroup.long 0x2180++0x03
|
|
hide.long 0x00 "RXRAM96,RX FIFO RAM 96 Register"
|
|
in
|
|
hgroup.long 0x2184++0x03
|
|
hide.long 0x00 "RXRAM97,RX FIFO RAM 97 Register"
|
|
in
|
|
hgroup.long 0x2188++0x03
|
|
hide.long 0x00 "RXRAM98,RX FIFO RAM 98 Register"
|
|
in
|
|
hgroup.long 0x218C++0x03
|
|
hide.long 0x00 "RXRAM99,RX FIFO RAM 99 Register"
|
|
in
|
|
hgroup.long 0x2190++0x03
|
|
hide.long 0x00 "RXRAM100,RX FIFO RAM 100 Register"
|
|
in
|
|
hgroup.long 0x2194++0x03
|
|
hide.long 0x00 "RXRAM101,RX FIFO RAM 101 Register"
|
|
in
|
|
hgroup.long 0x2198++0x03
|
|
hide.long 0x00 "RXRAM102,RX FIFO RAM 102 Register"
|
|
in
|
|
hgroup.long 0x219C++0x03
|
|
hide.long 0x00 "RXRAM103,RX FIFO RAM 103 Register"
|
|
in
|
|
hgroup.long 0x21A0++0x03
|
|
hide.long 0x00 "RXRAM104,RX FIFO RAM 104 Register"
|
|
in
|
|
hgroup.long 0x21A4++0x03
|
|
hide.long 0x00 "RXRAM105,RX FIFO RAM 105 Register"
|
|
in
|
|
hgroup.long 0x21A8++0x03
|
|
hide.long 0x00 "RXRAM106,RX FIFO RAM 106 Register"
|
|
in
|
|
hgroup.long 0x21AC++0x03
|
|
hide.long 0x00 "RXRAM107,RX FIFO RAM 107 Register"
|
|
in
|
|
hgroup.long 0x21B0++0x03
|
|
hide.long 0x00 "RXRAM108,RX FIFO RAM 108 Register"
|
|
in
|
|
hgroup.long 0x21B4++0x03
|
|
hide.long 0x00 "RXRAM109,RX FIFO RAM 109 Register"
|
|
in
|
|
hgroup.long 0x21B8++0x03
|
|
hide.long 0x00 "RXRAM110,RX FIFO RAM 110 Register"
|
|
in
|
|
hgroup.long 0x21BC++0x03
|
|
hide.long 0x00 "RXRAM111,RX FIFO RAM 111 Register"
|
|
in
|
|
hgroup.long 0x21C0++0x03
|
|
hide.long 0x00 "RXRAM112,RX FIFO RAM 112 Register"
|
|
in
|
|
hgroup.long 0x21C4++0x03
|
|
hide.long 0x00 "RXRAM113,RX FIFO RAM 113 Register"
|
|
in
|
|
hgroup.long 0x21C8++0x03
|
|
hide.long 0x00 "RXRAM114,RX FIFO RAM 114 Register"
|
|
in
|
|
hgroup.long 0x21CC++0x03
|
|
hide.long 0x00 "RXRAM115,RX FIFO RAM 115 Register"
|
|
in
|
|
hgroup.long 0x21D0++0x03
|
|
hide.long 0x00 "RXRAM116,RX FIFO RAM 116 Register"
|
|
in
|
|
hgroup.long 0x21D4++0x03
|
|
hide.long 0x00 "RXRAM117,RX FIFO RAM 117 Register"
|
|
in
|
|
hgroup.long 0x21D8++0x03
|
|
hide.long 0x00 "RXRAM118,RX FIFO RAM 118 Register"
|
|
in
|
|
hgroup.long 0x21DC++0x03
|
|
hide.long 0x00 "RXRAM119,RX FIFO RAM 119 Register"
|
|
in
|
|
hgroup.long 0x21E0++0x03
|
|
hide.long 0x00 "RXRAM120,RX FIFO RAM 120 Register"
|
|
in
|
|
hgroup.long 0x21E4++0x03
|
|
hide.long 0x00 "RXRAM121,RX FIFO RAM 121 Register"
|
|
in
|
|
hgroup.long 0x21E8++0x03
|
|
hide.long 0x00 "RXRAM122,RX FIFO RAM 122 Register"
|
|
in
|
|
hgroup.long 0x21EC++0x03
|
|
hide.long 0x00 "RXRAM123,RX FIFO RAM 123 Register"
|
|
in
|
|
hgroup.long 0x21F0++0x03
|
|
hide.long 0x00 "RXRAM124,RX FIFO RAM 124 Register"
|
|
in
|
|
hgroup.long 0x21F4++0x03
|
|
hide.long 0x00 "RXRAM125,RX FIFO RAM 125 Register"
|
|
in
|
|
hgroup.long 0x21F8++0x03
|
|
hide.long 0x00 "RXRAM126,RX FIFO RAM 126 Register"
|
|
in
|
|
hgroup.long 0x21FC++0x03
|
|
hide.long 0x00 "RXRAM127,RX FIFO RAM 127 Register"
|
|
in
|
|
hgroup.long 0x2200++0x03
|
|
hide.long 0x00 "RXRAM128,RX FIFO RAM 128 Register"
|
|
in
|
|
hgroup.long 0x2204++0x03
|
|
hide.long 0x00 "RXRAM129,RX FIFO RAM 129 Register"
|
|
in
|
|
hgroup.long 0x2208++0x03
|
|
hide.long 0x00 "RXRAM130,RX FIFO RAM 130 Register"
|
|
in
|
|
hgroup.long 0x220C++0x03
|
|
hide.long 0x00 "RXRAM131,RX FIFO RAM 131 Register"
|
|
in
|
|
hgroup.long 0x2210++0x03
|
|
hide.long 0x00 "RXRAM132,RX FIFO RAM 132 Register"
|
|
in
|
|
hgroup.long 0x2214++0x03
|
|
hide.long 0x00 "RXRAM133,RX FIFO RAM 133 Register"
|
|
in
|
|
hgroup.long 0x2218++0x03
|
|
hide.long 0x00 "RXRAM134,RX FIFO RAM 134 Register"
|
|
in
|
|
hgroup.long 0x221C++0x03
|
|
hide.long 0x00 "RXRAM135,RX FIFO RAM 135 Register"
|
|
in
|
|
hgroup.long 0x2220++0x03
|
|
hide.long 0x00 "RXRAM136,RX FIFO RAM 136 Register"
|
|
in
|
|
hgroup.long 0x2224++0x03
|
|
hide.long 0x00 "RXRAM137,RX FIFO RAM 137 Register"
|
|
in
|
|
hgroup.long 0x2228++0x03
|
|
hide.long 0x00 "RXRAM138,RX FIFO RAM 138 Register"
|
|
in
|
|
hgroup.long 0x222C++0x03
|
|
hide.long 0x00 "RXRAM139,RX FIFO RAM 139 Register"
|
|
in
|
|
hgroup.long 0x2230++0x03
|
|
hide.long 0x00 "RXRAM140,RX FIFO RAM 140 Register"
|
|
in
|
|
hgroup.long 0x2234++0x03
|
|
hide.long 0x00 "RXRAM141,RX FIFO RAM 141 Register"
|
|
in
|
|
hgroup.long 0x2238++0x03
|
|
hide.long 0x00 "RXRAM142,RX FIFO RAM 142 Register"
|
|
in
|
|
hgroup.long 0x223C++0x03
|
|
hide.long 0x00 "RXRAM143,RX FIFO RAM 143 Register"
|
|
in
|
|
hgroup.long 0x2240++0x03
|
|
hide.long 0x00 "RXRAM144,RX FIFO RAM 144 Register"
|
|
in
|
|
hgroup.long 0x2244++0x03
|
|
hide.long 0x00 "RXRAM145,RX FIFO RAM 145 Register"
|
|
in
|
|
hgroup.long 0x2248++0x03
|
|
hide.long 0x00 "RXRAM146,RX FIFO RAM 146 Register"
|
|
in
|
|
hgroup.long 0x224C++0x03
|
|
hide.long 0x00 "RXRAM147,RX FIFO RAM 147 Register"
|
|
in
|
|
hgroup.long 0x2250++0x03
|
|
hide.long 0x00 "RXRAM148,RX FIFO RAM 148 Register"
|
|
in
|
|
hgroup.long 0x2254++0x03
|
|
hide.long 0x00 "RXRAM149,RX FIFO RAM 149 Register"
|
|
in
|
|
hgroup.long 0x2258++0x03
|
|
hide.long 0x00 "RXRAM150,RX FIFO RAM 150 Register"
|
|
in
|
|
hgroup.long 0x225C++0x03
|
|
hide.long 0x00 "RXRAM151,RX FIFO RAM 151 Register"
|
|
in
|
|
hgroup.long 0x2260++0x03
|
|
hide.long 0x00 "RXRAM152,RX FIFO RAM 152 Register"
|
|
in
|
|
hgroup.long 0x2264++0x03
|
|
hide.long 0x00 "RXRAM153,RX FIFO RAM 153 Register"
|
|
in
|
|
hgroup.long 0x2268++0x03
|
|
hide.long 0x00 "RXRAM154,RX FIFO RAM 154 Register"
|
|
in
|
|
hgroup.long 0x226C++0x03
|
|
hide.long 0x00 "RXRAM155,RX FIFO RAM 155 Register"
|
|
in
|
|
hgroup.long 0x2270++0x03
|
|
hide.long 0x00 "RXRAM156,RX FIFO RAM 156 Register"
|
|
in
|
|
hgroup.long 0x2274++0x03
|
|
hide.long 0x00 "RXRAM157,RX FIFO RAM 157 Register"
|
|
in
|
|
hgroup.long 0x2278++0x03
|
|
hide.long 0x00 "RXRAM158,RX FIFO RAM 158 Register"
|
|
in
|
|
hgroup.long 0x227C++0x03
|
|
hide.long 0x00 "RXRAM159,RX FIFO RAM 159 Register"
|
|
in
|
|
hgroup.long 0x2280++0x03
|
|
hide.long 0x00 "RXRAM160,RX FIFO RAM 160 Register"
|
|
in
|
|
hgroup.long 0x2284++0x03
|
|
hide.long 0x00 "RXRAM161,RX FIFO RAM 161 Register"
|
|
in
|
|
hgroup.long 0x2288++0x03
|
|
hide.long 0x00 "RXRAM162,RX FIFO RAM 162 Register"
|
|
in
|
|
hgroup.long 0x228C++0x03
|
|
hide.long 0x00 "RXRAM163,RX FIFO RAM 163 Register"
|
|
in
|
|
hgroup.long 0x2290++0x03
|
|
hide.long 0x00 "RXRAM164,RX FIFO RAM 164 Register"
|
|
in
|
|
hgroup.long 0x2294++0x03
|
|
hide.long 0x00 "RXRAM165,RX FIFO RAM 165 Register"
|
|
in
|
|
hgroup.long 0x2298++0x03
|
|
hide.long 0x00 "RXRAM166,RX FIFO RAM 166 Register"
|
|
in
|
|
hgroup.long 0x229C++0x03
|
|
hide.long 0x00 "RXRAM167,RX FIFO RAM 167 Register"
|
|
in
|
|
hgroup.long 0x22A0++0x03
|
|
hide.long 0x00 "RXRAM168,RX FIFO RAM 168 Register"
|
|
in
|
|
hgroup.long 0x22A4++0x03
|
|
hide.long 0x00 "RXRAM169,RX FIFO RAM 169 Register"
|
|
in
|
|
hgroup.long 0x22A8++0x03
|
|
hide.long 0x00 "RXRAM170,RX FIFO RAM 170 Register"
|
|
in
|
|
hgroup.long 0x22AC++0x03
|
|
hide.long 0x00 "RXRAM171,RX FIFO RAM 171 Register"
|
|
in
|
|
hgroup.long 0x22B0++0x03
|
|
hide.long 0x00 "RXRAM172,RX FIFO RAM 172 Register"
|
|
in
|
|
hgroup.long 0x22B4++0x03
|
|
hide.long 0x00 "RXRAM173,RX FIFO RAM 173 Register"
|
|
in
|
|
hgroup.long 0x22B8++0x03
|
|
hide.long 0x00 "RXRAM174,RX FIFO RAM 174 Register"
|
|
in
|
|
hgroup.long 0x22BC++0x03
|
|
hide.long 0x00 "RXRAM175,RX FIFO RAM 175 Register"
|
|
in
|
|
hgroup.long 0x22C0++0x03
|
|
hide.long 0x00 "RXRAM176,RX FIFO RAM 176 Register"
|
|
in
|
|
hgroup.long 0x22C4++0x03
|
|
hide.long 0x00 "RXRAM177,RX FIFO RAM 177 Register"
|
|
in
|
|
hgroup.long 0x22C8++0x03
|
|
hide.long 0x00 "RXRAM178,RX FIFO RAM 178 Register"
|
|
in
|
|
hgroup.long 0x22CC++0x03
|
|
hide.long 0x00 "RXRAM179,RX FIFO RAM 179 Register"
|
|
in
|
|
hgroup.long 0x22D0++0x03
|
|
hide.long 0x00 "RXRAM180,RX FIFO RAM 180 Register"
|
|
in
|
|
hgroup.long 0x22D4++0x03
|
|
hide.long 0x00 "RXRAM181,RX FIFO RAM 181 Register"
|
|
in
|
|
hgroup.long 0x22D8++0x03
|
|
hide.long 0x00 "RXRAM182,RX FIFO RAM 182 Register"
|
|
in
|
|
hgroup.long 0x22DC++0x03
|
|
hide.long 0x00 "RXRAM183,RX FIFO RAM 183 Register"
|
|
in
|
|
hgroup.long 0x22E0++0x03
|
|
hide.long 0x00 "RXRAM184,RX FIFO RAM 184 Register"
|
|
in
|
|
hgroup.long 0x22E4++0x03
|
|
hide.long 0x00 "RXRAM185,RX FIFO RAM 185 Register"
|
|
in
|
|
hgroup.long 0x22E8++0x03
|
|
hide.long 0x00 "RXRAM186,RX FIFO RAM 186 Register"
|
|
in
|
|
hgroup.long 0x22EC++0x03
|
|
hide.long 0x00 "RXRAM187,RX FIFO RAM 187 Register"
|
|
in
|
|
hgroup.long 0x22F0++0x03
|
|
hide.long 0x00 "RXRAM188,RX FIFO RAM 188 Register"
|
|
in
|
|
hgroup.long 0x22F4++0x03
|
|
hide.long 0x00 "RXRAM189,RX FIFO RAM 189 Register"
|
|
in
|
|
hgroup.long 0x22F8++0x03
|
|
hide.long 0x00 "RXRAM190,RX FIFO RAM 190 Register"
|
|
in
|
|
hgroup.long 0x22FC++0x03
|
|
hide.long 0x00 "RXRAM191,RX FIFO RAM 191 Register"
|
|
in
|
|
hgroup.long 0x2300++0x03
|
|
hide.long 0x00 "RXRAM192,RX FIFO RAM 192 Register"
|
|
in
|
|
hgroup.long 0x2304++0x03
|
|
hide.long 0x00 "RXRAM193,RX FIFO RAM 193 Register"
|
|
in
|
|
hgroup.long 0x2308++0x03
|
|
hide.long 0x00 "RXRAM194,RX FIFO RAM 194 Register"
|
|
in
|
|
hgroup.long 0x230C++0x03
|
|
hide.long 0x00 "RXRAM195,RX FIFO RAM 195 Register"
|
|
in
|
|
hgroup.long 0x2310++0x03
|
|
hide.long 0x00 "RXRAM196,RX FIFO RAM 196 Register"
|
|
in
|
|
hgroup.long 0x2314++0x03
|
|
hide.long 0x00 "RXRAM197,RX FIFO RAM 197 Register"
|
|
in
|
|
hgroup.long 0x2318++0x03
|
|
hide.long 0x00 "RXRAM198,RX FIFO RAM 198 Register"
|
|
in
|
|
hgroup.long 0x231C++0x03
|
|
hide.long 0x00 "RXRAM199,RX FIFO RAM 199 Register"
|
|
in
|
|
hgroup.long 0x2320++0x03
|
|
hide.long 0x00 "RXRAM200,RX FIFO RAM 200 Register"
|
|
in
|
|
hgroup.long 0x2324++0x03
|
|
hide.long 0x00 "RXRAM201,RX FIFO RAM 201 Register"
|
|
in
|
|
hgroup.long 0x2328++0x03
|
|
hide.long 0x00 "RXRAM202,RX FIFO RAM 202 Register"
|
|
in
|
|
hgroup.long 0x232C++0x03
|
|
hide.long 0x00 "RXRAM203,RX FIFO RAM 203 Register"
|
|
in
|
|
hgroup.long 0x2330++0x03
|
|
hide.long 0x00 "RXRAM204,RX FIFO RAM 204 Register"
|
|
in
|
|
hgroup.long 0x2334++0x03
|
|
hide.long 0x00 "RXRAM205,RX FIFO RAM 205 Register"
|
|
in
|
|
hgroup.long 0x2338++0x03
|
|
hide.long 0x00 "RXRAM206,RX FIFO RAM 206 Register"
|
|
in
|
|
hgroup.long 0x233C++0x03
|
|
hide.long 0x00 "RXRAM207,RX FIFO RAM 207 Register"
|
|
in
|
|
hgroup.long 0x2340++0x03
|
|
hide.long 0x00 "RXRAM208,RX FIFO RAM 208 Register"
|
|
in
|
|
hgroup.long 0x2344++0x03
|
|
hide.long 0x00 "RXRAM209,RX FIFO RAM 209 Register"
|
|
in
|
|
hgroup.long 0x2348++0x03
|
|
hide.long 0x00 "RXRAM210,RX FIFO RAM 210 Register"
|
|
in
|
|
hgroup.long 0x234C++0x03
|
|
hide.long 0x00 "RXRAM211,RX FIFO RAM 211 Register"
|
|
in
|
|
hgroup.long 0x2350++0x03
|
|
hide.long 0x00 "RXRAM212,RX FIFO RAM 212 Register"
|
|
in
|
|
hgroup.long 0x2354++0x03
|
|
hide.long 0x00 "RXRAM213,RX FIFO RAM 213 Register"
|
|
in
|
|
hgroup.long 0x2358++0x03
|
|
hide.long 0x00 "RXRAM214,RX FIFO RAM 214 Register"
|
|
in
|
|
hgroup.long 0x235C++0x03
|
|
hide.long 0x00 "RXRAM215,RX FIFO RAM 215 Register"
|
|
in
|
|
hgroup.long 0x2360++0x03
|
|
hide.long 0x00 "RXRAM216,RX FIFO RAM 216 Register"
|
|
in
|
|
hgroup.long 0x2364++0x03
|
|
hide.long 0x00 "RXRAM217,RX FIFO RAM 217 Register"
|
|
in
|
|
hgroup.long 0x2368++0x03
|
|
hide.long 0x00 "RXRAM218,RX FIFO RAM 218 Register"
|
|
in
|
|
hgroup.long 0x236C++0x03
|
|
hide.long 0x00 "RXRAM219,RX FIFO RAM 219 Register"
|
|
in
|
|
hgroup.long 0x2370++0x03
|
|
hide.long 0x00 "RXRAM220,RX FIFO RAM 220 Register"
|
|
in
|
|
hgroup.long 0x2374++0x03
|
|
hide.long 0x00 "RXRAM221,RX FIFO RAM 221 Register"
|
|
in
|
|
hgroup.long 0x2378++0x03
|
|
hide.long 0x00 "RXRAM222,RX FIFO RAM 222 Register"
|
|
in
|
|
hgroup.long 0x237C++0x03
|
|
hide.long 0x00 "RXRAM223,RX FIFO RAM 223 Register"
|
|
in
|
|
hgroup.long 0x2380++0x03
|
|
hide.long 0x00 "RXRAM224,RX FIFO RAM 224 Register"
|
|
in
|
|
hgroup.long 0x2384++0x03
|
|
hide.long 0x00 "RXRAM225,RX FIFO RAM 225 Register"
|
|
in
|
|
hgroup.long 0x2388++0x03
|
|
hide.long 0x00 "RXRAM226,RX FIFO RAM 226 Register"
|
|
in
|
|
hgroup.long 0x238C++0x03
|
|
hide.long 0x00 "RXRAM227,RX FIFO RAM 227 Register"
|
|
in
|
|
hgroup.long 0x2390++0x03
|
|
hide.long 0x00 "RXRAM228,RX FIFO RAM 228 Register"
|
|
in
|
|
hgroup.long 0x2394++0x03
|
|
hide.long 0x00 "RXRAM229,RX FIFO RAM 229 Register"
|
|
in
|
|
hgroup.long 0x2398++0x03
|
|
hide.long 0x00 "RXRAM230,RX FIFO RAM 230 Register"
|
|
in
|
|
hgroup.long 0x239C++0x03
|
|
hide.long 0x00 "RXRAM231,RX FIFO RAM 231 Register"
|
|
in
|
|
hgroup.long 0x23A0++0x03
|
|
hide.long 0x00 "RXRAM232,RX FIFO RAM 232 Register"
|
|
in
|
|
hgroup.long 0x23A4++0x03
|
|
hide.long 0x00 "RXRAM233,RX FIFO RAM 233 Register"
|
|
in
|
|
hgroup.long 0x23A8++0x03
|
|
hide.long 0x00 "RXRAM234,RX FIFO RAM 234 Register"
|
|
in
|
|
hgroup.long 0x23AC++0x03
|
|
hide.long 0x00 "RXRAM235,RX FIFO RAM 235 Register"
|
|
in
|
|
hgroup.long 0x23B0++0x03
|
|
hide.long 0x00 "RXRAM236,RX FIFO RAM 236 Register"
|
|
in
|
|
hgroup.long 0x23B4++0x03
|
|
hide.long 0x00 "RXRAM237,RX FIFO RAM 237 Register"
|
|
in
|
|
hgroup.long 0x23B8++0x03
|
|
hide.long 0x00 "RXRAM238,RX FIFO RAM 238 Register"
|
|
in
|
|
hgroup.long 0x23BC++0x03
|
|
hide.long 0x00 "RXRAM239,RX FIFO RAM 239 Register"
|
|
in
|
|
hgroup.long 0x23C0++0x03
|
|
hide.long 0x00 "RXRAM240,RX FIFO RAM 240 Register"
|
|
in
|
|
hgroup.long 0x23C4++0x03
|
|
hide.long 0x00 "RXRAM241,RX FIFO RAM 241 Register"
|
|
in
|
|
hgroup.long 0x23C8++0x03
|
|
hide.long 0x00 "RXRAM242,RX FIFO RAM 242 Register"
|
|
in
|
|
hgroup.long 0x23CC++0x03
|
|
hide.long 0x00 "RXRAM243,RX FIFO RAM 243 Register"
|
|
in
|
|
hgroup.long 0x23D0++0x03
|
|
hide.long 0x00 "RXRAM244,RX FIFO RAM 244 Register"
|
|
in
|
|
hgroup.long 0x23D4++0x03
|
|
hide.long 0x00 "RXRAM245,RX FIFO RAM 245 Register"
|
|
in
|
|
hgroup.long 0x23D8++0x03
|
|
hide.long 0x00 "RXRAM246,RX FIFO RAM 246 Register"
|
|
in
|
|
hgroup.long 0x23DC++0x03
|
|
hide.long 0x00 "RXRAM247,RX FIFO RAM 247 Register"
|
|
in
|
|
hgroup.long 0x23E0++0x03
|
|
hide.long 0x00 "RXRAM248,RX FIFO RAM 248 Register"
|
|
in
|
|
hgroup.long 0x23E4++0x03
|
|
hide.long 0x00 "RXRAM249,RX FIFO RAM 249 Register"
|
|
in
|
|
hgroup.long 0x23E8++0x03
|
|
hide.long 0x00 "RXRAM250,RX FIFO RAM 250 Register"
|
|
in
|
|
hgroup.long 0x23EC++0x03
|
|
hide.long 0x00 "RXRAM251,RX FIFO RAM 251 Register"
|
|
in
|
|
hgroup.long 0x23F0++0x03
|
|
hide.long 0x00 "RXRAM252,RX FIFO RAM 252 Register"
|
|
in
|
|
hgroup.long 0x23F4++0x03
|
|
hide.long 0x00 "RXRAM253,RX FIFO RAM 253 Register"
|
|
in
|
|
hgroup.long 0x23F8++0x03
|
|
hide.long 0x00 "RXRAM254,RX FIFO RAM 254 Register"
|
|
in
|
|
hgroup.long 0x23FC++0x03
|
|
hide.long 0x00 "RXRAM255,RX FIFO RAM 255 Register"
|
|
in
|
|
hgroup.long 0x2400++0x03
|
|
hide.long 0x00 "RXRAM256,RX FIFO RAM 256 Register"
|
|
in
|
|
hgroup.long 0x2404++0x03
|
|
hide.long 0x00 "RXRAM257,RX FIFO RAM 257 Register"
|
|
in
|
|
hgroup.long 0x2408++0x03
|
|
hide.long 0x00 "RXRAM258,RX FIFO RAM 258 Register"
|
|
in
|
|
hgroup.long 0x240C++0x03
|
|
hide.long 0x00 "RXRAM259,RX FIFO RAM 259 Register"
|
|
in
|
|
hgroup.long 0x2410++0x03
|
|
hide.long 0x00 "RXRAM260,RX FIFO RAM 260 Register"
|
|
in
|
|
hgroup.long 0x2414++0x03
|
|
hide.long 0x00 "RXRAM261,RX FIFO RAM 261 Register"
|
|
in
|
|
hgroup.long 0x2418++0x03
|
|
hide.long 0x00 "RXRAM262,RX FIFO RAM 262 Register"
|
|
in
|
|
hgroup.long 0x241C++0x03
|
|
hide.long 0x00 "RXRAM263,RX FIFO RAM 263 Register"
|
|
in
|
|
hgroup.long 0x2420++0x03
|
|
hide.long 0x00 "RXRAM264,RX FIFO RAM 264 Register"
|
|
in
|
|
hgroup.long 0x2424++0x03
|
|
hide.long 0x00 "RXRAM265,RX FIFO RAM 265 Register"
|
|
in
|
|
hgroup.long 0x2428++0x03
|
|
hide.long 0x00 "RXRAM266,RX FIFO RAM 266 Register"
|
|
in
|
|
hgroup.long 0x242C++0x03
|
|
hide.long 0x00 "RXRAM267,RX FIFO RAM 267 Register"
|
|
in
|
|
hgroup.long 0x2430++0x03
|
|
hide.long 0x00 "RXRAM268,RX FIFO RAM 268 Register"
|
|
in
|
|
hgroup.long 0x2434++0x03
|
|
hide.long 0x00 "RXRAM269,RX FIFO RAM 269 Register"
|
|
in
|
|
hgroup.long 0x2438++0x03
|
|
hide.long 0x00 "RXRAM270,RX FIFO RAM 270 Register"
|
|
in
|
|
hgroup.long 0x243C++0x03
|
|
hide.long 0x00 "RXRAM271,RX FIFO RAM 271 Register"
|
|
in
|
|
hgroup.long 0x2440++0x03
|
|
hide.long 0x00 "RXRAM272,RX FIFO RAM 272 Register"
|
|
in
|
|
hgroup.long 0x2444++0x03
|
|
hide.long 0x00 "RXRAM273,RX FIFO RAM 273 Register"
|
|
in
|
|
hgroup.long 0x2448++0x03
|
|
hide.long 0x00 "RXRAM274,RX FIFO RAM 274 Register"
|
|
in
|
|
hgroup.long 0x244C++0x03
|
|
hide.long 0x00 "RXRAM275,RX FIFO RAM 275 Register"
|
|
in
|
|
hgroup.long 0x2450++0x03
|
|
hide.long 0x00 "RXRAM276,RX FIFO RAM 276 Register"
|
|
in
|
|
hgroup.long 0x2454++0x03
|
|
hide.long 0x00 "RXRAM277,RX FIFO RAM 277 Register"
|
|
in
|
|
hgroup.long 0x2458++0x03
|
|
hide.long 0x00 "RXRAM278,RX FIFO RAM 278 Register"
|
|
in
|
|
hgroup.long 0x245C++0x03
|
|
hide.long 0x00 "RXRAM279,RX FIFO RAM 279 Register"
|
|
in
|
|
hgroup.long 0x2460++0x03
|
|
hide.long 0x00 "RXRAM280,RX FIFO RAM 280 Register"
|
|
in
|
|
hgroup.long 0x2464++0x03
|
|
hide.long 0x00 "RXRAM281,RX FIFO RAM 281 Register"
|
|
in
|
|
hgroup.long 0x2468++0x03
|
|
hide.long 0x00 "RXRAM282,RX FIFO RAM 282 Register"
|
|
in
|
|
hgroup.long 0x246C++0x03
|
|
hide.long 0x00 "RXRAM283,RX FIFO RAM 283 Register"
|
|
in
|
|
hgroup.long 0x2470++0x03
|
|
hide.long 0x00 "RXRAM284,RX FIFO RAM 284 Register"
|
|
in
|
|
hgroup.long 0x2474++0x03
|
|
hide.long 0x00 "RXRAM285,RX FIFO RAM 285 Register"
|
|
in
|
|
hgroup.long 0x2478++0x03
|
|
hide.long 0x00 "RXRAM286,RX FIFO RAM 286 Register"
|
|
in
|
|
hgroup.long 0x247C++0x03
|
|
hide.long 0x00 "RXRAM287,RX FIFO RAM 287 Register"
|
|
in
|
|
hgroup.long 0x2480++0x03
|
|
hide.long 0x00 "RXRAM288,RX FIFO RAM 288 Register"
|
|
in
|
|
hgroup.long 0x2484++0x03
|
|
hide.long 0x00 "RXRAM289,RX FIFO RAM 289 Register"
|
|
in
|
|
hgroup.long 0x2488++0x03
|
|
hide.long 0x00 "RXRAM290,RX FIFO RAM 290 Register"
|
|
in
|
|
hgroup.long 0x248C++0x03
|
|
hide.long 0x00 "RXRAM291,RX FIFO RAM 291 Register"
|
|
in
|
|
hgroup.long 0x2490++0x03
|
|
hide.long 0x00 "RXRAM292,RX FIFO RAM 292 Register"
|
|
in
|
|
hgroup.long 0x2494++0x03
|
|
hide.long 0x00 "RXRAM293,RX FIFO RAM 293 Register"
|
|
in
|
|
hgroup.long 0x2498++0x03
|
|
hide.long 0x00 "RXRAM294,RX FIFO RAM 294 Register"
|
|
in
|
|
hgroup.long 0x249C++0x03
|
|
hide.long 0x00 "RXRAM295,RX FIFO RAM 295 Register"
|
|
in
|
|
hgroup.long 0x24A0++0x03
|
|
hide.long 0x00 "RXRAM296,RX FIFO RAM 296 Register"
|
|
in
|
|
hgroup.long 0x24A4++0x03
|
|
hide.long 0x00 "RXRAM297,RX FIFO RAM 297 Register"
|
|
in
|
|
hgroup.long 0x24A8++0x03
|
|
hide.long 0x00 "RXRAM298,RX FIFO RAM 298 Register"
|
|
in
|
|
hgroup.long 0x24AC++0x03
|
|
hide.long 0x00 "RXRAM299,RX FIFO RAM 299 Register"
|
|
in
|
|
hgroup.long 0x24B0++0x03
|
|
hide.long 0x00 "RXRAM300,RX FIFO RAM 300 Register"
|
|
in
|
|
hgroup.long 0x24B4++0x03
|
|
hide.long 0x00 "RXRAM301,RX FIFO RAM 301 Register"
|
|
in
|
|
hgroup.long 0x24B8++0x03
|
|
hide.long 0x00 "RXRAM302,RX FIFO RAM 302 Register"
|
|
in
|
|
hgroup.long 0x24BC++0x03
|
|
hide.long 0x00 "RXRAM303,RX FIFO RAM 303 Register"
|
|
in
|
|
hgroup.long 0x24C0++0x03
|
|
hide.long 0x00 "RXRAM304,RX FIFO RAM 304 Register"
|
|
in
|
|
hgroup.long 0x24C4++0x03
|
|
hide.long 0x00 "RXRAM305,RX FIFO RAM 305 Register"
|
|
in
|
|
hgroup.long 0x24C8++0x03
|
|
hide.long 0x00 "RXRAM306,RX FIFO RAM 306 Register"
|
|
in
|
|
hgroup.long 0x24CC++0x03
|
|
hide.long 0x00 "RXRAM307,RX FIFO RAM 307 Register"
|
|
in
|
|
hgroup.long 0x24D0++0x03
|
|
hide.long 0x00 "RXRAM308,RX FIFO RAM 308 Register"
|
|
in
|
|
hgroup.long 0x24D4++0x03
|
|
hide.long 0x00 "RXRAM309,RX FIFO RAM 309 Register"
|
|
in
|
|
hgroup.long 0x24D8++0x03
|
|
hide.long 0x00 "RXRAM310,RX FIFO RAM 310 Register"
|
|
in
|
|
hgroup.long 0x24DC++0x03
|
|
hide.long 0x00 "RXRAM311,RX FIFO RAM 311 Register"
|
|
in
|
|
hgroup.long 0x24E0++0x03
|
|
hide.long 0x00 "RXRAM312,RX FIFO RAM 312 Register"
|
|
in
|
|
hgroup.long 0x24E4++0x03
|
|
hide.long 0x00 "RXRAM313,RX FIFO RAM 313 Register"
|
|
in
|
|
hgroup.long 0x24E8++0x03
|
|
hide.long 0x00 "RXRAM314,RX FIFO RAM 314 Register"
|
|
in
|
|
hgroup.long 0x24EC++0x03
|
|
hide.long 0x00 "RXRAM315,RX FIFO RAM 315 Register"
|
|
in
|
|
hgroup.long 0x24F0++0x03
|
|
hide.long 0x00 "RXRAM316,RX FIFO RAM 316 Register"
|
|
in
|
|
hgroup.long 0x24F4++0x03
|
|
hide.long 0x00 "RXRAM317,RX FIFO RAM 317 Register"
|
|
in
|
|
hgroup.long 0x24F8++0x03
|
|
hide.long 0x00 "RXRAM318,RX FIFO RAM 318 Register"
|
|
in
|
|
hgroup.long 0x24FC++0x03
|
|
hide.long 0x00 "RXRAM319,RX FIFO RAM 319 Register"
|
|
in
|
|
hgroup.long 0x2500++0x03
|
|
hide.long 0x00 "RXRAM320,RX FIFO RAM 320 Register"
|
|
in
|
|
hgroup.long 0x2504++0x03
|
|
hide.long 0x00 "RXRAM321,RX FIFO RAM 321 Register"
|
|
in
|
|
hgroup.long 0x2508++0x03
|
|
hide.long 0x00 "RXRAM322,RX FIFO RAM 322 Register"
|
|
in
|
|
hgroup.long 0x250C++0x03
|
|
hide.long 0x00 "RXRAM323,RX FIFO RAM 323 Register"
|
|
in
|
|
hgroup.long 0x2510++0x03
|
|
hide.long 0x00 "RXRAM324,RX FIFO RAM 324 Register"
|
|
in
|
|
hgroup.long 0x2514++0x03
|
|
hide.long 0x00 "RXRAM325,RX FIFO RAM 325 Register"
|
|
in
|
|
hgroup.long 0x2518++0x03
|
|
hide.long 0x00 "RXRAM326,RX FIFO RAM 326 Register"
|
|
in
|
|
hgroup.long 0x251C++0x03
|
|
hide.long 0x00 "RXRAM327,RX FIFO RAM 327 Register"
|
|
in
|
|
hgroup.long 0x2520++0x03
|
|
hide.long 0x00 "RXRAM328,RX FIFO RAM 328 Register"
|
|
in
|
|
hgroup.long 0x2524++0x03
|
|
hide.long 0x00 "RXRAM329,RX FIFO RAM 329 Register"
|
|
in
|
|
hgroup.long 0x2528++0x03
|
|
hide.long 0x00 "RXRAM330,RX FIFO RAM 330 Register"
|
|
in
|
|
hgroup.long 0x252C++0x03
|
|
hide.long 0x00 "RXRAM331,RX FIFO RAM 331 Register"
|
|
in
|
|
hgroup.long 0x2530++0x03
|
|
hide.long 0x00 "RXRAM332,RX FIFO RAM 332 Register"
|
|
in
|
|
hgroup.long 0x2534++0x03
|
|
hide.long 0x00 "RXRAM333,RX FIFO RAM 333 Register"
|
|
in
|
|
hgroup.long 0x2538++0x03
|
|
hide.long 0x00 "RXRAM334,RX FIFO RAM 334 Register"
|
|
in
|
|
hgroup.long 0x253C++0x03
|
|
hide.long 0x00 "RXRAM335,RX FIFO RAM 335 Register"
|
|
in
|
|
hgroup.long 0x2540++0x03
|
|
hide.long 0x00 "RXRAM336,RX FIFO RAM 336 Register"
|
|
in
|
|
hgroup.long 0x2544++0x03
|
|
hide.long 0x00 "RXRAM337,RX FIFO RAM 337 Register"
|
|
in
|
|
hgroup.long 0x2548++0x03
|
|
hide.long 0x00 "RXRAM338,RX FIFO RAM 338 Register"
|
|
in
|
|
hgroup.long 0x254C++0x03
|
|
hide.long 0x00 "RXRAM339,RX FIFO RAM 339 Register"
|
|
in
|
|
hgroup.long 0x2550++0x03
|
|
hide.long 0x00 "RXRAM340,RX FIFO RAM 340 Register"
|
|
in
|
|
hgroup.long 0x2554++0x03
|
|
hide.long 0x00 "RXRAM341,RX FIFO RAM 341 Register"
|
|
in
|
|
hgroup.long 0x2558++0x03
|
|
hide.long 0x00 "RXRAM342,RX FIFO RAM 342 Register"
|
|
in
|
|
hgroup.long 0x255C++0x03
|
|
hide.long 0x00 "RXRAM343,RX FIFO RAM 343 Register"
|
|
in
|
|
hgroup.long 0x2560++0x03
|
|
hide.long 0x00 "RXRAM344,RX FIFO RAM 344 Register"
|
|
in
|
|
hgroup.long 0x2564++0x03
|
|
hide.long 0x00 "RXRAM345,RX FIFO RAM 345 Register"
|
|
in
|
|
hgroup.long 0x2568++0x03
|
|
hide.long 0x00 "RXRAM346,RX FIFO RAM 346 Register"
|
|
in
|
|
hgroup.long 0x256C++0x03
|
|
hide.long 0x00 "RXRAM347,RX FIFO RAM 347 Register"
|
|
in
|
|
hgroup.long 0x2570++0x03
|
|
hide.long 0x00 "RXRAM348,RX FIFO RAM 348 Register"
|
|
in
|
|
hgroup.long 0x2574++0x03
|
|
hide.long 0x00 "RXRAM349,RX FIFO RAM 349 Register"
|
|
in
|
|
hgroup.long 0x2578++0x03
|
|
hide.long 0x00 "RXRAM350,RX FIFO RAM 350 Register"
|
|
in
|
|
hgroup.long 0x257C++0x03
|
|
hide.long 0x00 "RXRAM351,RX FIFO RAM 351 Register"
|
|
in
|
|
hgroup.long 0x2580++0x03
|
|
hide.long 0x00 "RXRAM352,RX FIFO RAM 352 Register"
|
|
in
|
|
hgroup.long 0x2584++0x03
|
|
hide.long 0x00 "RXRAM353,RX FIFO RAM 353 Register"
|
|
in
|
|
hgroup.long 0x2588++0x03
|
|
hide.long 0x00 "RXRAM354,RX FIFO RAM 354 Register"
|
|
in
|
|
hgroup.long 0x258C++0x03
|
|
hide.long 0x00 "RXRAM355,RX FIFO RAM 355 Register"
|
|
in
|
|
hgroup.long 0x2590++0x03
|
|
hide.long 0x00 "RXRAM356,RX FIFO RAM 356 Register"
|
|
in
|
|
hgroup.long 0x2594++0x03
|
|
hide.long 0x00 "RXRAM357,RX FIFO RAM 357 Register"
|
|
in
|
|
hgroup.long 0x2598++0x03
|
|
hide.long 0x00 "RXRAM358,RX FIFO RAM 358 Register"
|
|
in
|
|
hgroup.long 0x259C++0x03
|
|
hide.long 0x00 "RXRAM359,RX FIFO RAM 359 Register"
|
|
in
|
|
hgroup.long 0x25A0++0x03
|
|
hide.long 0x00 "RXRAM360,RX FIFO RAM 360 Register"
|
|
in
|
|
hgroup.long 0x25A4++0x03
|
|
hide.long 0x00 "RXRAM361,RX FIFO RAM 361 Register"
|
|
in
|
|
hgroup.long 0x25A8++0x03
|
|
hide.long 0x00 "RXRAM362,RX FIFO RAM 362 Register"
|
|
in
|
|
hgroup.long 0x25AC++0x03
|
|
hide.long 0x00 "RXRAM363,RX FIFO RAM 363 Register"
|
|
in
|
|
hgroup.long 0x25B0++0x03
|
|
hide.long 0x00 "RXRAM364,RX FIFO RAM 364 Register"
|
|
in
|
|
hgroup.long 0x25B4++0x03
|
|
hide.long 0x00 "RXRAM365,RX FIFO RAM 365 Register"
|
|
in
|
|
hgroup.long 0x25B8++0x03
|
|
hide.long 0x00 "RXRAM366,RX FIFO RAM 366 Register"
|
|
in
|
|
hgroup.long 0x25BC++0x03
|
|
hide.long 0x00 "RXRAM367,RX FIFO RAM 367 Register"
|
|
in
|
|
hgroup.long 0x25C0++0x03
|
|
hide.long 0x00 "RXRAM368,RX FIFO RAM 368 Register"
|
|
in
|
|
hgroup.long 0x25C4++0x03
|
|
hide.long 0x00 "RXRAM369,RX FIFO RAM 369 Register"
|
|
in
|
|
hgroup.long 0x25C8++0x03
|
|
hide.long 0x00 "RXRAM370,RX FIFO RAM 370 Register"
|
|
in
|
|
hgroup.long 0x25CC++0x03
|
|
hide.long 0x00 "RXRAM371,RX FIFO RAM 371 Register"
|
|
in
|
|
hgroup.long 0x25D0++0x03
|
|
hide.long 0x00 "RXRAM372,RX FIFO RAM 372 Register"
|
|
in
|
|
hgroup.long 0x25D4++0x03
|
|
hide.long 0x00 "RXRAM373,RX FIFO RAM 373 Register"
|
|
in
|
|
hgroup.long 0x25D8++0x03
|
|
hide.long 0x00 "RXRAM374,RX FIFO RAM 374 Register"
|
|
in
|
|
hgroup.long 0x25DC++0x03
|
|
hide.long 0x00 "RXRAM375,RX FIFO RAM 375 Register"
|
|
in
|
|
hgroup.long 0x25E0++0x03
|
|
hide.long 0x00 "RXRAM376,RX FIFO RAM 376 Register"
|
|
in
|
|
hgroup.long 0x25E4++0x03
|
|
hide.long 0x00 "RXRAM377,RX FIFO RAM 377 Register"
|
|
in
|
|
hgroup.long 0x25E8++0x03
|
|
hide.long 0x00 "RXRAM378,RX FIFO RAM 378 Register"
|
|
in
|
|
hgroup.long 0x25EC++0x03
|
|
hide.long 0x00 "RXRAM379,RX FIFO RAM 379 Register"
|
|
in
|
|
hgroup.long 0x25F0++0x03
|
|
hide.long 0x00 "RXRAM380,RX FIFO RAM 380 Register"
|
|
in
|
|
hgroup.long 0x25F4++0x03
|
|
hide.long 0x00 "RXRAM381,RX FIFO RAM 381 Register"
|
|
in
|
|
hgroup.long 0x25F8++0x03
|
|
hide.long 0x00 "RXRAM382,RX FIFO RAM 382 Register"
|
|
in
|
|
hgroup.long 0x25FC++0x03
|
|
hide.long 0x00 "RXRAM383,RX FIFO RAM 383 Register"
|
|
in
|
|
hgroup.long 0x2600++0x03
|
|
hide.long 0x00 "RXRAM384,RX FIFO RAM 384 Register"
|
|
in
|
|
hgroup.long 0x2604++0x03
|
|
hide.long 0x00 "RXRAM385,RX FIFO RAM 385 Register"
|
|
in
|
|
hgroup.long 0x2608++0x03
|
|
hide.long 0x00 "RXRAM386,RX FIFO RAM 386 Register"
|
|
in
|
|
hgroup.long 0x260C++0x03
|
|
hide.long 0x00 "RXRAM387,RX FIFO RAM 387 Register"
|
|
in
|
|
hgroup.long 0x2610++0x03
|
|
hide.long 0x00 "RXRAM388,RX FIFO RAM 388 Register"
|
|
in
|
|
hgroup.long 0x2614++0x03
|
|
hide.long 0x00 "RXRAM389,RX FIFO RAM 389 Register"
|
|
in
|
|
hgroup.long 0x2618++0x03
|
|
hide.long 0x00 "RXRAM390,RX FIFO RAM 390 Register"
|
|
in
|
|
hgroup.long 0x261C++0x03
|
|
hide.long 0x00 "RXRAM391,RX FIFO RAM 391 Register"
|
|
in
|
|
hgroup.long 0x2620++0x03
|
|
hide.long 0x00 "RXRAM392,RX FIFO RAM 392 Register"
|
|
in
|
|
hgroup.long 0x2624++0x03
|
|
hide.long 0x00 "RXRAM393,RX FIFO RAM 393 Register"
|
|
in
|
|
hgroup.long 0x2628++0x03
|
|
hide.long 0x00 "RXRAM394,RX FIFO RAM 394 Register"
|
|
in
|
|
hgroup.long 0x262C++0x03
|
|
hide.long 0x00 "RXRAM395,RX FIFO RAM 395 Register"
|
|
in
|
|
hgroup.long 0x2630++0x03
|
|
hide.long 0x00 "RXRAM396,RX FIFO RAM 396 Register"
|
|
in
|
|
hgroup.long 0x2634++0x03
|
|
hide.long 0x00 "RXRAM397,RX FIFO RAM 397 Register"
|
|
in
|
|
hgroup.long 0x2638++0x03
|
|
hide.long 0x00 "RXRAM398,RX FIFO RAM 398 Register"
|
|
in
|
|
hgroup.long 0x263C++0x03
|
|
hide.long 0x00 "RXRAM399,RX FIFO RAM 399 Register"
|
|
in
|
|
hgroup.long 0x2640++0x03
|
|
hide.long 0x00 "RXRAM400,RX FIFO RAM 400 Register"
|
|
in
|
|
hgroup.long 0x2644++0x03
|
|
hide.long 0x00 "RXRAM401,RX FIFO RAM 401 Register"
|
|
in
|
|
hgroup.long 0x2648++0x03
|
|
hide.long 0x00 "RXRAM402,RX FIFO RAM 402 Register"
|
|
in
|
|
hgroup.long 0x264C++0x03
|
|
hide.long 0x00 "RXRAM403,RX FIFO RAM 403 Register"
|
|
in
|
|
hgroup.long 0x2650++0x03
|
|
hide.long 0x00 "RXRAM404,RX FIFO RAM 404 Register"
|
|
in
|
|
hgroup.long 0x2654++0x03
|
|
hide.long 0x00 "RXRAM405,RX FIFO RAM 405 Register"
|
|
in
|
|
hgroup.long 0x2658++0x03
|
|
hide.long 0x00 "RXRAM406,RX FIFO RAM 406 Register"
|
|
in
|
|
hgroup.long 0x265C++0x03
|
|
hide.long 0x00 "RXRAM407,RX FIFO RAM 407 Register"
|
|
in
|
|
hgroup.long 0x2660++0x03
|
|
hide.long 0x00 "RXRAM408,RX FIFO RAM 408 Register"
|
|
in
|
|
hgroup.long 0x2664++0x03
|
|
hide.long 0x00 "RXRAM409,RX FIFO RAM 409 Register"
|
|
in
|
|
hgroup.long 0x2668++0x03
|
|
hide.long 0x00 "RXRAM410,RX FIFO RAM 410 Register"
|
|
in
|
|
hgroup.long 0x266C++0x03
|
|
hide.long 0x00 "RXRAM411,RX FIFO RAM 411 Register"
|
|
in
|
|
hgroup.long 0x2670++0x03
|
|
hide.long 0x00 "RXRAM412,RX FIFO RAM 412 Register"
|
|
in
|
|
hgroup.long 0x2674++0x03
|
|
hide.long 0x00 "RXRAM413,RX FIFO RAM 413 Register"
|
|
in
|
|
hgroup.long 0x2678++0x03
|
|
hide.long 0x00 "RXRAM414,RX FIFO RAM 414 Register"
|
|
in
|
|
hgroup.long 0x267C++0x03
|
|
hide.long 0x00 "RXRAM415,RX FIFO RAM 415 Register"
|
|
in
|
|
hgroup.long 0x2680++0x03
|
|
hide.long 0x00 "RXRAM416,RX FIFO RAM 416 Register"
|
|
in
|
|
hgroup.long 0x2684++0x03
|
|
hide.long 0x00 "RXRAM417,RX FIFO RAM 417 Register"
|
|
in
|
|
hgroup.long 0x2688++0x03
|
|
hide.long 0x00 "RXRAM418,RX FIFO RAM 418 Register"
|
|
in
|
|
hgroup.long 0x268C++0x03
|
|
hide.long 0x00 "RXRAM419,RX FIFO RAM 419 Register"
|
|
in
|
|
hgroup.long 0x2690++0x03
|
|
hide.long 0x00 "RXRAM420,RX FIFO RAM 420 Register"
|
|
in
|
|
hgroup.long 0x2694++0x03
|
|
hide.long 0x00 "RXRAM421,RX FIFO RAM 421 Register"
|
|
in
|
|
hgroup.long 0x2698++0x03
|
|
hide.long 0x00 "RXRAM422,RX FIFO RAM 422 Register"
|
|
in
|
|
hgroup.long 0x269C++0x03
|
|
hide.long 0x00 "RXRAM423,RX FIFO RAM 423 Register"
|
|
in
|
|
hgroup.long 0x26A0++0x03
|
|
hide.long 0x00 "RXRAM424,RX FIFO RAM 424 Register"
|
|
in
|
|
hgroup.long 0x26A4++0x03
|
|
hide.long 0x00 "RXRAM425,RX FIFO RAM 425 Register"
|
|
in
|
|
hgroup.long 0x26A8++0x03
|
|
hide.long 0x00 "RXRAM426,RX FIFO RAM 426 Register"
|
|
in
|
|
hgroup.long 0x26AC++0x03
|
|
hide.long 0x00 "RXRAM427,RX FIFO RAM 427 Register"
|
|
in
|
|
hgroup.long 0x26B0++0x03
|
|
hide.long 0x00 "RXRAM428,RX FIFO RAM 428 Register"
|
|
in
|
|
hgroup.long 0x26B4++0x03
|
|
hide.long 0x00 "RXRAM429,RX FIFO RAM 429 Register"
|
|
in
|
|
hgroup.long 0x26B8++0x03
|
|
hide.long 0x00 "RXRAM430,RX FIFO RAM 430 Register"
|
|
in
|
|
hgroup.long 0x26BC++0x03
|
|
hide.long 0x00 "RXRAM431,RX FIFO RAM 431 Register"
|
|
in
|
|
hgroup.long 0x26C0++0x03
|
|
hide.long 0x00 "RXRAM432,RX FIFO RAM 432 Register"
|
|
in
|
|
hgroup.long 0x26C4++0x03
|
|
hide.long 0x00 "RXRAM433,RX FIFO RAM 433 Register"
|
|
in
|
|
hgroup.long 0x26C8++0x03
|
|
hide.long 0x00 "RXRAM434,RX FIFO RAM 434 Register"
|
|
in
|
|
hgroup.long 0x26CC++0x03
|
|
hide.long 0x00 "RXRAM435,RX FIFO RAM 435 Register"
|
|
in
|
|
hgroup.long 0x26D0++0x03
|
|
hide.long 0x00 "RXRAM436,RX FIFO RAM 436 Register"
|
|
in
|
|
hgroup.long 0x26D4++0x03
|
|
hide.long 0x00 "RXRAM437,RX FIFO RAM 437 Register"
|
|
in
|
|
hgroup.long 0x26D8++0x03
|
|
hide.long 0x00 "RXRAM438,RX FIFO RAM 438 Register"
|
|
in
|
|
hgroup.long 0x26DC++0x03
|
|
hide.long 0x00 "RXRAM439,RX FIFO RAM 439 Register"
|
|
in
|
|
hgroup.long 0x26E0++0x03
|
|
hide.long 0x00 "RXRAM440,RX FIFO RAM 440 Register"
|
|
in
|
|
hgroup.long 0x26E4++0x03
|
|
hide.long 0x00 "RXRAM441,RX FIFO RAM 441 Register"
|
|
in
|
|
hgroup.long 0x26E8++0x03
|
|
hide.long 0x00 "RXRAM442,RX FIFO RAM 442 Register"
|
|
in
|
|
hgroup.long 0x26EC++0x03
|
|
hide.long 0x00 "RXRAM443,RX FIFO RAM 443 Register"
|
|
in
|
|
hgroup.long 0x26F0++0x03
|
|
hide.long 0x00 "RXRAM444,RX FIFO RAM 444 Register"
|
|
in
|
|
hgroup.long 0x26F4++0x03
|
|
hide.long 0x00 "RXRAM445,RX FIFO RAM 445 Register"
|
|
in
|
|
hgroup.long 0x26F8++0x03
|
|
hide.long 0x00 "RXRAM446,RX FIFO RAM 446 Register"
|
|
in
|
|
hgroup.long 0x26FC++0x03
|
|
hide.long 0x00 "RXRAM447,RX FIFO RAM 447 Register"
|
|
in
|
|
hgroup.long 0x2700++0x03
|
|
hide.long 0x00 "RXRAM448,RX FIFO RAM 448 Register"
|
|
in
|
|
hgroup.long 0x2704++0x03
|
|
hide.long 0x00 "RXRAM449,RX FIFO RAM 449 Register"
|
|
in
|
|
hgroup.long 0x2708++0x03
|
|
hide.long 0x00 "RXRAM450,RX FIFO RAM 450 Register"
|
|
in
|
|
hgroup.long 0x270C++0x03
|
|
hide.long 0x00 "RXRAM451,RX FIFO RAM 451 Register"
|
|
in
|
|
hgroup.long 0x2710++0x03
|
|
hide.long 0x00 "RXRAM452,RX FIFO RAM 452 Register"
|
|
in
|
|
hgroup.long 0x2714++0x03
|
|
hide.long 0x00 "RXRAM453,RX FIFO RAM 453 Register"
|
|
in
|
|
hgroup.long 0x2718++0x03
|
|
hide.long 0x00 "RXRAM454,RX FIFO RAM 454 Register"
|
|
in
|
|
hgroup.long 0x271C++0x03
|
|
hide.long 0x00 "RXRAM455,RX FIFO RAM 455 Register"
|
|
in
|
|
hgroup.long 0x2720++0x03
|
|
hide.long 0x00 "RXRAM456,RX FIFO RAM 456 Register"
|
|
in
|
|
hgroup.long 0x2724++0x03
|
|
hide.long 0x00 "RXRAM457,RX FIFO RAM 457 Register"
|
|
in
|
|
hgroup.long 0x2728++0x03
|
|
hide.long 0x00 "RXRAM458,RX FIFO RAM 458 Register"
|
|
in
|
|
hgroup.long 0x272C++0x03
|
|
hide.long 0x00 "RXRAM459,RX FIFO RAM 459 Register"
|
|
in
|
|
hgroup.long 0x2730++0x03
|
|
hide.long 0x00 "RXRAM460,RX FIFO RAM 460 Register"
|
|
in
|
|
hgroup.long 0x2734++0x03
|
|
hide.long 0x00 "RXRAM461,RX FIFO RAM 461 Register"
|
|
in
|
|
hgroup.long 0x2738++0x03
|
|
hide.long 0x00 "RXRAM462,RX FIFO RAM 462 Register"
|
|
in
|
|
hgroup.long 0x273C++0x03
|
|
hide.long 0x00 "RXRAM463,RX FIFO RAM 463 Register"
|
|
in
|
|
hgroup.long 0x2740++0x03
|
|
hide.long 0x00 "RXRAM464,RX FIFO RAM 464 Register"
|
|
in
|
|
hgroup.long 0x2744++0x03
|
|
hide.long 0x00 "RXRAM465,RX FIFO RAM 465 Register"
|
|
in
|
|
hgroup.long 0x2748++0x03
|
|
hide.long 0x00 "RXRAM466,RX FIFO RAM 466 Register"
|
|
in
|
|
hgroup.long 0x274C++0x03
|
|
hide.long 0x00 "RXRAM467,RX FIFO RAM 467 Register"
|
|
in
|
|
hgroup.long 0x2750++0x03
|
|
hide.long 0x00 "RXRAM468,RX FIFO RAM 468 Register"
|
|
in
|
|
hgroup.long 0x2754++0x03
|
|
hide.long 0x00 "RXRAM469,RX FIFO RAM 469 Register"
|
|
in
|
|
hgroup.long 0x2758++0x03
|
|
hide.long 0x00 "RXRAM470,RX FIFO RAM 470 Register"
|
|
in
|
|
hgroup.long 0x275C++0x03
|
|
hide.long 0x00 "RXRAM471,RX FIFO RAM 471 Register"
|
|
in
|
|
hgroup.long 0x2760++0x03
|
|
hide.long 0x00 "RXRAM472,RX FIFO RAM 472 Register"
|
|
in
|
|
hgroup.long 0x2764++0x03
|
|
hide.long 0x00 "RXRAM473,RX FIFO RAM 473 Register"
|
|
in
|
|
hgroup.long 0x2768++0x03
|
|
hide.long 0x00 "RXRAM474,RX FIFO RAM 474 Register"
|
|
in
|
|
hgroup.long 0x276C++0x03
|
|
hide.long 0x00 "RXRAM475,RX FIFO RAM 475 Register"
|
|
in
|
|
hgroup.long 0x2770++0x03
|
|
hide.long 0x00 "RXRAM476,RX FIFO RAM 476 Register"
|
|
in
|
|
hgroup.long 0x2774++0x03
|
|
hide.long 0x00 "RXRAM477,RX FIFO RAM 477 Register"
|
|
in
|
|
hgroup.long 0x2778++0x03
|
|
hide.long 0x00 "RXRAM478,RX FIFO RAM 478 Register"
|
|
in
|
|
hgroup.long 0x277C++0x03
|
|
hide.long 0x00 "RXRAM479,RX FIFO RAM 479 Register"
|
|
in
|
|
hgroup.long 0x2780++0x03
|
|
hide.long 0x00 "RXRAM480,RX FIFO RAM 480 Register"
|
|
in
|
|
hgroup.long 0x2784++0x03
|
|
hide.long 0x00 "RXRAM481,RX FIFO RAM 481 Register"
|
|
in
|
|
hgroup.long 0x2788++0x03
|
|
hide.long 0x00 "RXRAM482,RX FIFO RAM 482 Register"
|
|
in
|
|
hgroup.long 0x278C++0x03
|
|
hide.long 0x00 "RXRAM483,RX FIFO RAM 483 Register"
|
|
in
|
|
hgroup.long 0x2790++0x03
|
|
hide.long 0x00 "RXRAM484,RX FIFO RAM 484 Register"
|
|
in
|
|
hgroup.long 0x2794++0x03
|
|
hide.long 0x00 "RXRAM485,RX FIFO RAM 485 Register"
|
|
in
|
|
hgroup.long 0x2798++0x03
|
|
hide.long 0x00 "RXRAM486,RX FIFO RAM 486 Register"
|
|
in
|
|
hgroup.long 0x279C++0x03
|
|
hide.long 0x00 "RXRAM487,RX FIFO RAM 487 Register"
|
|
in
|
|
hgroup.long 0x27A0++0x03
|
|
hide.long 0x00 "RXRAM488,RX FIFO RAM 488 Register"
|
|
in
|
|
hgroup.long 0x27A4++0x03
|
|
hide.long 0x00 "RXRAM489,RX FIFO RAM 489 Register"
|
|
in
|
|
hgroup.long 0x27A8++0x03
|
|
hide.long 0x00 "RXRAM490,RX FIFO RAM 490 Register"
|
|
in
|
|
hgroup.long 0x27AC++0x03
|
|
hide.long 0x00 "RXRAM491,RX FIFO RAM 491 Register"
|
|
in
|
|
hgroup.long 0x27B0++0x03
|
|
hide.long 0x00 "RXRAM492,RX FIFO RAM 492 Register"
|
|
in
|
|
hgroup.long 0x27B4++0x03
|
|
hide.long 0x00 "RXRAM493,RX FIFO RAM 493 Register"
|
|
in
|
|
hgroup.long 0x27B8++0x03
|
|
hide.long 0x00 "RXRAM494,RX FIFO RAM 494 Register"
|
|
in
|
|
hgroup.long 0x27BC++0x03
|
|
hide.long 0x00 "RXRAM495,RX FIFO RAM 495 Register"
|
|
in
|
|
hgroup.long 0x27C0++0x03
|
|
hide.long 0x00 "RXRAM496,RX FIFO RAM 496 Register"
|
|
in
|
|
hgroup.long 0x27C4++0x03
|
|
hide.long 0x00 "RXRAM497,RX FIFO RAM 497 Register"
|
|
in
|
|
hgroup.long 0x27C8++0x03
|
|
hide.long 0x00 "RXRAM498,RX FIFO RAM 498 Register"
|
|
in
|
|
hgroup.long 0x27CC++0x03
|
|
hide.long 0x00 "RXRAM499,RX FIFO RAM 499 Register"
|
|
in
|
|
hgroup.long 0x27D0++0x03
|
|
hide.long 0x00 "RXRAM500,RX FIFO RAM 500 Register"
|
|
in
|
|
hgroup.long 0x27D4++0x03
|
|
hide.long 0x00 "RXRAM501,RX FIFO RAM 501 Register"
|
|
in
|
|
hgroup.long 0x27D8++0x03
|
|
hide.long 0x00 "RXRAM502,RX FIFO RAM 502 Register"
|
|
in
|
|
hgroup.long 0x27DC++0x03
|
|
hide.long 0x00 "RXRAM503,RX FIFO RAM 503 Register"
|
|
in
|
|
hgroup.long 0x27E0++0x03
|
|
hide.long 0x00 "RXRAM504,RX FIFO RAM 504 Register"
|
|
in
|
|
hgroup.long 0x27E4++0x03
|
|
hide.long 0x00 "RXRAM505,RX FIFO RAM 505 Register"
|
|
in
|
|
hgroup.long 0x27E8++0x03
|
|
hide.long 0x00 "RXRAM506,RX FIFO RAM 506 Register"
|
|
in
|
|
hgroup.long 0x27EC++0x03
|
|
hide.long 0x00 "RXRAM507,RX FIFO RAM 507 Register"
|
|
in
|
|
hgroup.long 0x27F0++0x03
|
|
hide.long 0x00 "RXRAM508,RX FIFO RAM 508 Register"
|
|
in
|
|
hgroup.long 0x27F4++0x03
|
|
hide.long 0x00 "RXRAM509,RX FIFO RAM 509 Register"
|
|
in
|
|
hgroup.long 0x27F8++0x03
|
|
hide.long 0x00 "RXRAM510,RX FIFO RAM 510 Register"
|
|
in
|
|
hgroup.long 0x27FC++0x03
|
|
hide.long 0x00 "RXRAM511,RX FIFO RAM 511 Register"
|
|
in
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "PCI-to-AHB Bridge"
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
base ad:0xa0100000
|
|
width 21.
|
|
tree "Configuration registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONFIG_ADDR,Configuration Address Port"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable translation" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BUS_NUMBER ,Target PCI bus number"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " DEVICE_NUMBER ,Target PCI device number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " FUNCTION_NUMBER ,Target function number within PCI device" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 2.--7. 1. " REGISTER_NUMBER ,Target register address within the PCI"
|
|
bitfld.long 0x00 0.--1. " TYPE ,Type field" "Type 0,Type 1,?..."
|
|
group.long 0x100000++0x03
|
|
line.long 0x00 "CONFIG_DATA,Configuration Address Data Port"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000000xx
|
|
line.long 0x00 "Vendor ID,PCI Vendor ID Register"
|
|
hexmask.long 0x00 0.--15. 1. " ,PCI Vendor ID"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000000xx
|
|
line.long 0x00 "Device ID,PCI Device ID Register"
|
|
hexmask.long 0x00 16.--31. 1. " ,PCI Device ID"
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000001xx
|
|
line.long 0x00 "Command,PCI Command Register"
|
|
bitfld.long 0x00 9. " FBTB ,Fast back-to-back" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SERR# ,Signaled system error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADDRS ,Address stepping" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PERR ,Parity error response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VGAPS ,VGA palette snooping" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MMWI ,Master MWI" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCR ,Special cycle response" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BM ,Bus master" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MEN ,Memory enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IOEN ,IO enable" "Disabled,Enabled"
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000001xx
|
|
line.long 0x00 "Status,PCI Status Register"
|
|
bitfld.long 0x00 31. " DPE ,Detected parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " SERR# ,Signaled system error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RMA ,Received master abort" "Not received,Received"
|
|
bitfld.long 0x00 28. " RTA ,Received target abort" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 27. " STA ,Signaled target abort" "Not signaled,Signaled"
|
|
bitfld.long 0x00 25.--26. " DEVSEL ,DEVSEL timing for target" "Fast,Medium,Slow,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PERR# ,Master data parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 23. " FBBC ,Fast back-to-back capable" "No support,Support"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BS66 ,66MHz capable" "33 MHz,66 MHz"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000010xx
|
|
line.long 0x00 "Revision ID,PCI Revision ID Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ,PCI Revision ID"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000010xx
|
|
line.long 0x00 "Class code,PCI Class Code Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. " ,PCI Class Code"
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000011xx
|
|
line.long 0x00 "Cache size,PCI Cache Size Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ,PCI Cache Size"
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000011xx
|
|
line.long 0x00 "Latency timer,PCI Latency Timer Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ,PCI Latency Timer"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000011xx
|
|
line.long 0x00 "Header,PCI Header Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Header ,PCI Header"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000011xx
|
|
line.long 0x00 "BIST,PCI BIST Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BIST ,PCI BIST"
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000010)==0x10)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000100xx
|
|
line.long 0x00 "Base address 0,PCI Base Address Register 0"
|
|
endif
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000020)==0x20)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000101xx
|
|
line.long 0x00 "Base address 1,PCI Base Address Register 1"
|
|
endif
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000040)==0x40)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000110xx
|
|
line.long 0x00 "Base address 2,PCI Base Address Register 2"
|
|
endif
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000080)==0x80)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx000111xx
|
|
line.long 0x00 "Base address 3,PCI Base Address Register 3"
|
|
endif
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000100)==0x100)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001000xx
|
|
line.long 0x00 "Base address 4,PCI Base Address Register 4"
|
|
endif
|
|
if ((data.long(ad:0xa0100000+0x30000C)&0x00000200)==0x200)
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001001xx
|
|
line.long 0x00 "Base address 5,PCI Base Address Register 5"
|
|
endif
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001010xx
|
|
line.long 0x00 "CardBus CIS pointer,PCI CardBus CIS Pointer Register"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001011xx
|
|
line.long 0x00 "Subsystem vendor ID,PCI Subsystem Vendor ID Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ,PCI Subsystem Vendor ID"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001011xx
|
|
line.long 0x00 "Subsystem ID,PCI Subsystem ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " ,PCI Subsystem ID"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001100xx
|
|
line.long 0x00 "Expansion ROM,PCI Expansion ROM Register"
|
|
group.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001111xx
|
|
line.long 0x00 "Interrupt Line,PCI Interrupt Line Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ,PCI Interrupt Line"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001111xx
|
|
line.long 0x00 "Interrupt pin,PCI Interrupt Pin Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ,PCI Interrupt"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001111xx
|
|
line.long 0x00 "Min_Gnt,PCI Min Grant Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Min_Gnt ,PCI Min Grant"
|
|
rgroup.long 0x100000++0x03
|
|
saveout 0x00 %l 0yxxxxxxxxxxxxxxxxxxxxxxxx001111xx
|
|
line.long 0x00 "Max_Lat,PCI Max Latency Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Max_Lat ,PCI Max_Lat"
|
|
tree.end
|
|
width 11.
|
|
tree "PCI bus arbiter"
|
|
base ad:(0xa0100000+0x200000)
|
|
group.long 0x00++0x23
|
|
line.long 0x00 "PARBCFG,PCI Arbiter Configuration Register"
|
|
bitfld.long 0x00 3. " PCIEN_M3 ,External master 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCIEN_M2 ,External master 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PCIEN_M1 ,External Master 1 Enable" "Disabled,Enabled"
|
|
sif (cpu()=="NS9775")
|
|
bitfld.long 0x00 0. " PCI_CTL_RSC_n ,PCI_CENTRAL_RSC_n input to NS9775" "Provided,Not provided"
|
|
else
|
|
bitfld.long 0x00 0. " PCI_CTL_RSC_n ,PCI_CENTRAL_RSC_n input to NS9750B-A1" "Provided,Not provided"
|
|
endif
|
|
line.long 0x04 "PARBINT,PCI Arbiter Interrupt Status Register"
|
|
eventfld.long 0x04 5. " CCLKRUN ,Restart CardBus clock" "No restart,Restart"
|
|
eventfld.long 0x04 4. " PCISERR ,An SERR signal has been received from an external PCI agent" "No signal,Signal"
|
|
textline " "
|
|
eventfld.long 0x04 3. " PCIBRK_M3 ,External master 3 broken" "Not broken,Broken"
|
|
eventfld.long 0x04 2. " PCIBRK_M2 ,External master 2 broken" "Not broken,Broken"
|
|
textline " "
|
|
eventfld.long 0x04 1. " PCIBRK_M1 ,External master 1 broken" "Not broken,Broken"
|
|
eventfld.long 0x04 0. " PCIBRK_M0 ,PCI-to-AHB bridge broken" "Not broken,Broken"
|
|
line.long 0x08 "PARBINTEN,PCI Arbiter Interrupt Enable Register"
|
|
bitfld.long 0x08 5. " EN_CCLKRUN ,Enable CCLKRUN# interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " EN_PCISERR ,Enable SERR received from external PCI agent" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EN_PBRK_M3 ,Enable external master 3 broken" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " EN_PBRK_M2 ,Enable external master 2 broken" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EN_PBRK_M1 ,Enable external master 1 broken" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " EN_PBRK_M0 ,Enable PCI-to-AHB bridge broken" "Disabled,Enabled"
|
|
line.long 0x0C "PMISC,PCI Miscellaneous Support Register"
|
|
bitfld.long 0x0C 9. " EN_BAR5 ,Enable bridge PCI Base Address register 5" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " EN_BAR4 ,Enable bridge PCI Base Address register 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " EN_BAR3 ,Enable bridge PCI Base Address register 3" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " EN_BAR2 ,Enable bridge PCI Base Address register 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " EN_BAR1 ,Enable bridge PCI Base Address register 1" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " EN_BAR0 ,Enable bridge PCI Base Address register 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " INTA2PCI ,The inverted value of this bit drives the INTA# output pin" "INTA# hi-z,INTA# low"
|
|
line.long 0x10 "PCFG0,PCI Configuration 0 Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " DEVICE_ID ,Device ID value"
|
|
hexmask.long.word 0x10 0.--15. 1. " VENDOR_ID ,Vendor ID value"
|
|
line.long 0x14 "PCFG1,PCI Configuration 1 Register"
|
|
hexmask.long.tbyte 0x14 8.--31. 1. " CLASS_CODE ,Class code value"
|
|
hexmask.long.byte 0x14 0.--7. 1. " REVISION_ID ,Revision ID value"
|
|
line.long 0x18 "PCFG2,PCI Configuration 2 Register"
|
|
hexmask.long.word 0x18 16.--31. 1. " SUBSYSTEM_ID ,Subsystem ID value"
|
|
hexmask.long.word 0x18 0.--15. 1. " SUBVENDOR_ID ,Subvendor ID value"
|
|
line.long 0x1C "PCFG3,PCI Configuration 3 Register"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " MAX_LATENCY ,Max latency value"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " MIN_GRANT ,Min grant value"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " INTERRUPT_PIN ,Interrupt pin value"
|
|
line.long 0x20 "PAHBCFG,PCI Bridge Configuration Register"
|
|
bitfld.long 0x20 0.--1. " AHBBRST ,AHB burst length control" "16,32,64,?..."
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "PAHBERR,PCI Bridge AHB Error Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " AHBEADR ,AHB error address"
|
|
line.long 0x04 "PCIERR,PCI Bridge PCI Error Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " PCIEADR ,PCI Bridge PCI Error Address Register"
|
|
group.long 0x2C++0x23
|
|
line.long 0x00 "PINTR,PCI Bridge Interrupt Status Register"
|
|
eventfld.long 0x00 0. " AHBERR ,AHB bus error" "No intterrupt,Interrupt"
|
|
line.long 0x04 "PINTEN,PCI Bridge Interrupt Enable Register"
|
|
bitfld.long 0x04 15. " PDPERREN ,PCI detected parity error enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PSYSEREN ,PCI signaled system error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PRXMAEN ,PCI received master abort enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " PRXTARN ,PCI received target abort enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PSIGTAEN ,PCI signaled target abort enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PMPERREN ,PCI master data parity error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " AHBERREN ,AHB bus error enable" "Disabled,Enabled"
|
|
line.long 0x08 "PALTMEM0,PCI Bridge AHB to PCI Memory Address Translate 0 Register"
|
|
hexmask.long.byte 0x08 24.--30. 1. " PALT3VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 011"
|
|
hexmask.long.byte 0x08 16.--22. 1. " PALT2VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 010"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--14. 1. " PALT1VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 001"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PALT0VAL ,Bits [31:25] of PCI address when AHB address [27:25] - 000"
|
|
line.long 0x0C "PALTMEM1,PCI Bridge AHB to PCI Memory Address Translate 1 Register"
|
|
hexmask.long.byte 0x0C 24.--30. 1. " PALT7VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 111"
|
|
hexmask.long.byte 0x0C 16.--22. 1. " PALT6VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 110"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--14. 1. " PALT5VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 101"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PALT4VAL ,Bits [31:25] of PCI address when AHB address [27:25] = 100"
|
|
line.long 0x10 "PALTIO,PCI Bridge AHB to PCI IO Address Translate"
|
|
hexmask.long.word 0x10 0.--11. 1. " PALT8VAL ,Bits [31:20] of PCI IO address when AHB addresses PCI IO space"
|
|
line.long 0x14 "PMALT0,PCI Bridge PCI to AHB Memory Address Translate 0"
|
|
hexmask.long.word 0x14 20.--29. 1. " MALT3VAL ,Bits [31:22] of AHB address if PCI address matches BAR3"
|
|
hexmask.long.byte 0x14 12.--19. 1. " MALT2VAL ,Bits [31:24] of AHB address if PCI address matches BAR2"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--9. 1. " MALT1VAL ,Bits [31:26] of AHB address if PCI address matches on BAR1"
|
|
bitfld.long 0x14 0.--3. " MALT0VAL ,Bits [31:28] of AHB address if PCI address matches BAR0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x18 "PMALT1,PCI Bridge PCI to AHB Memory Address Translate 1"
|
|
hexmask.long.word 0x18 12.--25. 1. " MALT5VAL ,Bits [31:18] of AHB address if PCI address matches BAR5"
|
|
hexmask.long.word 0x18 0.--11. 1. " MALT4VAL ,Bits [31:20] of AHB address if PCI address matches BAR4"
|
|
line.long 0x1C "PALTCTL,PCI Bridge Address Translation Control Register"
|
|
bitfld.long 0x1C 1. " MALT_EN ,Enable PCI to AHB address translation" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " PALT_EN ,Enable AHB-to-PCI address translation for both PCI memory and IO space" "Disabled,Enabled"
|
|
line.long 0x20 "CMISC,CardBus Miscellaneous Support Register"
|
|
bitfld.long 0x20 31. " CMS_YV_SKT ,Allows software to control the YV_SKT bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 30. " CMS_XV_SKT ,Allows software to control the XV_SKT bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 29. " CMS_V3_SKT ,Allows software to control the V3_SKT bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 28. " CMS_V5_SKT ,Allows software to control the V5_SKT bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 26. " CMS_YV_CARD ,Allows software to control the YV_CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 25. " CMS_XV_CARD ,Allows software to control the XV_CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 24. " CMS_V3_CARD ,Allows the software to control the V3- CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 23. " CMS_V5_CARD ,Allows software to control the V5_CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 22. " CMS_BAD_VCC_REQ ,Allows software to control the BAD_VCC_REQ bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 21. " CMS_DATA_LOST ,Allows software to control the DATA_LOST bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 20. " CMS_NOTA_CARD ,Allows the software to control the NOTA_CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 19. " CMS_CB_CARD ,Allows software to control the CB_CARD bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 18. " CMS_CARD_16 ,Allows software to control the CARD_16 bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 17. " CMS_PWR_CYC ,Allows software to control the PWR_CYC bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 16. " CMS_CCD2 ,Allows software to control the CCD2 bit in the CSKTPST" "Not allowed,Allowed"
|
|
bitfld.long 0x20 15. " CMS_CCD1 ,Allows the software to control the CCD1 bit in the CSKTPST" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x20 10. " REQ_INTGT_EN ,Enable for REQ_INTGATE interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " REQ_INTGATE ,CardBus interrogate socket request" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x20 8. " INTERROGATE ,Socket interrogation" "Not in process,On process"
|
|
bitfld.long 0x20 6. " CCLKRUN_EN ,CardBus CCLKRUN# enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 5. " CVS2 ,Value driven out on CVS2 pin during socket interrogation" "Low,High"
|
|
bitfld.long 0x20 4. " CVS1 ,Value driven out on CVS1 pin during socket interrogation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x20 3. " CCLK_STOP_NACK ,Response to request to negate CardBus CCLKRUN# " "Request not refused yet,CCLKRUN# not negated"
|
|
bitfld.long 0x20 2. " CCLK_STOP_ACK ,Response to request to negate CardBus CCLKRUN# " "Not negated,Negated"
|
|
textline " "
|
|
bitfld.long 0x20 1. " CCD2 ,Current state of CCD2 pin" "Low,High"
|
|
bitfld.long 0x20 0. " CCD1 ,Current state of CCD1 pin" "Low,High"
|
|
group.long 0x1000++0x07
|
|
line.long 0x00 "CSKTEV,CardBus Socket Event Register"
|
|
eventfld.long 0x00 3. " PWR_CHG ,Set when the PWR_CYC bit in the CSKTPST changes" "Not changed,Changed"
|
|
eventfld.long 0x00 2. " CCD2_CHG ,Set when the CCD#2 signal changes" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CCD1_CHG ,Set when the CCD#1 signal changes" "Not changed,Changed"
|
|
eventfld.long 0x00 0. " CSTSCHG_CHG ,Set when the CSTSCHG signal changes from low to high" "Not changed,Changed"
|
|
line.long 0x04 "CSKTMSK,CardBus Socket Mask Register"
|
|
bitfld.long 0x04 3. " PWR_CHG_EN ,Power cycle interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CCD2_CHG_EN ,CCD2 change interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CCD1_CHG_EN ,CCD1 change interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CSTSCHG_CHG_EN ,CSTSCHG change interrupt enable" "Disabled,Enabled"
|
|
rgroup.long 0x1008++0x03
|
|
line.long 0x00 "CSKTPST,CardBus Socket Present State Register"
|
|
bitfld.long 0x00 31. " YV_SKT ,When set, indicates that VCC=Y.Y can be supplied to the socket" "No,Yes"
|
|
bitfld.long 0x00 30. " XV_SKT ,Indicates wheter VCC=X.X can be supplied to the socket" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " V3_SKT ,When set, indicates that VCC=3.3 can be supplied to the socket" "No,Yes"
|
|
bitfld.long 0x00 28. " V5_SKT ,Indicates wheter VCC=5 can be supplied to the socket" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13. " YV_CARD ,Indicates whether card inserted into the socket supports VCC=Y.Y " "Not supported,Supported"
|
|
bitfld.long 0x00 12. " XV_CARD ,Indicates whether card inserted into the socket supports VCC=X.X " "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 11. " V3_CARD ,Indicates whether card inserted into the socket supports VCC=3.3 " "Not supported,Supported"
|
|
bitfld.long 0x00 10. " V5_CARD ,Indicates whether card inserted into the socket supports VCC=5 " "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BAD_VCC_REQ ,Indicates whether the software tried to apply an unsupported or incorrect voltage to the socket" "No error,Incorrect voltage"
|
|
bitfld.long 0x00 8. " DATA_LOST ,Indicates whether data may have been lost" "No error,Data may have been lost"
|
|
textline " "
|
|
bitfld.long 0x00 7. " NOTA_CARD ,Indicates whether an unsupported card is inserted in the socket" "No error,Unsupported card"
|
|
bitfld.long 0x00 6. " CINT ,Inverted current state of the CardBus CINT# pin" "CINT# negated,CINT# asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CB_CARD ,Indicates whether a CardBus card is inserted in the socket" "No card,Card inserted"
|
|
bitfld.long 0x00 4. " CARD_16 ,Indicates whether a 16-bit PC card is inserted in the socket" "No card,Card inserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PWR_CYC ,Indicates whether the socket is powered up" "Powered down,Powered up"
|
|
bitfld.long 0x00 2. " CCD2 ,Current state of the CardBus CCD#2 pin" "Inserted,No card"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CCD1 ,Current state of the CardBus CCD#1 pin" "Inserted,No card"
|
|
bitfld.long 0x00 0. " CSTSCHG ,Current state of the CardBus CSTSCHG pin" "Negated,Asserted"
|
|
wgroup.long 0x100C++0x03
|
|
line.long 0x00 "CSKTFEV,CardBus Socket Force Event Register"
|
|
bitfld.long 0x00 14. " CV_TEST ,Requests that the card interrogation procedure be run again" "No effect,Sets REQ_INGATE"
|
|
bitfld.long 0x00 13. " FYV_CARD ,Sets the YV_CARD bit in the CSKTPST" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FXV_CARD ,Sets the XV_CARD bit in the CSKTPST" "No effect,Set"
|
|
bitfld.long 0x00 11. " FV3_CARD ,Sets the V3_CARD bit in the CSKTPST" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FV5_CARD ,Sets the V5_CARD bit in the CSKTPST" "No effect,Set"
|
|
bitfld.long 0x00 9. " FBAD_VCC_REQ ,Sets the BAD_VCC_REQ bit in the CSKTPST" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FDATA_LOST ,Sets the DATA_LOST bit in the CSKTPST" "No effect,Set"
|
|
bitfld.long 0x00 7. " FNOTA_CARD ,Sets the NOTA_CARD bit in the CSKTPST" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FCB_CARD ,Sets the CB_CARD bit in the CSKTPST" "No effect,Set"
|
|
bitfld.long 0x00 4. " FCARD_16 ,Sets the CARD_16 bit in the CSKTPST" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FPWR_CHG ,Sets the PWR_CHG bit in the CardBus Socket Event register" "No effect,Set"
|
|
bitfld.long 0x00 2. " FCCD2_CHG ,Sets the CCD2_CHG bit in the CardBus Socket Event register" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FCCD1_CHG ,Sets the CCD1_CHG bit in the CardBus Socket Event register" "No effect,Set"
|
|
bitfld.long 0x00 0. " FCSTSCHG_CHG ,Sets the CSTSCHG_CHG bit in the CardBus Socket Event register" "No effect,Set"
|
|
group.long 0x1010++0x03
|
|
line.long 0x00 "CSKTCTL,CardBus Socket Control Register"
|
|
bitfld.long 0x00 9. " ZVEN ,Zoomed video enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " STOP_CLK ,Stop CardBus clock" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " VCC_CTL ,Socket VCC control" "0 V,Reserved,5 V,3.3 V,?..."
|
|
bitfld.long 0x00 0.--2. " VPP_CTL ,Socket VPP/Core control" "0 V,12 V,5 V,3.3 V,Reserved,Reserved,1.8 V,?..."
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree "BBus Bridge"
|
|
base ad:0xa0400000
|
|
sif (cpu()=="NS9360")
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x0f
|
|
textline " "
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
line.long 0x04 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 1 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bit,16 bit,32 bit,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bit,16 bit,32 bit,Undefined"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 18. " POL ,Control signal polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 10.--15. " STATE ,State" "IDLE,Reserved,Reserved,Reserved,FETCH_BD1,FETCH_BD2,FETCH_BD3,Reserved,UPDATE_BD1,UPDATE_BD2,UPDATE_BD3,Reserved,Reserved,Reserved,Reserved,Reserved,READ_DAT1,READ_DAT2,READ_DAT3,Reserved,READ_DAT4,READ_DAT5,READ_DAT6,READ_DAT7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WRITE_DAT1,WRITE_DAT2,WRITE_DAT3,?..."
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x08 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " IDONE ,Debug field, indicating an interrupt on done occurrence" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 1 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 3. " POL , Chip select polarity" "Active high,Active low"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "stcsout[0],stcsout[1],stcsout[2],stcsout[3]"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x0f
|
|
textline " "
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
line.long 0x04 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 2 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bit,16 bit,32 bit,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bit,16 bit,32 bit,Undefined"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 18. " POL ,Control signal polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 10.--15. " STATE ,State" "IDLE,Reserved,Reserved,Reserved,FETCH_BD1,FETCH_BD2,FETCH_BD3,Reserved,UPDATE_BD1,UPDATE_BD2,UPDATE_BD3,Reserved,Reserved,Reserved,Reserved,Reserved,READ_DAT1,READ_DAT2,READ_DAT3,Reserved,READ_DAT4,READ_DAT5,READ_DAT6,READ_DAT7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WRITE_DAT1,WRITE_DAT2,WRITE_DAT3,?..."
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x08 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " IDONE ,Debug field, indicating an interrupt on done occurrence" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 2 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 3. " POL , Chip select polarity" "Active high,Active low"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "stcsout[0],stcsout[1],stcsout[2],stcsout[3]"
|
|
tree.end
|
|
textline " "
|
|
rgroup.long 0x1000++0x03
|
|
line.long 0x00 "BIS,BBus Bridge Interrupt Status Register"
|
|
bitfld.long 0x00 25. " AHB_DMA2 ,AHB DMA channel #2 has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " AHB_DMA1 ,AHB DMA channel #1 has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " USBDEV ,USB Device module has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " USBHST ,USB Host module has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTC ,Real time clock module has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " UTIL ,BBus Utility module has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " 1284 ,IEEE-1284 module has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " I2C ,I2C module has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SER_D_TX ,SER transmit module D has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SER_D_RX ,SER receive module D has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SER_C_TX ,SER transmit module C has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " SER_C_RX ,SER receive module C has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SER_A_TX ,SER transmit module A has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " SER_A_RX ,SER receive module A has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SER_B_TX ,SER transmit module B has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " SER_B_RX ,SER receive module B has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BBUS_DMA ,BBus DMA module has asserted its interrupt" "No interrupt,Interrupt"
|
|
group.long 0x1004++0x03
|
|
line.long 0x00 "BIE,BBus Bridge Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " GLBL ,Enable bbus_int signal to propagate to the System Control module" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " DMA2 ,Enable interrupt from AHB DMA Channel #2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DMA1 ,Enable interrupt from AHB DMA Channel #1" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " USBDEV ,Enable interrupt from USB Device module" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " USBHST ,Enable interrupt from USB Host module" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " RTC ,Enable interrupt from RTC module." "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UTIL ,Enable interrupt from BBus Utility module" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " 1284 ,Enable interrupt from IEEE1284 module" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " I2C ,Enable interrupt from I2C module" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SER_D_TX ,Enable interrupt from SER transmit module D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SER_D_RX ,Enable interrupt from SER receive module D" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SER_C_TX ,Enable interrupt from SER transmit module C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SER_C_RX ,Enable interrupt from SER receive module C" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SER_A_TX ,Enable interrupt from SER transmit module A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SER_A_RX ,Enable interrupt from SER receive module A" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SER_B_TX ,Enable interrupt from SER transmit module B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SER_B_RX ,Enable interrupt from SER receive module B" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA ,Enable aggregate interrupt from BBus DMA module" "Disabled,Enabled"
|
|
rgroup.long 0x1008++0x03
|
|
line.long 0x00 "BPBE,BBus Bridge Prefetch (Burst-8) Buffer Enable Register"
|
|
bitfld.long 0x00 2. " ENABLE_2 ,USB Device DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENABLE_1 ,USB Host" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE_0 ,BBus DMA" "Disabled,Enabled"
|
|
width 0xb
|
|
elif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x0f
|
|
textline " "
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
sif (cpu()=="NS9775")
|
|
line.long 0x04 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 1 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bits,16 bits,32 bits,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bits,16 bits,32 bits,Undefined"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
else
|
|
line.long 0x04 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 1 go" "Low,High"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
endif
|
|
line.long 0x08 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " IDONE ,Debug field, indicating an interrupt on done occurrence" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 1 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 3. " POL , Chip select polarity" "Active high,Active low"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "CS[0],CS[1],CS[2],CS[3]"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x0f
|
|
textline " "
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
sif (cpu()=="NS9775")
|
|
line.long 0x04 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 2 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bits,16 bits,32 bits,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bits,16 bits,32 bits,Undefined"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
else
|
|
line.long 0x04 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 2 go" "Low,High"
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1,2,4,8"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1,2,4,8"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
endif
|
|
line.long 0x08 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " IDONE ,Debug field, indicating an interrupt on done occurrence" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 2 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 3. " POL , Chip select polarity" "Active high,Active low"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "CS[0],CS[1],CS[2],CS[3]"
|
|
tree.end
|
|
textline " "
|
|
rgroup.long 0x1000++0x03
|
|
line.long 0x00 "BIS,BBus Bridge Interrupt Status Register"
|
|
bitfld.long 0x00 25. " ADMA2 ,AHB DMA channel #2 has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " ADMA1 ,AHB DMA channel #1 has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " 1284 ,IEEE-1284 module has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " I2C ,I2C module has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SDTX ,SER transmit module D has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SDRX ,SER receive module D has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SCTX ,SER transmit module C has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " SCRX ,SER receive module C has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SATX ,SER transmit module A has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " SARX ,SER receive module A has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SBTX ,SER transmit module B has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " SBRX ,SER receive module B has asserted its interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " USB ,USB module has asserted its interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " BBUS_DMA ,BBus DMA module has asserted its interrupt" "No interrupt,Interrupt"
|
|
group.long 0x1004++0x03
|
|
line.long 0x00 "BIE,BBus Bridge Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " GLBL ,Enable the interrupt signal to propagate to the VIC System Control module" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " DMA2 ,Enable interrupt from AHB DMA Channel #2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DMA1 ,Enable interrupt from AHB DMA Channel #1" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " 1284E ,Enable interrupt from IEEE1284 module" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " I2CE ,Enable interrupt from I2C module" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SDTXE ,Enable interrupt from SER transmit module D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SDRXE ,Enable interrupt from SER receive module D" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SCTXE ,Enable interrupt from SER transmit module C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SCRXE ,Enable interrupt from SER receive module C" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SATXE ,Enable interrupt from SER transmit module A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SARXE ,Enable interrupt from SER receive module A" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SBTXE ,Enable interrupt from SER transmit module B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SBRXE ,Enable interrupt from SER receive module B" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " USBE ,Enable interrupt from USB module" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA ,Enable aggregate interrupt from BBus DMA module" "Disabled,Enabled"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "BBus DMA Controller"
|
|
tree "DMA1"
|
|
base ad:0x90000000
|
|
sif (cpu()=="NS9360")
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
group.long (0x0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
group.long (0x20+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 3 Buffer Descriptor Pointer"
|
|
group.long (0x40+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 3 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 3 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 3 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 4 Buffer Descriptor Pointer"
|
|
group.long (0x60+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 4 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 4 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 4 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 5 Buffer Descriptor Pointer"
|
|
group.long (0x80+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 5 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 5 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 5 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 6 Buffer Descriptor Pointer"
|
|
group.long (0xA0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 6 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 6 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 6 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 7 Buffer Descriptor Pointer"
|
|
group.long (0xC0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 7 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 7 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 7 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 8 Buffer Descriptor Pointer"
|
|
group.long (0xE0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 8 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 8 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 8 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 9 Buffer Descriptor Pointer"
|
|
group.long (0x100+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 9 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 9 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 9 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 10 Buffer Descriptor Pointer"
|
|
group.long (0x120+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 10 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 10 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 10 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 11 Buffer Descriptor Pointer"
|
|
group.long (0x140+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 11 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 11 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 11 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 12 Buffer Descriptor Pointer"
|
|
group.long (0x160+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 12 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 12 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 12 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 13 Buffer Descriptor Pointer"
|
|
group.long (0x180+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 13 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 13 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 13 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 14 Buffer Descriptor Pointer"
|
|
group.long (0x1A0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 14 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 14 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 14 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 15 Buffer Descriptor Pointer"
|
|
group.long (0x1C0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 15 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 15 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 15 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 16 Buffer Descriptor Pointer"
|
|
group.long (0x1E0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 16 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 16 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 16 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
width 0xb
|
|
elif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
group.long (0x0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
group.long (0x20+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 3 Buffer Descriptor Pointer"
|
|
group.long (0x40+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 3 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 3 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 3 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 4 Buffer Descriptor Pointer"
|
|
group.long (0x60+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 4 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 4 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 4 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 5 Buffer Descriptor Pointer"
|
|
group.long (0x80+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 5 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 5 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 5 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 6 Buffer Descriptor Pointer"
|
|
group.long (0xA0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 6 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 6 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 6 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 7 Buffer Descriptor Pointer"
|
|
group.long (0xC0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 7 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 7 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 7 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 8 Buffer Descriptor Pointer"
|
|
group.long (0xE0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 8 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 8 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 8 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 9 Buffer Descriptor Pointer"
|
|
group.long (0x100+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 9 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 9 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 9 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 10 Buffer Descriptor Pointer"
|
|
group.long (0x120+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 10 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 10 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 10 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 11 Buffer Descriptor Pointer"
|
|
group.long (0x140+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 11 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 11 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 11 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 12 Buffer Descriptor Pointer"
|
|
group.long (0x160+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 12 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 12 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 12 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 13 Buffer Descriptor Pointer"
|
|
group.long (0x180+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 13 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 13 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 13 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 14 Buffer Descriptor Pointer"
|
|
group.long (0x1A0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 14 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 14 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 14 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 15 Buffer Descriptor Pointer"
|
|
group.long (0x1C0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 15 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 15 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 15 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 16 Buffer Descriptor Pointer"
|
|
group.long (0x1E0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 16 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 16 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 16 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "DMA2"
|
|
sif (cpu()=="NS9360")
|
|
base ad:0x90910000
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
group.long (0x0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
group.long (0x20+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 3 Buffer Descriptor Pointer"
|
|
group.long (0x40+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 3 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 3 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 3 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 4 Buffer Descriptor Pointer"
|
|
group.long (0x60+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 4 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 4 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 4 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 5 Buffer Descriptor Pointer"
|
|
group.long (0x80+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 5 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 5 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 5 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 6 Buffer Descriptor Pointer"
|
|
group.long (0xA0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 6 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 6 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 6 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 7 Buffer Descriptor Pointer"
|
|
group.long (0xC0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 7 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 7 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 7 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 8 Buffer Descriptor Pointer"
|
|
group.long (0xE0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 8 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 8 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 8 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 9 Buffer Descriptor Pointer"
|
|
group.long (0x100+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 9 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 9 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 9 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 10 Buffer Descriptor Pointer"
|
|
group.long (0x120+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 10 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 10 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 10 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 11 Buffer Descriptor Pointer"
|
|
group.long (0x140+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 11 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 11 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 11 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 12 Buffer Descriptor Pointer"
|
|
group.long (0x160+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 12 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 12 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 12 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 13 Buffer Descriptor Pointer"
|
|
group.long (0x180+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 13 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 13 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 13 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 14 Buffer Descriptor Pointer"
|
|
group.long (0x1A0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 14 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 14 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 14 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 15 Buffer Descriptor Pointer"
|
|
group.long (0x1C0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 15 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 15 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 15 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 16 Buffer Descriptor Pointer"
|
|
group.long (0x1E0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 16 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 16 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 16 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
width 0xb
|
|
elif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
base ad:0x90110000
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
group.long (0x0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
group.long (0x20+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 3 Buffer Descriptor Pointer"
|
|
group.long (0x40+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 3 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 3 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 3 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 4 Buffer Descriptor Pointer"
|
|
group.long (0x60+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 4 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 4 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 4 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 5 Buffer Descriptor Pointer"
|
|
group.long (0x80+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 5 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 5 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 5 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 6 Buffer Descriptor Pointer"
|
|
group.long (0xA0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 6 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 6 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 6 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 7 Buffer Descriptor Pointer"
|
|
group.long (0xC0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 7 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 7 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 7 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 8 Buffer Descriptor Pointer"
|
|
group.long (0xE0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 8 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 8 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 8 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 9 Buffer Descriptor Pointer"
|
|
group.long (0x100+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 9 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 9 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 9 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 10 Buffer Descriptor Pointer"
|
|
group.long (0x120+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 10 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 10 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 10 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 11 Buffer Descriptor Pointer"
|
|
group.long (0x140+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 11 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 11 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 11 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 12 Buffer Descriptor Pointer"
|
|
group.long (0x160+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 12 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 12 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 12 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 13 Buffer Descriptor Pointer"
|
|
group.long (0x180+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 13 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 13 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 13 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 14 Buffer Descriptor Pointer"
|
|
group.long (0x1A0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 14 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 14 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 14 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 15 Buffer Descriptor Pointer"
|
|
group.long (0x1C0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 15 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 15 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 15 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "DMABDP,DMA Channel 16 Buffer Descriptor Pointer"
|
|
group.long (0x1E0+0x10)++0x07
|
|
line.long 0x00 "DMACTRL,DMA Channel 16 Control Register"
|
|
bitfld.long 0x00 31. " CE ,Channel 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel 16 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " BB ,Bus bandwidth" "0,?..."
|
|
bitfld.long 0x00 26.--27. " MODE ,Fly-by mode" "Write,Read,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BTE ,Burst transfer enable" "1 operand,2 operands,4 operands,?..."
|
|
bitfld.long 0x00 22. " BDR , Buffer descriptor refetch" "Not refetch,Refetch"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SINC_N ,Source address increment field" "Increment,No increment"
|
|
bitfld.long 0x00 16.--17. " SIZE ,Size field" "32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " STATE ,State" "Idle,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Update buffer descriptor,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Transfer in progress,?..."
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMASINTEN,DMA Channel 16 Status and Interrupt Enable Register"
|
|
eventfld.long 0x04 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x04 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x04 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " ECIE ,Enable ECIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x04 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x04 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x04 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "BBus Utility"
|
|
base ad:0x90600000
|
|
sif (cpu()=="NS9360")
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "MS,Master Reset Register"
|
|
bitfld.long 0x00 12. " USBDEV ,USB Device controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 11. " USBHST ,USB Host controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RTC2 ,RTC 12/24 hour calendar reset" "No reset,Reset"
|
|
bitfld.long 0x00 9. " RTC1 ,RTC configuration registers reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I2C ,I2C Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " 1284 ,IEEE 1284 Controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SerD ,Serial Controller port D reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " SerC ,Serial Controller port C reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SerA ,Serial Controller port A reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " SerB ,Serial Controller port B reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA reset" "No reset,Reset"
|
|
line.long 0x04 "IS,BBus Utility Interrupt Status Register"
|
|
eventfld.long 0x04 0. " INT ,BBus Utility interrupt" "No intterupt,Interupt"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GPIOC10,GPIO Configuration Register #10"
|
|
bitfld.long 0x00 3. " DIR_72 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 2. " INV_72 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FUNC_72 ,GPIO72 Function" "Mem ta_strb,Reserved,Reserved,GPIO72"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "GPIOC9,GPIO Configuration Register #9"
|
|
bitfld.long 0x00 31. " DIR_71 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_71 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_71 ,GPIO71 Function" "Mem addr[27],Mem clk_en[3],iic_sda (duplicate),GPIO71"
|
|
bitfld.long 0x00 27. " DIR_70 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_70 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_70 ,GPIO70 Function" "Mem addr[26],Mem clk_en[2],iic_scl (duplicate),GPIO70"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_69 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_69 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_69 ,GPIO69 Function" "Mem addr[25],Mem clk_en[1],Ext IRQ 1 (duplicate),GPIO69"
|
|
bitfld.long 0x00 19. " DIR_68 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_68 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_68 ,GPIO68 Function" "Mem addr[24],Mem clk_en[0],Ext IRQ 0 (duplicate),GPIO68"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_67 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_67 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_67 ,GPIO67 Function" "Mem addr[23],Reserved,Reserved,GPIO67"
|
|
bitfld.long 0x00 11. " DIR_66 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_66 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_66 ,GPIO66 Function" "Mem addr[22],Reserved,Reserved,GPIO66"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_65 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_65 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_65 ,GPIO65 Function" "MII/RMII enet phy interrupt,Reserved,Reserved,GPIO65"
|
|
bitfld.long 0x00 3. " DIR_64 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_64 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_64 ,GPIO64 Function" "MII/RMII carrier sense,Reserved,Reserved,GPIO64"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GPIOC8,GPIO Configuration Register #8"
|
|
bitfld.long 0x00 31. " DIR_63 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_63 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_63 ,GPIO63 Function" "MII collision,Reserved,Reserved,GPIO63"
|
|
bitfld.long 0x00 27. " DIR_62 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_62 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_62 ,GPIO62 Function" "MII tx data bit 3,Reserved,Reserved,GPIO62"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_61 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_61 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_61 ,GPIO61 Function" "MII tx data bit 2,Reserved,Reserved,GPIO61"
|
|
bitfld.long 0x00 19. " DIR_60 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_60 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_60 ,GPIO60 Function" "MII/RMII tx data bit 1,Reserved,Reserved,GPIO60"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_59 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_59 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_59 ,GPIO59 Function" "MII/RMII tx data bit 0,Reserved,Reserved,GPIO59"
|
|
bitfld.long 0x00 11. " DIR_58 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_58 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_58 ,GPIO58 Function" "MII tx error,Reserved,Reserved,GPIO58"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_57 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_57 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_57 ,GPIO57 Function" "MII/RMII tx enable,USB rx data - (duplicate),Reserved,GPIO57"
|
|
bitfld.long 0x00 3. " DIR_56 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_56 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_56 ,GPIO56 Function" "MII rx data bit 3,USB rx data + (duplicate),Reserved,GPIO56"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GPIOC7,GPIO Configuration Register #7"
|
|
bitfld.long 0x00 31. " DIR_55 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_55 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_55 ,GPIO55 Function" "MII rx data bit 2,USB phy speed (duplicate),Reserved,GPIO55"
|
|
bitfld.long 0x00 27. " DIR_54 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_54 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_54 ,GPIO54 Function" "MII/RMII rx data bit 1,USB phy suspend (duplicate),Reserved,GPIO54"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_53 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_53 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_53 ,GPIO53 Function" "MII/RMII rx data bit 0,USB phy rx data (duplicate),Reserved,GPIO53"
|
|
bitfld.long 0x00 19. " DIR_52 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_52 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_52 ,GPIO52 Function" "MII rx error,USB phy tx output enable (duplicate),Reserved,GPIO52"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_51 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_51 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_51 ,GPIO51 Function" "MII rx data valid,USB phy data - (duplicate),Reserved,GPIO51"
|
|
bitfld.long 0x00 11. " DIR_50 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_50 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_50 ,GPIO50 Function" "MII/RMII management data,Reserved,Reserved,GPIO50"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_49 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_49 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_49 ,GPIO49 Function" "USB phy speed,1284 periphal logic high (peripheraldriven),DMA ch 2 done,GPIO49"
|
|
bitfld.long 0x00 3. " DIR_48 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_48 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_48 ,GPIO48 Function" "USB phy suspend,1284 nSelectIn (host-driven),DMA ch 2 req,GPIO48"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GPIOC6,GPIO Configuration Register #6"
|
|
bitfld.long 0x00 31. " DIR_47 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_47 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_47 ,GPIO47 Function" "Ser port D CTS,1284 nInit (host-driven),USB phy rx data -,GPIO47"
|
|
bitfld.long 0x00 27. " DIR_46 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_46 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_46 ,GPIO46 Function" "Ser port D RTS,1284 nAutoFd (host-driven),USB phy rx data +,GPIO46"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_45 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_45 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_45 ,GPIO45 Function" "Ser port D RxData/SPI port D din,1284 nStrobe (host-driven),USB phy rx data,GPIO45"
|
|
bitfld.long 0x00 19. " DIR_44 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_44 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_44 ,GPIO44 Function" "Ser port D TxData/SPI port D dout,1284 Select (peripheral-driven),USB phy tx output enable,GPIO44"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_43 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_43 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_43 ,GPIO43 Function" "Ser port C CTS,1284 transceiver direction control,USB phy data -,GPIO43"
|
|
bitfld.long 0x00 11. " DIR_42 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_42 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_42 ,GPIO42 Function" "Ser port C RTS,Reserved,USB phy data +,GPIO42"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_41 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_41 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_41 ,GPIO41 Function" "Ser port C RxData/SPI port C din,Reserved,LCD data bit 17,GPIO41"
|
|
bitfld.long 0x00 3. " DIR_40 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_40 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_40 ,GPIO40 Function" "Ser port C TxData/SPI port C dout,Ext IRQ 3,LCD data bit 16,GPIO40"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC5,GPIO Configuration Register #5"
|
|
bitfld.long 0x00 31. " DIR_39 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_39 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_39 ,GPIO39 Function" "PWM ch 3,1284 Data 8 (bidirectional),LCD data bit 15,GPIO39"
|
|
bitfld.long 0x00 27. " DIR_38 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_38 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_38 ,GPIO38 Function" "PWM ch 2,1284 Data 7 (bidirectional),LCD data bit 14,GPIO38"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_37 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_37 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_37 ,GPIO37 Function" "PWM ch 1,1284 Data 6 (bidirectional),LCD data bit 13,GPIO37"
|
|
bitfld.long 0x00 19. " DIR_36 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_36 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_36 ,GPIO36 Function" "PWM ch 0,1284 Data 5 (bidirectional),LCD data bit 12,GPIO36"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_35 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_35 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_35 ,GPIO35 Function" "iic_sda,1284 Data 4 (bidirectional),LCD data bit 11,GPIO35"
|
|
bitfld.long 0x00 11. " DIR_34 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_34 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_34 ,GPIO34 Function" "iic_scl,1284 Data 3 (bidirectional),LCD data bit 10,GPIO34"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_33 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_33 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_33 ,GPIO33 Function" "Reserved,1284 Data 2 (bidirectional),LCD data bit 9,GPIO33"
|
|
bitfld.long 0x00 3. " DIR_32 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_32 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_32 ,GPIO32 Function" "Ext IRQ 2,1284 Data 1 (bidirectional),LCD data bit 8,GPIO32"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC4,GPIO Configuration Register #4"
|
|
bitfld.long 0x00 31. " DIR_31 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_31 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_31 ,GPIO31 Function" "Timer 7,LCD data bit 7,LCD data bit 11 (duplicate),GPIO31"
|
|
bitfld.long 0x00 27. " DIR_30 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_30 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_30 ,GPIO30 Function" "Timer 6,LCD data bit 6,LCD data bit 10 (duplicate),GPIO30"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_29 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_29 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_29 ,GPIO29 Function" "Timer 5,LCD data bit 5,LCD data bit 9 (duplicate),GPIO29"
|
|
bitfld.long 0x00 19. " DIR_28 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_28 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_28 ,GPIO28 Function" "Ext IRQ 1 (duplicate),LCD data bit 4,LCD data bit 8 (duplicate),GPIO28"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_27 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_27 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_27 ,GPIO27 Function" "Ser port D DCD/SPI port D enable,LCD data bit 3,Timer 4,GPIO27"
|
|
bitfld.long 0x00 11. " DIR_26 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_26 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_26 ,GPIO26 Function" "Ser port D RI/SPI port D clk,LCD data bit 2,Timer 3,GPIO26"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_25 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_25 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_25 ,GPIO25 Function" "Ser port D DSR,LCD data bit 1,Reserved,GPIO25"
|
|
bitfld.long 0x00 3. " DIR_24 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_24 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_24 ,GPIO24 Function" "Ser port D DTR,LCD data bit 0,Reserved,GPIO24"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GPIOC3,GPIO Configuration Register #3"
|
|
bitfld.long 0x00 31. " DIR_23 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_23 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_23 ,GPIO23 Function" "Ser port C DCD/SPI port C enable,LCD line end,Reserved,GPIO23"
|
|
bitfld.long 0x00 27. " DIR_22 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_22 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_22 ,GPIO22 Function" "Ser port C RI/SPI port C clk,LCD AC bias-data enable,Reserved,GPIO22"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_21 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_21 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_21 ,GPIO21 Function" "Ser port C DSR,LCD frame pulse-vert,Reserved,GPIO21"
|
|
bitfld.long 0x00 19. " DIR_20 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_20 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_20 ,GPIO20 Function" "Ser port C DTR,LCD clock,Reserved,GPIO20"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_19 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_19 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_19 ,GPIO19 Function" "Ethernet CAM req,LCD line-horz sync,DMA ch 2 read enable (duplicate),GPIO19"
|
|
bitfld.long 0x00 11. " DIR_18 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_18 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_18 ,GPIO18 Function" "Ethernet CAM reject,LCD power enable,Ext IRQ 3 (duplicate),GPIO18"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_17 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_17 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_17 ,GPIO17 Function" "USB power relay,Reserved,Reserved,GPIO17"
|
|
bitfld.long 0x00 3. " DIR_16 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_16 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_16 ,GPIO16 Function" "USB overcurrent,1284 nFault (peripheral-driven; duplicate),Reserved,GPIO16"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC2,GPIO Configuration Register #2"
|
|
bitfld.long 0x00 31. " DIR_15 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_15 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_15 ,GPIO15 Function" "Ser port A DCD/SPI port A enable,Timer 2,LCD clock input,GPIO15"
|
|
bitfld.long 0x00 27. " DIR_14 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_14 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_14 ,GPIO14 Function" "Ser port A RI/SPI port A clk,Timer 1,PWM ch 3 (duplicate),GPIO14"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_13 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_13 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_13 ,GPIO13 Function" "Ser port A DSR,Ext IRQ 0 (duplicate),PWM ch 2 (duplicate),GPIO13"
|
|
bitfld.long 0x00 19. " DIR_12 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_12 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_12 ,GPIO12 Function" "Ser port A DTR,Reserved,PWM ch 1 (duplicate),GPIO12"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_11 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_11 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_11 ,GPIO11 Function" "Ser port A CTS,Ext IRQ2 (duplicate),Timer 0 (duplicate),GPIO11"
|
|
bitfld.long 0x00 11. " DIR_10 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_10 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_10 ,GPIO10 Function" "Ser port A RTS,Reserved,PWM ch 0 (duplicate),GPIO10"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_9 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_9 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_9 ,GPIO9 Function" "Ser port A RxData/SPI port A din,Reserved,Reserved,GPIO9"
|
|
bitfld.long 0x00 3. " DIR_8 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_8 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_8 ,GPIO8 Function" "Ser port A TxData/SPI port A dout,Reserved,Reserved,GPIO8"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIOC1,GPIO Configuration Register #1"
|
|
bitfld.long 0x00 31. " DIR_7 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 30. " INV_7 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " FUNC_7 ,GPIO7 Function" "Ser port B DCD/SPI port B enable,DMA ch 1 read enable (duplicate),Ext IRQ 1,GPIO7"
|
|
bitfld.long 0x00 27. " DIR_6 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV_6 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " FUNC_6 ,GPIO6 Function" "Ser port B RI/SPI port B clk,1284 nFault (peripheral-driven),Timer 7 (duplicate),GPIO6"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR_5 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 22. " INV_5 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FUNC_5 ,GPIO5 Function" "Ser port B DSR,1284 PError (peripheral-driven),DMA ch 1 read enable,GPIO5"
|
|
bitfld.long 0x00 19. " DIR_4 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INV_4 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " FUNC_4 ,GPIO4 Function" "Ser port B DTR,1284 busy (peripheral-driven),DMA ch 1 done,GPIO4"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR_3 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 14. " INV_3 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " FUNC_3 ,GPIO3 Function" "Ser port B CTS,1284 nACK (peripheral-driven),DMA ch 1 req,GPIO3"
|
|
bitfld.long 0x00 11. " DIR_2 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INV_2 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " FUNC_2 ,GPIO2 Function" "Ser port B RTS,Timer 0,DMA ch 2 read enable,GPIO2"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR_1 ,Controls the pin direction" "Input,Output"
|
|
bitfld.long 0x00 6. " INV_1 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FUNC_1 ,GPIO1 Function" "Ser port B RxData/SPI port B din,DMA ch 1 req (duplicate),Ext IRQ 0,GPIO1"
|
|
bitfld.long 0x00 3. " DIR_0 ,Controls the pin direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_0 ,Controls the inversion function of the GPIO pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FUNC_0 ,GPIO0 Function" "Ser port B TxData/SPI port B dout,DMA ch 1 done (duplicate),Timer 1 (duplicate),GPIO0"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GPIOCNTRL3,GPIO Control Register #3"
|
|
bitfld.long 0x00 8. " gpio72 ,gpio[72] control bit" "Low,High"
|
|
bitfld.long 0x00 7. " gpio71 ,gpio[71] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " gpio70 ,gpio[70] control bit" "Low,High"
|
|
bitfld.long 0x00 5. " gpio69 ,gpio[69] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " gpio68 ,gpio[68] control bit" "Low,High"
|
|
bitfld.long 0x00 3. " gpio67 ,gpio[67] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " gpio66 ,gpio[66] control bit" "Low,High"
|
|
bitfld.long 0x00 1. " gpio65 ,gpio[65] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " gpio64 ,gpio[64] control bit" "Low,High"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GPIOCNTRL2,GPIO Control Register #2"
|
|
bitfld.long 0x00 31. " gpio63 ,gpio[63] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio62 ,gpio[62] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio61 ,gpio[61] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio60 ,gpio[60] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio59 ,gpio[59] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio58 ,gpio[58] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio57 ,gpio[57] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio56 ,gpio[56] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio55 ,gpio[55] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio54 ,gpio[54] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio53 ,gpio[53] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio52 ,gpio[52] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio51 ,gpio[51] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio50 ,gpio[50] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] control bit" "Low,High"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPIOCNTRL1,GPIO Control Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] control bit" "Low,High"
|
|
rgroup.long 0x130++0x03
|
|
line.long 0x00 "GPIOS1,GPIO Status Register #3"
|
|
bitfld.long 0x00 8. " gpio72 ,gpio[72] status bit" "Low,High"
|
|
bitfld.long 0x00 7. " gpio71 ,gpio[71] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " gpio70 ,gpio[70] status bit" "Low,High"
|
|
bitfld.long 0x00 5. " gpio69 ,gpio[69] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " gpio68 ,gpio[68] status bit" "Low,High"
|
|
bitfld.long 0x00 3. " gpio67 ,gpio[67] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " gpio66 ,gpio[66] status bit" "Low,High"
|
|
bitfld.long 0x00 1. " gpio65 ,gpio[65] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " gpio64 ,gpio[64] status bit" "Low,High"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "GGPIOS2,PIO Status Register #2"
|
|
bitfld.long 0x00 31. " gpio63 ,gpio[63] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio62 ,gpio[62] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio61 ,gpio[61] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio60 ,gpio[60] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio59 ,gpio[59] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio58 ,gpio[58] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio57 ,gpio[57] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio56 ,gpio[56] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio55 ,gpio[55] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio54 ,gpio[54] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio53 ,gpio[53] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio52 ,gpio[52] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio51 ,gpio[51] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio50 ,gpio[50] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] status bit" "Low,High"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "GGPIOS1,PIO Status Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] status bit" "Low,High"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIMEOUT,BBus Timeout Register"
|
|
bitfld.long 0x00 31. " EN ,Active high BBus monitor enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,The maximum number of cycles allotted to a BBus cycle"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "DMAIS,BBus DMA Interrupt Status Register"
|
|
bitfld.long 0x00 15. " BINT16 ,BBus DMA channel #16 interrupt status" "Low,High"
|
|
bitfld.long 0x00 14. " BINT15 ,BBus DMA channel #15 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT14 ,BBus DMA channel #14 interrupt status" "Low,High"
|
|
bitfld.long 0x00 12. " BINT13 ,BBus DMA channel #13 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT12 ,BBus DMA channel #12 interrupt status" "Low,High"
|
|
bitfld.long 0x00 10. " BINT11 ,BBus DMA channel #11 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT10 ,BBus DMA channel #10 interrupt status" "Low,High"
|
|
bitfld.long 0x00 8. " BINT9 ,BBus DMA channel #9 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT8 ,BBus DMA channel #8 interrupt status" "Low,High"
|
|
bitfld.long 0x00 6. " BINT7 ,BBus DMA channel #7 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT6 ,BBus DMA channel #6 interrupt status" "Low,High"
|
|
bitfld.long 0x00 4. " BINT5 ,BBus DMA channel #5 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT4 ,BBus DMA channel #4 interrupt status" "Low,High"
|
|
bitfld.long 0x00 2. " BINT3 ,BBus DMA channel #3 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT2 ,BBus DMA channel #2 interrupt status" "Low,High"
|
|
bitfld.long 0x00 0. " BINT1 ,BBus DMA channel #1 interrupt status" "Low,High"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "DMAIE,BBus DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " BINT_EN16 ,BBus DMA channel #16 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BINT_EN15 ,BBus DMA channel #15 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT_EN14 ,BBus DMA channel #14 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " BINT_EN13 ,BBus DMA channel #13 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT_EN12 ,BBus DMA channel #12 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BINT_EN11 ,BBus DMA channel #11 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT_EN10 ,BBus DMA channel #10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BINT_EN9 ,BBus DMA channel #9 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT_EN8 ,BBus DMA channel #8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BINT_EN7 ,BBus DMA channel #7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT_EN6 ,BBus DMA channel #6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BINT_EN5 ,BBus DMA channel #5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT_EN4 ,BBus DMA channel #4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BINT_EN3 ,BBus DMA channel #3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT_EN2 ,BBus DMA channel #2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BINT_EN1 ,BBus DMA channel #1 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "USBCONF,USB Configuration Register"
|
|
bitfld.long 0x00 5. " EXT_PHY ,Defines the type of data bus between the NS9360 and external USB PHY" "Bidirectional,Unidirectional"
|
|
bitfld.long 0x00 4. " INT_PHY ,Defines which USB module is currently using the on-chip PHY" "Host,Device"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SPEED , Defines the operational speed of the USB Device block" "Low speed,Full speed"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ENDCONF,Endian Configuration Register"
|
|
bitfld.long 0x00 12. " AHBM ,AHB bus master" "Little,Big"
|
|
bitfld.long 0x00 9. " USBHST ,USB Host controller" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SerD ,Serial controller port D" "Little,Big"
|
|
bitfld.long 0x00 4. " SerC ,Serial controller port C" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SerA ,Serial controller port A" "Little,Big"
|
|
bitfld.long 0x00 2. " SerB ,Serial controller port B" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA" "Little,Big"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ARMWU,ARM Wake-up Register"
|
|
hexmask.long 0x00 0.--31. 1. " WAKE ,Defines the word that must match in order for the SC to signal a wake-up"
|
|
width 0xb
|
|
elif (cpu()=="NS9750")
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MS,Master Reset Register"
|
|
bitfld.long 0x00 7. " I2C ,I2C Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " 1284 ,IEEE 1284 Controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SerD ,Serial Controller port D reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " SerC ,Serial Controller port C reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SerA ,Serial Controller port A reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " SerB ,Serial Controller port B reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " USB ,USB Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA reset" "No reset,Reset"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GPIOC7,GPIO Configuration Register #7"
|
|
bitfld.long 0x00 7. " PINd_49 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_49 ,GPIO49 Function" "Timer 15,1284 periphal logic high (peripheraldriven),DMA ch 2 done,GPIO49"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_48 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_48 ,GPIO48 Function" "Timer 14,1284 nSelectIn (host-driven),DMA ch 2 req,GPIO48"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GPIOC6,GPIO Configuration Register #6"
|
|
bitfld.long 0x00 31. " PINd_47 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 30. " GPIO_INV_47 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " PINn_47 ,GPIO47 Function" "Ser port D CTS,1284 nInit (host-driven),LCD data bit 23,GPIO47"
|
|
bitfld.long 0x00 27. " PINd_46 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " GPIO_INV_46 ,GPIO invert control" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " PINn_46 ,GPIO46 Function" "Ser port D RTS,1284 nAutoFd (host-driven),LCD data bit 22,GPIO46"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_45 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PINn_45 ,GPIO45 Function" "Ser port D RxData/SPI port D din,1284 nStrobe (host-driven),LCD data bit 21,GPIO45"
|
|
bitfld.long 0x00 19. " PINd_44 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PINn_44 ,GPIO44 Function" "Ser port D TxData/SPI port D dout,1284 Select (peripheral-driven),USB phy tx output enable,LCD data bit 20"
|
|
bitfld.long 0x00 15. " PINd_43 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 14. " GPIO_INV_43 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 12.--13. " PINn_43 ,GPIO43 Function" "Ser port C CTS,Timer 13,LCD data bit 19,GPIO43"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_42 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_INV_42 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 8.--9. " PINn_42 ,GPIO42 Function" "Ser port C RTS,Timer 12,LCD data bit 18,GPIO42"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_41 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_41 ,GPIO41 Function" "Ser port C RxData/SPI port C din,Timer 11,LCD data bit 17,GPIO41"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_40 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_40 ,GPIO40 Function" "Ser port C TxData/SPI port C dout,Ext IRQ 3,LCD data bit 16,GPIO40"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC5,GPIO Configuration Register #5"
|
|
bitfld.long 0x00 31. " PINd_39 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_39 ,GPIO39 Function" "Reserved,1284 Data 8 (bidirectional),LCD data bit 15,GPIO39"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_38 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_38 ,GPIO38 Function" "Reserved,1284 Data 7 (bidirectional),LCD data bit 14,GPIO38"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_37 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_37 ,GPIO37 Function" "Reserved,1284 Data 6 (bidirectional),LCD data bit 13,GPIO37"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_36 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_36 ,GPIO36 Function" "Reserved,1284 Data 5 (bidirectional),LCD data bit 12,GPIO36"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_35 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_35 ,GPIO35 Function" "Timer 10,1284 Data 4 (bidirectional),LCD data bit 11,GPIO35"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_34 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_34 ,GPIO34 Function" "Timer 9,1284 Data 3 (bidirectional),LCD data bit 10,GPIO34"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_33 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_33 ,GPIO33 Function" "Timer 8,1284 Data 2 (bidirectional),LCD data bit 9,GPIO33"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_32 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_32 ,GPIO32 Function" "Ext IRQ 2,1284 Data 1 (bidirectional),LCD data bit 8,GPIO32"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC4,GPIO Configuration Register #4"
|
|
bitfld.long 0x00 31. " PINd_31 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_31 ,GPIO31 Function" "Timer 7,LCD data bit 7,LCD data bit 11 (duplicate),GPIO31"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_30 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_30 ,GPIO30 Function" "Timer 6,LCD data bit 6,LCD data bit 10 (duplicate),GPIO30"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_29 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_29 ,GPIO29 Function" "Timer 5,LCD data bit 5,LCD data bit 9 (duplicate),GPIO29"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_28 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_28 ,GPIO28 Function" "Ext IRQ 1 (duplicate),LCD data bit 4,LCD data bit 8 (duplicate),GPIO28"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_27 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 14. " GPIO_INV_27 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " PINn_27 ,GPIO27 Function" "Ser port D DCD/SPI port D enable,LCD data bit 3,Timer 4,GPIO27"
|
|
bitfld.long 0x00 11. " PINd_26 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_INV_26 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 8.--9. " PINn_26 ,GPIO26 Function" "Ser port D RI/SPI port D clk,LCD data bit 2,Timer 3,GPIO26"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_25 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 6. " GPIO_INV_25 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PINn_25 ,GPIO25 Function" "Ser port D DSR,LCD data bit 1,Timer 15 (duplicate),GPIO25"
|
|
bitfld.long 0x00 3. " PINd_24 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " GPIO_INV_24 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 0.--1. " PINn_24 ,GPIO24 Function" "Ser port D DTR,LCD data bit 0,Reserved,GPIO24"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GPIOC3,GPIO Configuration Register #3"
|
|
bitfld.long 0x00 31. " PINd_23 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 30. " GPIO_INV_23 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " PINn_23 ,GPIO23 Function" "Ser port C DCD/SPI port C enable,LCD line end,Timer 14 (duplicate),GPIO23"
|
|
bitfld.long 0x00 27. " PINd_22 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " GPIO_INV_22 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 24.--25. " PINn_22 ,GPIO22 Function" "Ser port C RI/SPI port C clk,LCD AC bias-data enable,Reserved,GPIO22"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_21 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 22. " GPIO_INV_21 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PINn_21 ,GPIO21 Function" "Ser port C DSR,LCD frame pulse-vert,Reserved,GPIO21"
|
|
bitfld.long 0x00 19. " PINd_20 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " GPIO_INV_20 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 16.--17. " PINn_20 ,GPIO20 Function" "Ser port C DTR,LCD clock,Reserved,GPIO20"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_19 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_19 ,GPIO19 Function" "Ethernet CAM req,LCD line-horz sync,DMA ch 2 read enable (duplicate),GPIO19"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_18 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_18 ,GPIO18 Function" "Ethernet CAM reject,LCD power enable,Ext IRQ 3 (duplicate),GPIO18"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_17 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_17 ,GPIO17 Function" "USB power relay,Reserved,Reserved,GPIO17"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_16 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_16 ,GPIO16 Function" "Reserved,1284 nFault (peripheral-driven; duplicate),Timer 11 (duplicate)Reserved,GPIO16"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC2,GPIO Configuration Register #2"
|
|
bitfld.long 0x00 31. " PINd_15 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 30. " GPIO_INV_15 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " PINn_15 ,GPIO15 Function" "Ser port A DCD/SPI port A enable,Timer 2,Reserved,GPIO15"
|
|
bitfld.long 0x00 27. " PINd_14 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " GPIO_INV_14 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 24.--25. " PINn_14 ,GPIO14 Function" "Ser port A RI/SPI port A clk,Timer 1,Reserved,GPIO14"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_13 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 22. " GPIO_INV_13 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PINn_13 ,GPIO13 Function" "Ser port A DSR,Ext IRQ 0 (duplicate),Timer 10 (duplicate),GPIO13"
|
|
bitfld.long 0x00 19. " PINd_12 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " GPIO_INV_12 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 16.--17. " PINn_12 ,GPIO12 Function" "Ser port A DTR,Reserved,Reserved,GPIO12"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_11 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 14. " GPIO_INV_11 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " PINn_11 ,GPIO11 Function" "Ser port A CTS,Ext IRQ2 (duplicate),Timer 0 (duplicate),GPIO11"
|
|
bitfld.long 0x00 11. " PINd_10 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_INV_10 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 8.--9. " PINn_10 ,GPIO10 Function" "Ser port A RTS,Reserved,Reserved,GPIO10"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_9 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_9 ,GPIO9 Function" "Ser port A RxData/SPI port A din,Reserved,Timer 8 (duplicate),GPIO9"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_8 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_8 ,GPIO8 Function" "Ser port A TxData/SPI port A dout,Reserved,Reserved,GPIO8"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIOC1,GPIO Configuration Register #1"
|
|
bitfld.long 0x00 31. " PINd_7 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 30. " GPIO_INV_7 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " PINn_7 ,GPIO7 Function" "Ser port B DCD/SPI port B enable,DMA ch 1 read enable (duplicate),Ext IRQ 1,GPIO7"
|
|
bitfld.long 0x00 27. " PINd_6 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " GPIO_INV_6 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 24.--25. " PINn_6 ,GPIO6 Function" "Ser port B RI/SPI port B clk,1284 nFault (peripheral-driven),Timer 7 (duplicate),GPIO6"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_5 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 22. " GPIO_INV_5 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PINn_5 ,GPIO5 Function" "Ser port B DSR,1284 PError (peripheral-driven),DMA ch 1 read enable,GPIO5"
|
|
bitfld.long 0x00 19. " PINd_4 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " GPIO_INV_4 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 16.--17. " PINn_4 ,GPIO4 Function" "Ser port B DTR,1284 busy (peripheral-driven),DMA ch 1 done,GPIO4"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_3 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 14. " GPIO_INV_3 ,GPIO invert control" "Not inverted,Iverted"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " PINn_3 ,GPIO3 Function" "Ser port B CTS,1284 nACK (peripheral-driven),DMA ch 1 req,GPIO3"
|
|
bitfld.long 0x00 11. " PINd_2 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_INV_2 ,GPIO invert control" "Not inverted,Iverted"
|
|
bitfld.long 0x00 8.--9. " PINn_2 ,GPIO2 Function" "Ser port B RTS,Timer 0,DMA ch 2 read enable,GPIO2"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_1 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PINn_1 ,GPIO1 Function" "Ser port B RxData/SPI port B din,DMA ch 1 req (duplicate),Ext IRQ 0,GPIO1"
|
|
bitfld.long 0x00 3. " PINd_0 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PINn_0 ,GPIO0 Function" "Ser port B TxData/SPI port B dout,DMA ch 1 done (duplicate),Timer 1 (duplicate),GPIO0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GPIOCNTRL2,GPIO Control Register #2"
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] control bit" "Low,High"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPIOCNTRL1,GPIO Control Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] control bit" "Low,High"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "GGPIOS2,PIO Status Register #2"
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] status bit" "Low,High"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "GGPIOS1,PIO Status Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] status bit" "Low,High"
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "BM,BBus Monitor Register"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "DMAIS,BBus DMA Interrupt Status Register"
|
|
bitfld.long 0x00 15. " BINT16 ,BBus DMA channel #16 interrupt status" "Low,High"
|
|
bitfld.long 0x00 14. " BINT15 ,BBus DMA channel #15 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT14 ,BBus DMA channel #14 interrupt status" "Low,High"
|
|
bitfld.long 0x00 12. " BINT13 ,BBus DMA channel #13 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT12 ,BBus DMA channel #12 interrupt status" "Low,High"
|
|
bitfld.long 0x00 10. " BINT11 ,BBus DMA channel #11 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT10 ,BBus DMA channel #10 interrupt status" "Low,High"
|
|
bitfld.long 0x00 8. " BINT9 ,BBus DMA channel #9 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT8 ,BBus DMA channel #8 interrupt status" "Low,High"
|
|
bitfld.long 0x00 6. " BINT7 ,BBus DMA channel #7 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT6 ,BBus DMA channel #6 interrupt status" "Low,High"
|
|
bitfld.long 0x00 4. " BINT5 ,BBus DMA channel #5 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT4 ,BBus DMA channel #4 interrupt status" "Low,High"
|
|
bitfld.long 0x00 2. " BINT3 ,BBus DMA channel #3 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT2 ,BBus DMA channel #2 interrupt status" "Low,High"
|
|
bitfld.long 0x00 0. " BINT1 ,BBus DMA channel #1 interrupt status" "Low,High"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "DMAIE,BBus DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " BINT_EN16 ,BBus DMA channel #16 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BINT_EN15 ,BBus DMA channel #15 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT_EN14 ,BBus DMA channel #14 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " BINT_EN13 ,BBus DMA channel #13 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT_EN12 ,BBus DMA channel #12 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BINT_EN11 ,BBus DMA channel #11 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT_EN10 ,BBus DMA channel #10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BINT_EN9 ,BBus DMA channel #9 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT_EN8 ,BBus DMA channel #8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BINT_EN7 ,BBus DMA channel #7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT_EN6 ,BBus DMA channel #6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BINT_EN5 ,BBus DMA channel #5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT_EN4 ,BBus DMA channel #4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BINT_EN3 ,BBus DMA channel #3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT_EN2 ,BBus DMA channel #2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BINT_EN1 ,BBus DMA channel #1 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "USBCONF,USB Configuration Register"
|
|
bitfld.long 0x00 3. " OUTEN ,Enables the USB output driver during USB loopback testing" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPEED , Defines the operational speed of the USB Device block" "Low speed,Full speed"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CFG ,Configuration" "USB disabled,USB device mode; no software control,USB host mode; no software control,USB device mode; software control"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ENDCONF,Endian Configuration Register"
|
|
bitfld.long 0x00 12. " AHBM ,AHB bus master" "Little,Big"
|
|
bitfld.long 0x00 5. " SerD ,Serial controller port D" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SerC ,Serial controller port C" "Little,Big"
|
|
bitfld.long 0x00 3. " SerA ,Serial controller port A" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SerB ,Serial controller port B" "Little,Big"
|
|
bitfld.long 0x00 1. " USB , USB" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA" "Little,Big"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ARMWU,ARM Wake-up Register"
|
|
hexmask.long 0x00 0.--31. 1. " WAKE ,Defines the word that must match in order for the SC to signal a wake-up"
|
|
width 0xb
|
|
elif (cpu()=="NS9775")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MS,Master Reset Register"
|
|
bitfld.long 0x00 7. " I2C ,I2C Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " 1284 ,IEEE 1284 Controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SerD ,Serial Controller port D reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " SerC ,Serial Controller port C reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SerA ,Serial Controller port A reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " SerB ,Serial Controller port B reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " USB ,USB Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA reset" "No reset,Reset"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GPIOC7,GPIO Configuration Register #7"
|
|
bitfld.long 0x00 7. " PINd_49 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_49 ,GPIO49 Function" "Timer 15,1284 periphal logic high (peripheraldriven),DMA ch 2 done,GPIO49"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_48 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_48 ,GPIO48 Function" "Timer 14,1284 nSelectIn (host-driven),DMA ch 2 req,GPIO48"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GPIOC6,GPIO Configuration Register #6"
|
|
bitfld.long 0x00 31. " PINd_47 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 30. " GPIO_INV_47 ,GPIO invert control" "No invert,Invert"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " PINn_47 ,GPIO47 Function" "Ser port D CTS,1284 nInit (host-driven),LCD data bit 23,GPIO47"
|
|
bitfld.long 0x00 27. " PINd_46 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " PINn_46 ,GPIO46 Function" "Ser port D RTS,1284 nAutoFd (host-driven),LCD data bit 22,GPIO46"
|
|
bitfld.long 0x00 23. " PINd_45 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PINn_45 ,GPIO45 Function" "Ser port D RxData/SPI port D din,1284 nStrobe (host-driven),LCD data bit 21,GPIO45"
|
|
bitfld.long 0x00 19. " PINd_44 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PINn_44 ,GPIO44 Function" "Ser port D TxData/SPI port D dout,1284 Select (peripheral-driven),USB phy tx output enable,LCD data bit 20"
|
|
bitfld.long 0x00 15. " PINd_43 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " PINn_43 ,GPIO43 Function" "Ser port C CTS,Timer 13,LCD data bit 19,GPIO43"
|
|
bitfld.long 0x00 11. " PINd_42 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " PINn_42 ,GPIO42 Function" "Ser port C RTS,Timer 12,LCD data bit 18,GPIO42"
|
|
bitfld.long 0x00 7. " PINd_41 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PINn_41 ,GPIO41 Function" "Ser port C RxData/SPI port C din,Timer 11,LCD data bit 17,GPIO41"
|
|
bitfld.long 0x00 3. " PINd_40 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PINn_40 ,GPIO40 Function" "Ser port C TxData/SPI port C dout,Ext IRQ 3,LCD data bit 16,GPIO40"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC5,GPIO Configuration Register #5"
|
|
bitfld.long 0x00 31. " PINd_39 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_39 ,GPIO39 Function" "Reserved,1284 Data 8 (bidirectional),LCD data bit 15,GPIO39"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_38 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_38 ,GPIO38 Function" "Reserved,1284 Data 7 (bidirectional),LCD data bit 14,GPIO38"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_37 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_37 ,GPIO37 Function" "Reserved,1284 Data 6 (bidirectional),LCD data bit 13,GPIO37"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_36 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_36 ,GPIO36 Function" "Reserved,1284 Data 5 (bidirectional),LCD data bit 12,GPIO36"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_35 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_35 ,GPIO35 Function" "Timer 10,1284 Data 4 (bidirectional),LCD data bit 11,GPIO35"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_34 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_34 ,GPIO34 Function" "Timer 9,1284 Data 3 (bidirectional),LCD data bit 10,GPIO34"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_33 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_33 ,GPIO33 Function" "Timer 8,1284 Data 2 (bidirectional),LCD data bit 9,GPIO33"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_32 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_32 ,GPIO32 Function" "Ext IRQ 2,1284 Data 1 (bidirectional),LCD data bit 8,GPIO32"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC4,GPIO Configuration Register #4"
|
|
bitfld.long 0x00 31. " PINd_31 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_31 ,GPIO31 Function" "Timer 7,LCD data bit 7,LCD data bit 11 (duplicate),GPIO31"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_30 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_30 ,GPIO30 Function" "Timer 6,LCD data bit 6,LCD data bit 10 (duplicate),GPIO30"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_29 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_29 ,GPIO29 Function" "Timer 5,LCD data bit 5,LCD data bit 9 (duplicate),GPIO29"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_28 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_28 ,GPIO28 Function" "Ext IRQ 1 (duplicate),LCD data bit 4,LCD data bit 8 (duplicate),GPIO28"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_27 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_27 ,GPIO27 Function" "Ser port D DCD/SPI port D enable,LCD data bit 3,Timer 4,GPIO27"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_26 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_26 ,GPIO26 Function" "Ser port D RI/SPI port D clk,LCD data bit 2,Timer 3,GPIO26"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_25 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_25 ,GPIO25 Function" "Ser port D DSR,LCD data bit 1,Timer 15 (duplicate),GPIO25"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_24 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_24 ,GPIO24 Function" "Ser port D DTR,LCD data bit 0,Reserved,GPIO24"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GPIOC3,GPIO Configuration Register #3"
|
|
bitfld.long 0x00 31. " PINd_23 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_23 ,GPIO23 Function" "Ser port C DCD/SPI port C enable,LCD line end,Timer 14 (duplicate),GPIO23"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_22 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_22 ,GPIO22 Function" "Ser port C RI/SPI port C clk,LCD AC bias-data enable,Reserved,GPIO22"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_21 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_21 ,GPIO21 Function" "Ser port C DSR,LCD frame pulse-vert,Reserved,GPIO21"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_20 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_20 ,GPIO20 Function" "Ser port C DTR,LCD clock,Reserved,GPIO20"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_19 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_19 ,GPIO19 Function" "Ethernet CAM req,LCD line-horz sync,DMA ch 2 read enable (duplicate),GPIO19"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_18 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_18 ,GPIO18 Function" "Ethernet CAM reject,LCD power enable,Ext IRQ 3 (duplicate),GPIO18"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_17 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_17 ,GPIO17 Function" "USB power relay,Reserved,Reserved,GPIO17"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_16 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_16 ,GPIO16 Function" "Reserved,1284 nFault (peripheral-driven; duplicate),Timer 11 (duplicate)Reserved,GPIO16"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC2,GPIO Configuration Register #2"
|
|
bitfld.long 0x00 31. " PINd_15 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_15 ,GPIO15 Function" "Ser port A DCD/SPI port A enable,Timer 2,Reserved,GPIO15"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_14 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_14 ,GPIO14 Function" "Ser port A RI/SPI port A clk,Timer 1,Reserved,GPIO14"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_13 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_13 ,GPIO13 Function" "Ser port A DSR,Ext IRQ 0 (duplicate),Timer 10 (duplicate),GPIO13"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_12 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_12 ,GPIO12 Function" "Ser port A DTR,Reserved,Reserved,GPIO12"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_11 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_11 ,GPIO11 Function" "Ser port A CTS,Ext IRQ2 (duplicate),Timer 0 (duplicate),GPIO11"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_10 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_10 ,GPIO10 Function" "Ser port A RTS,Reserved,Reserved,GPIO10"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_09 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_9 ,GPIO9 Function" "Ser port A RxData/SPI port A din,Reserved,Timer 8 (duplicate),GPIO9"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_8 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_8 ,GPIO8 Function" "Ser port A TxData/SPI port A dout,Reserved,Reserved,GPIO8"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIOC1,GPIO Configuration Register #1"
|
|
bitfld.long 0x00 31. " PINd_7 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 28.--29. " PINn_7 ,GPIO7 Function" "Ser port B DCD/SPI port B enable,DMA ch 1 read enable (duplicate),Ext IRQ 1,GPIO7"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PINd_6 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 24.--25. " PINn_6 ,GPIO6 Function" "Ser port B RI/SPI port B clk,1284 nFault (peripheral-driven),Timer 7 (duplicate),GPIO6"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PINd_5 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 20.--21. " PINn_5 ,GPIO5 Function" "Ser port B DSR,1284 PError (peripheral-driven),DMA ch 1 read enable,GPIO5"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PINd_4 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 16.--17. " PINn_4 ,GPIO4 Function" "Ser port B DTR,1284 busy (peripheral-driven),DMA ch 1 done,GPIO4"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PINd_3 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 12.--13. " PINn_3 ,GPIO3 Function" "Ser port B CTS,1284 nACK (peripheral-driven),DMA ch 1 req,GPIO3"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINd_2 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 8.--9. " PINn_2 ,GPIO2 Function" "Ser port B RTS,Timer 0,DMA ch 2 read enable,GPIO2"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINd_1 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 4.--5. " PINn_1 ,GPIO1 Function" "Ser port B RxData/SPI port B din,DMA ch 1 req (duplicate),Ext IRQ 0,GPIO1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINd_0 ,Controls the direction of the GPIO pin" "Input,Output"
|
|
bitfld.long 0x00 0.--1. " PINn_0 ,GPIO0 Function" "Ser port B TxData/SPI port B dout,DMA ch 1 done (duplicate),Timer 1 (duplicate),GPIO0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GPIOCNTRL2,GPIO Control Register #2"
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] control bit" "Low,High"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPIOCNTRL1,GPIO Control Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] control bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] control bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] control bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] control bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] control bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] control bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] control bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] control bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] control bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] control bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] control bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] control bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] control bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] control bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] control bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] control bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] control bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] control bit" "Low,High"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "GGPIOS2,PIO Status Register #2"
|
|
bitfld.long 0x00 17. " gpio49 ,gpio[49] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio48 ,gpio[48] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio47 ,gpio[47] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio46 ,gpio[46] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio45 ,gpio[45] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio44 ,gpio[44] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio43 ,gpio[43] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio42 ,gpio[42] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio41 ,gpio[41] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio40 ,gpio[40] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio39 ,gpio[39] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio38 ,gpio[38] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio37 ,gpio[37] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio36 ,gpio[36] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio35 ,gpio[35] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio34 ,gpio[34] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio33 ,gpio[33] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio32 ,gpio[32] status bit" "Low,High"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "GGPIOS1,PIO Status Register #1"
|
|
bitfld.long 0x00 31. " gpio31 ,gpio[31] status bit" "Low,High"
|
|
bitfld.long 0x00 30. " gpio30 ,gpio[30] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " gpio29 ,gpio[29] status bit" "Low,High"
|
|
bitfld.long 0x00 28. " gpio28 ,gpio[28] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " gpio27 ,gpio[27] status bit" "Low,High"
|
|
bitfld.long 0x00 26. " gpio26 ,gpio[26] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " gpio25 ,gpio[25] status bit" "Low,High"
|
|
bitfld.long 0x00 24. " gpio24 ,gpio[24] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " gpio23 ,gpio[23] status bit" "Low,High"
|
|
bitfld.long 0x00 22. " gpio22 ,gpio[22] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " gpio21 ,gpio[21] status bit" "Low,High"
|
|
bitfld.long 0x00 20. " gpio20 ,gpio[20] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " gpio19 ,gpio[19] status bit" "Low,High"
|
|
bitfld.long 0x00 18. " gpio18 ,gpio[18] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " gpio17 ,gpio[17] status bit" "Low,High"
|
|
bitfld.long 0x00 16. " gpio16 ,gpio[16] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " gpio15 ,gpio[15] status bit" "Low,High"
|
|
bitfld.long 0x00 14. " gpio14 ,gpio[14] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " gpio13 ,gpio[13] status bit" "Low,High"
|
|
bitfld.long 0x00 12. " gpio12 ,gpio[12] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " gpio11 ,gpio[11] status bit" "Low,High"
|
|
bitfld.long 0x00 10. " gpio10 ,gpio[10] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " gpio9 ,gpio[9] status bit" "Low,High"
|
|
bitfld.long 0x00 8. " gpio8 ,gpio[8] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " gpio7 ,gpio[7] status bit" "Low,High"
|
|
bitfld.long 0x00 6. " gpio6 ,gpio[6] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " gpio5 ,gpio[5] status bit" "Low,High"
|
|
bitfld.long 0x00 4. " gpio4 ,gpio[4] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " gpio3 ,gpio[3] status bit" "Low,High"
|
|
bitfld.long 0x00 2. " gpio2 ,gpio[2] status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " gpio1 ,gpio[1] status bit" "Low,High"
|
|
bitfld.long 0x00 0. " gpio0 ,gpio[0] status bit" "Low,High"
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "BM,BBus Monitor Register"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "DMAIS,BBus DMA Interrupt Status Register"
|
|
bitfld.long 0x00 15. " BINT16 ,BBus DMA channel #16 interrupt status" "Low,High"
|
|
bitfld.long 0x00 14. " BINT15 ,BBus DMA channel #15 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT14 ,BBus DMA channel #14 interrupt status" "Low,High"
|
|
bitfld.long 0x00 12. " BINT13 ,BBus DMA channel #13 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT12 ,BBus DMA channel #12 interrupt status" "Low,High"
|
|
bitfld.long 0x00 10. " BINT11 ,BBus DMA channel #11 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT10 ,BBus DMA channel #10 interrupt status" "Low,High"
|
|
bitfld.long 0x00 8. " BINT9 ,BBus DMA channel #9 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT8 ,BBus DMA channel #8 interrupt status" "Low,High"
|
|
bitfld.long 0x00 6. " BINT7 ,BBus DMA channel #7 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT6 ,BBus DMA channel #6 interrupt status" "Low,High"
|
|
bitfld.long 0x00 4. " BINT5 ,BBus DMA channel #5 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT4 ,BBus DMA channel #4 interrupt status" "Low,High"
|
|
bitfld.long 0x00 2. " BINT3 ,BBus DMA channel #3 interrupt status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT2 ,BBus DMA channel #2 interrupt status" "Low,High"
|
|
bitfld.long 0x00 0. " BINT1 ,BBus DMA channel #1 interrupt status" "Low,High"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "DMAIE,BBus DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " BINT_EN16 ,BBus DMA channel #16 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BINT_EN15 ,BBus DMA channel #15 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BINT_EN14 ,BBus DMA channel #14 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " BINT_EN13 ,BBus DMA channel #13 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BINT_EN12 ,BBus DMA channel #12 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BINT_EN11 ,BBus DMA channel #11 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BINT_EN10 ,BBus DMA channel #10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BINT_EN9 ,BBus DMA channel #9 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BINT_EN8 ,BBus DMA channel #8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BINT_EN7 ,BBus DMA channel #7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BINT_EN6 ,BBus DMA channel #6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BINT_EN5 ,BBus DMA channel #5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BINT_EN4 ,BBus DMA channel #4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BINT_EN3 ,BBus DMA channel #3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BINT_EN2 ,BBus DMA channel #2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BINT_EN1 ,BBus DMA channel #1 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "USBCONF,USB Configuration Register"
|
|
bitfld.long 0x00 3. " OUTEN ,Enables the USB output driver during USB loopback testing" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPEED , Defines the operational speed of the USB Device block" "Low speed,Full speed"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CFG ,Configuration" "USB disabled,USB device mode; no software control,USB host mode; no software control,USB device mode; software control"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ENDCONF,Endian Configuration Register"
|
|
bitfld.long 0x00 12. " AHBM ,AHB bus master" "Little,Big"
|
|
bitfld.long 0x00 7. " I2C ,I2C controller" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IEEE1284 ,IEEE 1284 controller" "Little,Big"
|
|
bitfld.long 0x00 5. " SerD ,Serial controller port D" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SerC ,Serial controller port C" "Little,Big"
|
|
bitfld.long 0x00 3. " SerA ,Serial controller port A" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SerB ,Serial controller port B" "Little,Big"
|
|
bitfld.long 0x00 1. " USB , USB" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA ,BBus DMA" "Little,Big"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ARMWU,ARM Wake-up Register"
|
|
hexmask.long 0x00 0.--31. 1. " WAKE ,Defines the word that must match in order for the SC to signal a wake-up"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "External DMA (External Direct Memory Access)"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0xa0800000
|
|
width 11.
|
|
tree "Channel 1"
|
|
group.long 0x0++0x0f
|
|
line.long 0x00 "DMABDP,DMA Channel 1 Buffer Descriptor Pointer"
|
|
line.long 0x04 "DMACTRL,DMA Channel 1 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 1 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 1 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1 unit,4 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1 unit,4 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 18. " POL ,Control signal polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 10.--15. " STATE ,State" "Idle,Buffer descriptor read,Buffer descriptor read,Buffer descriptor read,Data transfer,Data transfer,Data transfer,Data transfer,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Error,?..."
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x08 "DMASINTEN,DMA Channel 1 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIE interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 1 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "nmpmcstcsout[0],nmpmcstcsout[1],nmpmcstcsout[2],nmpmcstcsout[3]"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x10++0x0f
|
|
line.long 0x00 "DMABDP,DMA Channel 2 Buffer Descriptor Pointer"
|
|
line.long 0x04 "DMACTRL,DMA Channel 2 Control Register"
|
|
bitfld.long 0x04 31. " CE ,Channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel 2 abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " CG ,Channel 2 go" "Low,High"
|
|
bitfld.long 0x04 27.--28. " SW ,Source width" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " DW ,Destination width" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x04 23.--24. " SB ,Source burst" "1 unit,4 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x04 21.--22. " DB ,Destination burst" "1 unit,4 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x04 20. " SINC_N ,Source address increment" "Increment,Not increment"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DINC_N ,Destination address increment" "Increment,Not increment"
|
|
bitfld.long 0x04 18. " POL ,Control signal polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 17. " MODE ,Fly-by mode" "Write,Read"
|
|
bitfld.long 0x04 16. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 10.--15. " STATE ,State" "Idle,Buffer descriptor read,Buffer descriptor read,Buffer descriptor read,Data transfer,Data transfer,Data transfer,Data transfer,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Buffer descriptor update,Error,?..."
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x08 "DMASINTEN,DMA Channel 2 Status and Interrupt Enable Register"
|
|
eventfld.long 0x08 31. " NCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 30. " ECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 29. " NRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x08 28. " CAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PCIP ,Premature complete interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " NCIE ,Enable NCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " ECIE ,Enable ECIE interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " NRIE ,Enable NRIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " CAIE ,Enable CAIP interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PCIE ,Enable PCIP interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " WRAP ,Debug field that indicates the last descriptor in the descriptor list" "Not wrapped,Wrapped"
|
|
bitfld.long 0x08 18. " DONE ,Debug field that indicates the status of the DONE signal" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x08 17. " LAST ,Debug field that indicates the last buffer descriptor in the current data frame" "Not last,Last"
|
|
bitfld.long 0x08 16. " FULL ,Debug field that indicates the status of the F bit from the current DMA buffer descriptor" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--15. 1. " BLEN ,Debug field that indicates the current byte transfer count"
|
|
line.long 0x0c "DMAPCS,DMA Channel 2 Peripheral Chip Select Register"
|
|
bitfld.long 0x0c 0.--1. " SEL ,Chip select" "nmpmcstcsout[0],nmpmcstcsout[1],nmpmcstcsout[2],nmpmcstcsout[3]"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "RTC (Real Time Clock Module)"
|
|
sif (cpu()=="NS9360")
|
|
base ad:0x90700000
|
|
width 12.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "RTC_GCR,RTC General Control Register"
|
|
bitfld.long 0x00 1. " CAL ,Calendar operation" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " TIME ,Time (date, hour, minute, second) operation" "Enabled,Disabled"
|
|
line.long 0x04 "RTC_HRM,Hour Mode Register"
|
|
bitfld.long 0x04 0. " 12/24 ,12/24 Hour Mode" "24,12"
|
|
if ((data.long(ad:0x90700000+0x04)&0x00000001)==0x00000001)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "RTC_TIMR,Time Register"
|
|
bitfld.long 0x00 30. " PM ,PM Mode" "AM,PM"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "RTC_TIMR,Time Register"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,2,-"
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
endif
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "RTC_CALR,Calendar Register"
|
|
bitfld.long 0x00 28.--29. " C_T ,Century tens BCD digit (1-2)" "-,1,2,-"
|
|
bitfld.long 0x00 24.--27. " C_U ,Century units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " Y_T ,Years tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 16.--19. " Y_U ,Years units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " D_T ,Date tens BCD digit (0-3)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " D_U ,Date units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " M_T ,Months tens BCD digit (0-1)" "0,1"
|
|
bitfld.long 0x00 3.--6. " M_U ,Months units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " Day ,Day of week, units, BCD digit (0-7)" "-,1,2,3,4,5,6,7"
|
|
if ((data.long(ad:0x90700000+0x04)&0x00000001)==0x00000001)
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
|
|
bitfld.long 0x00 30. " PM ,PM Mode" "AM,PM"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,2,-"
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
endif
|
|
width 12.
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
|
|
bitfld.long 0x00 12.--13. " D_T ,Date tens BCD digit (0-3)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " D_U ,Date units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " M_T ,Months tens BCD digit (0-1)" "0,1"
|
|
bitfld.long 0x00 3.--6. " M_U ,Months units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
line.long 0x04 "RTC_AER,Alarm Enable Register"
|
|
bitfld.long 0x04 5. " Mnth ,Month" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " Date ,Date" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " Hour ,Hour" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " Min ,Minute" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " Sec ,Second" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " Hsec ,Hundredth of a second" "Disabled,Enabled"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RTC_EFR,Event Flags register"
|
|
bitfld.long 0x00 6. " Alarm ,Alarm event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " Mnth Evnt ,Month event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Date Evnt ,Date event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " Hour Evnt ,Hour event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Min Evnt ,Minute event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " Sec Evnt ,Second event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Hsec Evnt ,Hundredth of a second event" "Not occurred,Occurred"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "RTC_IESR,Interrupt Enable Status register"
|
|
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " Alrm_Stat_set/clr ,Alarm interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " Mnth_Stat_set/clr ,Month interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " Date_Stat_set/clr ,Date interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " Hour_Stat_set/clr ,Hour interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " Min_Stat_set/clr ,Minute interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " Sec_Stat_set/clr ,Second interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " Hsec_Stat_set/clr ,Hundredth of a second interrupt status" "Enabled,Disabled"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "RTC_GSR,General Status register"
|
|
bitfld.long 0x00 3. " VCAC ,Valid calendar alarm configuration" "Invalid,Valid"
|
|
bitfld.long 0x00 2. " VTAC ,Valid time alarm configuration" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VCC ,Valid calendar configuration" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " VTC ,Valid time configuration" "Invalid,Valid"
|
|
width 0xB
|
|
elif (cpu()=="NS9215")
|
|
base ad:0x90060000
|
|
width 12.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "RTC_GCR,RTC General Control Register"
|
|
bitfld.long 0x00 1. " CAL ,Calendar operation" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " TIME ,Time (date, hour, minute, second) operation" "Enabled,Disabled"
|
|
line.long 0x04 "RTC_HRM,Hour Mode Register"
|
|
bitfld.long 0x04 0. " 12/24 ,12/24 Hour Mode" "24,12"
|
|
if ((data.long(ad:0x90060000+0x04)&0x00000001)==0x00000001)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "RTC_TIMR,Time Register"
|
|
bitfld.long 0x00 30. " PM ,PM Mode" "AM,PM"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "RTC_TIMR,Time Register"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,2,-"
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
endif
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "RTC_CALR,Calendar Register"
|
|
bitfld.long 0x00 28.--29. " C_T ,Century tens BCD digit (1-2)" "-,1,2,-"
|
|
bitfld.long 0x00 24.--27. " C_U ,Century units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " Y_T ,Years tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 16.--19. " Y_U ,Years units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " D_T ,Date tens BCD digit (0-3)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " D_U ,Date units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " M_T ,Months tens BCD digit (0-1)" "0,1"
|
|
bitfld.long 0x00 3.--6. " M_U ,Months units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " Day ,Day of week, units, BCD digit (0-7)" "-,1,2,3,4,5,6,7"
|
|
if ((data.long(ad:0x90060000+0x04)&0x00000001)==0x00000001)
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
|
|
bitfld.long 0x00 30. " PM ,PM Mode" "AM,PM"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
|
|
bitfld.long 0x00 28.--29. " HR_T ,Hours tens BCD digit (0-1)" "0,1,2,-"
|
|
bitfld.long 0x00 24.--27. " HR_U ,Hours units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " M_T ,Minutes tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 16.--19. " M_U ,Minutes units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " S_T ,Seconds tens BCD digit (0-5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. " S_U ,Seconds units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " H_T ,Hundredths of a second tens BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
bitfld.long 0x00 0.--3. " H_U ,Hundredths of a second units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
endif
|
|
width 12.
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
|
|
bitfld.long 0x00 12.--13. " D_T ,Date tens BCD digit (0-3)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " D_U ,Date units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " M_T ,Months tens BCD digit (0-1)" "0,1"
|
|
bitfld.long 0x00 3.--6. " M_U ,Months units BCD digit (0-9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
line.long 0x04 "RTC_AER,Alarm Enable Register"
|
|
bitfld.long 0x04 5. " Mnth ,Month" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " Date ,Date" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " Hour ,Hour" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " Min ,Minute" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " Sec ,Second" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " Hsec ,Hundredth of a second" "Disabled,Enabled"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RTC_EFR,Event Flags register"
|
|
bitfld.long 0x00 6. " Alarm ,Alarm event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " Mnth Evnt ,Month event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Date Evnt ,Date event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " Hour Evnt ,Hour event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Min Evnt ,Minute event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " Sec Evnt ,Second event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Hsec Evnt ,Hundredth of a second event" "Not occurred,Occurred"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "RTC_IESR,Interrupt Enable Status register"
|
|
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " Alrm_Stat_set/clr ,Alarm interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " Mnth_Stat_set/clr ,Month interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " Date_Stat_set/clr ,Date interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " Hour_Stat_set/clr ,Hour interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " Min_Stat_set/clr ,Minute interrupt status" "Enabled,Disabled"
|
|
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " Sec_Stat_set/clr ,Second interrupt status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " Hsec_Stat_set/clr ,Hundredth of a second interrupt status" "Enabled,Disabled"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "RTC_GSR,General Status register"
|
|
bitfld.long 0x00 3. " VCAC ,Valid calendar alarm configuration" "Invalid,Valid"
|
|
bitfld.long 0x00 2. " VTAC ,Valid time alarm configuration" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VCC ,Valid calendar configuration" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " VTC ,Valid time configuration" "Invalid,Valid"
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree "I2C Master/Slave Interface"
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
base ad:0x90500000
|
|
width 20.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "CMD_TX_DATA_REG,Command Transmit Data Register"
|
|
bitfld.long 0x00 15. " PIPE ,Pipeline mode" "Low,High"
|
|
bitfld.long 0x00 14. " DLEN ,I2C DLEN port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXVAL ,Provide new transmit data in" "Low,High"
|
|
bitfld.long 0x00 8.--12. " CMD ,Command to be sent" "M_NOP,Reserved,Reserved,Reserved,M_READ,M_WRITE,M_STOP,Reserved,Reserved,Reserved,S_NOP,Reserved,Reserved,Reserved,Reserved,Reserved,S_STOP,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Transmit data to I2C bus"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS_RX_DATA_REG,Status Receive Data Register"
|
|
bitfld.long 0x00 15. " BSTS ,Bus status (master only)" "Free,Occupied"
|
|
bitfld.long 0x00 14. " RDE ,Receive data enable (rx_data_en)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SCMDL ,Slave command lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " MCMDL ,Master command lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " IRQCD ,Interrupt codes (irq_code)" "NO_IRQ,M_ARBIT_LOST,M_NO_ACK,M_TX_DATA,M_RX_DATA,M_CMD_ACK,Reserved,Reserved,S_RX_ABORT,S_CMD_REQ,S_NO_ACK,S_TX_DATA_1ST,S_RX_DATA_1ST,S_TX_DATA,S_RX_DATA,S_GCA"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,Received data from I2C bus"
|
|
if ((d.l(ad:(0x90500000+0x04))&0x1)==0x0)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MASTERADDR,Master Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " MDA ,Master device address"
|
|
bitfld.long 0x00 0. " MAM ,Master addressing mode" "7 bits,10 bits"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MASTERADDR,Master Address Register"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " MDA ,Master device address"
|
|
bitfld.long 0x00 0. " MAM ,Master addressing mode" "7 bits,10 bits"
|
|
endif
|
|
if ((d.l(ad:(0x90500000+0x08))&0x1)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SLAVEADDR,Slave Address Register"
|
|
bitfld.long 0x00 11. " GCA ,General call address (s_gca_irq_en)" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SDA ,Slave device address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Slave addressing mode" "7 bits,10 bits"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SLAVEADDR,Slave Address Register"
|
|
bitfld.long 0x00 11. " GCA ,General call address (s_gca_irq_en)" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " SDA ,Slave device address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Slave addressing mode" "7 bits,10 bits"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 15. " IRQD ,Mask the interrupt to the ARM CPU (irq_dis)" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " TMDE ,Timing characteristics of serial data and serial clock" "Standard,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VSCD ,Virtual system clock divider for master and slave" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--12. " SFW ,Spike filter width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " CLREF ,clk_ref[9:1]"
|
|
width 0xb
|
|
elif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90050000
|
|
width 20.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "CMD_TX_DATA_REG,Command Transmit Data Register"
|
|
bitfld.long 0x00 15. " PIPE ,Pipeline mode" "Low,High"
|
|
bitfld.long 0x00 14. " DLEN ,I2C DLEN port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXVAL ,Provide new transmit data in" "Low,High"
|
|
bitfld.long 0x00 8.--12. " CMD ,Command to be sent" "M_NOP,Reserved,Reserved,Reserved,M_READ,M_WRITE,M_STOP,Reserved,Reserved,Reserved,S_NOP,Reserved,Reserved,Reserved,Reserved,Reserved,S_STOP,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Transmit data to I2C bus"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS_RX_DATA_REG,Status Receive Data Register"
|
|
bitfld.long 0x00 15. " BSTS ,Bus status (master only)" "Free,Occupied"
|
|
bitfld.long 0x00 14. " RDE ,Receive data enable (rx_data_en)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SCMDL ,Slave command lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " MCMDL ,Master command lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " IRQCD ,Interrupt codes (irq_code)" "NO_IRQ,M_ARBIT_LOST,M_NO_ACK,M_TX_DATA,M_RX_DATA,M_CMD_ACK,Reserved,Reserved,S_RX_ABORT,S_CMD_REQ,S_NO_ACK,S_TX_DATA_1ST,S_RX_DATA_1ST,S_TX_DATA,S_RX_DATA,S_GCA"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,Received data from I2C bus"
|
|
if ((d.l(ad:(0x90050000+0x04))&0x1)==0x0)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MASTERADDR,Master Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " MDA ,Master device address"
|
|
bitfld.long 0x00 0. " MAM ,Master addressing mode" "7 bits,10 bits"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MASTERADDR,Master Address Register"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " MDA ,Master device address"
|
|
bitfld.long 0x00 0. " MAM ,Master addressing mode" "7 bits,10 bits"
|
|
endif
|
|
if ((d.l(ad:(0x90050000+0x08))&0x1)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SLAVEADDR,Slave Address Register"
|
|
bitfld.long 0x00 11. " GCA ,General call address (s_gca_irq_en)" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SDA ,Slave device address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Slave addressing mode" "7 bits,10 bits"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SLAVEADDR,Slave Address Register"
|
|
bitfld.long 0x00 11. " GCA ,General call address (s_gca_irq_en)" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " SDA ,Slave device address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Slave addressing mode" "7 bits,10 bits"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 15. " IRQD ,Mask the interrupt to the ARM CPU (irq_dis)" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " TMDE ,Timing characteristics of serial data and serial clock" "Standard,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VSCD ,Virtual system clock divider for master and slave" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--12. " SFW ,Spike filter width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " CLREF ,clk_ref[9:1]"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "LCD Controller"
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
base ad:0xa0800000
|
|
width 14.
|
|
group.long 0x00++0x23
|
|
line.long 0x00 "LCDTiming0,Horizontal axis panel control"
|
|
hexmask.long.byte 0x00 24.--31. 1. " HBP ,Horizontal back porch"
|
|
hexmask.long.byte 0x00 16.--23. 1. " HFP ,Horizontal front porch"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " HSW ,Horizontal synchronization pulse width"
|
|
hexmask.long.byte 0x00 2.--7. 1. " PPL ,Pixels-per-line"
|
|
line.long 0x04 "LCDTiming1,Vertical axis panel control"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VBP ,Vertical back porch"
|
|
hexmask.long.byte 0x04 16.--23. 1. " VFP ,Vertical front porch"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " VSW ,Vertical synchronization pulse width"
|
|
hexmask.long.word 0x04 0.--9. 1. " LPP ,Lines per panel"
|
|
line.long 0x08 "LCDTiming2,Clock and signal polarity control"
|
|
bitfld.long 0x08 26. " BCD ,Bypass pixel clock divider" "Disabled,Enabled"
|
|
hexmask.long.word 0x08 16.--25. 1. " CPL ,Clocks per line"
|
|
textline " "
|
|
bitfld.long 0x08 14. " IOE ,Invert output enable" "Active high,Active low"
|
|
bitfld.long 0x08 13. " IPC ,Invert panel clock" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x08 12. " IHS ,Invert horizontal synchronization" "Active high,Active low"
|
|
bitfld.long 0x08 11. " IVS ,Invert vertical synchronization" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x08 6.--10. " ACB ,AC bias pin frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 0.--4. " PCD ,Panel clock divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0C "LCDTiming3,Line end control"
|
|
bitfld.long 0x0C 16. " LEE ,LCD line-end enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " LED ,Line-end signal delay"
|
|
line.long 0x10 "LCDUPBASE,Upper panel frame base address"
|
|
hexmask.long 0x10 2.--31. 2. " LCDUPBASE ,LCD upper panel base address"
|
|
line.long 0x14 "LCDLPBASE,Lower panel frame base address"
|
|
hexmask.long 0x14 2.--31. 2. " LCDLPBASE ,LCD lower panel base address"
|
|
line.long 0x18 "LCDINTRENABLE,Interrupt enable mask"
|
|
bitfld.long 0x18 4. " MBERRINTRENB ,AHB master bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " VCOMPINTRENB ,Vertical compare interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " LNBUINTRENB ,Next base update interrupt enable" "Disabled,Enabled"
|
|
line.long 0x1C "LCDControl,LCDControl Register"
|
|
bitfld.long 0x1C 16. " WATERMARK ,LCD DMA FIFO watermark level" "4,8"
|
|
bitfld.long 0x1C 12.--13. " LcdVComp ,Generate vertical compare interrupt" "Vertical synchronization,Back porch,Active video,Front porch"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " LcdPwr ,LCD power enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 10. " BEPO ,Big endian pixel ordering within a byte" "Little endian,Big endian"
|
|
textline " "
|
|
bitfld.long 0x1C 9. " BEBO ,Big endian byte order" "Little endian,Big endian"
|
|
bitfld.long 0x1C 8. " BGR ,RGB or BGR format selection" "RGB,BGR"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " LcdDual ,LCD interface is dual panel STN" "Single panel,Dual panel"
|
|
bitfld.long 0x1C 6. " LcdMono8 ,Monochrome LCD has 8-bit interface" "4-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x1C 5. " LcdTFT ,LCD is TFT" "STN,TFT"
|
|
bitfld.long 0x1C 4. " LcdBW ,STN LCD is monochrome (black and white)" "Color,Monochrome"
|
|
textline " "
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
bitfld.long 0x1C 1.--3. " LcdBpp ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp (TFT panel only),?..."
|
|
bitfld.long 0x1C 0. " LcdEn ,LCD controller enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x1C 1.--3. " LcdBpp ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,?..."
|
|
bitfld.long 0x1C 0. " LcdEn ,LCD controller enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x20 "LCDStatus,LCDStatus Register"
|
|
eventfld.long 0x20 4. " MBERROR ,AHB master bus error status" "No error,Error"
|
|
eventfld.long 0x20 3. " VCOMP ,Vertical compare" "Not reached,Reached"
|
|
textline " "
|
|
eventfld.long 0x20 2. " LNBU ,LCD next address base update" "Not updated,Updated"
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "LCDI,LCDInterrupt Register"
|
|
bitfld.long 0x00 4. " MBERRORINTR ,AHB master bus error interrupt status bit" "Low,High"
|
|
bitfld.long 0x00 3. " VCOMPINTR ,Vertical compare interrupt status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBUINTR ,LCD next base address update interrupt status bit" "Low,High"
|
|
line.long 0x04 "LCDUPCURR,LCD upper panel current address value Register"
|
|
line.long 0x08 "LCDLPCURR,LCD lower panel current address value Register"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "LCDPalette,LCDPalette Register"
|
|
button "LCDPalette" "d ad:(0xa0800000+0x200)--ad:(0xa0800000+0x3FF) /long"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.open "Serial Control Module"
|
|
tree "Serial Channel B"
|
|
base ad:0x90200000
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 14.
|
|
if ((data.long(ad:0x90200000+0x04)&0x00300000)==0x00000000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " BRK ,Send break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STICKP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " STOP ,Stop bits" "1 stop bit,2 stop bits"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
bitfld.long 0x00 23. " CTSTX ,Activate clear to send" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RTSRX ,Activate ready to send" "Low,High"
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DTR ,Data terminal ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RTS ,Request-to-send" "Inactive,Active"
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RIC_7 ,Receiver interrupt condition;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RIC_6 ,Receiver interrupt condition;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RIC_5 ,Receiver interrupt condition;Change in DCD interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Change in DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
bitfld.long 0x04 15. " RTSTX ,Enable active RTS only while transmitting" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x17
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/2,BCLK,External receive clock,External transmit clock"
|
|
else
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
endif
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FC,Flow Control Register"
|
|
bitfld.long 0x00 8.--9. " FLOW_STATE ,Flow control state" "Software-initiated XON,Software-initiated XOFF,Hardware-initiated XON,Hardware-initiated XOFF"
|
|
bitfld.long 0x00 6.--7. " FLOW4 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FLOW3 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
bitfld.long 0x00 2.--3. " FLOW2 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FLOW1 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
line.long 0x04 "FCF,Flow Control Force Register"
|
|
bitfld.long 0x04 20. " TX_IDLE ,Transmit idle" "Not idle,Idle"
|
|
bitfld.long 0x04 17. " TX_DIS ,Transmit disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE_EN ,Force transmit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " FORCE_CHAR ,Force character"
|
|
elif ((data.long(ad:0x90200000+0x04)&0x00300000)==0x00200000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Serial Channel A"
|
|
base ad:0x90200040
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 14.
|
|
if ((data.long(ad:0x90200040+0x04)&0x00300000)==0x00000000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " BRK ,Send break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STICKP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " STOP ,Stop bits" "1 stop bit,2 stop bits"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
bitfld.long 0x00 23. " CTSTX ,Activate clear to send" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RTSRX ,Activate ready to send" "Low,High"
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DTR ,Data terminal ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RTS ,Request-to-send" "Inactive,Active"
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RIC_7 ,Receiver interrupt condition;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RIC_6 ,Receiver interrupt condition;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RIC_5 ,Receiver interrupt condition;Change in DCD interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Change in DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
bitfld.long 0x04 15. " RTSTX ,Enable active RTS only while transmitting" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x17
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/2,BCLK,External receive clock,External transmit clock"
|
|
else
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
endif
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FC,Flow Control Register"
|
|
bitfld.long 0x00 8.--9. " FLOW_STATE ,Flow control state" "Software-initiated XON,Software-initiated XOFF,Hardware-initiated XON,Hardware-initiated XOFF"
|
|
bitfld.long 0x00 6.--7. " FLOW4 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FLOW3 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
bitfld.long 0x00 2.--3. " FLOW2 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FLOW1 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
line.long 0x04 "FCF,Flow Control Force Register"
|
|
bitfld.long 0x04 20. " TX_IDLE ,Transmit idle" "Not idle,Idle"
|
|
bitfld.long 0x04 17. " TX_DIS ,Transmit disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE_EN ,Force transmit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " FORCE_CHAR ,Force character"
|
|
elif ((data.long(ad:0x90200040+0x04)&0x00300000)==0x00200000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Serial Channel C"
|
|
base ad:0x90300000
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 14.
|
|
if ((data.long(ad:0x90300000+0x04)&0x00300000)==0x00000000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " BRK ,Send break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STICKP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " STOP ,Stop bits" "1 stop bit,2 stop bits"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
bitfld.long 0x00 23. " CTSTX ,Activate clear to send" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RTSRX ,Activate ready to send" "Low,High"
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DTR ,Data terminal ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RTS ,Request-to-send" "Inactive,Active"
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RIC_7 ,Receiver interrupt condition;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RIC_6 ,Receiver interrupt condition;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RIC_5 ,Receiver interrupt condition;Change in DCD interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Change in DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
bitfld.long 0x04 15. " RTSTX ,Enable active RTS only while transmitting" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x17
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/2,BCLK,External receive clock,External transmit clock"
|
|
else
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
endif
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FC,Flow Control Register"
|
|
bitfld.long 0x00 8.--9. " FLOW_STATE ,Flow control state" "Software-initiated XON,Software-initiated XOFF,Hardware-initiated XON,Hardware-initiated XOFF"
|
|
bitfld.long 0x00 6.--7. " FLOW4 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FLOW3 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
bitfld.long 0x00 2.--3. " FLOW2 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FLOW1 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
line.long 0x04 "FCF,Flow Control Force Register"
|
|
bitfld.long 0x04 20. " TX_IDLE ,Transmit idle" "Not idle,Idle"
|
|
bitfld.long 0x04 17. " TX_DIS ,Transmit disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE_EN ,Force transmit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " FORCE_CHAR ,Force character"
|
|
elif ((data.long(ad:0x90300000+0x04)&0x00300000)==0x00200000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Serial Channel D"
|
|
base ad:0x90300040
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 14.
|
|
if ((data.long(ad:0x90300040+0x04)&0x00300000)==0x00000000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " BRK ,Send break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STICKP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " STOP ,Stop bits" "1 stop bit,2 stop bits"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
bitfld.long 0x00 23. " CTSTX ,Activate clear to send" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RTSRX ,Activate ready to send" "Low,High"
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DTR ,Data terminal ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RTS ,Request-to-send" "Inactive,Active"
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RIC_7 ,Receiver interrupt condition;Receive register ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RIC_6 ,Receiver interrupt condition;Receive FIFO half-full" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RIC_5 ,Receiver interrupt condition;Change in DCD interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Change in DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
sif ((cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
bitfld.long 0x04 15. " RTSTX ,Enable active RTS only while transmitting" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 19. " DCD ,Data carrier detect" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RI ,Ring indicator" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DSR , Data set ready" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CTS , Clear to send" "Inactive,Active"
|
|
bitfld.long 0x00 15. " RBRK , Receive break condition" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RFE , Receive framing error" "No error,Error"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " DCDI ,Change in DCD" "Not changed,Changed"
|
|
bitfld.long 0x00 6. " RII ,Change in RI" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSRI ,Change in DSR" "Not changedd,Changed"
|
|
bitfld.long 0x00 4. " CTSI ,Change in CTS" "Not changedd,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x17
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/2,BCLK,External receive clock,External transmit clock"
|
|
else
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
endif
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "Reserved,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FC,Flow Control Register"
|
|
bitfld.long 0x00 8.--9. " FLOW_STATE ,Flow control state" "Software-initiated XON,Software-initiated XOFF,Hardware-initiated XON,Hardware-initiated XOFF"
|
|
bitfld.long 0x00 6.--7. " FLOW4 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FLOW3 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
bitfld.long 0x00 2.--3. " FLOW2 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FLOW1 ,Flow control enable" "Disabled,Disabled,FLOW_STATE XON,FLOW_STATE XOFF"
|
|
line.long 0x04 "FCF,Flow Control Force Register"
|
|
bitfld.long 0x04 20. " TX_IDLE ,Transmit idle" "Not idle,Idle"
|
|
bitfld.long 0x04 17. " TX_DIS ,Transmit disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE_EN ,Force transmit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " FORCE_CHAR ,Force character"
|
|
elif ((data.long(ad:0x90300040+0x04)&0x00300000)==0x00200000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " N ,Divisor value"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRLA,Control Register A"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " WLS ,Word length select" "5,6,7,8 bits"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LL ,Local loopback" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RIE_11 ,Receive interrupt enable;Receive register ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RIE_10 ,Receive interrupt enable;Receive FIFO half-full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RIE_9 ,Receive interrupt enable;Receive buffer closed" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERXDMA ,Enable receive DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIC_4 ,Transmitter interrupt condition;Change in CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TIC_3 ,Transmitter interrupt condition;Transmit register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TIC_2 ,Transmitter interrupt condition;Transmit FIFO half-empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIC_1 ,Transmitter interrupt condition;Transmit buffer closed interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ETXDMA ,Enable transmit DMA" "Disabled,Enabled"
|
|
line.long 0x04 "CTRLB,Control Register B"
|
|
bitfld.long 0x04 31. " RDM1 ,Enable receive data match RDM1" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RDM2 ,Enable receive data match RDM2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " RDM3 ,Enable receive data match RDM3" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " RDM4 ,Enable receive data match RDM4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RBGT ,Receive buffer GAP timer" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCGT ,Receive character GAP timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CSPOL ,SPI chip select polarity" "Active low,Active high"
|
|
bitfld.long 0x04 20.--21. " MODE ,Serial channel mode" "UART,Reserved,SPI master ,SPI slave"
|
|
textline " "
|
|
bitfld.long 0x04 19. " BITORDR ,Bit ordering" "LSB first,MSB first"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STS,Status Register A"
|
|
bitfld.long 0x00 31. " MATCH1 ,Match bit;Match1" "Not found,Found"
|
|
bitfld.long 0x00 30. " MATCH2 ,Match bit;Match2" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MATCH3 ,Match bit;Match3" "Not found,Found"
|
|
bitfld.long 0x00 28. " MATCH4 ,Match bit;Match4" "Not found,Found"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BGAP ,Buffer GAP timer" "Not passed,Passed"
|
|
bitfld.long 0x00 26. " CGAP ,Character GAP timer" "Not passed,Passed"
|
|
textline " "
|
|
sif (cpu()=="NS9360")
|
|
bitfld.long 0x00 22. " RBCPEND ,Receive buffer closed pending" "FIFO empty,FIFO not empty"
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
elif (cpu()=="NS9750")
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 20.--21. " RXFDB ,Receive FIFO data available" "Full word,One byte,Half word,Three bytes"
|
|
bitfld.long 0x00 12. " ROVER ,Receive overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RRDY ,Receive register ready" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " RHALF ,Receive FIFO half full" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RBC ,Receive buffer closed" "Low,High"
|
|
bitfld.long 0x00 8. " RFS ,Receive FIFO status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TRDY ,Transmit register empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " THALF ,Transmit FIFO half empty" "Not empty,Half empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEMPTY ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "BR,Bit-rate Register"
|
|
bitfld.long 0x00 31. " EBIT ,Bit-rate generator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMODE ,Timing mode" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXSRC ,Receive timing source" "Internal,External"
|
|
bitfld.long 0x00 28. " TXSRC ,Transmit clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXEXT ,Drive receive clock external" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TXEXT ,Drive transmit clock external" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CLKMUX ,Bit-rate generator clock source" "x1_sys_osc/M,BCLK,External receive clock,External transmit clock"
|
|
bitfld.long 0x00 23. " TXCINV ,Transmit clock invert" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RXCINV ,Receive clock invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 21. " SPCPOL ,SPI transmit polarity" "Idle high,Idle low"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " TDCR ,Transmit clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
bitfld.long 0x00 17.--18. " RDCR ,Receive clock divide rate" "1x clock,8x clock,16x clock,32x clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TICS ,Transmit internal clock source" "Bit-rate generator,Clock DPLL"
|
|
bitfld.long 0x00 15. " RICS ,Receive internal clock source" "Bit-rate generator,Clock DPLL"
|
|
textline " "
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x04 "FIFOD,FIFO Data Register"
|
|
in
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "RBGAPT,Receive Buffer GAP Timer"
|
|
bitfld.long 0x00 31. " TRUN ,Buffer GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " BT ,Buffer GAP timer"
|
|
line.long 0x04 "RCHGAPT,Receive Character GAP Timer"
|
|
bitfld.long 0x04 31. " TRUN ,Character GAP timer enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CT ,Character GAP timer"
|
|
line.long 0x08 "RM,Receive Match Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RDMB1 ,Receive data match byte1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RDMB2 ,Receive data match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " RDMB3 ,Receive data match byte3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RDMB4 ,Receive data match byte4"
|
|
line.long 0x0C "RMM,Receive Match MASK Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RMMB1 ,Receive mask match byte1"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RMMB2 ,Receive mask match byte2"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " RMMB3 ,Receive mask match byte3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RMMB4 ,Receive mask match byte4"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "IEEE 1284 Peripheral Controller"
|
|
base ad:0x90400000
|
|
sif ((cpu()=="NS9360")||(cpu()=="NS9750")||(cpu()=="NS9775"))
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GenConfig,General Configuration Register"
|
|
bitfld.long 0x00 14. " AFSH ,HostAck signal handling HostAck=1/Hostack=0" "Bits 7-0 stored in data/command FIFO,All bits stored in data FIFO"
|
|
bitfld.long 0x00 13. " CPS ,Connector PLH signal" "Interface is not ready,Interface is ready"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " FCRT ,Forward command ready threshold" "4 bytes,8 bytes,16 or more bytes,28 or more bytes"
|
|
bitfld.long 0x00 8.--9. " FDRT ,Forward data ready threshold" "4 bytes,8 bytes,16 or more bytes,28 or more bytes"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RRT ,Reverse ready threshold" "1-4 bytes,13-16 bytes,21-24 bytes,25-28 bytes"
|
|
bitfld.long 0x00 3. " FCM ,Forward command mode" "Direct CPU access,DMA control"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FDM ,Forward data mode" "Direct CPU access,DMA control"
|
|
bitfld.long 0x00 0. " RM ,Reverse mode" "Direct CPU access,DMA control"
|
|
width 27.
|
|
line.long 0x04 "InterruptStatusandControl,Interrupt Status and Control Register"
|
|
bitfld.long 0x04 26. " RFRIM ,Reverse FIFO ready interrupt mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " FDBGM ,Forward data FIFO byte gap mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FCBGM ,Forward command FIFO byte gap mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " FDMBM ,Forward data FIFO max buffer mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " FCMBM ,Forward command FIFO max buffer mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " FDRIM ,Forward data FIFO ready interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " FCRIM ,Forward command FIFO ready interrupt mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " I1M ,Peripheral controller interrupt 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x04 10. " RFRI ,Reverse FIFO ready interrupt" "Not ready,Ready"
|
|
eventfld.long 0x04 7. " FDFBG ,Forward data FIFO byte gap" "Not expired,Expired"
|
|
textline " "
|
|
eventfld.long 0x04 6. " FCFBG ,Forward command FIFO byte gap" "Not expired,Expired"
|
|
eventfld.long 0x04 5. " FDFMB ,Forward data FIFO max buffer" "Not reached,Maximum reached"
|
|
textline " "
|
|
eventfld.long 0x04 4. " FCFMB ,Forward command FIFO max buffer" "Not reached,Maximum reached"
|
|
eventfld.long 0x04 3. " FDFRI ,Forward data FIFO ready interrupt" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x04 2. " FCFRI ,Forward command FIFO ready interrupt" "Low,High"
|
|
eventfld.long 0x04 1. " PC1I ,Peripheral controller interrupt 1" "Low,High"
|
|
width 19.
|
|
rgroup.long 0x08++0x0B
|
|
line.long 0x00 "FIFO Status,FIFO Status Register"
|
|
bitfld.long 0x00 14.--15. " FCFDR ,Forward command FIFO depth remain" "4 bytes,1 byte,2 bytes,3 bytes"
|
|
bitfld.long 0x00 13. " FCFE ,Forward command FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FCFA ,Forward command FIFO almost empty" "More than 1-4 bytes,Only one 1-4 byte entry"
|
|
bitfld.long 0x00 11. " FCFR ,Forward command FIFO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FDFDR ,Forward data FIFO depth remain" "4 bytes,1 byte,2 bytes,3 bytes"
|
|
bitfld.long 0x00 5. " FDFE ,Forward data FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FDFAE ,Forward data FIFO almost empty" "More than 1-4 bytes,Only one 1-4 byte entry"
|
|
bitfld.long 0x00 3. " FDFR ,Forward data FIFO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFF ,Reverse FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 1. " RFAF ,Reverse FIFO almost full" "More than 1-4 bytes,Only one 1-4 byte entry"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RFR ,Reverse FIFO ready" "Not ready,Ready"
|
|
line.long 0x04 "FwdCmdFifoReadReg,Forward Command FIFO Read Register"
|
|
hexmask.long 0x04 0.--31. 1. " FwCmdFifoReadReg ,Reads up to four bytes from the Forward Command FIFO when in CPU mode"
|
|
line.long 0x08 "FwDatFifoReadReg,Forward Data FIFO Read register"
|
|
hexmask.long 0x08 0.--31. 1. " FwDatFifoReadReg ,Reads up to four bytes from the Forward Data FIFO when in CPU mode"
|
|
wgroup.long 0x1C++0x07
|
|
line.long 0x00 "RvFifoWriteReg,Reverse FIFO Write Register"
|
|
hexmask.long 0x00 0.--31. 1. " RvFifoWriteReg ,Write one to four bytes to the Reverse FIFO when in CPU mode"
|
|
width 23.
|
|
line.long 0x04 "RvFifoWriteReg - Last,Reverse FIFO Write Register - Last"
|
|
hexmask.long 0x04 0.--31. 1. " RvFifoWriteReg_Last ,Write one to four bytes to the Reverse FIFO when in CPU mode"
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "FwdCmdDmaControl,Forward Command DMA Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " FwCmdMaxBufSize ,Forward command maximum buffer size"
|
|
hexmask.long.word 0x00 0.--15. 1. " FwCmdByteGapTimer ,Forward command byte gap timeout"
|
|
line.long 0x04 "FwDatDmaControl,Forward Data DMA Control Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " FwDatMaxBufSize ,Forward data maximum buffer size"
|
|
hexmask.long.word 0x04 0.--15. 1. " FwDatByteGapTimer ,Forward data byte gap timeout"
|
|
width 5.
|
|
rgroup.byte 0x100++0x07
|
|
line.byte 0x00 "pd,Printer Data Pins Register"
|
|
hexmask.byte 0x00 0.--7. 1. " pd ,Allows the CPU to read the status of the 8-bit data bus directly"
|
|
line.byte 0x04 "psr,Port Status Register, host"
|
|
bitfld.byte 0x04 3. " N_AUTOFD ,Allows the CPU to read the status of the host control pins directly" "Low,High"
|
|
bitfld.byte 0x04 2. " N_INIT ,Allows the CPU to read the status of the host control pins directly" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x04 1. " N_SLCTIN ,Allows the CPU to read the status of the host control pins directly" "Low,High"
|
|
bitfld.byte 0x04 0. " N_STROBE ,Allows the CPU to read the status of the host control pins directly" "Low,High"
|
|
group.byte 0x108++0x03
|
|
line.byte 0x00 "pcr,Port Control Register"
|
|
bitfld.byte 0x00 7. " BUSY , Allows the CPU to directly control the IEEE 1284 pin values" "Low,High"
|
|
bitfld.byte 0x00 6. " N_ACK ,Allows the CPU to directly control the IEEE 1284 pin values" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " PERR ,Allows the CPU to directly control the IEEE 1284 pin values" "Low,High"
|
|
bitfld.byte 0x00 4. " SEL ,Allows the CPU to directly control the IEEE 1284 pin values" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " N_FLT ,Allows the CPU to directly control the IEEE 1284 pin values" "Low,High"
|
|
rgroup.byte 0x10C++0x03
|
|
line.byte 0x00 "pin,Port Status Register, peripheral"
|
|
bitfld.byte 0x00 7. " BUSY ,Allows the CPU to read the status of the peripheral control pins directly" "Low,High"
|
|
bitfld.byte 0x00 6. " N_ACK ,Allows the CPU to read the status of the peripheral control pins directly" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " PERR ,Allows the CPU to read the status of the peripheral control pins directly" "Low,High"
|
|
bitfld.byte 0x00 4. " SEL ,Allows the CPU to read the status of the peripheral control pins directly" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " N_FLT ,Allows the CPU to read the status of the peripheral control pins directly" "Low,High"
|
|
sif (cpu()=="NS9360")
|
|
group.byte 0x114++0x03
|
|
line.byte 0x00 "fea,Feature Control Register A"
|
|
bitfld.byte 0x00 0. " PPtEn ,Printer port enable" "Force IEEE 1284 outputs to high impedance,Enable normal operation"
|
|
else
|
|
group.byte 0x114++0x07
|
|
line.byte 0x00 "fea,Feature Control Register A"
|
|
bitfld.byte 0x00 0. " PPtEn ,Printer port enable" "Force IEEE 1284 outputs to high impedance,Enable normal operation"
|
|
line.byte 0x04 "feb,Feature Control Register B"
|
|
bitfld.byte 0x04 0. " Bit0 ,Must be set to 1" "0,1"
|
|
endif
|
|
group.byte 0x11C++0x0F
|
|
line.byte 0x00 "fei,Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " PinSelectInterrupt ,Pin select interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ECPChannelAddress ,Channel address update detect interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NegotiationStart ,Negotiation start interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TransferStart ,Transfer start interrupt enable" "Disabled,Enabled"
|
|
line.byte 0x04 "fem,Master Enable Register"
|
|
bitfld.byte 0x04 6. " ECP ,ECP mode" "Disabled,Enabled"
|
|
bitfld.byte 0x04 5. " SPP-PS2 ,SPP-PS2 mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x04 4. " AutoTransfer ,Auto transfer mode" "Disabled,Enabled"
|
|
bitfld.byte 0x04 2. " AutoNegotiate ,Auto negotiate mode" "Disabled,Enabled"
|
|
line.byte 0x08 "exr,Extensibility Byte Requested by Host Register"
|
|
hexmask.byte 0x08 0.--7. 1. " exr ,Extensibility byte"
|
|
line.byte 0x0C "ecr,Extended Control Register"
|
|
bitfld.byte 0x0C 6. " EnRevDtTrn ,Enable reverse data transfers" "Disabled,Enabled"
|
|
rgroup.byte 0x12C++0x03
|
|
line.byte 0x00 "sti,Interrupt Status Register"
|
|
bitfld.byte 0x00 5. " PSINT ,Pin select interrupt " "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " ECPChAddr ,Channel address update detect interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NSDI ,Negotiation start interrupt " "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " TSDI ,Transfer start interrupt " "No interrupt,Interrupt"
|
|
sif (cpu()=="NS9360")
|
|
group.byte 0x134++0x07
|
|
line.byte 0x00 "msk,Pin Interrupt Mask Register"
|
|
bitfld.byte 0x00 7. " n_autofd_edge_detect ,n_autofd edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " n_init_edge_detect ,n_init edge detect intterupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " n_selectin_edge_detect ,n_selectin edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " n_strobe_edge_detect ,n_strobe edge detect intterupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " n_autofd_level_detect ,n_autofd level detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " n_init_level_detect ,n_init level detect intterupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " n_selectin_level_detect ,n_selectin level detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " n_strobe_level_detect ,n_strobe level detect intterupt enable" "Disabled,Enabled"
|
|
line.byte 0x04 "pit,Pin Interrupt Control Register"
|
|
bitfld.byte 0x04 7. " n_autofd_edge_detect ,n_autofd edge detect" "Falling edge,Rising edge"
|
|
bitfld.byte 0x04 6. " n_init_edge_detect ,n_init edge detect" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.byte 0x04 5. " n_selectin_edge_detect ,n_selectin edge detect" "Falling edge,Rising edge"
|
|
bitfld.byte 0x04 4. " n_strobe_edge_detect ,n_strobe edge detect" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.byte 0x04 3. " n_autofd_level ,n_autofd level" "Low level,High Level"
|
|
bitfld.byte 0x04 2. " n_init_level ,n_init level" "Low level,High Level"
|
|
textline " "
|
|
bitfld.byte 0x04 1. " n_selectin_level ,n_selectin level" "Low level,High Level"
|
|
bitfld.byte 0x04 0. " n_strobe_level ,n_strobe level" "Low level,High Level"
|
|
elif (cpu()=="NS9750")
|
|
group.byte 0x134++0x07
|
|
line.byte 0x00 "msk,Pin Interrupt Mask Register"
|
|
bitfld.byte 0x00 3. " n_autofd_edge_detect ,n_autofd edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " n_init_edge_detect ,n_init edge detect intterupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " n_selectin_edge_detect ,n_selectin edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " n_strobe_edge_detect ,n_strobe edge detect intterupt enable" "Disabled,Enabled"
|
|
line.byte 0x04 "pit,Pin Interrupt Control Register"
|
|
bitfld.byte 0x04 7. " n_autofd_edge_detect ,n_autofd edge detect" "Reserved,Rising edge"
|
|
bitfld.byte 0x04 6. " n_init_edge_detect ,n_init edge detect" "Reserved,Rising edge"
|
|
textline " "
|
|
bitfld.byte 0x04 5. " n_selectin_edge_detect ,n_selectin edge detect" "Reserved,Rising edge"
|
|
bitfld.byte 0x04 4. " n_strobe_edge_detect ,n_strobe edge detect" "Reserved,Rising edge"
|
|
textline " "
|
|
bitfld.byte 0x04 3. " n_autofd_level ,n_autofd level" "Low level,High Level"
|
|
bitfld.byte 0x04 2. " n_init_level ,n_init level" "Low level,High Level"
|
|
textline " "
|
|
bitfld.byte 0x04 1. " n_selectin_level ,n_selectin level" "Low level,High Level"
|
|
bitfld.byte 0x04 0. " n_strobe_level ,n_strobe level" "Low level,High Level"
|
|
else
|
|
group.byte 0x134++0x07
|
|
line.byte 0x00 "msk,Pin Interrupt Mask Register"
|
|
bitfld.byte 0x00 3. " n_autofd_edge_detect ,n_autofd edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " n_init_edge_detect ,n_init edge detect intterupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " n_selectin_edge_detect ,n_selectin edge detect intterupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " n_strobe_edge_detect ,n_strobe edge detect intterupt enable" "Disabled,Enabled"
|
|
line.byte 0x04 "pit,Pin Interrupt Control Register"
|
|
bitfld.byte 0x04 3. " n_autofd_edge ,n_autofd edge" "Falling edge,Rising edge"
|
|
bitfld.byte 0x04 2. " n_init_edge ,n_init edge" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.byte 0x04 1. " n_slctin_edge ,n_slctin edge" "Falling edge,Rising edge"
|
|
bitfld.byte 0x04 0. " n_strobe_edge ,n_strobe edge" "Falling edge,Rising edge"
|
|
endif
|
|
group.byte 0x168++0x03
|
|
line.byte 0x00 "grn,Granularity Count Register"
|
|
hexmask.byte 0x00 0.--7. 1. " grn ,Granularity counter"
|
|
rgroup.byte 0x174++0x07
|
|
line.byte 0x00 "eca,Forward Address Register"
|
|
hexmask.byte 0x00 0.--7. 1. " eca ,Forward address"
|
|
line.byte 0x04 "pha,Core Phase Register"
|
|
hexmask.byte 0x04 0.--7. 1. " pha ,Core Phase"
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree.open "USB Host Module"
|
|
sif (cpu()=="NS9360")
|
|
base ad:0x90800000
|
|
width 20.
|
|
tree "UHFE control and status registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,UHFE Control and Status register"
|
|
bitfld.long 0x00 11. "HSTRST ,Host reset " "Operational,In reset"
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "IE,UHFE Interrupt Enable register"
|
|
bitfld.long 0x00 1. "OHCI_IRQ ,Generates an interrupt when the OHCI_IRQ bit is asserted" "Disabled,Enabled"
|
|
line.long 0x04 "IS,UHFE Interrupt Status register"
|
|
eventfld.long 0x04 1. "OHCI_IRQ ,Asserted when the USB OHCI Host controller generates an interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
base ad:(0x90800000+0x1000)
|
|
tree "USB OHCI Host controller registers"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "HcRevision,HCRevision Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Version of the OHCI specification being used"
|
|
group.long 0x04++0x17
|
|
line.long 0x00 "HcControl,HcControl Register"
|
|
bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IR ,Interrupt Routing" "Bus interrupt mechanism,System management interrupt"
|
|
bitfld.long 0x00 6.--7. " HCFS ,HostControllerFunctionalState" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio (Control/Bulk)" "1 : 1,2 : 1,3 : 1,4 : 1"
|
|
line.long 0x04 "HcCommandStatus,Hc Command Status Register"
|
|
bitfld.long 0x04 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
|
|
bitfld.long 0x04 3. " OCR ,Ownership Change Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 2. " BLF ,Bulk List Filled" "Not filled,Filled"
|
|
bitfld.long 0x04 1. " CLF ,Control List Filled" "Not filled,Filled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " HCR ,Host Controller Reset" "No reset,Reset"
|
|
line.long 0x08 "HcInterruptStatus,Hc Interrupt Status Register"
|
|
eventfld.long 0x08 30. " OC ,OwnershipChange" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 6. " RHSC ,RootHubStatusChange" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 5. " FNO ,FrameNumberOverflow" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 4. " UE ,UnrecoverableError" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 3. " RD ,ResumeDetected" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 2. " SF ,StartofFrame" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 1. " WDH ,WritebackDoneHead" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " SO ,SchedulingOverrun" "No interrupt,Interrupt"
|
|
line.long 0x0C "HcInterruptEnable,HcInterruptEnable Register"
|
|
bitfld.long 0x0C 31. " MIE ,Master Interrupt Enable" "Ignore,Enabled"
|
|
bitfld.long 0x0C 30. " OC ,Ownership change" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " RHSC ,Root hub status change" "Ignore,Enabled"
|
|
bitfld.long 0x0C 5. " FNO ,Frame number overflow" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " UE ,Unrecoverable error" "Inore,Enabled"
|
|
bitfld.long 0x0C 3. " RD ,Resume detect" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " SF ,Start of frame" "Ignore,Enabled"
|
|
bitfld.long 0x0C 1. " WDH ,HcDoneHead writeback" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " SO ,Scheduling overrun" "Ignore,Enabled"
|
|
line.long 0x10 "HcInterruptDisable,HcInterruptDisable Register"
|
|
bitfld.long 0x10 31. " MIE ,Master Interrupt Disable" "Ignore,Disabled"
|
|
bitfld.long 0x10 30. " OC ,Ownership change" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 6. " RHSC ,Root hub status change" "Ignore,Disabled"
|
|
bitfld.long 0x10 5. " FNO ,Frame number overflow" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " UE ,Unrecoverable error" "Inore,Disabled"
|
|
bitfld.long 0x10 3. " RD ,Resume detect" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " SF ,Start of frame" "Ignore,Disabled"
|
|
bitfld.long 0x10 1. " WDH ,HcDoneHead writeback" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " SO ,Scheduling overrun" "Ignore,Disabled"
|
|
line.long 0x14 "HcHCCA,HcHCCA Register"
|
|
hexmask.long.tbyte 0x14 8.--31. 1. " HCCA ,Base address of the Host controller communication area"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "HcPeriodCurrentED,HcPeriodCurrentED Register"
|
|
hexmask.long 0x00 4.--31. 1. " PCED ,PeriodCurrentED"
|
|
group.long 0x20++0x17
|
|
line.long 0x00 "HcControlHeadED,HcControlHeadED Register"
|
|
hexmask.long 0x00 4.--31. 1. " CHED ,ControlHeadED"
|
|
line.long 0x04 "HcControlCurrentED,HcControlCurrentED Register"
|
|
hexmask.long 0x04 4.--31. 1. " CCED ,ControlCurrentED"
|
|
line.long 0x08 "HcBulkHeadED,HcBulkHeadED Register"
|
|
hexmask.long 0x08 4.--31. 1. " BHED ,BulkHeadED"
|
|
line.long 0x0C "HcBulkCurrentED,HcBulkCurrentED Register"
|
|
hexmask.long 0x0C 4.--31. 1. " BCED ,BulkCurrentED"
|
|
line.long 0x10 "HcDoneHead,HcDoneHead Register"
|
|
hexmask.long 0x10 4.--31. 1. " DH ,DoneHead"
|
|
line.long 0x14 "HcFmInterval,HcFmInterval Register"
|
|
bitfld.long 0x14 31. " FIT ,FrameIntervalToggle" "Low,High"
|
|
hexmask.long.word 0x14 16.--30. 1. " FSMPS ,FSLargestDataPacket"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--13. 1. " FI ,FrameInterval"
|
|
rgroup.long 0x38++0x07
|
|
line.long 0x00 "HcFmRemaining,HcFmRemaining Register"
|
|
bitfld.long 0x00 31. " FRT ,FrameRemainingToggle" "Low,High"
|
|
hexmask.long.word 0x00 0.--13. 1. " FR ,FrameRemaining counter"
|
|
line.long 0x04 "HcFmNumber,HcFmNumberRegister"
|
|
hexmask.long.word 0x04 0.--15. 1. " FN ,FrameNumber"
|
|
group.long 0x40++0x7
|
|
line.long 0x00 "HcPeriodicStart,HcPeriodicStart Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " PS ,PeriodicStart"
|
|
line.long 0x04 "HcLSThreshold,HcLSThreshold Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " LST ,LSThreshold"
|
|
tree.end
|
|
tree "Root hub partition registers"
|
|
if (((d.l(ad:(0x90800000+0x1000+0x48)))&0x1100)==0x0)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port basis"
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
elif (((d.l(ad:(0x90800000+0x1000+0x48)))&0x1100)==0x1000)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port"
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
elif (((d.l(ad:(0x90800000+0x1000+0x48)))&0x1100)==0x100)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
else
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
endif
|
|
if (((d.l(ad:(0x90800000+0x1000+0x48)))&0x200)==0x200)
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
|
|
bitfld.long 0x00 31. " PPCM[15] ,PortPowerControlMask[15]" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " PPCM[14] ,PortPowerControlMask[14]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PPCM[13] ,PortPowerControlMask[13]" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " PPCM[12] ,PortPowerControlMask[12]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PPCM[11] ,PortPowerControlMask[11]" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " PPCM[10] ,PortPowerControlMask[10]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPCM[9] ,PortPowerControlMask[9]" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " PPCM[8] ,PortPowerControlMask[8]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PPCM[7] ,PortPowerControlMask[7]" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " PPCM[6] ,PortPowerControlMask[6]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PPCM[5] ,PortPowerControlMask[5]" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " PPCM[4] ,PortPowerControlMask[4]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPCM[3] ,PortPowerControlMask[3]" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " PPCM[2] ,PortPowerControlMask[2]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PPCM[1] ,PortPowerControlMask[1]" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
|
|
bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
|
|
bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
|
|
bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
|
|
bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
|
|
bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
|
|
bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
|
bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
|
else
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
|
|
bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
|
|
bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
|
|
bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
|
|
bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
|
|
bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
|
bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
|
|
bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
|
bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
|
endif
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "HcRhStatus,HcRhStatusRegister"
|
|
bitfld.long 0x00 31. " CRWE ,ClearRemoteWakeupEnable" "No effect,Clear"
|
|
eventfld.long 0x00 17. " CCIC ,OverCurrentIndicatorChange" "No effect,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LPSC ,LocalPowerStatusChange/SetGlobalPower(write)" "0/No effect,Reserved/On all ports"
|
|
bitfld.long 0x00 15. " DRWE ,DeviceRemoteWakeupEnable(read)/SetRemoteWakeupEnable(write)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OCI ,OverCurrentIndicator" "Normal,Overcurrent"
|
|
bitfld.long 0x00 0. " LPS ,LocalPowerStatus(read)/ClearGlobalPower(write)" "0/No effect,Reserved/Off all ports"
|
|
width 20.
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "HcRhPortStatus[1],Hc Rh Port Status [1] Register"
|
|
eventfld.long 0x00 20. " PRSC ,PortResetStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 19. " OCIC ,PortOverCurrentIndicatorChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PSSC ,PortSuspendStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 17. " PESC ,PortEnableStatusChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CSC ,ConnectStatusChange" "Not changed,Changed"
|
|
bitfld.long 0x00 9. " LSDA ,LowSpeedDeviceAttached(read)/ClearPortPower(write)" "Full/No effect,Low/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PPS ,PortPowerStatus(read)/SetPortPower(write)" "Off/No effect,On/Set"
|
|
bitfld.long 0x00 4. " PRS ,PortResetStatus(read)/SetPortReset(write)" "Not active/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " POCI ,PortOverCurrentIndicator(read)/ClearSuspendStatus(write)" "Not detected/No effect,Detected/Clear"
|
|
bitfld.long 0x00 2. " PSS ,PortSuspendStatus(read)/SetPortSuspend(write)" "Not suspended/No effect,Suspended/Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PES ,PortEnableStatus(read)/SetPortEnable(write)" "Disabled/No effect,Enabled"
|
|
bitfld.long 0x00 0. " CCS ,CurrentConnectStatus(read)/ClearPortEnable(write)" "Not connected/No effect,Connected/Clear"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree.open "USB Device Module"
|
|
sif (cpu()=="NS9360")
|
|
base ad:0x90900000
|
|
width 8.
|
|
tree "UDFE registers"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CS0,UDFE Control and Status Register 0"
|
|
bitfld.long 0x00 9.--10. " DRST ,Device reset" "Operational,Reserved,Reserved,In reset"
|
|
bitfld.long 0x00 5. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WKUP ,Wakeup" "Disabled,Enabled"
|
|
line.long 0x04 "CS1,UDFE Control and Status Register 1"
|
|
bitfld.long 0x04 31. " RSME ,Resume" "End resume,Initiate resume"
|
|
bitfld.long 0x04 29. " SPWR ,Self-powered" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SYNC ,SYNC_FRAME support" "Not supported,Supported"
|
|
hexmask.long.word 0x04 12.--22. 1. " FRAME ,Frame number"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " ALT ,Alternate value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " INTF ,Interface value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CFG ,Configuration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x0B
|
|
line.long 0x00 "IE,UDFE Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " GBL_EN ,Global interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " GBL_DMA ,Global DMA interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMA12 ,DMA channel 12 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DMA11 ,DMA channel 11 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DMA10 ,DMA channel 10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " DMA9 ,DMA channel 9 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DMA8 ,DMA channel 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " DMA7 ,DMA channel 7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMA6 ,DMA channel 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DMA5 ,DMA channel 5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DMA4 ,DMA channel 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DMA3 ,DMA channel 3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DMA2 ,DMA channel 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " DMA1 ,DMA channel 1 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FIFO ,FIFO Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " URST ,USB bus reset interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SOF ,SOF (start-of-frame) packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SSPND ,SUSPEND interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETINTF ,SET INTERFACE packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SETCFG ,SET CONFIGURATION packet interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "IS,UDFE Interrupt Status Register"
|
|
bitfld.long 0x04 27. " GBL_DMA ,Bit-wise logical OR of the DMA# fields (D26:14 in this register)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 25. " DMA12 ,DMA channel 12 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 24. " DMA11 ,DMA channel 11 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 23. " DMA10 ,DMA channel 10 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 22. " DMA9 ,DMA channel 9 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 21. " DMA8 ,DMA channel 8 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 20. " DMA7 ,DMA channel 7 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 19. " DMA6 ,DMA channel 6 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 18. " DMA5 ,DMA channel 5 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 17. " DMA4 ,DMA channel 4 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " DMA3 ,DMA channel 3 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 15. " DMA2 ,DMA channel 2 interrupt" "No intterupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 14. " DMA1 ,DMA channel 1 interrupt" "No intterupt,Interrupt"
|
|
bitfld.long 0x04 12. " FIFO ,Bit-wise logical OR of the enabled FIFO interrupt status fields in the FIFO Interrupt Status registers" "No intterupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 11. " URST ,Asserted when a USB reset is detected on the bus" "No reset,Reset"
|
|
eventfld.long 0x04 10. " SOF ,Asserted when a SOF (start-of-frame) packet is received" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 9. " SSPND ,SUSPEND" "Normal,Suspended"
|
|
eventfld.long 0x04 8. " SETINTF ,SET INTERFACE" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SETCFG ,SET CONFIGURATION" "Not received,Received"
|
|
line.long 0x08 "DCPCSR,UDFE USB Device Controller Programming Control/Status Register"
|
|
bitfld.long 0x08 2. " SETCSR ,CSR programming start" "Software can't start,Software can start"
|
|
bitfld.long 0x08 1. " DONECSR ,CSR programming done" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CSRPRG ,CSR dynamic programming support" "Disabled,Enabled"
|
|
tree.end
|
|
width 6.
|
|
base ad:(0x90900000+0x2000)
|
|
tree "USB Device controller registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DDSC,Device Descriptor/Setup Command Register"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PED0,Physical Endpoint Descriptor 0 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PED1,Physical Endpoint Descriptor 1 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PED2,Physical Endpoint Descriptor 2 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PED3,Physical Endpoint Descriptor 3 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PED4,Physical Endpoint Descriptor 4 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PED5,Physical Endpoint Descriptor 5 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PED6,Physical Endpoint Descriptor 6 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PED7,Physical Endpoint Descriptor 7 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PED8,Physical Endpoint Descriptor 8 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PED9,Physical Endpoint Descriptor 9 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PED10,Physical Endpoint Descriptor 10 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PED11,Physical Endpoint Descriptor 11 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MAXSIZE ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALT ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " IF ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CONFIG ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " TYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " DIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EP ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
tree.end
|
|
base ad:(0x90900000+0x3000)
|
|
tree "UDFE Endpoint FIFO Control registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IS0,FIFO Interrupt Status 0 Register"
|
|
eventfld.long 0x00 15. " ACK2 ,Endpoint 0 (CTRL-In) acknowledge status" "Not received,Received"
|
|
eventfld.long 0x00 14. " NAK2 ,Endpoint 0 (CTRL-In) negative acknowledge status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR2 ,Endpoint 0 (CTRL-In) error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK1 ,Endpoint 0 (CTRL-Out) acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NAK1 ,Endpoint 0 (CTRL-Out) negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR1 ,Endpoint 0 (CTRL-Out) error status" "No error,Error"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IS1,FIFO Interrupt Status 1 Register"
|
|
eventfld.long 0x00 31. " ACK6 ,Endpoint 4 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NAK6 ,Endpoint 4 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR6 ,Endpoint 4 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK5 ,Endpoint 3 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NAK5 ,Endpoint 3 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR5 ,Endpoint 3 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK4 ,Endpoint 2 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NAK4 ,Endpoint 2 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR4 ,Endpoint 2 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK3 ,Endpoint 1 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NAK3 ,Endpoint 1 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR3 ,Endpoint 1 error status" "No error,Error"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IS2,FIFO Interrupt Status 2 Register"
|
|
eventfld.long 0x00 31. " ACK10 ,Endpoint 8 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NAK10 ,Endpoint 8 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR10 ,Endpoint 8 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK9 ,Endpoint 7 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NAK9 ,Endpoint 7 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR9 ,Endpoint 7 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK8 ,Endpoint 6 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NAK8 ,Endpoint 6 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR8 ,Endpoint 6 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK7 ,Endpoint 5 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NAK7 ,Endpoint 5 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR7 ,Endpoint 5 error status" "No error,Error"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IS3,FIFO Interrupt Status 3 Register"
|
|
eventfld.long 0x00 15. " ACK12 ,Endpoint 10 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NAK12 ,Endpoint 10 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR12 ,Endpoint 10 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK11 ,Endpoint 9 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NAK11 ,Endpoint 9 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR11 ,Endpoint 9 error status" "No error,Error"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IE0,FIFO Interrupt Enable 0 Register"
|
|
bitfld.long 0x00 15. " ACK2 ,Generate an interrupt when ACK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NAK2 ,Generate an interrupt when NAK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR2 ,Generate an interrupt when ERROR2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK1 ,Generate an interrupt when ACK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NAK1 ,Generate an interrupt when NAK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR1 ,Generate an interrupt when ERROR1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IE1,FIFO Interrupt Enable 1 Register"
|
|
bitfld.long 0x00 31. " ACK6 ,Generate an interrupt when ACK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NAK6 ,Generate an interrupt when NAK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR6 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK5 ,Generate an interrupt when ACK5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NAK5 ,Generate an interrupt when NAK9 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR5 ,Generate an interrupt when ERROR5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK4 ,Generate an interrupt when ACK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NAK4 ,Generate an interrupt when NAK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR4 ,Generate an interrupt when ERROR4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK3 ,Generate an interrupt when ACK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NAK3 ,Generate an interrupt when NAK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR3 ,Generate an interrupt when ERROR3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IE2,FIFO Interrupt Enable 2 Register"
|
|
bitfld.long 0x00 31. " ACK10 ,Generate an interrupt when ACK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NAK10 ,Generate an interrupt when NAK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR10 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK9 ,Generate an interrupt when ACK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NAK9 ,Generate an interrupt when NAK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR9 ,Generate an interrupt when ERROR9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK8 ,Generate an interrupt when ACK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NAK8 ,Generate an interrupt when NAK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR8 ,Generate an interrupt when ERROR8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK7 ,Generate an interrupt when ACK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NAK7 ,Generate an interrupt when NAK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR7 ,Generate an interrupt when ERROR7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IE3,FIFO Interrupt Enable 3 Register"
|
|
bitfld.long 0x00 15. " ACK12 ,Generate an interrupt when ACK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NAK12 ,Generate an interrupt when NAK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR12 ,Generate an interrupt when ERROR12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK11 ,Generate an interrupt when ACK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NAK11 ,Generate an interrupt when NAK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR11 ,Generate an interrupt when ERROR11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
group.long 0x80++0x2F
|
|
line.long 0x0 "PC0,FIFO Packet Control 0 Register"
|
|
hexmask.long.word 0x0 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x0 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x4 "PC1,FIFO Packet Control 1 Register"
|
|
hexmask.long.word 0x4 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x4 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x8 "PC2,FIFO Packet Control 2 Register"
|
|
hexmask.long.word 0x8 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x8 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0xC "PC3,FIFO Packet Control 3 Register"
|
|
hexmask.long.word 0xC 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0xC 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x10 "PC4,FIFO Packet Control 4 Register"
|
|
hexmask.long.word 0x10 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x14 "PC5,FIFO Packet Control 5 Register"
|
|
hexmask.long.word 0x14 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x18 "PC6,FIFO Packet Control 6 Register"
|
|
hexmask.long.word 0x18 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x1C "PC7,FIFO Packet Control 7 Register"
|
|
hexmask.long.word 0x1C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x20 "PC8,FIFO Packet Control 8 Register"
|
|
hexmask.long.word 0x20 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x20 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x24 "PC9,FIFO Packet Control 9 Register"
|
|
hexmask.long.word 0x24 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x24 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x28 "PC10,FIFO Packet Control 10 Register"
|
|
hexmask.long.word 0x28 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x28 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x2C "PC11,FIFO Packet Control 11 Register"
|
|
hexmask.long.word 0x2C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x2C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SC0,FIFO Status and Control 0 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SC1,FIFO Status and Control 1 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SC2,FIFO Status and Control 2 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SC3,FIFO Status and Control 3 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SC4,FIFO Status and Control 4 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "SC5,FIFO Status and Control 5 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "SC6,FIFO Status and Control 6 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "SC7,FIFO Status and Control 7 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SC8,FIFO Status and Control 8 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SC9,FIFO Status and Control 9 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "SC10,FIFO Status and Control 10 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "SC11,FIFO Status and Control 11 Register"
|
|
eventfld.long 0x00 23. " STALL_SENT ,STALL_SENT" "Not send,Send"
|
|
bitfld.long 0x00 22. " SEND_STALL ,SEND_STALL" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
bitfld.long 0x00 11. " OVERFLOW ,Overflow status bit" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIMEOUT ,Timeout status bit" "No timeout,Timeout"
|
|
bitfld.long 0x00 0.--3. " TIMEOUT_CNT ,Timeout Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree.open "USB Controller Module"
|
|
base ad:0x90100000
|
|
sif (cpu()=="NS9750")
|
|
width 19.
|
|
tree "USB Global registers"
|
|
if ((data.long(ad:0x90100000+0x00)&0x00000001)==0x00000001)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GCS,Global Control and Status Register"
|
|
bitfld.long 0x00 12. " DISABLE(DSABL) " "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " HRST ,Host reset" "Enabled,In reset"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " DRST ,Device reset" "Enabled,In reset,?..."
|
|
bitfld.long 0x00 5. " SUSP ,Suspend" "Normal state,Suspended state"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WKUP ,Wakeup" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HSTDV ,Host/device (HST_DEV)" "Host mode,Device mode"
|
|
line.long 0x04 "DCS,Device Control and Status Register"
|
|
bitfld.long 0x04 31. " RESUME(RSME) ,Resume" "Ended,Initiated"
|
|
bitfld.long 0x04 29. " SPWR ,Self-powered" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SYNC ,SYNC_FRAME support" "Not supported,Supported"
|
|
hexmask.long.word 0x04 12.--22. 1. " FRAME ,Frame number"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " ALT ,Alternate value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " INTF ,Interface value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CFG ,Configuration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GCS,Global Control and Status Register"
|
|
bitfld.long 0x00 12. " DISABLE(DSABL) " "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " HRST ,Host reset" "Enabled,In reset"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " DRST ,Device reset" "Enabled,In reset,?..."
|
|
bitfld.long 0x00 5. " SUSP ,Suspend" "Normal state,Suspended state"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HSTDV ,Host/device (HST_DEV)" "Host mode,Device mode"
|
|
line.long 0x04 "DCS,Device Control and Status Register"
|
|
bitfld.long 0x04 31. " RESUME(RSME) ,Resume" "Ended,Initiated"
|
|
bitfld.long 0x04 29. " SPWR ,Self-powered" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SYNC ,SYNC_FRAME support" "Not supported,Supported"
|
|
hexmask.long.word 0x04 12.--22. 1. " FRAME ,Frame number"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " ALT ,Alternate value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " INTF ,Interface value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CFG ,Configuration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x0C++0x0B
|
|
line.long 0x00 "GIE,Global Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " GBL_EN ,Global interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " GBL_DMA ,Global DMA interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMA12 ,DMA channel 12 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DMA11 ,DMA channel 11 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DMA10 ,DMA channel 10 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " DMA9 ,DMA channel 9 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DMA8 ,DMA channel 8 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " DMA7 ,DMA channel 7 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMA6 ,DMA channel 6 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DMA5 ,DMA channel 5 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DMA4 ,DMA channel 4 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DMA3 ,DMA channel 3 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DMA2 ,DMA channel 2 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " DMA1 ,DMA channel 1 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FIFO ,FIFO Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " URST ,URST interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SOF ,SOF (start-of-frame) packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SUSPEND(SSPND) ,SUSPEND interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETINTF ,SETINF interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SETCFG ,SETCFG interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WAKEUP ,WAKEUP interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " OHCI_IRQ ,OHCI_IRQ interrput enable" "Disabled,Enabled"
|
|
line.long 0x04 "GIS,Global Interrupt Status Register"
|
|
bitfld.long 0x04 27. " GBL_DMA ,Bit-wise logical OR of the DMA# fields" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 25. " DMA12 ,DMA channel 12 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 24. " DMA11 ,DMA channel 11 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " DMA10 ,DMA channel 10 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 22. " DMA9 ,DMA channel 9 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " DMA8 ,DMA channel 8 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 20. " DMA7 ,DMA channel 7 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 19. " DMA6 ,DMA channel 6 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 18. " DMA5 ,DMA channel 5 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " DMA4 ,DMA channel 4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " DMA3 ,DMA channel 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " DMA2 ,DMA channel 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 14. " DMA1 ,DMA channel 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " FIFO ,Bit-wise logical OR of the enabled FIFO interrupt status fields in the FIFO Interrupt Status registers" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 11. " URST ,Asserted when the NS9750B-A1 is in device mode and receives an interrupt from the host" "No reset,Reset"
|
|
eventfld.long 0x04 10. " SOF ,Asserted when a SOF (start-of-frame) packet is received" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 9. " SUSPEND SSPND ,Suspend" "Normal state,Suspend state"
|
|
eventfld.long 0x04 8. " SETINTF ,Set interface" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SETCFG ,Set configuration" "Not received,Received"
|
|
eventfld.long 0x00 6. " WAKEUP ,Wakeup" "No wakeup,Wakuep"
|
|
textline " "
|
|
eventfld.long 0x00 1. " OHCI_IRQ ,OHCI_IRQ" "No interrupt,Interrupt"
|
|
line.long 0x08 "DIPPCS,Device IP Programming Control/Status register"
|
|
bitfld.long 0x08 2. " SETCSR ,CSR programming start" "Software can't start,Software can start"
|
|
bitfld.long 0x08 1. " DONECSR ,CSR programming done" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CSRPRG ,CSR dynamic programming support" "Disabled,Enabled"
|
|
tree.end
|
|
width 20.
|
|
base ad:(0x90100000+0x1000)
|
|
tree "USB host block registers"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "HcRevision,HCRevision Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Version of the OHCI specification being used"
|
|
group.long 0x04++0x17
|
|
line.long 0x00 "HcControl,HcControl Register"
|
|
bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IR ,Interrupt Routing" "Bus interrupt mechanism,System management interrupt"
|
|
bitfld.long 0x00 6.--7. " HCFS ,HostControllerFunctionalState" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio (Control/Bulk)" "1 : 1,2 : 1,3 : 1,4 : 1"
|
|
line.long 0x04 "HcCommandStatus,Hc Command Status Register"
|
|
bitfld.long 0x04 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
|
|
bitfld.long 0x04 3. " OCR ,Ownership Change Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 2. " BLF ,Bulk List Filled" "Not filled,Filled"
|
|
bitfld.long 0x04 1. " CLF ,Control List Filled" "Not filled,Filled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " HCR ,Host Controller Reset" "No reset,Reset"
|
|
line.long 0x08 "HcInterruptStatus,Hc Interrupt Status Register"
|
|
eventfld.long 0x08 30. " OC ,OwnershipChange" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 6. " RHSC ,RootHubStatusChange" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 5. " FNO ,FrameNumberOverflow" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 4. " UE ,UnrecoverableError" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 3. " RD ,ResumeDetected" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 2. " SF ,StartofFrame" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 1. " WDH ,WritebackDoneHead" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " SO ,SchedulingOverrun" "No interrupt,Interrupt"
|
|
line.long 0x0C "HcInterruptEnable,HcInterruptEnable Register"
|
|
bitfld.long 0x0C 31. " MIE ,Master Interrupt Enable" "Ignore,Enabled"
|
|
bitfld.long 0x0C 30. " OC ,Ownership change" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " RHSC ,Root hub status change" "Ignore,Enabled"
|
|
bitfld.long 0x0C 5. " FNO ,Frame number overflow" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " UE ,Unrecoverable error" "Inore,Enabled"
|
|
bitfld.long 0x0C 3. " RD ,Resume detect" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " SF ,Start of frame" "Ignore,Enabled"
|
|
bitfld.long 0x0C 1. " WDH ,HcDoneHead writeback" "Ignore,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " SO ,Scheduling overrun" "Ignore,Enabled"
|
|
line.long 0x10 "HcInterruptDisable,HcInterruptDisable Register"
|
|
bitfld.long 0x10 31. " MIE ,Master Interrupt Disable" "Ignore,Disabled"
|
|
bitfld.long 0x10 30. " OC ,Ownership change" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 6. " RHSC ,Root hub status change" "Ignore,Disabled"
|
|
bitfld.long 0x10 5. " FNO ,Frame number overflow" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " UE ,Unrecoverable error" "Inore,Disabled"
|
|
bitfld.long 0x10 3. " RD ,Resume detect" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " SF ,Start of frame" "Ignore,Disabled"
|
|
bitfld.long 0x10 1. " WDH ,HcDoneHead writeback" "Ignore,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " SO ,Scheduling overrun" "Ignore,Disabled"
|
|
line.long 0x14 "HcHCCA,HcHCCA Register"
|
|
hexmask.long.tbyte 0x14 8.--31. 1. " HCCA ,Base address of the Host controller communication area"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "HcPeriodCurrentED,HcPeriodCurrentED Register"
|
|
hexmask.long 0x00 4.--31. 1. " PCED ,PeriodCurrentED"
|
|
group.long 0x20++0x17
|
|
line.long 0x00 "HcControlHeadED,HcControlHeadED Register"
|
|
hexmask.long 0x00 4.--31. 1. " CHED ,ControlHeadED"
|
|
line.long 0x04 "HcControlCurrentED,HcControlCurrentED Register"
|
|
hexmask.long 0x04 4.--31. 1. " CCED ,ControlCurrentED"
|
|
line.long 0x08 "HcBulkHeadED,HcBulkHeadED Register"
|
|
hexmask.long 0x08 4.--31. 1. " BHED ,BulkHeadED"
|
|
line.long 0x0C "HcBulkCurrentED,HcBulkCurrentED Register"
|
|
hexmask.long 0x0C 4.--31. 1. " BCED ,BulkCurrentED"
|
|
line.long 0x10 "HcDoneHead,HcDoneHead Register"
|
|
hexmask.long 0x10 4.--31. 1. " DH ,DoneHead"
|
|
line.long 0x14 "HcFmInterval,HcFmInterval Register"
|
|
bitfld.long 0x14 31. " FIT ,FrameIntervalToggle" "Low,High"
|
|
hexmask.long.word 0x14 16.--30. 1. " FSMPS ,FSLargestDataPacket"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--13. 1. " FI ,FrameInterval"
|
|
rgroup.long 0x38++0x07
|
|
line.long 0x00 "HcFmRemaining,HcFmRemaining Register"
|
|
bitfld.long 0x00 31. " FRT ,FrameRemainingToggle" "Low,High"
|
|
hexmask.long.word 0x00 0.--13. 1. " FR ,FrameRemaining counter"
|
|
line.long 0x04 "HcFmNumber,HcFmNumberRegister"
|
|
hexmask.long.word 0x04 0.--15. 1. " FN ,FrameNumber"
|
|
group.long 0x40++0x7
|
|
line.long 0x00 "HcPeriodicStart,HcPeriodicStart Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " PS ,PeriodicStart"
|
|
line.long 0x04 "HcLSThreshold,HcLSThreshold Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " LST ,LSThreshold"
|
|
tree.end
|
|
tree "Root hub partition registers"
|
|
if (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x0)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port basis"
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
elif (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x1000)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port"
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
elif (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x100)
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
else
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
|
|
bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
|
|
bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
|
|
endif
|
|
if (((d.l(ad:(0x90100000+0x1000+0x48)))&0x200)==0x200)
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
|
|
bitfld.long 0x00 31. " PPCM[15] ,PortPowerControlMask[15]" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " PPCM[14] ,PortPowerControlMask[14]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PPCM[13] ,PortPowerControlMask[13]" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " PPCM[12] ,PortPowerControlMask[12]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PPCM[11] ,PortPowerControlMask[11]" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " PPCM[10] ,PortPowerControlMask[10]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPCM[9] ,PortPowerControlMask[9]" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " PPCM[8] ,PortPowerControlMask[8]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PPCM[7] ,PortPowerControlMask[7]" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " PPCM[6] ,PortPowerControlMask[6]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PPCM[5] ,PortPowerControlMask[5]" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " PPCM[4] ,PortPowerControlMask[4]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPCM[3] ,PortPowerControlMask[3]" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " PPCM[2] ,PortPowerControlMask[2]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PPCM[1] ,PortPowerControlMask[1]" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
|
|
bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
|
|
bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
|
|
bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
|
|
bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
|
|
bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
|
|
bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
|
bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
|
else
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
|
|
bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
|
|
bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
|
|
bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
|
|
bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
|
|
bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
|
bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
|
|
bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
|
bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
|
endif
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "HcRhStatus,HcRhStatusRegister"
|
|
bitfld.long 0x00 31. " CRWE ,ClearRemoteWakeupEnable" "No effect,Clear"
|
|
eventfld.long 0x00 17. " CCIC ,OverCurrentIndicatorChange" "No effect,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LPSC ,LocalPowerStatusChange/SetGlobalPower(write)" "0/No effect,Reserved/On all ports"
|
|
bitfld.long 0x00 15. " DRWE ,DeviceRemoteWakeupEnable(read)/SetRemoteWakeupEnable(write)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OCI ,OverCurrentIndicator" "Normal,Overcurrent"
|
|
bitfld.long 0x00 0. " LPS ,LocalPowerStatus(read)/ClearGlobalPower(write)" "0/No effect,Reserved/Off all ports"
|
|
width 20.
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "HcRhPortStatus[1],Hc Rh Port Status [1] Register"
|
|
eventfld.long 0x00 20. " PRSC ,PortResetStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 19. " OCIC ,PortOverCurrentIndicatorChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PSSC ,PortSuspendStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 17. " PESC ,PortEnableStatusChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CSC ,ConnectStatusChange" "Not changed,Changed"
|
|
bitfld.long 0x00 9. " LSDA ,LowSpeedDeviceAttached(read)/ClearPortPower(write)" "Full/No effect,Low/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PPS ,PortPowerStatus(read)/SetPortPower(write)" "Off/No effect,On/Set"
|
|
bitfld.long 0x00 4. " PRS ,PortResetStatus(read)/SetPortReset(write)" "Not active/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " POCI ,PortOverCurrentIndicator(read)/ClearSuspendStatus(write)" "Not detected/No effect,Detected/Clear"
|
|
bitfld.long 0x00 2. " PSS ,PortSuspendStatus(read)/SetPortSuspend(write)" "Not suspended/No effect,Suspended/Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PES ,PortEnableStatus(read)/SetPortEnable(write)" "Disabled/No effect,Enabled"
|
|
bitfld.long 0x00 0. " CCS ,CurrentConnectStatus(read)/ClearPortEnable(write)" "Not connected/No effect,Connected/Clear"
|
|
tree.end
|
|
base ad:(0x90100000+0x2000)
|
|
tree "USB Device Block registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DDSC,Device Descriptor/Setup Command Register"
|
|
if ((data.long(ad:0x90100000+0x14)&0x00000001)==0x00000001)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PED0,Physical Endpoint Descriptor 0 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PED1,Physical Endpoint Descriptor 1 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PED2,Physical Endpoint Descriptor 2 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PED3,Physical Endpoint Descriptor 3 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PED4,Physical Endpoint Descriptor 4 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PED5,Physical Endpoint Descriptor 5 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PED6,Physical Endpoint Descriptor 6 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PED7,Physical Endpoint Descriptor 7 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PED8,Physical Endpoint Descriptor 8 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PED9,Physical Endpoint Descriptor 9 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PED10,Physical Endpoint Descriptor 10 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PED0,Physical Endpoint Descriptor 0 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PED1,Physical Endpoint Descriptor 1 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PED2,Physical Endpoint Descriptor 2 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PED3,Physical Endpoint Descriptor 3 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PED4,Physical Endpoint Descriptor 4 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PED5,Physical Endpoint Descriptor 5 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PED6,Physical Endpoint Descriptor 6 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PED7,Physical Endpoint Descriptor 7 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PED8,Physical Endpoint Descriptor 8 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PED9,Physical Endpoint Descriptor 9 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PED10,Physical Endpoint Descriptor 10 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,?..."
|
|
endif
|
|
tree.end
|
|
base ad:(0x90100000+0x3000)
|
|
tree "USB Device Endpoint FIFO Control and Data registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IS0,FIFO Interrupt Status 0 Register"
|
|
eventfld.long 0x00 15. " ACK2 ,Endpoint 0 (CTRL-In) acknowledge status" "Not received,Received"
|
|
eventfld.long 0x00 14. " NACK2 ,Endpoint 0 (CTRL-In) negative acknowledge status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR2 ,Endpoint 0 (CTRL-In) error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK1 ,Endpoint 0 (CTRL-Out) acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK1 ,Endpoint 0 (CTRL-Out) negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR1 ,Endpoint 0 (CTRL-Out) error status" "No error,Error"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IS1,FIFO Interrupt Status 1 Register"
|
|
eventfld.long 0x00 31. " ACK6 ,Endpoint 4 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NACK6 ,Endpoint 4 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR6 ,Endpoint 4 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK5 ,Endpoint 3 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NACK5 ,Endpoint 3 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR5 ,Endpoint 3 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK4 ,Endpoint 2 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK4 ,Endpoint 2 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR4 ,Endpoint 2 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK3 ,Endpoint 1 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK3 ,Endpoint 1 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR3 ,Endpoint 1 error status" "No error,Error"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IS2,FIFO Interrupt Status 2 Register"
|
|
eventfld.long 0x00 31. " ACK10 ,Endpoint 8 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NACK10 ,Endpoint 8 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR10 ,Endpoint 8 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK9 ,Endpoint 7 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NACK9 ,Endpoint 7 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR9 ,Endpoint 7 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK8 ,Endpoint 6 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK8 ,Endpoint 6 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR8 ,Endpoint 6 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK7 ,Endpoint 5 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK7 ,Endpoint 5 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR7 ,Endpoint 5 error status" "No error,Error"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IS3,FIFO Interrupt Status 3 Register"
|
|
eventfld.long 0x00 15. " ACK12 ,Endpoint 10 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK12 ,Endpoint 10 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR12 ,Endpoint 10 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK11 ,Endpoint 9 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK11 ,Endpoint 9 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR11 ,Endpoint 9 error status" "No error,Error"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IE0,FIFO Interrupt Enable 0 Register"
|
|
bitfld.long 0x00 15. " ACK2 ,Generate an interrupt when ACK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK2 ,Generate an interrupt when NACK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR2 ,Generate an interrupt when ERROR2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK1 ,Generate an interrupt when ACK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK1 ,Generate an interrupt when NACK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR1 ,Generate an interrupt when ERROR1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IE1,FIFO Interrupt Enable 1 Register"
|
|
bitfld.long 0x00 31. " ACK6 ,Generate an interrupt when ACK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NACK6 ,Generate an interrupt when NACK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR6 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK5 ,Generate an interrupt when ACK5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NACK5 ,Generate an interrupt when NACK9 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR5 ,Generate an interrupt when ERROR5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK4 ,Generate an interrupt when ACK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK4 ,Generate an interrupt when NACK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR4 ,Generate an interrupt when ERROR4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK3 ,Generate an interrupt when ACK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK3 ,Generate an interrupt when NACK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR3 ,Generate an interrupt when ERROR3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IE2,FIFO Interrupt Enable 2 Register"
|
|
bitfld.long 0x00 31. " ACK10 ,Generate an interrupt when ACK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NACK10 ,Generate an interrupt when NACK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR10 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK9 ,Generate an interrupt when ACK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NACK9 ,Generate an interrupt when NACK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR9 ,Generate an interrupt when ERROR9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK8 ,Generate an interrupt when ACK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK8 ,Generate an interrupt when NACK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR8 ,Generate an interrupt when ERROR8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK7 ,Generate an interrupt when ACK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK7 ,Generate an interrupt when NACK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR7 ,Generate an interrupt when ERROR7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IE3,FIFO Interrupt Enable 3 Register"
|
|
bitfld.long 0x00 15. " ACK12 ,Generate an interrupt when ACK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK12 ,Generate an interrupt when NACK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR12 ,Generate an interrupt when ERROR12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK11 ,Generate an interrupt when ACK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK11 ,Generate an interrupt when NACK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR11 ,Generate an interrupt when ERROR11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
group.long 0x80++0x2F
|
|
line.long 0x0 "PC0,FIFO Packet Control 0 Register"
|
|
hexmask.long.word 0x0 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x0 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x4 "PC1,FIFO Packet Control 1 Register"
|
|
hexmask.long.word 0x4 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x4 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x8 "PC2,FIFO Packet Control 2 Register"
|
|
hexmask.long.word 0x8 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x8 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0xC "PC3,FIFO Packet Control 3 Register"
|
|
hexmask.long.word 0xC 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0xC 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x10 "PC4,FIFO Packet Control 4 Register"
|
|
hexmask.long.word 0x10 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x14 "PC5,FIFO Packet Control 5 Register"
|
|
hexmask.long.word 0x14 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x18 "PC6,FIFO Packet Control 6 Register"
|
|
hexmask.long.word 0x18 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x1C "PC7,FIFO Packet Control 7 Register"
|
|
hexmask.long.word 0x1C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x20 "PC8,FIFO Packet Control 8 Register"
|
|
hexmask.long.word 0x20 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x20 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x24 "PC9,FIFO Packet Control 9 Register"
|
|
hexmask.long.word 0x24 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x24 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x28 "PC10,FIFO Packet Control 10 Register"
|
|
hexmask.long.word 0x28 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x28 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x2C "PC11,FIFO Packet Control 11 Register"
|
|
hexmask.long.word 0x2C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x2C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SC0,FIFO Status and Control 0 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SC1,FIFO Status and Control 1 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SC2,FIFO Status and Control 2 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SC3,FIFO Status and Control 3 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SC4,FIFO Status and Control 4 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "SC5,FIFO Status and Control 5 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "SC6,FIFO Status and Control 6 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "SC7,FIFO Status and Control 7 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SC8,FIFO Status and Control 8 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SC9,FIFO Status and Control 9 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "SC10,FIFO Status and Control 10 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "SC11,FIFO Status and Control 11 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
tree.end
|
|
width 0xB
|
|
elif (cpu()=="NS9775")
|
|
width 19.
|
|
tree "USB Global registers"
|
|
if ((data.long(ad:0x90100000+0x00)&0x00000001)==0x00000001)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GCS,Global Control and Status Register"
|
|
bitfld.long 0x00 12. " DISABLE(DSABL) ,Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " HRST ,Host reset" "Enabled,In reset"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " DRST ,Device reset" "Enabled,In reset,?..."
|
|
bitfld.long 0x00 5. " SUSP ,Suspend" "Normal state,Suspended state"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WKUP ,Wakeup" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HSTDV ,Host/device (HST_DEV)" "Host mode,Device mode"
|
|
line.long 0x04 "DCS,Device Control and Status Register"
|
|
bitfld.long 0x04 31. " RESUME(RSME) ,Resume" "Ended,Initiated"
|
|
bitfld.long 0x04 29. " SPWR ,Self-powered" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SYNC ,SYNC_FRAME support" "Not supported,Supported"
|
|
hexmask.long.word 0x04 12.--22. 1. " FRAME ,Frame number"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " ALT ,Alternate value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " INTF ,Interface value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CFG ,Configuration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GCS,Global Control and Status Register"
|
|
bitfld.long 0x00 12. " DISABLE(DSABL) ,Disable" "USB is enabled,USB is disabled"
|
|
bitfld.long 0x00 11. " HRST ,Host reset" "Enabled,In reset"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " DRST ,Device reset" "Enabled,In reset,?..."
|
|
bitfld.long 0x00 5. " SUSP ,Suspend" "Normal state,Suspended state"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HSTDV ,Host/device (HST_DEV)" "Host mode,Device mode"
|
|
line.long 0x04 "DCS,Device Control and Status Register"
|
|
bitfld.long 0x04 31. " RESUME(RSME) ,Resume" "Ended,Initiated"
|
|
bitfld.long 0x04 29. " SPWR ,Self-powered" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SYNC ,SYNC_FRAME support" "Not supported,Supported"
|
|
hexmask.long.word 0x04 12.--22. 1. " FRAME ,Frame number"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " ALT ,Alternate value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " INTF ,Interface value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CFG ,Configuration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x0C++0x0B
|
|
line.long 0x00 "GIE,Global Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " GBL_EN ,Global interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " GBL_DMA ,Global DMA interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " DMA13 ,DMA channel 13 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " DMA12 ,DMA channel 12 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DMA11 ,DMA channel 11 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " DMA10 ,DMA channel 10 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMA9 ,DMA channel 9 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " DMA8 ,DMA channel 8 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DMA7 ,DMA channel 7 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " DMA6 ,DMA channel 6 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DMA5 ,DMA channel 5 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DMA4 ,DMA channel 4 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMA3 ,DMA channel 3 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DMA2 ,DMA channel 2 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMA1 ,DMA channel 1 interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " FIFO ,FIFO Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " URST ,URST interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SOF ,SOF (start-of-frame) packet interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SUSPEND(SSPND) ,SUSPEND interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SETINTF ,SETINF interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SETCFG ,SETCFG interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAKEUP ,WAKEUP interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OHCI_IRQ ,OHCI_IRQ interrput enable" "Disabled,Enabled"
|
|
line.long 0x04 "GIS,Global Interrupt Status Register"
|
|
bitfld.long 0x04 27. " GBL_DMA ,Bit-wise logical OR of the DMA# fields" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " DMA13 ,DMA channel 13 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " DMA12 ,DMA channel 12 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " DMA11 ,DMA channel 11 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DMA10 ,DMA channel 10 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " DMA9 ,DMA channel 9 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DMA8 ,DMA channel 8 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " DMA7 ,DMA channel 7 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DMA6 ,DMA channel 6 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " DMA5 ,DMA channel 5 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " DMA4 ,DMA channel 4 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " DMA3 ,DMA channel 3 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DMA2 ,DMA channel 2 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " DMA1 ,DMA channel 1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 12. " FIFO ,Bit-wise logical OR of the enabled FIFO interrupt status fields in the FIFO Interrupt Status registers" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 11. " URST ,Asserted when the NS9750B-A1 is in device mode and receives an interrupt from the host" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x04 10. " SOF ,Asserted when a SOF (start-of-frame) packet is received" "Not received,Received"
|
|
eventfld.long 0x04 9. " SUSPEND(SSPND) ,Suspend" "Normal state,Suspend state"
|
|
textline " "
|
|
eventfld.long 0x04 8. " SETINTF ,Set interface" "Not received,Received"
|
|
eventfld.long 0x04 7. " SETCFG ,Set configuration" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 6. " WAKEUP ,Wakeup" "No wakeup,Wakuep"
|
|
eventfld.long 0x00 1. " OHCI_IRQ ,OHCI_IRQ" "No interrupt,Interrupt"
|
|
line.long 0x08 "DIPPCS,Device IP Programming Control/Status register"
|
|
bitfld.long 0x08 2. " SETCSR ,CSR programming start" "Software can't start,Software can start"
|
|
bitfld.long 0x08 1. " DONECSR ,CSR programming done" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CSRPRG ,CSR dynamic programming support" "Disabled,Enabled"
|
|
tree.end
|
|
width 20.
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base ad:(0x90100000+0x1000)
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tree "USB host block registers"
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rgroup.long 0x00++0x03
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line.long 0x00 "HcRevision,HCRevision Register"
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hexmask.long.byte 0x00 0.--7. 1. " REV ,Version of the OHCI specification being used"
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group.long 0x04++0x17
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line.long 0x00 "HcControl,HcControl Register"
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bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
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bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 8. " IR ,Interrupt Routing" "Bus interrupt mechanism,System management interrupt"
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bitfld.long 0x00 6.--7. " HCFS ,HostControllerFunctionalState" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND"
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textline " "
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bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
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bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio (Control/Bulk)" "1 : 1,2 : 1,3 : 1,4 : 1"
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line.long 0x04 "HcCommandStatus,Hc Command Status Register"
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bitfld.long 0x04 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
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bitfld.long 0x04 3. " OCR ,Ownership Change Request" "Not requested,Requested"
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textline " "
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bitfld.long 0x04 2. " BLF ,Bulk List Filled" "Not filled,Filled"
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bitfld.long 0x04 1. " CLF ,Control List Filled" "Not filled,Filled"
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textline " "
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bitfld.long 0x04 0. " HCR ,Host Controller Reset" "No reset,Reset"
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line.long 0x08 "HcInterruptStatus,Hc Interrupt Status Register"
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eventfld.long 0x08 30. " OC ,OwnershipChange" "No interrupt,Interrupt"
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eventfld.long 0x08 6. " RHSC ,RootHubStatusChange" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 5. " FNO ,FrameNumberOverflow" "No interrupt,Interrupt"
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eventfld.long 0x08 4. " UE ,UnrecoverableError" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 3. " RD ,ResumeDetected" "No interrupt,Interrupt"
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eventfld.long 0x08 2. " SF ,StartofFrame" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 1. " WDH ,WritebackDoneHead" "No interrupt,Interrupt"
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eventfld.long 0x08 0. " SO ,SchedulingOverrun" "No interrupt,Interrupt"
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line.long 0x0C "HcInterruptEnable,HcInterruptEnable Register"
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bitfld.long 0x0C 31. " MIE ,Master Interrupt Enable" "Ignore,Enabled"
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bitfld.long 0x0C 30. " OC ,Ownership change" "Ignore,Enabled"
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textline " "
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bitfld.long 0x0C 6. " RHSC ,Root hub status change" "Ignore,Enabled"
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bitfld.long 0x0C 5. " FNO ,Frame number overflow" "Ignore,Enabled"
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textline " "
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bitfld.long 0x0C 4. " UE ,Unrecoverable error" "Inore,Enabled"
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bitfld.long 0x0C 3. " RD ,Resume detect" "Ignore,Enabled"
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textline " "
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bitfld.long 0x0C 2. " SF ,Start of frame" "Ignore,Enabled"
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bitfld.long 0x0C 1. " WDH ,HcDoneHead writeback" "Ignore,Enabled"
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textline " "
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bitfld.long 0x0C 0. " SO ,Scheduling overrun" "Ignore,Enabled"
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line.long 0x10 "HcInterruptDisable,HcInterruptDisable Register"
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bitfld.long 0x10 31. " MIE ,Master Interrupt Disable" "Ignore,Disabled"
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bitfld.long 0x10 30. " OC ,Ownership change" "Ignore,Disabled"
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textline " "
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bitfld.long 0x10 6. " RHSC ,Root hub status change" "Ignore,Disabled"
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bitfld.long 0x10 5. " FNO ,Frame number overflow" "Ignore,Disabled"
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textline " "
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bitfld.long 0x10 4. " UE ,Unrecoverable error" "Inore,Disabled"
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bitfld.long 0x10 3. " RD ,Resume detect" "Ignore,Disabled"
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textline " "
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bitfld.long 0x10 2. " SF ,Start of frame" "Ignore,Disabled"
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bitfld.long 0x10 1. " WDH ,HcDoneHead writeback" "Ignore,Disabled"
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textline " "
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bitfld.long 0x10 0. " SO ,Scheduling overrun" "Ignore,Disabled"
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line.long 0x14 "HcHCCA,HcHCCA Register"
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hexmask.long.tbyte 0x14 8.--31. 1. " HCCA ,Base address of the Host controller communication area"
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rgroup.long 0x1C++0x03
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line.long 0x00 "HcPeriodCurrentED,HcPeriodCurrentED Register"
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hexmask.long 0x00 4.--31. 1. " PCED ,PeriodCurrentED"
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group.long 0x20++0x17
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line.long 0x00 "HcControlHeadED,HcControlHeadED Register"
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hexmask.long 0x00 4.--31. 1. " CHED ,ControlHeadED"
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line.long 0x04 "HcControlCurrentED,HcControlCurrentED Register"
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hexmask.long 0x04 4.--31. 1. " CCED ,ControlCurrentED"
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line.long 0x08 "HcBulkHeadED,HcBulkHeadED Register"
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hexmask.long 0x08 4.--31. 1. " BHED ,BulkHeadED"
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line.long 0x0C "HcBulkCurrentED,HcBulkCurrentED Register"
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hexmask.long 0x0C 4.--31. 1. " BCED ,BulkCurrentED"
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line.long 0x10 "HcDoneHead,HcDoneHead Register"
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hexmask.long 0x10 4.--31. 1. " DH ,DoneHead"
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line.long 0x14 "HcFmInterval,HcFmInterval Register"
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bitfld.long 0x14 31. " FIT ,FrameIntervalToggle" "Low,High"
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hexmask.long.word 0x14 16.--30. 1. " FSMPS ,FSLargestDataPacket"
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textline " "
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hexmask.long.word 0x14 0.--13. 1. " FI ,FrameInterval"
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rgroup.long 0x38++0x07
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line.long 0x00 "HcFmRemaining,HcFmRemaining Register"
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bitfld.long 0x00 31. " FRT ,FrameRemainingToggle" "Low,High"
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hexmask.long.word 0x00 0.--13. 1. " FR ,FrameRemaining counter"
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line.long 0x04 "HcFmNumber,HcFmNumberRegister"
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hexmask.long.word 0x04 0.--15. 1. " FN ,FrameNumber"
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group.long 0x40++0x7
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line.long 0x00 "HcPeriodicStart,HcPeriodicStart Register"
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hexmask.long.word 0x00 0.--13. 1. " PS ,PeriodicStart"
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line.long 0x04 "HcLSThreshold,HcLSThreshold Register"
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hexmask.long.word 0x04 0.--11. 1. " LST ,LSThreshold"
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tree.end
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tree "Root hub partition registers"
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if (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x0)
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group.long 0x48++0x3
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line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
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hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
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bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
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textline " "
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bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port basis"
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bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
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textline " "
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bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
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bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
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elif (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x1000)
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group.long 0x48++0x3
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line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
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hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
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bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
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textline " "
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bitfld.long 0x00 11. " OCPM ,OverCurrentProtectionMode" "All protected,Per-port"
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bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
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textline " "
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bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
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hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
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elif (((d.l(ad:(0x90100000+0x1000+0x48)))&0x1100)==0x100)
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group.long 0x48++0x3
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line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
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hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
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bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
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textline " "
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bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
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bitfld.long 0x00 9. " PSM ,PowerSwitchingMode" "Same time,Individually"
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textline " "
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bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
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hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
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else
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group.long 0x48++0x3
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line.long 0x00 "HcRhDescriptorA,Hc Rh Descriptor A Register"
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hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,PowerOnToPowerGoodTime"
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bitfld.long 0x00 12. " NOCP ,NoOverCurrentProtection" "Protected,Not protected"
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textline " "
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bitfld.long 0x00 10. " DT ,Device Type" "No device,Device"
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bitfld.long 0x00 8. " NPS ,NoPowerSwitching" "Switched,Not switched"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " NDP ,NumberDownstreamPorts"
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endif
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if (((d.l(ad:(0x90100000+0x1000+0x48)))&0x200)==0x200)
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group.long 0x4c++0x3
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line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
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bitfld.long 0x00 31. " PPCM[15] ,PortPowerControlMask[15]" "Not masked,Masked"
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bitfld.long 0x00 30. " PPCM[14] ,PortPowerControlMask[14]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 29. " PPCM[13] ,PortPowerControlMask[13]" "Not masked,Masked"
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bitfld.long 0x00 28. " PPCM[12] ,PortPowerControlMask[12]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 27. " PPCM[11] ,PortPowerControlMask[11]" "Not masked,Masked"
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bitfld.long 0x00 26. " PPCM[10] ,PortPowerControlMask[10]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 25. " PPCM[9] ,PortPowerControlMask[9]" "Not masked,Masked"
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bitfld.long 0x00 24. " PPCM[8] ,PortPowerControlMask[8]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 23. " PPCM[7] ,PortPowerControlMask[7]" "Not masked,Masked"
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bitfld.long 0x00 22. " PPCM[6] ,PortPowerControlMask[6]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 21. " PPCM[5] ,PortPowerControlMask[5]" "Not masked,Masked"
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bitfld.long 0x00 20. " PPCM[4] ,PortPowerControlMask[4]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 19. " PPCM[3] ,PortPowerControlMask[3]" "Not masked,Masked"
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bitfld.long 0x00 18. " PPCM[2] ,PortPowerControlMask[2]" "Not masked,Masked"
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textline " "
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bitfld.long 0x00 17. " PPCM[1] ,PortPowerControlMask[1]" "Not masked,Masked"
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bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
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textline " "
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bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
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bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
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textline " "
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bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
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bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
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textline " "
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bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
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bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
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textline " "
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bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
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bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
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textline " "
|
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bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
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bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
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textline " "
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bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
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bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
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textline " "
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bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
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bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
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else
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group.long 0x4c++0x3
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line.long 0x00 "HcRhDescriptorB,Hc Rh Descriptor B Register"
|
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bitfld.long 0x00 15. " DR[15] ,DeviceRemovable[15]" "Removable,Not removable"
|
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bitfld.long 0x00 14. " DR[14] ,DeviceRemovable[14]" "Removable,Not removable"
|
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textline " "
|
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bitfld.long 0x00 13. " DR[13] ,DeviceRemovable[13]" "Removable,Not removable"
|
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bitfld.long 0x00 12. " DR[12] ,DeviceRemovable[12]" "Removable,Not removable"
|
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textline " "
|
|
bitfld.long 0x00 11. " DR[11] ,DeviceRemovable[11]" "Removable,Not removable"
|
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bitfld.long 0x00 10. " DR[10] ,DeviceRemovable[10]" "Removable,Not removable"
|
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textline " "
|
|
bitfld.long 0x00 9. " DR[9] ,DeviceRemovable[9]" "Removable,Not removable"
|
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bitfld.long 0x00 8. " DR[8] ,DeviceRemovable[8]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DR[7] ,DeviceRemovable[7]" "Removable,Not removable"
|
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bitfld.long 0x00 6. " DR[6] ,DeviceRemovable[6]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DR[5] ,DeviceRemovable[5]" "Removable,Not removable"
|
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bitfld.long 0x00 4. " DR[4] ,DeviceRemovable[4]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DR[3] ,DeviceRemovable[3]" "Removable,Not removable"
|
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bitfld.long 0x00 2. " DR[2] ,DeviceRemovable[2]" "Removable,Not removable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DR[1] ,DeviceRemovable[1]" "Removable,Not removable"
|
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endif
|
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group.long 0x50++0x3
|
|
line.long 0x00 "HcRhStatus,HcRhStatusRegister"
|
|
bitfld.long 0x00 31. " CRWE ,ClearRemoteWakeupEnable" "No effect,Clear"
|
|
eventfld.long 0x00 17. " CCIC ,OverCurrentIndicatorChange" "No effect,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LPSC ,LocalPowerStatusChange/SetGlobalPower(write)" "0/No effect,Reserved/On all ports"
|
|
bitfld.long 0x00 15. " DRWE ,DeviceRemoteWakeupEnable(read)/SetRemoteWakeupEnable(write)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OCI ,OverCurrentIndicator" "Normal,Overcurrent"
|
|
bitfld.long 0x00 0. " LPS ,LocalPowerStatus(read)/ClearGlobalPower(write)" "0/No effect,Reserved/Off all ports"
|
|
width 20.
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "HcRhPortStatus[1],Hc Rh Port Status [1] Register"
|
|
eventfld.long 0x00 20. " PRSC ,PortResetStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 19. " OCIC ,PortOverCurrentIndicatorChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PSSC ,PortSuspendStatusChange" "Not completed,Completed"
|
|
eventfld.long 0x00 17. " PESC ,PortEnableStatusChange" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CSC ,ConnectStatusChange" "Not changed,Changed"
|
|
bitfld.long 0x00 9. " LSDA ,LowSpeedDeviceAttached(read)/ClearPortPower(write)" "Full/No effect,Low/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PPS ,PortPowerStatus(read)/SetPortPower(write)" "Off/No effect,On/Set"
|
|
bitfld.long 0x00 4. " PRS ,PortResetStatus(read)/SetPortReset(write)" "Not active/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " POCI ,PortOverCurrentIndicator(read)/ClearSuspendStatus(write)" "Not detected/No effect,Detected/Clear"
|
|
bitfld.long 0x00 2. " PSS ,PortSuspendStatus(read)/SetPortSuspend(write)" "Not suspended/No effect,Suspended/Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PES ,PortEnableStatus(read)/SetPortEnable(write)" "Disabled/No effect,Enabled"
|
|
bitfld.long 0x00 0. " CCS ,CurrentConnectStatus(read)/ClearPortEnable(write)" "Not connected/No effect,Connected/Clear"
|
|
tree.end
|
|
base ad:(0x90100000+0x2000)
|
|
tree "USB Device Block registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DDSC,Device Descriptor/Setup Command Register"
|
|
if ((data.long(ad:0x90100000+0x14)&0x00000001)==0x00000001)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PED0,Physical Endpoint Descriptor 0 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PED1,Physical Endpoint Descriptor 1 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PED2,Physical Endpoint Descriptor 2 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PED3,Physical Endpoint Descriptor 3 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PED4,Physical Endpoint Descriptor 4 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PED5,Physical Endpoint Descriptor 5 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PED6,Physical Endpoint Descriptor 6 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PED7,Physical Endpoint Descriptor 7 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PED8,Physical Endpoint Descriptor 8 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PED9,Physical Endpoint Descriptor 9 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PED10,Physical Endpoint Descriptor 10 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PED11,Physical Endpoint Descriptor 11 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PED0,Physical Endpoint Descriptor 0 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PED1,Physical Endpoint Descriptor 1 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PED2,Physical Endpoint Descriptor 2 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PED3,Physical Endpoint Descriptor 3 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PED4,Physical Endpoint Descriptor 4 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PED5,Physical Endpoint Descriptor 5 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PED6,Physical Endpoint Descriptor 6 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PED7,Physical Endpoint Descriptor 7 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PED8,Physical Endpoint Descriptor 8 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PED9,Physical Endpoint Descriptor 9 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PED10,Physical Endpoint Descriptor 10 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PED11,Physical Endpoint Descriptor 11 Register"
|
|
hexmask.long.word 0x00 19.--28. 1. " MPS ,Maximum packet size"
|
|
bitfld.long 0x00 15.--18. " ALTSET ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " INTN ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--10. " CNFGN ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " EDTP ,Endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 4. " EDDIR ,Endpoint direction" "Out,In"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDNBR ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
tree.end
|
|
base ad:(0x90100000+0x3000)
|
|
tree "USB Device Endpoint FIFO Control and Data registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IS0,FIFO Interrupt Status 0 Register"
|
|
eventfld.long 0x00 15. " ACK2 ,Endpoint 0 (CTRL-In) acknowledge status" "Not received,Received"
|
|
eventfld.long 0x00 14. " NACK2 ,Endpoint 0 (CTRL-In) negative acknowledge status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR2 ,Endpoint 0 (CTRL-In) error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK1 ,Endpoint 0 (CTRL-Out) acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK1 ,Endpoint 0 (CTRL-Out) negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR1 ,Endpoint 0 (CTRL-Out) error status" "No error,Error"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IS1,FIFO Interrupt Status 1 Register"
|
|
eventfld.long 0x00 31. " ACK6 ,Endpoint 4 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NACK6 ,Endpoint 4 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR6 ,Endpoint 4 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK5 ,Endpoint 3 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NACK5 ,Endpoint 3 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR5 ,Endpoint 3 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK4 ,Endpoint 2 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK4 ,Endpoint 2 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR4 ,Endpoint 2 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK3 ,Endpoint 1 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK3 ,Endpoint 1 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR3 ,Endpoint 1 error status" "No error,Error"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IS2,FIFO Interrupt Status 2 Register"
|
|
eventfld.long 0x00 31. " ACK10 ,Endpoint 8 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 30. " NACK10 ,Endpoint 8 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 29. " ERROR10 ,Endpoint 8 error status" "No error,Error"
|
|
eventfld.long 0x00 23. " ACK9 ,Endpoint 7 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 22. " NACK9 ,Endpoint 7 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 21. " ERROR9 ,Endpoint 7 error status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ACK8 ,Endpoint 6 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK8 ,Endpoint 6 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR8 ,Endpoint 6 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK7 ,Endpoint 5 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK7 ,Endpoint 5 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR7 ,Endpoint 5 error status" "No error,Error"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IS3,FIFO Interrupt Status 3 Register"
|
|
eventfld.long 0x00 15. " ACK12 ,Endpoint 10 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
eventfld.long 0x00 14. " NACK12 ,Endpoint 10 negative acknowledge status" "Not sent,Sent"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ERROR12 ,Endpoint 10 error status" "No error,Error"
|
|
eventfld.long 0x00 7. " ACK11 ,Endpoint 9 acknowledge status(IN/OUT)" "Not received/Not sent,Received/Sent"
|
|
textline " "
|
|
eventfld.long 0x00 6. " NACK11 ,Endpoint 9 negative acknowledge status" "Not sent,Sent"
|
|
eventfld.long 0x00 5. " ERROR11 ,Endpoint 9 error status" "No error,Error"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IE0,FIFO Interrupt Enable 0 Register"
|
|
bitfld.long 0x00 15. " ACK2 ,Generate an interrupt when ACK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK2 ,Generate an interrupt when NACK2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR2 ,Generate an interrupt when ERROR2 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK1 ,Generate an interrupt when ACK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK1 ,Generate an interrupt when NACK1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR1 ,Generate an interrupt when ERROR1 in FIFO Interrupt Status 0 register is asserted" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IE1,FIFO Interrupt Enable 1 Register"
|
|
bitfld.long 0x00 31. " ACK6 ,Generate an interrupt when ACK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NACK6 ,Generate an interrupt when NACK6 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR6 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK5 ,Generate an interrupt when ACK5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NACK5 ,Generate an interrupt when NACK9 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR5 ,Generate an interrupt when ERROR5 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK4 ,Generate an interrupt when ACK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK4 ,Generate an interrupt when NACK4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR4 ,Generate an interrupt when ERROR4 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK3 ,Generate an interrupt when ACK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK3 ,Generate an interrupt when NACK3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR3 ,Generate an interrupt when ERROR3 in FIFO Interrupt Status 1 register is asserted" "Disabled,Enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IE2,FIFO Interrupt Enable 2 Register"
|
|
bitfld.long 0x00 31. " ACK10 ,Generate an interrupt when ACK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NACK10 ,Generate an interrupt when NACK10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ERROR10 ,Generate an interrupt when ERROR10 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ACK9 ,Generate an interrupt when ACK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NACK9 ,Generate an interrupt when NACK9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ERROR9 ,Generate an interrupt when ERROR9 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ACK8 ,Generate an interrupt when ACK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK8 ,Generate an interrupt when NACK8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR8 ,Generate an interrupt when ERROR8 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK7 ,Generate an interrupt when ACK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK7 ,Generate an interrupt when NACK7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR7 ,Generate an interrupt when ERROR7 in FIFO Interrupt Status 2 register is asserted" "Disabled,Enabled"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IE3,FIFO Interrupt Enable 3 Register"
|
|
bitfld.long 0x00 15. " ACK12 ,Generate an interrupt when ACK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NACK12 ,Generate an interrupt when NACK12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERROR12 ,Generate an interrupt when ERROR12 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ACK11 ,Generate an interrupt when ACK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " NACK11 ,Generate an interrupt when NACK11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERROR11 ,Generate an interrupt when ERROR11 in FIFO Interrupt Status 3 register is asserted" "Disabled,Enabled"
|
|
group.long 0x80++0x2F
|
|
line.long 0x0 "PC0,FIFO Packet Control 0 Register"
|
|
hexmask.long.word 0x0 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x0 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x4 "PC1,FIFO Packet Control 1 Register"
|
|
hexmask.long.word 0x4 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x4 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x8 "PC2,FIFO Packet Control 2 Register"
|
|
hexmask.long.word 0x8 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x8 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0xC "PC3,FIFO Packet Control 3 Register"
|
|
hexmask.long.word 0xC 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0xC 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x10 "PC4,FIFO Packet Control 4 Register"
|
|
hexmask.long.word 0x10 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x14 "PC5,FIFO Packet Control 5 Register"
|
|
hexmask.long.word 0x14 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x18 "PC6,FIFO Packet Control 6 Register"
|
|
hexmask.long.word 0x18 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x1C "PC7,FIFO Packet Control 7 Register"
|
|
hexmask.long.word 0x1C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x20 "PC8,FIFO Packet Control 8 Register"
|
|
hexmask.long.word 0x20 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x20 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x24 "PC9,FIFO Packet Control 9 Register"
|
|
hexmask.long.word 0x24 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x24 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x28 "PC10,FIFO Packet Control 10 Register"
|
|
hexmask.long.word 0x28 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x28 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
line.long 0x2C "PC11,FIFO Packet Control 11 Register"
|
|
hexmask.long.word 0x2C 20.--29. 1. " MAX ,Maximum packet size"
|
|
hexmask.long.word 0x2C 0.--15. 1. " COUNT ,Number of error-free packets"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SC0,FIFO Status and Control 0 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "SC1,FIFO Status and Control 1 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SC2,FIFO Status and Control 2 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SC3,FIFO Status and Control 3 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SC4,FIFO Status and Control 4 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "SC5,FIFO Status and Control 5 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "SC6,FIFO Status and Control 6 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "SC7,FIFO Status and Control 7 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SC8,FIFO Status and Control 8 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SC9,FIFO Status and Control 9 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "SC10,FIFO Status and Control 10 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "SC11,FIFO Status and Control 11 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "SC12,FIFO Status and Control 12 Register"
|
|
bitfld.long 0x00 20.--21. " TYPE ,Type field" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 19. " CLR ,Clear field" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIR ,Direction field" "OUT,IN"
|
|
bitfld.long 0x00 16.--17. " FDB ,Valid data bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " STATE ,State field" "Undefined,Data phase,Status phase,No-data status phase"
|
|
bitfld.long 0x00 13. " M31 ,Successful transfer status bit" "Unsuccessful,Successful"
|
|
textline " "
|
|
bitfld.long 0x00 12. " M30 ,Setup command status bit" "Not a setup command,Setup command"
|
|
hexmask.long.word 0x00 0.--11. 1. " CIA ,Configuration Interface Alternate"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree.open "FIM (Flexible Interface Module)"
|
|
tree "FIM 0"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90000000
|
|
width 12.
|
|
tree "FIM_0 Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "FIM 1"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90008000
|
|
width 12.
|
|
tree "FIM_1 Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver and Transmitter)"
|
|
tree "UART A"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90010000
|
|
width 12.
|
|
tree "UART_A Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x90011000
|
|
width 14.
|
|
tree "UART_A Wrapper Control and Status Registers"
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "WCONF,Wrapper Configuration Registeer"
|
|
bitfld.long 0x00 30. " RXEN ,RX Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TXEN ,Tx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MODE ,UART/HDLC mode" "UART,HDLC"
|
|
bitfld.long 0x00 19. " RTSEN ,Indicates which signal is output: RTS or RS485 transceiver control" "RTS,RS485 transceiver control"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DTREN ,Indicates which signal is output: DTR or TX baud clock" "DTR,TX baud clock"
|
|
bitfld.long 0x00 17. " RXFLUSH ,Resets the 64-byte RX FIFO to empty" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFLUSH ,Resets the 64-byte TX FIFO to empty" "No effect,Reset"
|
|
bitfld.long 0x00 13. " RXCLOSE ,Allows software to close a receive buffer" "Idle/buffer closed,Software"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TXFLOW[5] ,Receive character-based flow control routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TXFLOW[4] ,Software routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXFLOW[3] ,RI routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXFLOW[2] ,DSR routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXFLOW[1] ,DCD routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXFLOW[0] ,CTS routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTS ,RTS control" "UART,Deasserted "
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " RS485OFF ,RS485 transceiver deassertion control" "0,1,1.5,2"
|
|
bitfld.long 0x00 0.--1. " RS485ON ,RS485 transceiver assertion control" "0,1,1.5,2"
|
|
line.long 0x04 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x04 20. " FORCE ,Enable force complete" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " OFLOW ,Enable overflow error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " PARITY ,Enable parity error" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " FRAME ,Enable frame error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " BREAK ,Enable line break" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " BGAP ,Enable buffer gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RXCLS ,Software receive close" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CGAP ,Enable character gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MATCH4 ,Enable character match4" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " MATCH3 ,Enable character match3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MATCH2 ,Enable character match2" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " MATCH1 ,Enable character match1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MATCH0 ,Enable character match0" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " DSR ,Enable data set ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " DCD ,Enable data carrier" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CTS ,Enable clear to send" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RI ,Enable ring indicator" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TBC ,Enable transmit buffer close" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RBC ,Enable receive buffer close" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
|
|
line.long 0x08 "INTSTAT,Interrupt Status Register"
|
|
eventfld.long 0x08 20. " FORCE ,Force complete" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " OFLOW ,Enable overflow error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " PARITY ,Parity error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " FRAME ,Frame error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 16. " BREAK ,Line break" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 15. " BGAP ,Buffer gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 14. " RXCLS ,Software receive close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 13. " CGAP ,Character gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 12. " MATCH4 ,Character match4" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 11. " MATCH3 ,Character match3" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 10. " MATCH2 ,Character match2" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 9. " MATCH1 ,Character match1" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 8. " MATCH0 ,Character match0" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 7. " DSR ,Data set ready" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 6. " DCD ,Data carrier detect" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 5. " CTS ,Clear to send" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 4. " RI ,Ring indicator" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 3. " TBC ,Transmit buffer close" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 2. " RBC ,Receive buffer close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 1. " TX_IDLE ,Transmit idle" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RX_IDLE ,Receive idle" "No interrupt,Interrupt"
|
|
line.long 0x0c "RXCGAPCTRL,Receive Character GAP Control Register"
|
|
bitfld.long 0x0C 31. " ENABLE ,Enable receive character gap timer" "Disabled,Enabled"
|
|
hexmask.long 0x0C 0.--24. 1. " VALUE ,Value"
|
|
line.long 0x10 "RXBGAPCTRL,Receive Buffer GAP Control Register"
|
|
bitfld.long 0x10 31. " ENABLE ,Enable transmit bit rate generation" "Disabled,Enabled"
|
|
hexmask.long 0x10 0.--24. 1. " VALUE ,Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RXCMCTRL0,Receive Character Match Control 0 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "RXCMCTRL1,Receive Character Match Control 1 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RXCMCTRL2,Receive Character Match Control 2 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RXCMCTRL3,Receive Character Match Control 3 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RXCMCTRL4,Receive Character Match Control 4 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x28++0x0f
|
|
line.long 0x00 "RXCBFCTRL,Receive Character-Based Flow Control Register"
|
|
bitfld.long 0x00 10. " FLOW_STATE ,Flow control state" "XON,XOFF"
|
|
bitfld.long 0x00 8.--9. " FLOW4 ,Flow control 4 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FLOW3 ,Flow control 3 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 4.--5. " FLOW2 ,Flow control 2 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " FLOW1 ,Flow control 1 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 0.--1. " FLOW0 ,Flow control 0 enable" "Disabled,Disabled,XON,XOFF"
|
|
line.long 0x04 "FTXCCTRL,Force Transmit Character Control Register"
|
|
bitfld.long 0x04 31. " ENABLE ,Force transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " BUSY ,Read-only busy" "Not busy,Busy"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CHAR ,Force character"
|
|
line.long 0x08 "ARMWCTRL,ARM Wakeup Control Register"
|
|
bitfld.long 0x08 0. " ENABLE ,Wakeup control logic enable" "Disabled,Enabled"
|
|
line.long 0x0C "TXBCNT,Transmit Byte Count"
|
|
bitfld.long 0x0c 31. " ENABLE ,Enables and resets the transmit byte counter" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " TXCOUNT ,This counter is incremented after bytes are transmitted"
|
|
if ((d.l(ad:(0x90011000+0x10c))&0x80)==0x0)
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "UARTRXTXBUFF,UART Receive Buffer"
|
|
in
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "UARTINTEN,UART Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Enables modem status interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Enables receive line status interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ETBEI ,Enables transmit holding register empty interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERBFI ,Enables receive data available interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "UARTBRDLSB,UART Baud Rate Divisor LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRDL ,Baud Rate Generator Divisor LSB"
|
|
line.long 0x04 "UARTBRDMSB,UART Baud Rate Divisor MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BRDM ,Baud Rate Generator Divisor MSB"
|
|
endif
|
|
width 14.
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTINTID,UART Interrupt Identification Register"
|
|
bitfld.long 0x00 0.--3. " IIR ,Interrupt identification" "Modem status,Reserved,Transmit holding register empty,Reserved,Receive data available,Reserved,Receiver line status error,?..."
|
|
width 14.
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTFIFOCTRL,UART FIFO Control Register"
|
|
bitfld.long 0x00 2. " TXCLR ,Clear all bytes in the TX FIFO" "Normal,Cleared"
|
|
bitfld.long 0x00 1. " RXCLR ,Clear all bytes in the RX FIFO" "Normal,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Enable the TX and RX FIFO" "Disabled,Enabled"
|
|
if ((d.l(ad:(0x90011000+0x10c))&0x3)==0x0)
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "UARTMCTRL,UART Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Automatic flow control" "1 bit (RTS),4 bytes RX FIFO"
|
|
bitfld.long 0x00 4. " LLB ,Local loopback enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS) output" "1,0"
|
|
bitfld.long 0x00 0. " DTR ,Controls the Data Terminal Ready (DTR) output" "1,0"
|
|
rgroup.long 0x114++0x07
|
|
line.long 0x00 "UARTLSTAT,UART Line Status Register"
|
|
bitfld.long 0x00 7. " FIER ,RX FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmit holding and shift registers empty" "Not hold,Hold"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmit holding register empty" "Not hold,Hold"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data ready" "Not ready,Ready"
|
|
line.long 0x04 "UARTMSTAT,UART Modem Status Register"
|
|
bitfld.long 0x04 7. " DCD ,Reflects the status of the data carrier detect input" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " RI ,Reflects the status of the ring indicator" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DSR ,Reflects the status of the data set ready input" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " CTS ,Reflects the status of the clear to send input" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DDCD ,Delta DCD indicator" "Low,High"
|
|
bitfld.long 0x04 2. " TERI ,Trailing edge of RI indicator" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DDSR ,Delta DSR indicator" "Low,High"
|
|
bitfld.long 0x04 0. " DCTS ,Delta CTS indicator" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "UART B"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90018000
|
|
width 12.
|
|
tree "UART_B Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x90019000
|
|
width 14.
|
|
tree "UART_B Wrapper Control and Status Registers"
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "WCONF,Wrapper Configuration Registeer"
|
|
bitfld.long 0x00 30. " RXEN ,RX Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TXEN ,Tx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MODE ,UART/HDLC mode" "UART,HDLC"
|
|
bitfld.long 0x00 19. " RTSEN ,Indicates which signal is output: RTS or RS485 transceiver control" "RTS,RS485 transceiver control"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DTREN ,Indicates which signal is output: DTR or TX baud clock" "DTR,TX baud clock"
|
|
bitfld.long 0x00 17. " RXFLUSH ,Resets the 64-byte RX FIFO to empty" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFLUSH ,Resets the 64-byte TX FIFO to empty" "No effect,Reset"
|
|
bitfld.long 0x00 13. " RXCLOSE ,Allows software to close a receive buffer" "Idle/buffer closed,Software"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TXFLOW[5] ,Receive character-based flow control routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TXFLOW[4] ,Software routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXFLOW[3] ,RI routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXFLOW[2] ,DSR routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXFLOW[1] ,DCD routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXFLOW[0] ,CTS routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTS ,RTS control" "UART,Deasserted "
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " RS485OFF ,RS485 transceiver deassertion control" "0,1,1.5,2"
|
|
bitfld.long 0x00 0.--1. " RS485ON ,RS485 transceiver assertion control" "0,1,1.5,2"
|
|
line.long 0x04 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x04 20. " FORCE ,Enable force complete" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " OFLOW ,Enable overflow error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " PARITY ,Enable parity error" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " FRAME ,Enable frame error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " BREAK ,Enable line break" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " BGAP ,Enable buffer gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RXCLS ,Software receive close" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CGAP ,Enable character gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MATCH4 ,Enable character match4" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " MATCH3 ,Enable character match3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MATCH2 ,Enable character match2" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " MATCH1 ,Enable character match1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MATCH0 ,Enable character match0" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " DSR ,Enable data set ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " DCD ,Enable data carrier" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CTS ,Enable clear to send" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RI ,Enable ring indicator" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TBC ,Enable transmit buffer close" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RBC ,Enable receive buffer close" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
|
|
line.long 0x08 "INTSTAT,Interrupt Status Register"
|
|
eventfld.long 0x08 20. " FORCE ,Force complete" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " OFLOW ,Enable overflow error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " PARITY ,Parity error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " FRAME ,Frame error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 16. " BREAK ,Line break" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 15. " BGAP ,Buffer gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 14. " RXCLS ,Software receive close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 13. " CGAP ,Character gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 12. " MATCH4 ,Character match4" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 11. " MATCH3 ,Character match3" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 10. " MATCH2 ,Character match2" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 9. " MATCH1 ,Character match1" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 8. " MATCH0 ,Character match0" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 7. " DSR ,Data set ready" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 6. " DCD ,Data carrier detect" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 5. " CTS ,Clear to send" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 4. " RI ,Ring indicator" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 3. " TBC ,Transmit buffer close" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 2. " RBC ,Receive buffer close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 1. " TX_IDLE ,Transmit idle" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RX_IDLE ,Receive idle" "No interrupt,Interrupt"
|
|
line.long 0x0c "RXCGAPCTRL,Receive Character GAP Control Register"
|
|
bitfld.long 0x0C 31. " ENABLE ,Enable receive character gap timer" "Disabled,Enabled"
|
|
hexmask.long 0x0C 0.--24. 1. " VALUE ,Value"
|
|
line.long 0x10 "RXBGAPCTRL,Receive Buffer GAP Control Register"
|
|
bitfld.long 0x10 31. " ENABLE ,Enable transmit bit rate generation" "Disabled,Enabled"
|
|
hexmask.long 0x10 0.--24. 1. " VALUE ,Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RXCMCTRL0,Receive Character Match Control 0 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "RXCMCTRL1,Receive Character Match Control 1 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RXCMCTRL2,Receive Character Match Control 2 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RXCMCTRL3,Receive Character Match Control 3 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RXCMCTRL4,Receive Character Match Control 4 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x28++0x0f
|
|
line.long 0x00 "RXCBFCTRL,Receive Character-Based Flow Control Register"
|
|
bitfld.long 0x00 10. " FLOW_STATE ,Flow control state" "XON,XOFF"
|
|
bitfld.long 0x00 8.--9. " FLOW4 ,Flow control 4 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FLOW3 ,Flow control 3 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 4.--5. " FLOW2 ,Flow control 2 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " FLOW1 ,Flow control 1 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 0.--1. " FLOW0 ,Flow control 0 enable" "Disabled,Disabled,XON,XOFF"
|
|
line.long 0x04 "FTXCCTRL,Force Transmit Character Control Register"
|
|
bitfld.long 0x04 31. " ENABLE ,Force transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " BUSY ,Read-only busy" "Not busy,Busy"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CHAR ,Force character"
|
|
line.long 0x08 "ARMWCTRL,ARM Wakeup Control Register"
|
|
bitfld.long 0x08 0. " ENABLE ,Wakeup control logic enable" "Disabled,Enabled"
|
|
line.long 0x0C "TXBCNT,Transmit Byte Count"
|
|
bitfld.long 0x0c 31. " ENABLE ,Enables and resets the transmit byte counter" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " TXCOUNT ,This counter is incremented after bytes are transmitted"
|
|
if ((d.l(ad:(0x90019000+0x10c))&0x80)==0x0)
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "UARTRXTXBUFF,UART Receive Buffer"
|
|
in
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "UARTINTEN,UART Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Enables modem status interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Enables receive line status interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ETBEI ,Enables transmit holding register empty interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERBFI ,Enables receive data available interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "UARTBRDLSB,UART Baud Rate Divisor LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRDL ,Baud Rate Generator Divisor LSB"
|
|
line.long 0x04 "UARTBRDMSB,UART Baud Rate Divisor MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BRDM ,Baud Rate Generator Divisor MSB"
|
|
endif
|
|
width 14.
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTINTID,UART Interrupt Identification Register"
|
|
bitfld.long 0x00 0.--3. " IIR ,Interrupt identification" "Modem status,Reserved,Transmit holding register empty,Reserved,Receive data available,Reserved,Receiver line status error,?..."
|
|
width 14.
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTFIFOCTRL,UART FIFO Control Register"
|
|
bitfld.long 0x00 2. " TXCLR ,Clear all bytes in the TX FIFO" "Normal,Cleared"
|
|
bitfld.long 0x00 1. " RXCLR ,Clear all bytes in the RX FIFO" "Normal,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Enable the TX and RX FIFO" "Disabled,Enabled"
|
|
if ((d.l(ad:(0x90019000+0x10c))&0x3)==0x0)
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "UARTMCTRL,UART Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Automatic flow control" "1 bit (RTS),4 bytes RX FIFO"
|
|
bitfld.long 0x00 4. " LLB ,Local loopback enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS) output" "1,0"
|
|
bitfld.long 0x00 0. " DTR ,Controls the Data Terminal Ready (DTR) output" "1,0"
|
|
rgroup.long 0x114++0x07
|
|
line.long 0x00 "UARTLSTAT,UART Line Status Register"
|
|
bitfld.long 0x00 7. " FIER ,RX FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmit holding and shift registers empty" "Not hold,Hold"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmit holding register empty" "Not hold,Hold"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data ready" "Not ready,Ready"
|
|
line.long 0x04 "UARTMSTAT,UART Modem Status Register"
|
|
bitfld.long 0x04 7. " DCD ,Reflects the status of the data carrier detect input" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " RI ,Reflects the status of the ring indicator" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DSR ,Reflects the status of the data set ready input" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " CTS ,Reflects the status of the clear to send input" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DDCD ,Delta DCD indicator" "Low,High"
|
|
bitfld.long 0x04 2. " TERI ,Trailing edge of RI indicator" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DDSR ,Delta DSR indicator" "Low,High"
|
|
bitfld.long 0x04 0. " DCTS ,Delta CTS indicator" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "UART C"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90020000
|
|
width 12.
|
|
tree "UART_C Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x90021000
|
|
width 14.
|
|
tree "UART_C Wrapper Control and Status Registers"
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "WCONF,Wrapper Configuration Registeer"
|
|
bitfld.long 0x00 30. " RXEN ,RX Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TXEN ,Tx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MODE ,UART/HDLC mode" "UART,HDLC"
|
|
bitfld.long 0x00 19. " RTSEN ,Indicates which signal is output: RTS or RS485 transceiver control" "RTS,RS485 transceiver control"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DTREN ,Indicates which signal is output: DTR or TX baud clock" "DTR,TX baud clock"
|
|
bitfld.long 0x00 17. " RXFLUSH ,Resets the 64-byte RX FIFO to empty" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFLUSH ,Resets the 64-byte TX FIFO to empty" "No effect,Reset"
|
|
bitfld.long 0x00 13. " RXCLOSE ,Allows software to close a receive buffer" "Idle/buffer closed,Software"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TXFLOW[5] ,Receive character-based flow control routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TXFLOW[4] ,Software routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXFLOW[3] ,RI routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXFLOW[2] ,DSR routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXFLOW[1] ,DCD routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXFLOW[0] ,CTS routed to the UART for hardware flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTS ,RTS control" "UART,Deasserted "
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " RS485OFF ,RS485 transceiver deassertion control" "0,1,1.5,2"
|
|
bitfld.long 0x00 0.--1. " RS485ON ,RS485 transceiver assertion control" "0,1,1.5,2"
|
|
line.long 0x04 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x04 20. " FORCE ,Enable force complete" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " OFLOW ,Enable overflow error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " PARITY ,Enable parity error" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " FRAME ,Enable frame error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " BREAK ,Enable line break" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " BGAP ,Enable buffer gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RXCLS ,Software receive close" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CGAP ,Enable character gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MATCH4 ,Enable character match4" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " MATCH3 ,Enable character match3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MATCH2 ,Enable character match2" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " MATCH1 ,Enable character match1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MATCH0 ,Enable character match0" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " DSR ,Enable data set ready" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " DCD ,Enable data carrier" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CTS ,Enable clear to send" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RI ,Enable ring indicator" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TBC ,Enable transmit buffer close" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RBC ,Enable receive buffer close" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
|
|
line.long 0x08 "INTSTAT,Interrupt Status Register"
|
|
eventfld.long 0x08 20. " FORCE ,Force complete" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " OFLOW ,Enable overflow error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " PARITY ,Parity error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " FRAME ,Frame error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 16. " BREAK ,Line break" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 15. " BGAP ,Buffer gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 14. " RXCLS ,Software receive close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 13. " CGAP ,Character gap" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 12. " MATCH4 ,Character match4" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 11. " MATCH3 ,Character match3" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 10. " MATCH2 ,Character match2" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 9. " MATCH1 ,Character match1" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 8. " MATCH0 ,Character match0" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 7. " DSR ,Data set ready" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 6. " DCD ,Data carrier detect" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 5. " CTS ,Clear to send" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 4. " RI ,Ring indicator" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 3. " TBC ,Transmit buffer close" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 2. " RBC ,Receive buffer close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 1. " TX_IDLE ,Transmit idle" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RX_IDLE ,Receive idle" "No interrupt,Interrupt"
|
|
line.long 0x0c "RXCGAPCTRL,Receive Character GAP Control Register"
|
|
bitfld.long 0x0C 31. " ENABLE ,Enable receive character gap timer" "Disabled,Enabled"
|
|
hexmask.long 0x0C 0.--24. 1. " VALUE ,Value"
|
|
line.long 0x10 "RXBGAPCTRL,Receive Buffer GAP Control Register"
|
|
bitfld.long 0x10 31. " ENABLE ,Enable transmit bit rate generation" "Disabled,Enabled"
|
|
hexmask.long 0x10 0.--24. 1. " VALUE ,Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RXCMCTRL0,Receive Character Match Control 0 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "RXCMCTRL1,Receive Character Match Control 1 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RXCMCTRL2,Receive Character Match Control 2 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RXCMCTRL3,Receive Character Match Control 3 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RXCMCTRL4,Receive Character Match Control 4 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x28++0x0f
|
|
line.long 0x00 "RXCBFCTRL,Receive Character-Based Flow Control Register"
|
|
bitfld.long 0x00 10. " FLOW_STATE ,Flow control state" "XON,XOFF"
|
|
bitfld.long 0x00 8.--9. " FLOW4 ,Flow control 4 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FLOW3 ,Flow control 3 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 4.--5. " FLOW2 ,Flow control 2 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " FLOW1 ,Flow control 1 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 0.--1. " FLOW0 ,Flow control 0 enable" "Disabled,Disabled,XON,XOFF"
|
|
line.long 0x04 "FTXCCTRL,Force Transmit Character Control Register"
|
|
bitfld.long 0x04 31. " ENABLE ,Force transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " BUSY ,Read-only busy" "Not busy,Busy"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CHAR ,Force character"
|
|
line.long 0x08 "ARMWCTRL,ARM Wakeup Control Register"
|
|
bitfld.long 0x08 0. " ENABLE ,Wakeup control logic enable" "Disabled,Enabled"
|
|
line.long 0x0C "TXBCNT,Transmit Byte Count"
|
|
bitfld.long 0x0c 31. " ENABLE ,Enables and resets the transmit byte counter" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " TXCOUNT ,This counter is incremented after bytes are transmitted"
|
|
if ((d.l(ad:(0x90021000+0x10c))&0x80)==0x0)
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "UARTRXTXBUFF,UART Receive Buffer"
|
|
in
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "UARTINTEN,UART Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Enables modem status interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Enables receive line status interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ETBEI ,Enables transmit holding register empty interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERBFI ,Enables receive data available interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "UARTBRDLSB,UART Baud Rate Divisor LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRDL ,Baud Rate Generator Divisor LSB"
|
|
line.long 0x04 "UARTBRDMSB,UART Baud Rate Divisor MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BRDM ,Baud Rate Generator Divisor MSB"
|
|
endif
|
|
width 14.
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTINTID,UART Interrupt Identification Register"
|
|
bitfld.long 0x00 0.--3. " IIR ,Interrupt identification" "Modem status,Reserved,Transmit holding register empty,Reserved,Receive data available,Reserved,Receiver line status error,?..."
|
|
width 14.
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTFIFOCTRL,UART FIFO Control Register"
|
|
bitfld.long 0x00 2. " TXCLR ,Clear all bytes in the TX FIFO" "Normal,Cleared"
|
|
bitfld.long 0x00 1. " RXCLR ,Clear all bytes in the RX FIFO" "Normal,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Enable the TX and RX FIFO" "Disabled,Enabled"
|
|
if ((d.l(ad:(0x90021000+0x10c))&0x3)==0x0)
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "UARTMCTRL,UART Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Automatic flow control" "1 bit (RTS),4 bytes RX FIFO"
|
|
bitfld.long 0x00 4. " LLB ,Local loopback enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS) output" "1,0"
|
|
bitfld.long 0x00 0. " DTR ,Controls the Data Terminal Ready (DTR) output" "1,0"
|
|
rgroup.long 0x114++0x07
|
|
line.long 0x00 "UARTLSTAT,UART Line Status Register"
|
|
bitfld.long 0x00 7. " FIER ,RX FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmit holding and shift registers empty" "Not hold,Hold"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmit holding register empty" "Not hold,Hold"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data ready" "Not ready,Ready"
|
|
line.long 0x04 "UARTMSTAT,UART Modem Status Register"
|
|
bitfld.long 0x04 7. " DCD ,Reflects the status of the data carrier detect input" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " RI ,Reflects the status of the ring indicator" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DSR ,Reflects the status of the data set ready input" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " CTS ,Reflects the status of the clear to send input" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DDCD ,Delta DCD indicator" "Low,High"
|
|
bitfld.long 0x04 2. " TERI ,Trailing edge of RI indicator" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DDSR ,Delta DSR indicator" "Low,High"
|
|
bitfld.long 0x04 0. " DCTS ,Delta CTS indicator" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "UART D"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
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|
base ad:0x90028000
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|
width 12.
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|
tree "UART_D Control and Status Register"
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group.long 0x00++0x07
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line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
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bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
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bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
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textline " "
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bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
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bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
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textline " "
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bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
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bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
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line.long 0x04 "DMARXCTRL,DMA RX Control"
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bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
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bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
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textline " "
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bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
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bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
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textline " "
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hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
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hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
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group.long 0x08++0x03
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line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
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group.long 0x0c++0x03
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line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
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bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
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bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
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textline " "
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bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
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bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
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textline " "
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hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
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rgroup.long 0x10++0x03
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line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
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bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
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bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
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textline " "
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hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
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hgroup.long 0x14++0x03
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hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
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in
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group.long 0x18++0x07
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line.long 0x00 "DMATXCTRL,DMA TX Control"
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bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
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bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
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textline " "
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bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
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bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
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textline " "
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bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
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hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
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textline " "
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hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
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line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
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group.long 0x20++0x03
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line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
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bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
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textline " "
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bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
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bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
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textline " "
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bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
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hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
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wgroup.long 0x28++0x07
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line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
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line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
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tree.end
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width 0xb
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base ad:0x90029000
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width 14.
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tree "UART_D Wrapper Control and Status Registers"
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group.long 0x00++0x13
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line.long 0x00 "WCONF,Wrapper Configuration Registeer"
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bitfld.long 0x00 30. " RXEN ,RX Enable" "Disabled,Enabled"
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bitfld.long 0x00 29. " TXEN ,Tx Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 28. " MODE ,UART/HDLC mode" "UART,HDLC"
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bitfld.long 0x00 19. " RTSEN ,Indicates which signal is output: RTS or RS485 transceiver control" "RTS,RS485 transceiver control"
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textline " "
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bitfld.long 0x00 18. " DTREN ,Indicates which signal is output: DTR or TX baud clock" "DTR,TX baud clock"
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bitfld.long 0x00 17. " RXFLUSH ,Resets the 64-byte RX FIFO to empty" "No effect,Reset"
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textline " "
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bitfld.long 0x00 16. " TXFLUSH ,Resets the 64-byte TX FIFO to empty" "No effect,Reset"
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bitfld.long 0x00 13. " RXCLOSE ,Allows software to close a receive buffer" "Idle/buffer closed,Software"
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textline " "
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bitfld.long 0x00 11. " TXFLOW[5] ,Receive character-based flow control routed to the UART for hardware flow control" "Disabled,Enabled"
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bitfld.long 0x00 10. " TXFLOW[4] ,Software routed to the UART for hardware flow control" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 9. " TXFLOW[3] ,RI routed to the UART for hardware flow control" "Disabled,Enabled"
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bitfld.long 0x00 8. " TXFLOW[2] ,DSR routed to the UART for hardware flow control" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 7. " TXFLOW[1] ,DCD routed to the UART for hardware flow control" "Disabled,Enabled"
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bitfld.long 0x00 6. " TXFLOW[0] ,CTS routed to the UART for hardware flow control" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 5. " RL ,Remote loopback" "Disabled,Enabled"
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bitfld.long 0x00 4. " RTS ,RTS control" "UART,Deasserted "
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textline " "
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bitfld.long 0x00 2.--3. " RS485OFF ,RS485 transceiver deassertion control" "0,1,1.5,2"
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bitfld.long 0x00 0.--1. " RS485ON ,RS485 transceiver assertion control" "0,1,1.5,2"
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line.long 0x04 "INTEN,Interrupt Enable Register"
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bitfld.long 0x04 20. " FORCE ,Enable force complete" "Disabled,Enabled"
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bitfld.long 0x04 19. " OFLOW ,Enable overflow error" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 18. " PARITY ,Enable parity error" "Disabled,Enabled"
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bitfld.long 0x04 17. " FRAME ,Enable frame error" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 16. " BREAK ,Enable line break" "Disabled,Enabled"
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bitfld.long 0x04 15. " BGAP ,Enable buffer gap" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 14. " RXCLS ,Software receive close" "Disabled,Enabled"
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bitfld.long 0x04 13. " CGAP ,Enable character gap" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 12. " MATCH4 ,Enable character match4" "Disabled,Enabled"
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bitfld.long 0x04 11. " MATCH3 ,Enable character match3" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 10. " MATCH2 ,Enable character match2" "Disabled,Enabled"
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bitfld.long 0x04 9. " MATCH1 ,Enable character match1" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 8. " MATCH0 ,Enable character match0" "Disabled,Enabled"
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bitfld.long 0x04 7. " DSR ,Enable data set ready" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 6. " DCD ,Enable data carrier" "Disabled,Enabled"
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bitfld.long 0x04 5. " CTS ,Enable clear to send" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 4. " RI ,Enable ring indicator" "Disabled,Enabled"
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bitfld.long 0x04 3. " TBC ,Enable transmit buffer close" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 2. " RBC ,Enable receive buffer close" "Disabled,Enabled"
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bitfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
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line.long 0x08 "INTSTAT,Interrupt Status Register"
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eventfld.long 0x08 20. " FORCE ,Force complete" "No interrupt,Interrupt"
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eventfld.long 0x08 19. " OFLOW ,Enable overflow error" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 18. " PARITY ,Parity error" "No interrupt,Interrupt"
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eventfld.long 0x08 17. " FRAME ,Frame error" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 16. " BREAK ,Line break" "No interrupt,Interrupt"
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eventfld.long 0x08 15. " BGAP ,Buffer gap" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 14. " RXCLS ,Software receive close" "No interrupt,Interrupt"
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eventfld.long 0x08 13. " CGAP ,Character gap" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 12. " MATCH4 ,Character match4" "No interrupt,Interrupt"
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eventfld.long 0x08 11. " MATCH3 ,Character match3" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 10. " MATCH2 ,Character match2" "No interrupt,Interrupt"
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eventfld.long 0x08 9. " MATCH1 ,Character match1" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 8. " MATCH0 ,Character match0" "No interrupt,Interrupt"
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eventfld.long 0x08 7. " DSR ,Data set ready" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 6. " DCD ,Data carrier detect" "No interrupt,Interrupt"
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eventfld.long 0x08 5. " CTS ,Clear to send" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 4. " RI ,Ring indicator" "No interrupt,Interrupt"
|
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eventfld.long 0x08 3. " TBC ,Transmit buffer close" "No interrupt,Interrupt"
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textline " "
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eventfld.long 0x08 2. " RBC ,Receive buffer close" "No interrupt,Interrupt"
|
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eventfld.long 0x08 1. " TX_IDLE ,Transmit idle" "No interrupt,Interrupt"
|
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textline " "
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eventfld.long 0x08 0. " RX_IDLE ,Receive idle" "No interrupt,Interrupt"
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line.long 0x0c "RXCGAPCTRL,Receive Character GAP Control Register"
|
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bitfld.long 0x0C 31. " ENABLE ,Enable receive character gap timer" "Disabled,Enabled"
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hexmask.long 0x0C 0.--24. 1. " VALUE ,Value"
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line.long 0x10 "RXBGAPCTRL,Receive Buffer GAP Control Register"
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bitfld.long 0x10 31. " ENABLE ,Enable transmit bit rate generation" "Disabled,Enabled"
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hexmask.long 0x10 0.--24. 1. " VALUE ,Value"
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group.long 0x14++0x03
|
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line.long 0x00 "RXCMCTRL0,Receive Character Match Control 0 Register"
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bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
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bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
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bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
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bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
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bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
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bitfld.long 0x00 19. ",Mask Bit3" "0,1"
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bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
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bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
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group.long 0x18++0x03
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line.long 0x00 "RXCMCTRL1,Receive Character Match Control 1 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
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|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
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bitfld.long 0x00 22. ",Mask Bit6" "0,1"
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bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RXCMCTRL2,Receive Character Match Control 2 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RXCMCTRL3,Receive Character Match Control 3 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RXCMCTRL4,Receive Character Match Control 4 Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable character match" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MASK ,Mask Bit7" "0,1"
|
|
bitfld.long 0x00 22. ",Mask Bit6" "0,1"
|
|
bitfld.long 0x00 21. ",Mask Bit5" "0,1"
|
|
bitfld.long 0x00 20. ",Mask Bit4" "0,1"
|
|
bitfld.long 0x00 19. ",Mask Bit3" "0,1"
|
|
bitfld.long 0x00 18. ",Mask Bit2" "0,1"
|
|
bitfld.long 0x00 17. ",Mask Bit1" "0,1"
|
|
bitfld.long 0x00 16. ",Mask Bit0" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
group.long 0x28++0x0f
|
|
line.long 0x00 "RXCBFCTRL,Receive Character-Based Flow Control Register"
|
|
bitfld.long 0x00 10. " FLOW_STATE ,Flow control state" "XON,XOFF"
|
|
bitfld.long 0x00 8.--9. " FLOW4 ,Flow control 4 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FLOW3 ,Flow control 3 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 4.--5. " FLOW2 ,Flow control 2 enable" "Disabled,Disabled,XON,XOFF"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " FLOW1 ,Flow control 1 enable" "Disabled,Disabled,XON,XOFF"
|
|
bitfld.long 0x00 0.--1. " FLOW0 ,Flow control 0 enable" "Disabled,Disabled,XON,XOFF"
|
|
line.long 0x04 "FTXCCTRL,Force Transmit Character Control Register"
|
|
bitfld.long 0x04 31. " ENABLE ,Force transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " BUSY ,Read-only busy" "Not busy,Busy"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CHAR ,Force character"
|
|
line.long 0x08 "ARMWCTRL,ARM Wakeup Control Register"
|
|
bitfld.long 0x08 0. " ENABLE ,Wakeup control logic enable" "Disabled,Enabled"
|
|
line.long 0x0C "TXBCNT,Transmit Byte Count"
|
|
bitfld.long 0x0c 31. " ENABLE ,Enables and resets the transmit byte counter" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " TXCOUNT ,This counter is incremented after bytes are transmitted"
|
|
if ((d.l(ad:(0x90029000+0x10c))&0x80)==0x0)
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "UARTRXTXBUFF,UART Receive Buffer"
|
|
in
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "UARTINTEN,UART Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Enables modem status interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Enables receive line status interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ETBEI ,Enables transmit holding register empty interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERBFI ,Enables receive data available interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "UARTBRDLSB,UART Baud Rate Divisor LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRDL ,Baud Rate Generator Divisor LSB"
|
|
line.long 0x04 "UARTBRDMSB,UART Baud Rate Divisor MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BRDM ,Baud Rate Generator Divisor MSB"
|
|
endif
|
|
width 14.
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTINTID,UART Interrupt Identification Register"
|
|
bitfld.long 0x00 0.--3. " IIR ,Interrupt identification" "Modem status,Reserved,Transmit holding register empty,Reserved,Receive data available,Reserved,Receiver line status error,?..."
|
|
width 14.
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "UARTFIFOCTRL,UART FIFO Control Register"
|
|
bitfld.long 0x00 2. " TXCLR ,Clear all bytes in the TX FIFO" "Normal,Cleared"
|
|
bitfld.long 0x00 1. " RXCLR ,Clear all bytes in the RX FIFO" "Normal,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Enable the TX and RX FIFO" "Disabled,Enabled"
|
|
if ((d.l(ad:(0x90029000+0x10c))&0x3)==0x0)
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x10c++0x03
|
|
line.long 0x00 "UARTLCTRL,UART Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break, if set TX data is set to 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "UARTMCTRL,UART Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Automatic flow control" "1 bit (RTS),4 bytes RX FIFO"
|
|
bitfld.long 0x00 4. " LLB ,Local loopback enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS) output" "1,0"
|
|
bitfld.long 0x00 0. " DTR ,Controls the Data Terminal Ready (DTR) output" "1,0"
|
|
rgroup.long 0x114++0x07
|
|
line.long 0x00 "UARTLSTAT,UART Line Status Register"
|
|
bitfld.long 0x00 7. " FIER ,RX FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmit holding and shift registers empty" "Not hold,Hold"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmit holding register empty" "Not hold,Hold"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data ready" "Not ready,Ready"
|
|
line.long 0x04 "UARTMSTAT,UART Modem Status Register"
|
|
bitfld.long 0x04 7. " DCD ,Reflects the status of the data carrier detect input" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " RI ,Reflects the status of the ring indicator" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DSR ,Reflects the status of the data set ready input" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " CTS ,Reflects the status of the clear to send input" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DDCD ,Delta DCD indicator" "Low,High"
|
|
bitfld.long 0x04 2. " TERI ,Trailing edge of RI indicator" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DDSR ,Delta DSR indicator" "Low,High"
|
|
bitfld.long 0x04 0. " DCTS ,Delta CTS indicator" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "HDLC (High Level Data Link Controller)"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90029000
|
|
width 13.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "WCONF,Wrapper Configuration Register"
|
|
bitfld.long 0x00 30. " RXEN ,Rx Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TXEN ,Tx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MODE ,Mode (only UART channel C)" "UART,HDLC"
|
|
bitfld.long 0x00 17. " RXFLUSH ,Rx Flush" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFLUSH ,Tx Flush" "No reset,Reset"
|
|
bitfld.long 0x00 14.--15. " RXBYTES ,Rx Bytes" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXCLOSE ,Rx Close" "Idle/buffer closed,Software"
|
|
bitfld.long 0x00 12. " CRC ,Controls whether the HDLC transmitter hardware sends CRC bytes before the closing flag" "Send,Not send"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RL ,Remote loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LL ,Local loopback" "Disabled,Enabled"
|
|
line.long 0x04 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x04 21. " HINT ,Enable HDLC interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " OFLOW ,Enable overflow error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " ICRC ,Enable invalid CRC" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " VCRC ,Enable valid CRC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RABORT ,Enable receive abort error" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RXCLS ,Software receive close" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TBC ,Enable transmit buffer close" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RBC ,Enable receive buffer close" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
|
|
line.long 0x08 "INTSTAT,Interrupt Status"
|
|
eventfld.long 0x08 21. " HINT ,HDLC interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " OFLOW ,Enable overflow error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " ICRC ,Invalid CRC" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " VCRC ,Valid CRC" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 16. " RABORT ,Receive abort error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 14. " RXCLS ,Software receive close" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 3. " TBC ,Transmit buffer close" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 2. " RBC ,Receive buffer close" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 1. " TX_IDLE ,Transmit idle" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " RX_IDLE ,Receive idle" "No interrupt,Interrupt"
|
|
group.long 0x100++0x0b
|
|
line.long 0x00 "HDLCD1,HDLC Data Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HDATA ,HDLC Data 1"
|
|
line.long 0x04 "HDLCD2,HDLC Data Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " HDATA ,HDLC Data 2"
|
|
line.long 0x08 "HDLCD3,HDLC Data Register 3"
|
|
hexmask.long.byte 0x08 0.--7. 1. " HDATA ,HDLC Data 3"
|
|
group.long 0x110++0x0f
|
|
line.long 0x00 "HDLCCTRL1,HDLC Control Register 1"
|
|
bitfld.long 0x00 6.--7. " HMODE ,HDLC Mode" "Normal,Force receiver,Normal,Force transmitter"
|
|
bitfld.long 0x00 2.--3. " CLK ,Clock source" "Reserved,Reserved,External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HINT ,HDLC Interrupt" "Disabled,Enabled"
|
|
line.long 0x04 "HDLCCTRL2,HDLC Control Register 2"
|
|
bitfld.long 0x04 5.--7. " CMODE ,Coding mode" "NRZ,Reserved,RZI,Reserved,Biphase-Level (Manchester),Reserved,Biphase-Space,Biphase-Mark"
|
|
bitfld.long 0x04 4. " HMODE ,HDLC mode" "HDLC,NRZI"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IMODE ,Transmit idle mode" "Flag,1s"
|
|
bitfld.long 0x04 2. " UMODE ,Underrun mode" "Flag,Abort"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ECLK ,External clock mode (Receive/Transmit)" "Separate clocks,1 clock"
|
|
line.long 0x08 "HDLCCLKDIVL,HDLC Clock Divider Low"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DIVL ,Divider HDLC transmit and receive clock LSB bits"
|
|
line.long 0x0c "HDLCCLKDIVH,HDLC Clock Divider High"
|
|
bitfld.long 0x0c 7. " EN ,Clock Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0c 0.--6. 1. " DIVH ,Divider HDLC transmit and receive clock MSB bits"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
sif ((cpu()=="NS9210")||(cpu()=="NS9215"))
|
|
base ad:0x90030000
|
|
width 12.
|
|
tree "SPI Control and Status Register"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
|
|
bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
|
|
bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
|
|
line.long 0x04 "DMARXCTRL,DMA RX Control"
|
|
bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
|
|
hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
|
|
bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
|
|
bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
|
|
in
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "DMATXCTRL,DMA TX Control"
|
|
bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
|
|
bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
|
|
hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
|
|
line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
|
|
bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
|
bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x90031000
|
|
width 9.
|
|
tree "SPI Configuration System Registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SPICONF,SPI Configuration Register"
|
|
bitfld.long 0x00 12. " MLB ,Enable master loopback mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DISCARD ,Discard bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MODE ,SPI mode" "0,1,2,3"
|
|
bitfld.long 0x00 3. " RXBYTE ,Rx Byte" "4 bytes before writing,Each time a new byte is received"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BITORDR ,Bit ordering" "LSB/MSB,MSB/LSB"
|
|
bitfld.long 0x00 1. " SLAVE ,Slave enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MASTER ,Master enable" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CLKGEN,Clock Generation Register"
|
|
bitfld.long 0x00 16. " ENABLE ,Enable clock generation" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. " DIVISOR ,Divisor"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " TX_IDLE ,Enable transmit idle" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RX_IDLE ,Enable receive idle" "Disabled,Enabled"
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line.long 0x04 "INTSTAT,Interrupt Status Register"
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eventfld.long 0x04 1. " TX_IDLE ,Enable transmit idle" "No interrupt,Interrupt"
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|
eventfld.long 0x04 0. " RX_IDLE ,Enable receive idle" "No interrupt,Interrupt"
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|
tree.end
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width 0xb
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|
endif
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|
tree.end
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tree "ADC (Analog to Digital Converter)"
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sif (cpu()=="NS9215")
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base ad:0x90038000
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width 12.
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tree "ADC Control and Status Register"
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group.long 0x00++0x07
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line.long 0x00 "INTFIFOSTAT,Interrupt and FIFO Status Register"
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bitfld.long 0x00 31. " RXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 30. " RXECIP ,Error completion interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 29. " RXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 28. " RXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 27. " RXPCIP ,Premature completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 26. " RXFOFIP ,RX FIFO overflow interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 25. " RXFSRIP ,RX FIFO service request interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 24. " TXNCIP ,Normal completion interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 23. " TXECIP ,Error completion interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 22. " TXNRIP ,Buffer not ready interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 21. " TXCAIP ,Channel abort interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 20. " TXFUFIP ,TX FIFO underflow interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 19. " TXFSRIP ,TX FIFO service request interrupt pending" "Not pending,Pending"
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bitfld.long 0x00 18. " MODIP ,Module interrupt pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 15. " RXPBUSY ,RX Peripheral Busy" "Idle,Busy"
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bitfld.long 0x00 14. " RX_FIFO_full ,Receive status and data FIFO full status" "Not full,Full"
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textline " "
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bitfld.long 0x00 13. " RX_FIFO_empty ,Receive status and data FIFO empty status" "Not empty,Empty"
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bitfld.long 0x00 12. " TXPBUSY ,TX Peripheral busty" "Idle,Busy"
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textline " "
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bitfld.long 0x00 11. " TX_FIFO_full ,Transmit data FIFO full status" "Not full,Full"
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bitfld.long 0x00 10. " TX_FIFO_empty ,Transmit data FIFO empty status" "Not empty,Empty"
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line.long 0x04 "DMARXCTRL,DMA RX Control"
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bitfld.long 0x04 31. " CE ,Channel enable" "Disabled,Enabled"
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bitfld.long 0x04 30. " CA ,Channel abort" "Not aborted,Aborted"
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textline " "
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bitfld.long 0x04 29. " FIM ,Flexible Interface Module" "CPU,FIM"
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bitfld.long 0x04 28. " DIRECT ,Direct" "DMA,Direct access"
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textline " "
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hexmask.long.byte 0x04 10.--15. 1. " STATE ,DMA state machine status field"
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hexmask.long.word 0x04 0.--9. 1. " INDEX ,Index"
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group.long 0x08++0x03
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line.long 0x00 "DMARXBDP,DMA RX Buffer Descriptor Pointer"
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group.long 0x0c++0x03
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line.long 0x00 "RXINTCONF,RX Interrupt Configuration Register"
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bitfld.long 0x00 28.--31. " RXTHRS ,RX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 26. " RXFOFIE ,Enable the RXFOFIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " RXFSRIE ,Enable the RXFSRIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 24. " RXNCIE ,Enable the RXNCIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " RXECIE ,Enable the RXECIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 22. " RXNRIE ,Enable the RXNRIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " RXCAIE ,Enable the RXCAIP interrupt" "Disabled,Enabled"
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bitfld.long 0x00 20. " RXPCIE ,Enable the RXPCIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
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bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
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textline " "
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bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
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bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
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textline " "
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hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
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rgroup.long 0x10++0x03
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line.long 0x00 "DMRXSFIFO,Direct Mode RX Status FIFO"
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bitfld.long 0x00 9.--11. " BYTE ,Number of bytes" "0,1,2,3,4,?..."
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bitfld.long 0x00 7. " FFLAG ,Full flag" "Not full,Full"
|
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textline " "
|
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hexmask.long.byte 0x00 0.--6. 1. " PSTAT ,General peripheral status"
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hgroup.long 0x14++0x03
|
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hide.long 0x00 "DMRXDFIFO,Direct Mode RX Data FIFO"
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in
|
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group.long 0x18++0x07
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line.long 0x00 "DMATXCTRL,DMA TX Control"
|
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bitfld.long 0x00 31. " CE ,Channel enable" "Disabled,Enabled"
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bitfld.long 0x00 30. " CA ,Channel abort" "Not aborted,Aborted"
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textline " "
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bitfld.long 0x00 29. " FIM ,Flexible Interface Module" "CPU,FIM"
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bitfld.long 0x00 28. " DIRECT ,Direct" "DMA,Direct access"
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textline " "
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bitfld.long 0x00 27. " INDEXEN ,Indexen" "Not used,Used"
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hexmask.long.byte 0x00 10.--15. 1. " STATE ,DMA state machine status field"
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textline " "
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hexmask.long.word 0x00 0.--9. 1. " INDEX ,Index"
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line.long 0x04 "DMATXBDP,DMA TX Buffer Descriptor Pointer"
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group.long 0x20++0x03
|
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line.long 0x00 "TXINTCONF,TX Interrupt Configuration Register"
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bitfld.long 0x00 28.--31. " TXTHRS ,TX FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 26. " TXFUFIE ,Enable the TXFUFIP interrupt" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " TXFSRIE ,Enable the TXFSRIP interrupt" "Disabled,Enabled"
|
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bitfld.long 0x00 24. " TXNCIE ,Enable the NCIP interrupt" "Disabled,Enabled"
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textline " "
|
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bitfld.long 0x00 23. " TXECIE ,Enable the ECIP interrupt" "Disabled,Enabled"
|
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bitfld.long 0x00 22. " TXNRIE ,Enable the NRIP interrupt" "Disabled,Enabled"
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textline " "
|
|
bitfld.long 0x00 21. " TXCAIE ,Enable the CAIP interrupt" "Disabled,Enabled"
|
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bitfld.long 0x00 19. " WSTAT ,Debug field, indicating the W bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISTAT ,Debug field, indicating the I bit is set in the current buffer descriptor" "Low,High"
|
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bitfld.long 0x00 17. " LSTAT ,Debug field, indicating the L bit is set in the current buffer descriptor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FSTAT ,Debug field, indicating the F bit is set in the current buffer descriptor" "Low,High"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLENSTAT ,Debug field, indicating the current byte count"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "DMTXDFIFO,Direct Mode TX Data FIFO"
|
|
line.long 0x04 "DMTXDLFIFO,Direct Mode TX Data Last FIFO"
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x90039000
|
|
width 0x13
|
|
group.long 0x00++0x27
|
|
line.long 0x00 "ADC_CR,ADC Configuration Register"
|
|
bitfld.long 0x00 31. " ADCEN ,ADC module enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " INSTAT ,Interrupt status" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTCLR ,Interrupt clear" "Low,High"
|
|
bitfld.long 0x00 3. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SEL ,ADC channel select" "0,0-1,0-2,0-3,0-4,0-5,0-6,0-7"
|
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line.long 0x04 "ADC_CLKCR,ADC Clock Configuration Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " WAIT ,Number of additional clock cycles per conversion cycle"
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hexmask.long.word 0x04 0.--9. 1. " N ,ADC clock converter"
|
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line.long 0x8 "ADC_OR0,ADC Output Register 0"
|
|
hexmask.long.word 0x8 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
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line.long 0xC "ADC_OR1,ADC Output Register 1"
|
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hexmask.long.word 0xC 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
line.long 0x10 "ADC_OR2,ADC Output Register 2"
|
|
hexmask.long.word 0x10 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
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line.long 0x14 "ADC_OR3,ADC Output Register 3"
|
|
hexmask.long.word 0x14 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
line.long 0x18 "ADC_OR4,ADC Output Register 4"
|
|
hexmask.long.word 0x18 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
line.long 0x1C "ADC_OR5,ADC Output Register 5"
|
|
hexmask.long.word 0x1C 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
line.long 0x20 "ADC_OR6,ADC Output Register 6"
|
|
hexmask.long.word 0x20 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
line.long 0x24 "ADC_OR7,ADC Output Register 7"
|
|
hexmask.long.word 0x24 0.--11. 1. " DOUT ,Provides the output of the ADC for each channel"
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
textline ""
|