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d411edd9b47003e0a9ef98de9aef8259ddea419d
Gen4_R-Car_Trace32/2_Trunk/pernrf53xx.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: NRF53xx On-Chip Peripherals
; @Props: Released
; @Author: KWI, ADR
; @Changelog: 2020-03-12 KWI
; 2020-01-27 ADR
; @Manufacturer: NORDICSEMI - Nordic Semiconductor
; @Doc: SVD generated
; @Core: Cortex-M33, Cortex-M33F
; @Chip: NRF5340QKAA-APP, NRF5340QKAA-NET
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pernrf53xx.per 17736 2024-04-08 09:26:07Z kwisniewski $
sif (CORENAME()=="CORTEXM33F")
tree.close "Core Registers (Cortex-M33F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
textline " "
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
textline " "
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
textline " "
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline " "
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline " "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
textline " "
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline " "
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
textline " "
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
textline " "
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
textline " "
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
textline " "
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
textline " "
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
textline " "
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
textline " "
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline " "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline " "
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline " "
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline " "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline " "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline " "
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline " "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
textline " "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline " "
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline " "
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline " "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
else
tree.close "Core Registers (Cortex-M33)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
textline " "
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
textline " "
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
textline " "
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline " "
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline " "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
textline " "
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline " "
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
textline " "
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
textline " "
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
textline " "
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
textline " "
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
textline " "
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
textline " "
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
textline " "
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline " "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline " "
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline " "
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline " "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline " "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline " "
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline " "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
textline " "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline " "
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline " "
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline " "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
endif
autoindent.on center tree
sif cpuis("NRF5340QKAA-NET")
tree "AAR (Accelerated Address Resolver)"
base ad:0x4100E000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure"
bitfld.long 0x00 0. "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STOP,Stop resolving addresses"
bitfld.long 0x00 0. "TASKS_STOP,Stop resolving addresses" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_END,Address resolution procedure complete"
bitfld.long 0x00 0. "EVENTS_END,Address resolution procedure complete" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_RESOLVED,Address resolved"
bitfld.long 0x00 0. "EVENTS_RESOLVED,Address resolved" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_NOTRESOLVED,Address not resolved"
bitfld.long 0x00 0. "EVENTS_NOTRESOLVED,Address not resolved" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event END will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_RESOLVED,Publish configuration for event RESOLVED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RESOLVED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_NOTRESOLVED,Publish configuration for event NOTRESOLVED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event NOTRESOLVED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "NOTRESOLVED,Write '1' to enable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RESOLVED,Write '1' to enable interrupt for event RESOLVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "NOTRESOLVED,Write '1' to disable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RESOLVED,Write '1' to disable interrupt for event RESOLVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "STATUS,Resolution status"
bitfld.long 0x00 0.--3. "STATUS,The IRK that was used last time an address was resolved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable AAR"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable AAR" "0: Disabled,?,?,3: Enabled"
group.long 0x504++0x03
line.long 0x00 "NIRK,Number of IRKs"
bitfld.long 0x00 0.--4. "NIRK,Number of Identity root keys available in the IRK data structure" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x508++0x03
line.long 0x00 "IRKPTR,Pointer to IRK data structure"
hexmask.long 0x00 0.--31. 1. "IRKPTR,Pointer to the IRK data structure"
group.long 0x510++0x03
line.long 0x00 "ADDRPTR,Pointer to the resolvable address"
hexmask.long 0x00 0.--31. 1. "ADDRPTR,Pointer to the resolvable address (6-bytes)"
group.long 0x514++0x03
line.long 0x00 "SCRATCHPTR,Pointer to data area used for temporary storage"
hexmask.long 0x00 0.--31. 1. "SCRATCHPTR,Pointer to a scratch data area used for temporary storage during resolution"
tree.end
tree "ACL (Access Control Lists)"
base ad:0x41080000
repeat 8. (increment 0 1)(increment 0 0x10)
tree "ACL[$1]"
group.long ($2+0x800)++0x03
line.long 0x00 "ADDR,Description cluster: Configure the word-aligned start address of region n to protect"
hexmask.long 0x00 0.--31. 1. "ADDR,Valid word-aligned start address of region n to protect"
group.long ($2+0x804)++0x03
line.long 0x00 "SIZE,Description cluster: Size of region to protect counting from address ACL[n].ADDR"
hexmask.long 0x00 0.--31. 1. "SIZE,Size of flash region n in bytes"
group.long ($2+0x808)++0x03
line.long 0x00 "PERM,Description cluster: Access permissions for region n as defined by start address ACL[n].ADDR and size ACL[n].SIZE"
bitfld.long 0x00 2. "READ,Configure read permissions for region n" "0: Allow read instructions to region n,1: Block read instructions to region n"
bitfld.long 0x00 1. "WRITE,Configure write and erase permissions for region n" "0: Allow write and erase instructions to region n,1: Block write and erase instructions to region n"
tree.end
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "CACHE (Cache)"
base ad:0x50001000
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable cache"
bitfld.long 0x00 0. "ENABLE,Enable cache" "0: Disable cache,1: Enable cache"
wgroup.long 0x504++0x03
line.long 0x00 "INVALIDATE,Invalidate the cache"
bitfld.long 0x00 0. "INVALIDATE,Invalidate the cache" "?,1: Invalidate the cache"
wgroup.long 0x508++0x03
line.long 0x00 "ERASE,Erase the cache"
bitfld.long 0x00 0. "ERASE,Erase the cache" "?,1: Erase cache"
group.long 0x50C++0x03
line.long 0x00 "PROFILINGENABLE,Enable the profiling counters"
bitfld.long 0x00 0. "ENABLE,Enable the profiling counters" "0: Disable profiling,1: Enable profiling"
wgroup.long 0x510++0x03
line.long 0x00 "PROFILINGCLEAR,Clear the profiling counters"
bitfld.long 0x00 0. "CLEAR,Clearing the profiling counters" "?,1: Clear the profiling counters"
group.long 0x514++0x03
line.long 0x00 "MODE,Cache mode"
bitfld.long 0x00 0. "MODE,Cache mode" "0: Cache mode,1: RAM mode"
group.long 0x518++0x03
line.long 0x00 "DEBUGLOCK,Lock debug mode Ignored in RAM mode"
bitfld.long 0x00 0. "DEBUGLOCK,Lock debug mode" "0: Debug mode unlocked,1: Debug mode locked"
group.long 0x51C++0x03
line.long 0x00 "ERASESTATUS,Cache erase status"
bitfld.long 0x00 0. "ERASESTATUS,Cache erase status" "0: Erase is not complete or hasn't started,1: Cache erase is finished"
group.long 0x520++0x03
line.long 0x00 "WRITELOCK,Lock cache updates"
bitfld.long 0x00 0. "WRITELOCK,Lock cache updates" "0: Cache updates unlocked,1: Cache updates locked"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "PROFILING[$1]"
rgroup.long ($2+0x400)++0x03
line.long 0x00 "IHIT,Description cluster: Instruction fetch cache hit counter for cache region n where n=0 means Flash and n=1 means XIP"
hexmask.long 0x00 0.--31. 1. "HITS,Number of instruction cache hits"
rgroup.long ($2+0x404)++0x03
line.long 0x00 "IMISS,Description cluster: Instruction fetch cache miss counter for cache region n where n=0 means Flash and n=1 means XIP"
hexmask.long 0x00 0.--31. 1. "MISSES,Number of instruction cache misses"
rgroup.long ($2+0x408)++0x03
line.long 0x00 "DHIT,Description cluster: Data fetch cache hit counter for cache region n where n=0 means Flash and n=1 means XIP"
hexmask.long 0x00 0.--31. 1. "HITS,Number of data cache hits"
rgroup.long ($2+0x40C)++0x03
line.long 0x00 "DMISS,Description cluster: Data fetch cache miss counter for cache region n where n=0 means Flash and n=1 means XIP"
hexmask.long 0x00 0.--31. 1. "MISSES,Number of data cache misses"
tree.end
repeat.end
tree.end
tree "CACHEDATA"
base ad:0xF00000
repeat 256. (increment 0 1)(increment 0 0x20)
tree "SET[$1]"
tree "WAY[0]"
group.long ($2+0x00)++0x03
line.long 0x00 "DATA0,Description cluster: Cache data bits [31:0] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x04)++0x03
line.long 0x00 "DATA1,Description cluster: Cache data bits [63:32] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x08)++0x03
line.long 0x00 "DATA2,Description cluster: Cache data bits [95:64] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x0C)++0x03
line.long 0x00 "DATA3,Description cluster: Cache data bits [127:96] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
tree.end
tree "WAY[1]"
group.long ($2+0x10)++0x03
line.long 0x00 "DATA0,Description cluster: Cache data bits [31:0] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x14)++0x03
line.long 0x00 "DATA1,Description cluster: Cache data bits [63:32] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x18)++0x03
line.long 0x00 "DATA2,Description cluster: Cache data bits [95:64] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
group.long ($2+0x1C)++0x03
line.long 0x00 "DATA3,Description cluster: Cache data bits [127:96] of SET[n] WAY[o]"
hexmask.long 0x00 0.--31. 1. "Data,Data"
tree.end
tree.end
repeat.end
tree.end
tree "CACHEINFO"
base ad:0xF08000
repeat 256. (increment 0 1)(increment 0 0x8)
tree "SET[$1]"
group.long ($2+0x00)++0x03
line.long 0x00 "WAY[0],Description collection: Cache information for SET[n] WAY[o]"
rbitfld.long 0x00 31. "MRU,Most recently used way" "0: Way0 was most recently used,1: Way1 was most recently used"
rbitfld.long 0x00 30. "V,Valid bit" "0: Invalid cache line,1: Valid cache line"
newline
hexmask.long.tbyte 0x00 0.--16. 1. "TAG,Cache tag"
group.long ($2+0x04)++0x03
line.long 0x00 "WAY[1],Description collection: Cache information for SET[n] WAY[o]"
rbitfld.long 0x00 31. "MRU,Most recently used way" "0: Way0 was most recently used,1: Way1 was most recently used"
rbitfld.long 0x00 30. "V,Valid bit" "0: Invalid cache line,1: Valid cache line"
newline
hexmask.long.tbyte 0x00 0.--16. 1. "TAG,Cache tag"
tree.end
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "CCM (Clock Controller Module)"
base ad:0x4100E000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_KSGEN,Start generation of keystream"
bitfld.long 0x00 0. "TASKS_KSGEN,Start generation of keystream" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_CRYPT,Start encryption/decryption"
bitfld.long 0x00 0. "TASKS_CRYPT,Start encryption/decryption" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STOP,Stop encryption/decryption"
bitfld.long 0x00 0. "TASKS_STOP,Stop encryption/decryption" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"
bitfld.long 0x00 0. "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_KSGEN,Subscribe configuration for task KSGEN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task KSGEN will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_CRYPT,Subscribe configuration for task CRYPT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CRYPT will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_RATEOVERRIDE,Subscribe configuration for task RATEOVERRIDE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RATEOVERRIDE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_ENDKSGEN,Keystream generation complete"
bitfld.long 0x00 0. "EVENTS_ENDKSGEN,Keystream generation complete" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_ENDCRYPT,Encrypt/decrypt complete"
bitfld.long 0x00 0. "EVENTS_ENDCRYPT,Encrypt/decrypt complete" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_ERROR,Deprecated register - CCM error event"
bitfld.long 0x00 0. "EVENTS_ERROR,Deprecated field - CCM error event" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_ENDKSGEN,Publish configuration for event ENDKSGEN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDKSGEN will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_ENDCRYPT,Publish configuration for event ENDCRYPT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDCRYPT will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_ERROR,Deprecated register - Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ERROR will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 0. "ENDKSGEN_CRYPT,Shortcut between event ENDKSGEN and task CRYPT" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "ERROR,Deprecated intsetfield - Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "ENDCRYPT,Write '1' to enable interrupt for event ENDCRYPT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "ENDKSGEN,Write '1' to enable interrupt for event ENDKSGEN" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "ERROR,Deprecated intclrfield - Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "ENDCRYPT,Write '1' to disable interrupt for event ENDCRYPT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "ENDKSGEN,Write '1' to disable interrupt for event ENDKSGEN" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "MICSTATUS,MIC check result"
bitfld.long 0x00 0. "MICSTATUS,The result of the MIC check performed during the previous decryption operation" "0: MIC check failed,1: MIC check passed"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable CCM" "0: Disabled,?,2: Enabled,?..."
group.long 0x504++0x03
line.long 0x00 "MODE,Operation mode"
bitfld.long 0x00 24. "LENGTH,Packet length configuration" "0: Default length,1: Extended length"
bitfld.long 0x00 16.--17. "DATARATE,Radio data rate that the CCM shall run synchronous with" "0: 1 Mbps,1: 2 Mbps,2: 125 Kbps,3: 500 Kbps"
newline
bitfld.long 0x00 0. "MODE,The mode of operation to be used" "0: AES CCM packet encryption mode,1: AES CCM packet decryption mode"
group.long 0x508++0x03
line.long 0x00 "CNFPTR,Pointer to data structure holding the AES key and the NONCE vector"
hexmask.long 0x00 0.--31. 1. "CNFPTR,Pointer to the data structure holding the AES key and the CCM NONCE vector (see table CCM data structure overview)"
group.long 0x50C++0x03
line.long 0x00 "INPTR,Input pointer"
hexmask.long 0x00 0.--31. 1. "INPTR,Input pointer"
group.long 0x510++0x03
line.long 0x00 "OUTPTR,Output pointer"
hexmask.long 0x00 0.--31. 1. "OUTPTR,Output pointer"
group.long 0x514++0x03
line.long 0x00 "SCRATCHPTR,Pointer to data area used for temporary storage"
hexmask.long 0x00 0.--31. 1. "SCRATCHPTR,Pointer to a scratch data area used for temporary storage during keystream generation MIC generation and encryption/decryption"
group.long 0x518++0x03
line.long 0x00 "MAXPACKETSIZE,Length of keystream generated when MODE.LENGTH = Extended"
hexmask.long.byte 0x00 0.--7. 1. "MAXPACKETSIZE,Length of keystream generated when MODE.LENGTH = Extended"
group.long 0x51C++0x03
line.long 0x00 "RATEOVERRIDE,Data rate override setting"
bitfld.long 0x00 0.--1. "RATEOVERRIDE,Data rate override setting" "0: 1 Mbps,1: 2 Mbps,2: 125 Kbps,3: 500 Kbps"
group.long 0x520++0x03
line.long 0x00 "HEADERMASK,Header (S0) mask"
hexmask.long.byte 0x00 0.--7. 1. "HEADERMASK,Header (S0) mask"
tree.end
endif
tree "CLOCK (Clock Management)"
sif cpuis("NRF5340QKAA-NET")
tree "CLOCK_NS"
base ad:0x41005000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"
bitfld.long 0x00 0. "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source"
bitfld.long 0x00 0. "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC"
bitfld.long 0x00 0. "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_LFCLKSTOP,Stop LFCLK source"
bitfld.long 0x00 0. "TASKS_LFCLKSTOP,Stop LFCLK source" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_CAL,Start calibration of LFRC oscillator"
bitfld.long 0x00 0. "TASKS_CAL,Start calibration of LFRC oscillator" "?,1: Trigger task"
wgroup.long 0x18++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_HFCLK192MSTOP,Stop HFCLK192M source"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTOP,Stop HFCLK192M source" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTART,Subscribe configuration for task HFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLKSTART will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTOP,Subscribe configuration for task HFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLKSTOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTART,Subscribe configuration for task LFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task LFCLKSTART will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTOP,Subscribe configuration for task LFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task LFCLKSTOP will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_CAL,Subscribe configuration for task CAL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAL will subscribe to"
group.long 0x98++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTART,Subscribe configuration for task HFCLKAUDIOSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLKAUDIOSTART will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTOP,Subscribe configuration for task HFCLKAUDIOSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLKAUDIOSTOP will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTART,Subscribe configuration for task HFCLK192MSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLK192MSTART will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTOP,Subscribe configuration for task HFCLK192MSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task HFCLK192MSTOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started"
bitfld.long 0x00 0. "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_LFCLKSTARTED,LFCLK source started"
bitfld.long 0x00 0. "EVENTS_LFCLKSTARTED,LFCLK source started" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_DONE,Calibration of LFRC oscillator complete event"
bitfld.long 0x00 0. "EVENTS_DONE,Calibration of LFRC oscillator complete event" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started"
bitfld.long 0x00 0. "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_HFCLK192MSTARTED,HFCLK192M source started"
bitfld.long 0x00 0. "EVENTS_HFCLK192MSTARTED,HFCLK192M source started" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_HFCLKSTARTED,Publish configuration for event HFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event HFCLKSTARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_LFCLKSTARTED,Publish configuration for event LFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event LFCLKSTARTED will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_DONE,Publish configuration for event DONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event DONE will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_HFCLKAUDIOSTARTED,Publish configuration for event HFCLKAUDIOSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event HFCLKAUDIOSTARTED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_HFCLK192MSTARTED,Publish configuration for event HFCLK192MSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event HFCLK192MSTARTED will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Enable or disable interrupt for event HFCLK192MSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Enable or disable interrupt for event HFCLKAUDIOSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "DONE,Enable or disable interrupt for event DONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Enable or disable interrupt for event LFCLKSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Enable or disable interrupt for event HFCLKSTARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to enable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to enable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to enable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to enable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to disable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to disable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to disable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to disable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Read pending status of interrupt for event HFCLK192MSTARTED" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Read pending status of interrupt for event HFCLKAUDIOSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "DONE,Read pending status of interrupt for event DONE" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 1. "LFCLKSTARTED,Read pending status of interrupt for event LFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Read pending status of interrupt for event HFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
rgroup.long 0x408++0x03
line.long 0x00 "HFCLKRUN,Status indicating that HFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x40C++0x03
line.long 0x00 "HFCLKSTAT,Status indicating which HFCLK128M/HFCLK64M source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,HFCLK state" "0: HFCLK not running,1: HFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
rgroup.long 0x414++0x03
line.long 0x00 "LFCLKRUN,Status indicating that LFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,LFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x418++0x03
line.long 0x00 "LFCLKSTAT,Status indicating which LFCLK source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,LFCLK state" "0: LFCLK not running,1: LFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0.--1. "SRC,Active clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x41C++0x03
line.long 0x00 "LFCLKSRCCOPY,Copy of LFCLKSRC register set when LFCLKSTART task was triggered"
bitfld.long 0x00 0.--1. "SRC,Clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x450++0x03
line.long 0x00 "HFCLKAUDIORUN,Status indicating that HFCLKAUDIOSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKAUDIOSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x454++0x03
line.long 0x00 "HFCLKAUDIOSTAT,Status indicating which HFCLKAUDIO source is running"
bitfld.long 0x00 16. "STATE,HFCLKAUDIO state" "0: HFCLKAUDIO not running,1: HFCLKAUDIO running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
rgroup.long 0x458++0x03
line.long 0x00 "HFCLK192MRUN,Status indicating that HFCLK192MSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLK192MSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x45C++0x03
line.long 0x00 "HFCLK192MSTAT,Status indicating which HFCLK192M source is running"
bitfld.long 0x00 16. "STATE,HFCLK192M state" "0: HFCLK192M not running,1: HFCLK192M running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
group.long 0x514++0x03
line.long 0x00 "HFCLKSRC,Clock source for HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "SRC,Select which HFCLK source is started by the HFCLKSTART task" "0: HFCLKSTART task starts HFINT oscillator,1: HFCLKSTART task starts HFXO oscillator"
group.long 0x518++0x03
line.long 0x00 "LFCLKSRC,Clock source for LFCLK"
bitfld.long 0x00 0.--1. "SRC,Select which LFCLK source is started by the LFCLKSTART task" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
group.long 0x558++0x03
line.long 0x00 "HFCLKCTRL,HFCLK128M frequency configuration"
bitfld.long 0x00 0. "HCLK,High frequency clock HCLK" "0: Divide HFCLK by 1,1: Divide HFCLK by 2"
rgroup.long 0x570++0x03
line.long 0x00 "HFCLKALWAYSRUN,Automatic or manual control of HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x574++0x03
line.long 0x00 "LFCLKALWAYSRUN,Automatic or manual control of LFCLK"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x57C++0x03
line.long 0x00 "HFCLKAUDIOALWAYSRUN,Automatic or manual control of HFCLKAUDIO"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x580++0x03
line.long 0x00 "HFCLK192MSRC,Clock source for HFCLK192M"
bitfld.long 0x00 0. "SRC,Select which HFCLK192M source is started by the HFCLK192MSTART task" "0: HFCLK192MSTART task starts HFINT oscillator,1: HFCLK192MSTART task starts HFXO oscillator"
rgroup.long 0x584++0x03
line.long 0x00 "HFCLK192MALWAYSRUN,Automatic or manual control of HFCLK192M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x5B8++0x03
line.long 0x00 "HFCLK192MCTRL,HFCLK192M frequency configuration"
bitfld.long 0x00 0.--1. "HCLK192M,High frequency clock HCLK192M" "0: Divide HFCLK192M by 1,1: Divide HFCLK192M by 2,2: Divide HFCLK192M by 4,?..."
tree "HFCLKAUDIO"
group.long 0x55C++0x03
line.long 0x00 "FREQUENCY,Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"
abitfld.long 0x00 0.--15. "FREQUENCY,Frequency" "0x0000=0: 10.666 MHz,0xFFFF=65535: 13.333 MHz"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "CLOCK_NS"
base ad:0x40005000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"
bitfld.long 0x00 0. "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source"
bitfld.long 0x00 0. "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC"
bitfld.long 0x00 0. "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_LFCLKSTOP,Stop LFCLK source"
bitfld.long 0x00 0. "TASKS_LFCLKSTOP,Stop LFCLK source" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_CAL,Start calibration of LFRC oscillator"
bitfld.long 0x00 0. "TASKS_CAL,Start calibration of LFRC oscillator" "?,1: Trigger task"
wgroup.long 0x18++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_HFCLK192MSTOP,Stop HFCLK192M source"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTOP,Stop HFCLK192M source" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTART,Subscribe configuration for task HFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKSTART will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTOP,Subscribe configuration for task HFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKSTOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTART,Subscribe configuration for task LFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTART will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTOP,Subscribe configuration for task LFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTOP will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_CAL,Subscribe configuration for task CAL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAL will subscribe to"
group.long 0x98++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTART,Subscribe configuration for task HFCLKAUDIOSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKAUDIOSTART will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTOP,Subscribe configuration for task HFCLKAUDIOSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKAUDIOSTOP will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTART,Subscribe configuration for task HFCLK192MSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLK192MSTART will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTOP,Subscribe configuration for task HFCLK192MSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLK192MSTOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started"
bitfld.long 0x00 0. "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_LFCLKSTARTED,LFCLK source started"
bitfld.long 0x00 0. "EVENTS_LFCLKSTARTED,LFCLK source started" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_DONE,Calibration of LFRC oscillator complete event"
bitfld.long 0x00 0. "EVENTS_DONE,Calibration of LFRC oscillator complete event" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started"
bitfld.long 0x00 0. "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_HFCLK192MSTARTED,HFCLK192M source started"
bitfld.long 0x00 0. "EVENTS_HFCLK192MSTARTED,HFCLK192M source started" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_HFCLKSTARTED,Publish configuration for event HFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLKSTARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_LFCLKSTARTED,Publish configuration for event LFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LFCLKSTARTED will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_DONE,Publish configuration for event DONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_HFCLKAUDIOSTARTED,Publish configuration for event HFCLKAUDIOSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLKAUDIOSTARTED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_HFCLK192MSTARTED,Publish configuration for event HFCLK192MSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLK192MSTARTED will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Enable or disable interrupt for event HFCLK192MSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Enable or disable interrupt for event HFCLKAUDIOSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "DONE,Enable or disable interrupt for event DONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Enable or disable interrupt for event LFCLKSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Enable or disable interrupt for event HFCLKSTARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to enable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to enable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to enable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to enable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to disable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to disable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to disable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to disable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Read pending status of interrupt for event HFCLK192MSTARTED" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Read pending status of interrupt for event HFCLKAUDIOSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "DONE,Read pending status of interrupt for event DONE" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 1. "LFCLKSTARTED,Read pending status of interrupt for event LFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Read pending status of interrupt for event HFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
rgroup.long 0x408++0x03
line.long 0x00 "HFCLKRUN,Status indicating that HFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x40C++0x03
line.long 0x00 "HFCLKSTAT,Status indicating which HFCLK128M/HFCLK64M source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,HFCLK state" "0: HFCLK not running,1: HFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
rgroup.long 0x414++0x03
line.long 0x00 "LFCLKRUN,Status indicating that LFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,LFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x418++0x03
line.long 0x00 "LFCLKSTAT,Status indicating which LFCLK source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,LFCLK state" "0: LFCLK not running,1: LFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0.--1. "SRC,Active clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x41C++0x03
line.long 0x00 "LFCLKSRCCOPY,Copy of LFCLKSRC register set when LFCLKSTART task was triggered"
bitfld.long 0x00 0.--1. "SRC,Clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x450++0x03
line.long 0x00 "HFCLKAUDIORUN,Status indicating that HFCLKAUDIOSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKAUDIOSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x454++0x03
line.long 0x00 "HFCLKAUDIOSTAT,Status indicating which HFCLKAUDIO source is running"
bitfld.long 0x00 16. "STATE,HFCLKAUDIO state" "0: HFCLKAUDIO not running,1: HFCLKAUDIO running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
rgroup.long 0x458++0x03
line.long 0x00 "HFCLK192MRUN,Status indicating that HFCLK192MSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLK192MSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x45C++0x03
line.long 0x00 "HFCLK192MSTAT,Status indicating which HFCLK192M source is running"
bitfld.long 0x00 16. "STATE,HFCLK192M state" "0: HFCLK192M not running,1: HFCLK192M running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
group.long 0x514++0x03
line.long 0x00 "HFCLKSRC,Clock source for HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "SRC,Select which HFCLK source is started by the HFCLKSTART task" "0: HFCLKSTART task starts HFINT oscillator,1: HFCLKSTART task starts HFXO oscillator"
group.long 0x518++0x03
line.long 0x00 "LFCLKSRC,Clock source for LFCLK"
bitfld.long 0x00 0.--1. "SRC,Select which LFCLK source is started by the LFCLKSTART task" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
group.long 0x558++0x03
line.long 0x00 "HFCLKCTRL,HFCLK128M frequency configuration"
bitfld.long 0x00 0. "HCLK,High frequency clock HCLK" "0: Divide HFCLK by 1,1: Divide HFCLK by 2"
rgroup.long 0x570++0x03
line.long 0x00 "HFCLKALWAYSRUN,Automatic or manual control of HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x574++0x03
line.long 0x00 "LFCLKALWAYSRUN,Automatic or manual control of LFCLK"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x57C++0x03
line.long 0x00 "HFCLKAUDIOALWAYSRUN,Automatic or manual control of HFCLKAUDIO"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x580++0x03
line.long 0x00 "HFCLK192MSRC,Clock source for HFCLK192M"
bitfld.long 0x00 0. "SRC,Select which HFCLK192M source is started by the HFCLK192MSTART task" "0: HFCLK192MSTART task starts HFINT oscillator,1: HFCLK192MSTART task starts HFXO oscillator"
rgroup.long 0x584++0x03
line.long 0x00 "HFCLK192MALWAYSRUN,Automatic or manual control of HFCLK192M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x5B8++0x03
line.long 0x00 "HFCLK192MCTRL,HFCLK192M frequency configuration"
bitfld.long 0x00 0.--1. "HCLK192M,High frequency clock HCLK192M" "0: Divide HFCLK192M by 1,1: Divide HFCLK192M by 2,2: Divide HFCLK192M by 4,?..."
tree "HFCLKAUDIO"
group.long 0x55C++0x03
line.long 0x00 "FREQUENCY,Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"
abitfld.long 0x00 0.--15. "FREQUENCY,Frequency" "0x0000=0: 10.666 MHz,0xFFFF=65535: 13.333 MHz"
tree.end
tree.end
tree "CLOCK_S"
base ad:0x50005000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"
bitfld.long 0x00 0. "TASKS_HFCLKSTART,Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source"
bitfld.long 0x00 0. "TASKS_HFCLKSTOP,Stop HFCLK128M/HFCLK64M source" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC"
bitfld.long 0x00 0. "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLKSRC" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_LFCLKSTOP,Stop LFCLK source"
bitfld.long 0x00 0. "TASKS_LFCLKSTOP,Stop LFCLK source" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_CAL,Start calibration of LFRC oscillator"
bitfld.long 0x00 0. "TASKS_CAL,Start calibration of LFRC oscillator" "?,1: Trigger task"
wgroup.long 0x18++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTART,Start HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source"
bitfld.long 0x00 0. "TASKS_HFCLKAUDIOSTOP,Stop HFCLKAUDIO source" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTART,Start HFCLK192M source as selected in HFCLK192MSRC" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_HFCLK192MSTOP,Stop HFCLK192M source"
bitfld.long 0x00 0. "TASKS_HFCLK192MSTOP,Stop HFCLK192M source" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTART,Subscribe configuration for task HFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKSTART will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_HFCLKSTOP,Subscribe configuration for task HFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKSTOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTART,Subscribe configuration for task LFCLKSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTART will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_LFCLKSTOP,Subscribe configuration for task LFCLKSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTOP will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_CAL,Subscribe configuration for task CAL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAL will subscribe to"
group.long 0x98++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTART,Subscribe configuration for task HFCLKAUDIOSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKAUDIOSTART will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_HFCLKAUDIOSTOP,Subscribe configuration for task HFCLKAUDIOSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLKAUDIOSTOP will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTART,Subscribe configuration for task HFCLK192MSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLK192MSTART will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_HFCLK192MSTOP,Subscribe configuration for task HFCLK192MSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task HFCLK192MSTOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started"
bitfld.long 0x00 0. "EVENTS_HFCLKSTARTED,HFCLK128M/HFCLK64M source started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_LFCLKSTARTED,LFCLK source started"
bitfld.long 0x00 0. "EVENTS_LFCLKSTARTED,LFCLK source started" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_DONE,Calibration of LFRC oscillator complete event"
bitfld.long 0x00 0. "EVENTS_DONE,Calibration of LFRC oscillator complete event" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started"
bitfld.long 0x00 0. "EVENTS_HFCLKAUDIOSTARTED,HFCLKAUDIO source started" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_HFCLK192MSTARTED,HFCLK192M source started"
bitfld.long 0x00 0. "EVENTS_HFCLK192MSTARTED,HFCLK192M source started" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_HFCLKSTARTED,Publish configuration for event HFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLKSTARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_LFCLKSTARTED,Publish configuration for event LFCLKSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LFCLKSTARTED will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_DONE,Publish configuration for event DONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_HFCLKAUDIOSTARTED,Publish configuration for event HFCLKAUDIOSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLKAUDIOSTARTED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_HFCLK192MSTARTED,Publish configuration for event HFCLK192MSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event HFCLK192MSTARTED will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Enable or disable interrupt for event HFCLK192MSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Enable or disable interrupt for event HFCLKAUDIOSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "DONE,Enable or disable interrupt for event DONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Enable or disable interrupt for event LFCLKSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Enable or disable interrupt for event HFCLKSTARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to enable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to enable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to enable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to enable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Write '1' to disable interrupt for event HFCLK192MSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Write '1' to disable interrupt for event HFCLKAUDIOSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "LFCLKSTARTED,Write '1' to disable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Write '1' to disable interrupt for event HFCLKSTARTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 9. "HFCLK192MSTARTED,Read pending status of interrupt for event HFCLK192MSTARTED" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "HFCLKAUDIOSTARTED,Read pending status of interrupt for event HFCLKAUDIOSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "DONE,Read pending status of interrupt for event DONE" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 1. "LFCLKSTARTED,Read pending status of interrupt for event LFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 0. "HFCLKSTARTED,Read pending status of interrupt for event HFCLKSTARTED" "0: Read: Not pending,1: Read: Pending"
rgroup.long 0x408++0x03
line.long 0x00 "HFCLKRUN,Status indicating that HFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x40C++0x03
line.long 0x00 "HFCLKSTAT,Status indicating which HFCLK128M/HFCLK64M source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,HFCLK state" "0: HFCLK not running,1: HFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
rgroup.long 0x414++0x03
line.long 0x00 "LFCLKRUN,Status indicating that LFCLKSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,LFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x418++0x03
line.long 0x00 "LFCLKSTAT,Status indicating which LFCLK source is running Note: Value of this register in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance"
bitfld.long 0x00 16. "STATE,LFCLK state" "0: LFCLK not running,1: LFCLK running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0.--1. "SRC,Active clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x41C++0x03
line.long 0x00 "LFCLKSRCCOPY,Copy of LFCLKSRC register set when LFCLKSTART task was triggered"
bitfld.long 0x00 0.--1. "SRC,Clock source" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
rgroup.long 0x450++0x03
line.long 0x00 "HFCLKAUDIORUN,Status indicating that HFCLKAUDIOSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLKAUDIOSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x454++0x03
line.long 0x00 "HFCLKAUDIOSTAT,Status indicating which HFCLKAUDIO source is running"
bitfld.long 0x00 16. "STATE,HFCLKAUDIO state" "0: HFCLKAUDIO not running,1: HFCLKAUDIO running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
rgroup.long 0x458++0x03
line.long 0x00 "HFCLK192MRUN,Status indicating that HFCLK192MSTART task has been triggered"
bitfld.long 0x00 0. "STATUS,HFCLK192MSTART task triggered or not" "0: Task not triggered,1: Task triggered"
rgroup.long 0x45C++0x03
line.long 0x00 "HFCLK192MSTAT,Status indicating which HFCLK192M source is running"
bitfld.long 0x00 16. "STATE,HFCLK192M state" "0: HFCLK192M not running,1: HFCLK192M running"
bitfld.long 0x00 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running"
newline
bitfld.long 0x00 0. "SRC,Active clock source" "0: Clock source,1: Clock source"
group.long 0x514++0x03
line.long 0x00 "HFCLKSRC,Clock source for HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "SRC,Select which HFCLK source is started by the HFCLKSTART task" "0: HFCLKSTART task starts HFINT oscillator,1: HFCLKSTART task starts HFXO oscillator"
group.long 0x518++0x03
line.long 0x00 "LFCLKSRC,Clock source for LFCLK"
bitfld.long 0x00 0.--1. "SRC,Select which LFCLK source is started by the LFCLKSTART task" "0: 32.768 kHz ultra-low power RC oscillator,1: 32.768 kHz RC oscillator,2: 32.768 kHz crystal oscillator,3: 32.768 kHz synthesized from HFCLK"
group.long 0x558++0x03
line.long 0x00 "HFCLKCTRL,HFCLK128M frequency configuration"
bitfld.long 0x00 0. "HCLK,High frequency clock HCLK" "0: Divide HFCLK by 1,1: Divide HFCLK by 2"
rgroup.long 0x570++0x03
line.long 0x00 "HFCLKALWAYSRUN,Automatic or manual control of HFCLK128M/HFCLK64M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x574++0x03
line.long 0x00 "LFCLKALWAYSRUN,Automatic or manual control of LFCLK"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
rgroup.long 0x57C++0x03
line.long 0x00 "HFCLKAUDIOALWAYSRUN,Automatic or manual control of HFCLKAUDIO"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x580++0x03
line.long 0x00 "HFCLK192MSRC,Clock source for HFCLK192M"
bitfld.long 0x00 0. "SRC,Select which HFCLK192M source is started by the HFCLK192MSTART task" "0: HFCLK192MSTART task starts HFINT oscillator,1: HFCLK192MSTART task starts HFXO oscillator"
rgroup.long 0x584++0x03
line.long 0x00 "HFCLK192MALWAYSRUN,Automatic or manual control of HFCLK192M"
bitfld.long 0x00 0. "ALWAYSRUN,Ensure clock is always running" "0: Use automatic clock control,1: Ensure clock is always running"
group.long 0x5B8++0x03
line.long 0x00 "HFCLK192MCTRL,HFCLK192M frequency configuration"
bitfld.long 0x00 0.--1. "HCLK192M,High frequency clock HCLK192M" "0: Divide HFCLK192M by 1,1: Divide HFCLK192M by 2,2: Divide HFCLK192M by 4,?..."
tree "HFCLKAUDIO"
group.long 0x55C++0x03
line.long 0x00 "FREQUENCY,Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"
abitfld.long 0x00 0.--15. "FREQUENCY,Frequency" "0x0000=0: 10.666 MHz,0xFFFF=65535: 13.333 MHz"
tree.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "COMP (Comparator)"
tree "COMP_NS"
base ad:0x4001A000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start comparator"
bitfld.long 0x00 0. "TASKS_START,Start comparator" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop comparator"
bitfld.long 0x00 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SAMPLE,Sample comparator value"
bitfld.long 0x00 0. "TASKS_SAMPLE,Sample comparator value" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,COMP is ready and output is valid"
bitfld.long 0x00 0. "EVENTS_READY,COMP is ready and output is valid" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DOWN,Downward crossing"
bitfld.long 0x00 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_UP,Upward crossing"
bitfld.long 0x00 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_CROSS,Downward or upward crossing"
bitfld.long 0x00 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_DOWN,Publish configuration for event DOWN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_UP,Publish configuration for event UP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_CROSS,Publish configuration for event CROSS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "UP,Enable or disable interrupt for event UP" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RESULT,Compare result"
bitfld.long 0x00 0. "RESULT,Result of last compare" "0: Input voltage is below the threshold (VIN+..,1: Input voltage is above the threshold (VIN+.."
group.long 0x500++0x03
line.long 0x00 "ENABLE,COMP enable"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable COMP" "0: Disabled,?,2: Enabled,?..."
group.long 0x504++0x03
line.long 0x00 "PSEL,Pin select"
bitfld.long 0x00 0.--2. "PSEL,Analog pin select" "0: AIN0 selected as analog input,1: AIN1 selected as analog input,2: AIN2 selected as analog input,3: AIN3 selected as analog input,4: AIN4 selected as analog input,5: AIN5 selected as analog input,6: AIN6 selected as analog input,7: AIN7 selected as analog input"
group.long 0x508++0x03
line.long 0x00 "REFSEL,Reference source select for single-ended mode"
bitfld.long 0x00 0.--2. "REFSEL,Reference select" "0: VREF = internal 1.2 V reference (VDD &gt =..,1: VREF = internal 1.8 V reference (VDD &gt =..,2: VREF = internal 2.4 V reference (VDD &gt =..,?,4: VREF = VDD,5: VREF = AREF,?..."
group.long 0x50C++0x03
line.long 0x00 "EXTREFSEL,External reference select"
bitfld.long 0x00 0.--2. "EXTREFSEL,External analog reference select" "0: Use AIN0 as external analog reference,1: Use AIN1 as external analog reference,2: Use AIN2 as external analog reference,3: Use AIN3 as external analog reference,4: Use AIN4 as external analog reference,5: Use AIN5 as external analog reference,6: Use AIN6 as external analog reference,7: Use AIN7 as external analog reference"
group.long 0x530++0x03
line.long 0x00 "TH,Threshold configuration for hysteresis unit"
bitfld.long 0x00 8.--13. "THUP,VUP = (THUP+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "THDOWN,VDOWN = (THDOWN+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "MODE,Mode configuration"
bitfld.long 0x00 8. "MAIN,Main operation modes" "0: Single-ended mode,1: Differential mode"
bitfld.long 0x00 0.--1. "SP,Speed and power modes" "0: Low-power mode,1: Normal mode,2: High-speed mode,?..."
group.long 0x538++0x03
line.long 0x00 "HYST,Comparator hysteresis enable"
bitfld.long 0x00 0. "HYST,Comparator hysteresis" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled"
group.long 0x53C++0x03
line.long 0x00 "ISOURCE,Current source select on analog input"
bitfld.long 0x00 0.--1. "ISOURCE,Comparator hysteresis" "0: Current source disabled,1: Current source enabled (+/- 2.5 uA),2: Current source enabled (+/- 5 uA),3: Current source enabled (+/- 10 uA)"
tree.end
tree "COMP_S"
base ad:0x5001A000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start comparator"
bitfld.long 0x00 0. "TASKS_START,Start comparator" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop comparator"
bitfld.long 0x00 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SAMPLE,Sample comparator value"
bitfld.long 0x00 0. "TASKS_SAMPLE,Sample comparator value" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,COMP is ready and output is valid"
bitfld.long 0x00 0. "EVENTS_READY,COMP is ready and output is valid" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DOWN,Downward crossing"
bitfld.long 0x00 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_UP,Upward crossing"
bitfld.long 0x00 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_CROSS,Downward or upward crossing"
bitfld.long 0x00 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_DOWN,Publish configuration for event DOWN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_UP,Publish configuration for event UP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_CROSS,Publish configuration for event CROSS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "UP,Enable or disable interrupt for event UP" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RESULT,Compare result"
bitfld.long 0x00 0. "RESULT,Result of last compare" "0: Input voltage is below the threshold (VIN+..,1: Input voltage is above the threshold (VIN+.."
group.long 0x500++0x03
line.long 0x00 "ENABLE,COMP enable"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable COMP" "0: Disabled,?,2: Enabled,?..."
group.long 0x504++0x03
line.long 0x00 "PSEL,Pin select"
bitfld.long 0x00 0.--2. "PSEL,Analog pin select" "0: AIN0 selected as analog input,1: AIN1 selected as analog input,2: AIN2 selected as analog input,3: AIN3 selected as analog input,4: AIN4 selected as analog input,5: AIN5 selected as analog input,6: AIN6 selected as analog input,7: AIN7 selected as analog input"
group.long 0x508++0x03
line.long 0x00 "REFSEL,Reference source select for single-ended mode"
bitfld.long 0x00 0.--2. "REFSEL,Reference select" "0: VREF = internal 1.2 V reference (VDD &gt =..,1: VREF = internal 1.8 V reference (VDD &gt =..,2: VREF = internal 2.4 V reference (VDD &gt =..,?,4: VREF = VDD,5: VREF = AREF,?..."
group.long 0x50C++0x03
line.long 0x00 "EXTREFSEL,External reference select"
bitfld.long 0x00 0.--2. "EXTREFSEL,External analog reference select" "0: Use AIN0 as external analog reference,1: Use AIN1 as external analog reference,2: Use AIN2 as external analog reference,3: Use AIN3 as external analog reference,4: Use AIN4 as external analog reference,5: Use AIN5 as external analog reference,6: Use AIN6 as external analog reference,7: Use AIN7 as external analog reference"
group.long 0x530++0x03
line.long 0x00 "TH,Threshold configuration for hysteresis unit"
bitfld.long 0x00 8.--13. "THUP,VUP = (THUP+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "THDOWN,VDOWN = (THDOWN+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "MODE,Mode configuration"
bitfld.long 0x00 8. "MAIN,Main operation modes" "0: Single-ended mode,1: Differential mode"
bitfld.long 0x00 0.--1. "SP,Speed and power modes" "0: Low-power mode,1: Normal mode,2: High-speed mode,?..."
group.long 0x538++0x03
line.long 0x00 "HYST,Comparator hysteresis enable"
bitfld.long 0x00 0. "HYST,Comparator hysteresis" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled"
group.long 0x53C++0x03
line.long 0x00 "ISOURCE,Current source select on analog input"
bitfld.long 0x00 0.--1. "ISOURCE,Comparator hysteresis" "0: Current source disabled,1: Current source enabled (+/- 2.5 uA),2: Current source enabled (+/- 5 uA),3: Current source enabled (+/- 10 uA)"
tree.end
tree.end
tree "CRYPTOCELL (ARM TrustZone CryptoCell Register Interface)"
base ad:0x50844000
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable CRYPTOCELL subsystem"
bitfld.long 0x00 0. "ENABLE,Enable or disable the CRYPTOCELL subsystem" "0: CRYPTOCELL subsystem disabled,1: CRYPTOCELL subsystem enabled"
tree.end
endif
tree "CTI (Cross-Trigger Interface Control)"
sif cpuis("NRF5340QKAA-NET")
base ad:0xE0042000
group.long 0x00++0x03
line.long 0x00 "CTICONTROL,CTI Control register"
bitfld.long 0x00 0. "GLBEN,Enables or disables the CTI" "0: All cross-triggering mapping logic..,1: Cross-triggering mapping logic functionality.."
wgroup.long 0x10++0x03
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge register"
bitfld.long 0x00 7. "UNUSED5,N/A" "?,1: Clears the ctitrigout"
bitfld.long 0x00 6. "UNUSED4,N/A" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 5. "UNUSED3,N/A" "?,1: Clears the ctitrigout"
bitfld.long 0x00 4. "UNUSED2,N/A" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 3. "UNUSED1,N/A" "?,1: Clears the ctitrigout"
bitfld.long 0x00 2. "UNUSED0,N/A" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 1. "CPURESTART,Processor Restart" "?,1: Clears the ctitrigout"
bitfld.long 0x00 0. "DEBUGREQ,Processor debug request" "?,1: Clears the ctitrigout"
group.long 0x14++0x03
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set register"
bitfld.long 0x00 3. "APPSET_3,Application trigger event for channel 3" "0: Application trigger 3 is inactive,1: Application trigger 3 is active"
bitfld.long 0x00 2. "APPSET_2,Application trigger event for channel 2" "0: Application trigger 2 is inactive,1: Application trigger 2 is active"
newline
bitfld.long 0x00 1. "APPSET_1,Application trigger event for channel 1" "0: Application trigger 1 is inactive,1: Application trigger 1 is active"
bitfld.long 0x00 0. "APPSET_0,Application trigger event for channel 0" "0: Application trigger 0 is inactive,1: Application trigger 0 is active"
wgroup.long 0x18++0x03
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear register"
bitfld.long 0x00 3. "APPCLEAR_3,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 3"
bitfld.long 0x00 2. "APPCLEAR_2,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 2"
newline
bitfld.long 0x00 1. "APPCLEAR_1,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 1"
bitfld.long 0x00 0. "APPCLEAR_0,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 0"
wgroup.long 0x1C++0x03
line.long 0x00 "CTIAPPPULSE,CTI Application Pulse register"
bitfld.long 0x00 3. "APPULSE_3,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 3"
bitfld.long 0x00 2. "APPULSE_2,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 2"
newline
bitfld.long 0x00 1. "APPULSE_1,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 1"
bitfld.long 0x00 0. "APPULSE_0,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 0"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x20)++0x03
line.long 0x00 "CTIINEN[$1],Description collection: CTI Trigger input $1"
bitfld.long 0x00 3. "TRIGINEN_3,Enables a cross trigger event to channel 3 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 3,1: When an event is received on input trigger n.."
bitfld.long 0x00 2. "TRIGINEN_2,Enables a cross trigger event to channel 2 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 2,1: When an event is received on input trigger n.."
newline
bitfld.long 0x00 1. "TRIGINEN_1,Enables a cross trigger event to channel 1 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 1,1: When an event is received on input trigger n.."
bitfld.long 0x00 0. "TRIGINEN_0,Enables a cross trigger event to channel 0 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 0,1: When an event is received on input trigger n.."
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xA0)++0x03
line.long 0x00 "CTIOUTEN[$1],Description collection: CTI Trigger output $1"
bitfld.long 0x00 3. "TRIGOUTEN_3,Enables a cross trigger event to ctitrigout when channel 3 when is activated" "0: Channel 3 is ignored by output trigger n,1: When an event occur on channel 3 generate an.."
bitfld.long 0x00 2. "TRIGOUTEN_2,Enables a cross trigger event to ctitrigout when channel 2 when is activated" "0: Channel 2 is ignored by output trigger n,1: When an event occur on channel 2 generate an.."
newline
bitfld.long 0x00 1. "TRIGOUTEN_1,Enables a cross trigger event to ctitrigout when channel 1 when is activated" "0: Channel 1 is ignored by output trigger n,1: When an event occur on channel 1 generate an.."
bitfld.long 0x00 0. "TRIGOUTEN_0,Enables a cross trigger event to ctitrigout when channel 0 when is activated" "0: Channel 0 is ignored by output trigger n,1: When an event occur on channel 0 generate an.."
repeat.end
rgroup.long 0x130++0x03
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status register"
bitfld.long 0x00 7. "UNUSED3,N/A" "0: Ctitrigin 7 is inactive,1: Ctitrigin 7 is active"
bitfld.long 0x00 6. "UNUSED2,N/A" "0: Ctitrigin 6 is inactive,1: Ctitrigin 6 is active"
newline
bitfld.long 0x00 5. "UNUSED1,N/A" "0: Ctitrigin 5 is inactive,1: Ctitrigin 5 is active"
bitfld.long 0x00 4. "UNUSED0,N/A" "0: Ctitrigin 4 is inactive,1: Ctitrigin 4 is active"
newline
bitfld.long 0x00 3. "DWTCOMPOUT2,DWT Comparator Output 2" "0: Ctitrigin 3 is inactive,1: Ctitrigin 3 is active"
bitfld.long 0x00 2. "DWTCOMPOUT1,DWT Comparator Output 1" "0: Ctitrigin 2 is inactive,1: Ctitrigin 2 is active"
newline
bitfld.long 0x00 1. "DWTCOMPOUT0,DWT Comparator Output 0" "0: Ctitrigin 1 is inactive,1: Ctitrigin 1 is active"
bitfld.long 0x00 0. "CPUHALTED,Processor Halted" "0: Ctitrigin 0 is inactive,1: Ctitrigin 0 is active"
rgroup.long 0x134++0x03
line.long 0x00 "CTITRIGOUTSTATUS,CTI Trigger Out Status register"
bitfld.long 0x00 7. "UNUSED5,N/A" "0: Ctitrigout 7 is inactive,1: Ctitrigout 7 is active"
bitfld.long 0x00 6. "UNUSED4,N/A" "0: Ctitrigout 6 is inactive,1: Ctitrigout 6 is active"
newline
bitfld.long 0x00 5. "UNUSED3,N/A" "0: Ctitrigout 5 is inactive,1: Ctitrigout 5 is active"
bitfld.long 0x00 4. "UNUSED2,N/A" "0: Ctitrigout 4 is inactive,1: Ctitrigout 4 is active"
newline
bitfld.long 0x00 3. "UNUSED1,N/A" "0: Ctitrigout 3 is inactive,1: Ctitrigout 3 is active"
bitfld.long 0x00 2. "UNUSED0,N/A" "0: Ctitrigout 2 is inactive,1: Ctitrigout 2 is active"
newline
bitfld.long 0x00 1. "CPURESTART,Processor Restart" "0: Ctitrigout 1 is inactive,1: Ctitrigout 1 is active"
bitfld.long 0x00 0. "DEBUGREQ,Processor debug request" "0: Ctitrigout 0 is inactive,1: Ctitrigout 0 is active"
rgroup.long 0x138++0x03
line.long 0x00 "CTICHINSTATUS,CTI Channel In Status register"
bitfld.long 0x00 3. "CTICHINSTATUS_3,Shows the status of the ctitrigin 3 input" "0: Ctichin 3 is inactive,1: Ctichin 3 is active"
bitfld.long 0x00 2. "CTICHINSTATUS_2,Shows the status of the ctitrigin 2 input" "0: Ctichin 2 is inactive,1: Ctichin 2 is active"
newline
bitfld.long 0x00 1. "CTICHINSTATUS_1,Shows the status of the ctitrigin 1 input" "0: Ctichin 1 is inactive,1: Ctichin 1 is active"
bitfld.long 0x00 0. "CTICHINSTATUS_0,Shows the status of the ctitrigin 0 input" "0: Ctichin 0 is inactive,1: Ctichin 0 is active"
group.long 0x140++0x03
line.long 0x00 "CTIGATE,Enable CTI Channel Gate register"
bitfld.long 0x00 3. "CTIGATEEN_3,Enable ctichout3" "0: Disable ctichout channel 3 propagation,1: Enable ctichout channel 3 propagation"
bitfld.long 0x00 2. "CTIGATEEN_2,Enable ctichout2" "0: Disable ctichout channel 2 propagation,1: Enable ctichout channel 2 propagation"
newline
bitfld.long 0x00 1. "CTIGATEEN_1,Enable ctichout1" "0: Disable ctichout channel 1 propagation,1: Enable ctichout channel 1 propagation"
bitfld.long 0x00 0. "CTIGATEEN_0,Enable ctichout0" "0: Disable ctichout channel 0 propagation,1: Enable ctichout channel 0 propagation"
rgroup.long 0xFBC++0x03
line.long 0x00 "DEVARCH,Device Architecture register"
bitfld.long 0x00 0. "Architecture,Contains the CTI device architecture" "0,1"
rgroup.long 0xFC8++0x03
line.long 0x00 "DEVID,Device Configuration register"
bitfld.long 0x00 16.--19. "NUMCH,Number of ECT channels available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 8.--15. 1. "NUMTRIG,Number of ECT triggers available"
newline
bitfld.long 0x00 0.--4. "EXTMUXNUM,Indicates the number of multiplexers available on Trigger Inputs and Trigger Outputs that are using asicctl" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0xFCC++0x03
line.long 0x00 "DEVTYPE,Device Type Identifier register"
bitfld.long 0x00 4.--7. "SUB,Sub-classification of the type of the debug component as specified in the ARM Architecture Specification within the major classification as specified in the MAJOR field" "?,1: Indicates that this component is a..,?..."
bitfld.long 0x00 0.--3. "MAJOR,Major classification of the type of the debug component as specified in the ARM Architecture Specification for this debug and trace component" "?,?,?,?,4: Indicates that this component allows a..,?..."
rgroup.long 0xFD0++0x03
line.long 0x00 "PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "SIZE,Always 0b0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "DES_2,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,?,4: JEDEC continuation code,?..."
rgroup.long 0xFD4++0x03
line.long 0x00 "PIDR5,Peripheral ID5 register"
rgroup.long 0xFD8++0x03
line.long 0x00 "PIDR6,Peripheral ID6 register"
rgroup.long 0xFDC++0x03
line.long 0x00 "PIDR7,Peripheral ID7 register"
rgroup.long 0xFE0++0x03
line.long 0x00 "PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "PART_0,Bits[7:0] of the 12-bit part number of the component"
rgroup.long 0xFE4++0x03
line.long 0x00 "PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "DES_0,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,?,?,?,?,?,?,?,?,11: ARM,?..."
bitfld.long 0x00 0.--3. "PART_1,Bits[11:8] of the 12-bit part number of the component" "?,?,?,?,?,?,?,?,?,?,?,?,?,13: Indicates bits[11:8] of the part number of..,?..."
rgroup.long 0xFE8++0x03
line.long 0x00 "PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "REVISION,Peripheral revision" "0: This device is at r0p0,?..."
bitfld.long 0x00 3. "JEDEC,Always 1" "0,1"
newline
bitfld.long 0x00 0.--2. "DES_1,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,3: ARM,?..."
rgroup.long 0xFEC++0x03
line.long 0x00 "PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "REVAND,Indicates minor errata fixes specific to the revision of the component being used for example metal fixes after implementation" "0: Indicates that there are no errata fixes to..,?..."
bitfld.long 0x00 0.--3. "CMOD,Customer Modified" "0: Indicates that the customer has not modified..,?..."
rgroup.long 0xFF0++0x03
line.long 0x00 "CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_0,Preamble[0]"
rgroup.long 0xFF4++0x03
line.long 0x00 "CIDR1,Component ID1 Register"
bitfld.long 0x00 4.--7. "CLASS,Class of the component for example whether the component is a ROM table or a generic CoreSight component" "?,?,?,?,?,?,?,?,?,9: Indicates that the component is a CoreSight..,?..."
bitfld.long 0x00 0.--3. "PRMBL_1,Preamble[1]" "0: Bits[11:8] of the identification code,?..."
rgroup.long 0xFF8++0x03
line.long 0x00 "CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_2,Preamble[2]"
rgroup.long 0xFFC++0x03
line.long 0x00 "CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_3,Preamble[3]"
endif
sif cpuis("NRF5340QKAA-APP")
base ad:0xE0042000
group.long 0x00++0x03
line.long 0x00 "CTICONTROL,CTI Control register"
bitfld.long 0x00 0. "GLBEN,Enables or disables the CTI" "0: All cross-triggering mapping logic..,1: Cross-triggering mapping logic functionality.."
wgroup.long 0x10++0x03
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge register"
bitfld.long 0x00 7. "ETMEVTIN3,ETM Event Input 3" "?,1: Clears the ctitrigout"
bitfld.long 0x00 6. "ETMEVTIN2,ETM Event Input 2" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 5. "ETMEVTIN1,ETM Event Input 1" "?,1: Clears the ctitrigout"
bitfld.long 0x00 4. "ETMEVTIN0,ETM Event Input 0" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 3. "UNUSED1,N/A" "?,1: Clears the ctitrigout"
bitfld.long 0x00 2. "UNUSED0,N/A" "?,1: Clears the ctitrigout"
newline
bitfld.long 0x00 1. "CPURESTART,Processor Restart" "?,1: Clears the ctitrigout"
bitfld.long 0x00 0. "DEBUGREQ,Processor debug request" "?,1: Clears the ctitrigout"
group.long 0x14++0x03
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set register"
bitfld.long 0x00 3. "APPSET_3,Application trigger event for channel 3" "0: Application trigger 3 is inactive,1: Application trigger 3 is active"
bitfld.long 0x00 2. "APPSET_2,Application trigger event for channel 2" "0: Application trigger 2 is inactive,1: Application trigger 2 is active"
newline
bitfld.long 0x00 1. "APPSET_1,Application trigger event for channel 1" "0: Application trigger 1 is inactive,1: Application trigger 1 is active"
bitfld.long 0x00 0. "APPSET_0,Application trigger event for channel 0" "0: Application trigger 0 is inactive,1: Application trigger 0 is active"
wgroup.long 0x18++0x03
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear register"
bitfld.long 0x00 3. "APPCLEAR_3,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 3"
bitfld.long 0x00 2. "APPCLEAR_2,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 2"
newline
bitfld.long 0x00 1. "APPCLEAR_1,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 1"
bitfld.long 0x00 0. "APPCLEAR_0,Sets the corresponding bits in the CTIAPPSET to 0" "?,1: Clears the event for channel 0"
wgroup.long 0x1C++0x03
line.long 0x00 "CTIAPPPULSE,CTI Application Pulse register"
bitfld.long 0x00 3. "APPULSE_3,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 3"
bitfld.long 0x00 2. "APPULSE_2,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 2"
newline
bitfld.long 0x00 1. "APPULSE_1,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 1"
bitfld.long 0x00 0. "APPULSE_0,Setting a bit HIGH generates a channel event pulse for the selected channel" "?,1: Generates an event pulse on channel 0"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x20)++0x03
line.long 0x00 "CTIINEN[$1],Description collection: CTI Trigger input $1"
bitfld.long 0x00 3. "TRIGINEN_3,Enables a cross trigger event to channel 3 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 3,1: When an event is received on input trigger n.."
bitfld.long 0x00 2. "TRIGINEN_2,Enables a cross trigger event to channel 2 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 2,1: When an event is received on input trigger n.."
newline
bitfld.long 0x00 1. "TRIGINEN_1,Enables a cross trigger event to channel 1 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 1,1: When an event is received on input trigger n.."
bitfld.long 0x00 0. "TRIGINEN_0,Enables a cross trigger event to channel 0 when a ctitrigin input is activated" "0: Input trigger n events are ignored by channel 0,1: When an event is received on input trigger n.."
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xA0)++0x03
line.long 0x00 "CTIOUTEN[$1],Description collection: CTI Trigger output $1"
bitfld.long 0x00 3. "TRIGOUTEN_3,Enables a cross trigger event to ctitrigout when channel 3 when is activated" "0: Channel 3 is ignored by output trigger n,1: When an event occur on channel 3 generate an.."
bitfld.long 0x00 2. "TRIGOUTEN_2,Enables a cross trigger event to ctitrigout when channel 2 when is activated" "0: Channel 2 is ignored by output trigger n,1: When an event occur on channel 2 generate an.."
newline
bitfld.long 0x00 1. "TRIGOUTEN_1,Enables a cross trigger event to ctitrigout when channel 1 when is activated" "0: Channel 1 is ignored by output trigger n,1: When an event occur on channel 1 generate an.."
bitfld.long 0x00 0. "TRIGOUTEN_0,Enables a cross trigger event to ctitrigout when channel 0 when is activated" "0: Channel 0 is ignored by output trigger n,1: When an event occur on channel 0 generate an.."
repeat.end
rgroup.long 0x130++0x03
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status register"
bitfld.long 0x00 7. "UNUSED1,N/A" "0: Ctitrigin 7 is inactive,1: Ctitrigin 7 is active"
bitfld.long 0x00 6. "UNUSED0,N/A" "0: Ctitrigin 6 is inactive,1: Ctitrigin 6 is active"
newline
bitfld.long 0x00 5. "ETMEVTOUT1,ETM Event Output 1" "0: Ctitrigin 5 is inactive,1: Ctitrigin 5 is active"
bitfld.long 0x00 4. "ETMEVTOUT0,ETM Event Output 0" "0: Ctitrigin 4 is inactive,1: Ctitrigin 4 is active"
newline
bitfld.long 0x00 3. "DWTCOMPOUT2,DWT Comparator Output 2" "0: Ctitrigin 3 is inactive,1: Ctitrigin 3 is active"
bitfld.long 0x00 2. "DWTCOMPOUT1,DWT Comparator Output 1" "0: Ctitrigin 2 is inactive,1: Ctitrigin 2 is active"
newline
bitfld.long 0x00 1. "DWTCOMPOUT0,DWT Comparator Output 0" "0: Ctitrigin 1 is inactive,1: Ctitrigin 1 is active"
bitfld.long 0x00 0. "CPUHALTED,Processor Halted" "0: Ctitrigin 0 is inactive,1: Ctitrigin 0 is active"
rgroup.long 0x134++0x03
line.long 0x00 "CTITRIGOUTSTATUS,CTI Trigger Out Status register"
bitfld.long 0x00 7. "ETMEVTIN3,ETM Event Input 3" "0: Ctitrigout 7 is inactive,1: Ctitrigout 7 is active"
bitfld.long 0x00 6. "ETMEVTIN2,ETM Event Input 2" "0: Ctitrigout 6 is inactive,1: Ctitrigout 6 is active"
newline
bitfld.long 0x00 5. "ETMEVTIN1,ETM Event Input 1" "0: Ctitrigout 5 is inactive,1: Ctitrigout 5 is active"
bitfld.long 0x00 4. "ETMEVTIN0,ETM Event Input 0" "0: Ctitrigout 4 is inactive,1: Ctitrigout 4 is active"
newline
bitfld.long 0x00 3. "UNUSED1,N/A" "0: Ctitrigout 3 is inactive,1: Ctitrigout 3 is active"
bitfld.long 0x00 2. "UNUSED0,N/A" "0: Ctitrigout 2 is inactive,1: Ctitrigout 2 is active"
newline
bitfld.long 0x00 1. "CPURESTART,Processor Restart" "0: Ctitrigout 1 is inactive,1: Ctitrigout 1 is active"
bitfld.long 0x00 0. "DEBUGREQ,Processor debug request" "0: Ctitrigout 0 is inactive,1: Ctitrigout 0 is active"
rgroup.long 0x138++0x03
line.long 0x00 "CTICHINSTATUS,CTI Channel In Status register"
bitfld.long 0x00 3. "CTICHINSTATUS_3,Shows the status of the ctitrigin 3 input" "0: Ctichin 3 is inactive,1: Ctichin 3 is active"
bitfld.long 0x00 2. "CTICHINSTATUS_2,Shows the status of the ctitrigin 2 input" "0: Ctichin 2 is inactive,1: Ctichin 2 is active"
newline
bitfld.long 0x00 1. "CTICHINSTATUS_1,Shows the status of the ctitrigin 1 input" "0: Ctichin 1 is inactive,1: Ctichin 1 is active"
bitfld.long 0x00 0. "CTICHINSTATUS_0,Shows the status of the ctitrigin 0 input" "0: Ctichin 0 is inactive,1: Ctichin 0 is active"
group.long 0x140++0x03
line.long 0x00 "CTIGATE,Enable CTI Channel Gate register"
bitfld.long 0x00 3. "CTIGATEEN_3,Enable ctichout3" "0: Disable ctichout channel 3 propagation,1: Enable ctichout channel 3 propagation"
bitfld.long 0x00 2. "CTIGATEEN_2,Enable ctichout2" "0: Disable ctichout channel 2 propagation,1: Enable ctichout channel 2 propagation"
newline
bitfld.long 0x00 1. "CTIGATEEN_1,Enable ctichout1" "0: Disable ctichout channel 1 propagation,1: Enable ctichout channel 1 propagation"
bitfld.long 0x00 0. "CTIGATEEN_0,Enable ctichout0" "0: Disable ctichout channel 0 propagation,1: Enable ctichout channel 0 propagation"
rgroup.long 0xFBC++0x03
line.long 0x00 "DEVARCH,Device Architecture register"
bitfld.long 0x00 0. "Architecture,Contains the CTI device architecture" "0,1"
rgroup.long 0xFC8++0x03
line.long 0x00 "DEVID,Device Configuration register"
bitfld.long 0x00 16.--19. "NUMCH,Number of ECT channels available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 8.--15. 1. "NUMTRIG,Number of ECT triggers available"
newline
bitfld.long 0x00 0.--4. "EXTMUXNUM,Indicates the number of multiplexers available on Trigger Inputs and Trigger Outputs that are using asicctl" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0xFCC++0x03
line.long 0x00 "DEVTYPE,Device Type Identifier register"
bitfld.long 0x00 4.--7. "SUB,Sub-classification of the type of the debug component as specified in the ARM Architecture Specification within the major classification as specified in the MAJOR field" "?,1: Indicates that this component is a..,?..."
bitfld.long 0x00 0.--3. "MAJOR,Major classification of the type of the debug component as specified in the ARM Architecture Specification for this debug and trace component" "?,?,?,?,4: Indicates that this component allows a..,?..."
rgroup.long 0xFD0++0x03
line.long 0x00 "PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "SIZE,Always 0b0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "DES_2,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,?,4: JEDEC continuation code,?..."
rgroup.long 0xFD4++0x03
line.long 0x00 "PIDR5,Peripheral ID5 register"
rgroup.long 0xFD8++0x03
line.long 0x00 "PIDR6,Peripheral ID6 register"
rgroup.long 0xFDC++0x03
line.long 0x00 "PIDR7,Peripheral ID7 register"
rgroup.long 0xFE0++0x03
line.long 0x00 "PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "PART_0,Bits[7:0] of the 12-bit part number of the component"
rgroup.long 0xFE4++0x03
line.long 0x00 "PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "DES_0,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,?,?,?,?,?,?,?,?,11: ARM,?..."
bitfld.long 0x00 0.--3. "PART_1,Bits[11:8] of the 12-bit part number of the component" "?,?,?,?,?,?,?,?,?,?,?,?,?,13: Indicates bits[11:8] of the part number of..,?..."
rgroup.long 0xFE8++0x03
line.long 0x00 "PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "REVISION,Peripheral revision" "0: This device is at r0p0,?..."
bitfld.long 0x00 3. "JEDEC,Always 1" "0,1"
newline
bitfld.long 0x00 0.--2. "DES_1,Together PIDR1.DES_0 PIDR2.DES_1 and PIDR4.DES_2 identify the designer of the component" "?,?,?,3: ARM,?..."
rgroup.long 0xFEC++0x03
line.long 0x00 "PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "REVAND,Indicates minor errata fixes specific to the revision of the component being used for example metal fixes after implementation" "0: Indicates that there are no errata fixes to..,?..."
bitfld.long 0x00 0.--3. "CMOD,Customer Modified" "0: Indicates that the customer has not modified..,?..."
rgroup.long 0xFF0++0x03
line.long 0x00 "CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_0,Preamble[0]"
rgroup.long 0xFF4++0x03
line.long 0x00 "CIDR1,Component ID1 Register"
bitfld.long 0x00 4.--7. "CLASS,Class of the component for example whether the component is a ROM table or a generic CoreSight component" "?,?,?,?,?,?,?,?,?,9: Indicates that the component is a CoreSight..,?..."
bitfld.long 0x00 0.--3. "PRMBL_1,Preamble[1]" "0: Bits[11:8] of the identification code,?..."
rgroup.long 0xFF8++0x03
line.long 0x00 "CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_2,Preamble[2]"
rgroup.long 0xFFC++0x03
line.long 0x00 "CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_3,Preamble[3]"
endif
tree.end
tree "CTRLAPPERI (Control Access Port)"
sif cpuis("NRF5340QKAA-NET")
tree "CTRLAP_NS"
base ad:0x41006000
rgroup.long 0x600++0x03
line.long 0x00 "STATUS,Status bits for CTRL-AP peripheral"
bitfld.long 0x00 2. "SECUREAPPROTECT,Status bit for access port protection in secure mode" "0: Secure mode access port protection is..,1: Secure mode access port protection is.."
bitfld.long 0x00 1. "APPROTECT,Status bit for access port protection in non-secure mode" "0: Non-secure mode access port protection is..,1: Non-secure mode access port protection is.."
newline
bitfld.long 0x00 0. "DBGIFACEMODE,Status bit for device debug interface mode" "0: No debugger attached,1: Debugger is attached and device is in debug.."
tree "MAILBOX"
rgroup.long 0x400++0x03
line.long 0x00 "RXDATA,Data sent from the debugger to the CPU"
hexmask.long 0x00 0.--31. 1. "RXDATA,Data received from debugger"
rgroup.long 0x404++0x03
line.long 0x00 "RXSTATUS,Status to indicate if data sent from the debugger to the CPU has been"
bitfld.long 0x00 0. "RXSTATUS,Status of data in register RXDATA" "0: No data pending in register RXDATA,1: Data pending in register RXDATA"
group.long 0x480++0x03
line.long 0x00 "TXDATA,Data sent from the CPU to the debugger"
hexmask.long 0x00 0.--31. 1. "TXDATA,Data sent to debugger"
rgroup.long 0x484++0x03
line.long 0x00 "TXSTATUS,Status to indicate if data sent from the CPU to the debugger has been"
bitfld.long 0x00 0. "TXSTATUS,Status of data in register TXDATA" "0: No data pending in register TXDATA,1: Data pending in register TXDATA"
tree.end
tree "ERASEPROTECT"
group.long 0x500++0x03
line.long 0x00 "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset" "0: Register ERASEPROTECT.DISABLE is writeable,1: Register ERASEPROTECT.DISABLE is read-only"
group.long 0x504++0x03
line.long 0x00 "DISABLE,Disable ERASEPROTECT and perform ERASEALL"
hexmask.long 0x00 0.--31. 1. "KEY,The ERASEALL sequence will be initiated if value of KEY fields are non-zero and KEY fields match on both CPU and debugger side"
tree.end
tree "APPROTECT"
group.long 0x540++0x03
line.long 0x00 "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset"
bitfld.long 0x00 0. "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset" "0: Register APPROTECT.DISABLE is writeable,1: Register APPROTECT.DISABLE is read-only"
group.long 0x544++0x03
line.long 0x00 "DISABLE,Disable APPROTECT and enable debug access to non-secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable APPROTECT and enable debug access to non-secure mode until next pin reset if KEY fields match The current APPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree "SECUREAPPROTECT"
group.long 0x548++0x03
line.long 0x00 "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset" "0: Register SECUREAPPROTECT.DISABLE is writeable,1: Register SECUREAPPROTECT.DISABLE is read-only"
group.long 0x54C++0x03
line.long 0x00 "DISABLE,Disable SECUREAPPROTECT and enable debug access to secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable SECUREAPPROTECT and enable debug of secure mode until next pin reset if KEY fields match The current SECUREAPPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "CTRLAP_NS"
base ad:0x40006000
rgroup.long 0x600++0x03
line.long 0x00 "STATUS,Status bits for CTRL-AP peripheral"
bitfld.long 0x00 2. "SECUREAPPROTECT,Status bit for access port protection in secure mode" "0: Secure mode access port protection is..,1: Secure mode access port protection is.."
bitfld.long 0x00 1. "APPROTECT,Status bit for access port protection in non-secure mode" "0: Non-secure mode access port protection is..,1: Non-secure mode access port protection is.."
newline
bitfld.long 0x00 0. "DBGIFACEMODE,Status bit for device debug interface mode" "0: No debugger attached,1: Debugger is attached and device is in debug.."
tree "MAILBOX"
rgroup.long 0x400++0x03
line.long 0x00 "RXDATA,Data sent from the debugger to the CPU"
hexmask.long 0x00 0.--31. 1. "RXDATA,Data received from debugger"
rgroup.long 0x404++0x03
line.long 0x00 "RXSTATUS,Status to indicate if data sent from the debugger to the CPU has been"
bitfld.long 0x00 0. "RXSTATUS,Status of data in register RXDATA" "0: No data pending in register RXDATA,1: Data pending in register RXDATA"
group.long 0x480++0x03
line.long 0x00 "TXDATA,Data sent from the CPU to the debugger"
hexmask.long 0x00 0.--31. 1. "TXDATA,Data sent to debugger"
rgroup.long 0x484++0x03
line.long 0x00 "TXSTATUS,Status to indicate if data sent from the CPU to the debugger has been"
bitfld.long 0x00 0. "TXSTATUS,Status of data in register TXDATA" "0: No data pending in register TXDATA,1: Data pending in register TXDATA"
tree.end
tree "ERASEPROTECT"
group.long 0x500++0x03
line.long 0x00 "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset" "0: Register ERASEPROTECT.DISABLE is writeable,1: Register ERASEPROTECT.DISABLE is read-only"
group.long 0x504++0x03
line.long 0x00 "DISABLE,Disable ERASEPROTECT and perform ERASEALL"
hexmask.long 0x00 0.--31. 1. "KEY,The ERASEALL sequence will be initiated if value of KEY fields are non-zero and KEY fields match on both CPU and debugger side"
tree.end
tree "APPROTECT"
group.long 0x540++0x03
line.long 0x00 "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset"
bitfld.long 0x00 0. "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset" "0: Register APPROTECT.DISABLE is writeable,1: Register APPROTECT.DISABLE is read-only"
group.long 0x544++0x03
line.long 0x00 "DISABLE,Disable APPROTECT and enable debug access to non-secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable APPROTECT and enable debug access to non-secure mode until next pin reset if KEY fields match The current APPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree "SECUREAPPROTECT"
group.long 0x548++0x03
line.long 0x00 "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset" "0: Register SECUREAPPROTECT.DISABLE is writeable,1: Register SECUREAPPROTECT.DISABLE is read-only"
group.long 0x54C++0x03
line.long 0x00 "DISABLE,Disable SECUREAPPROTECT and enable debug access to secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable SECUREAPPROTECT and enable debug of secure mode until next pin reset if KEY fields match The current SECUREAPPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree.end
tree "CTRLAP_S"
base ad:0x50006000
rgroup.long 0x600++0x03
line.long 0x00 "STATUS,Status bits for CTRL-AP peripheral"
bitfld.long 0x00 2. "SECUREAPPROTECT,Status bit for access port protection in secure mode" "0: Secure mode access port protection is..,1: Secure mode access port protection is.."
bitfld.long 0x00 1. "APPROTECT,Status bit for access port protection in non-secure mode" "0: Non-secure mode access port protection is..,1: Non-secure mode access port protection is.."
newline
bitfld.long 0x00 0. "DBGIFACEMODE,Status bit for device debug interface mode" "0: No debugger attached,1: Debugger is attached and device is in debug.."
tree "MAILBOX"
rgroup.long 0x400++0x03
line.long 0x00 "RXDATA,Data sent from the debugger to the CPU"
hexmask.long 0x00 0.--31. 1. "RXDATA,Data received from debugger"
rgroup.long 0x404++0x03
line.long 0x00 "RXSTATUS,Status to indicate if data sent from the debugger to the CPU has been"
bitfld.long 0x00 0. "RXSTATUS,Status of data in register RXDATA" "0: No data pending in register RXDATA,1: Data pending in register RXDATA"
group.long 0x480++0x03
line.long 0x00 "TXDATA,Data sent from the CPU to the debugger"
hexmask.long 0x00 0.--31. 1. "TXDATA,Data sent to debugger"
rgroup.long 0x484++0x03
line.long 0x00 "TXSTATUS,Status to indicate if data sent from the CPU to the debugger has been"
bitfld.long 0x00 0. "TXSTATUS,Status of data in register TXDATA" "0: No data pending in register TXDATA,1: Data pending in register TXDATA"
tree.end
tree "ERASEPROTECT"
group.long 0x500++0x03
line.long 0x00 "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register ERASEPROTECT.DISABLE from being written until next reset" "0: Register ERASEPROTECT.DISABLE is writeable,1: Register ERASEPROTECT.DISABLE is read-only"
group.long 0x504++0x03
line.long 0x00 "DISABLE,Disable ERASEPROTECT and perform ERASEALL"
hexmask.long 0x00 0.--31. 1. "KEY,The ERASEALL sequence will be initiated if value of KEY fields are non-zero and KEY fields match on both CPU and debugger side"
tree.end
tree "APPROTECT"
group.long 0x540++0x03
line.long 0x00 "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset"
bitfld.long 0x00 0. "LOCK,Lock register APPROTECT.DISABLE from being written to until next reset" "0: Register APPROTECT.DISABLE is writeable,1: Register APPROTECT.DISABLE is read-only"
group.long 0x544++0x03
line.long 0x00 "DISABLE,Disable APPROTECT and enable debug access to non-secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable APPROTECT and enable debug access to non-secure mode until next pin reset if KEY fields match The current APPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree "SECUREAPPROTECT"
group.long 0x548++0x03
line.long 0x00 "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset"
bitfld.long 0x00 0. "LOCK,Lock register SECUREAPPROTECT.DISABLE from being written until next reset" "0: Register SECUREAPPROTECT.DISABLE is writeable,1: Register SECUREAPPROTECT.DISABLE is read-only"
group.long 0x54C++0x03
line.long 0x00 "DISABLE,Disable SECUREAPPROTECT and enable debug access to secure mode"
hexmask.long 0x00 0.--31. 1. "KEY,Disable SECUREAPPROTECT and enable debug of secure mode until next pin reset if KEY fields match The current SECUREAPPROTECT value as configured from UICR is bypassed if value of KEY fields are non-zero and KEY fields match on both CPU and debugger.."
tree.end
tree.end
endif
tree.end
tree "DCNF (Domain Configuration Management)"
sif cpuis("NRF5340QKAA-NET")
tree "DCNF_NS"
base ad:0x41000000
rgroup.long 0x420++0x03
line.long 0x00 "CPUID,CPU ID of this subsystem"
hexmask.long.byte 0x00 0.--7. 1. "CPUID,CPU ID"
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "DCNF_NS"
base ad:0x40000000
rgroup.long 0x420++0x03
line.long 0x00 "CPUID,CPU ID of this subsystem"
hexmask.long.byte 0x00 0.--7. 1. "CPUID,CPU ID"
tree "EXTPERI[0]"
group.long 0x440++0x03
line.long 0x00 "PROTECT,Description cluster: Control access for master connected to AMLI master port EXTPERI[n]"
bitfld.long 0x00 0. "SLAVE0,Control access to slave 0 of master EXTPERI[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
tree.end
tree "EXTRAM[0]"
group.long 0x460++0x03
line.long 0x00 "PROTECT,Description cluster: Control access from master connected to AMLI master port EXTRAM[n]"
bitfld.long 0x00 7. "SLAVE7,Control access to slave 7 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 6. "SLAVE6,Control access to slave 6 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 5. "SLAVE5,Control access to slave 5 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 4. "SLAVE4,Control access to slave 4 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 3. "SLAVE3,Control access to slave 3 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 2. "SLAVE2,Control access to slave 2 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 1. "SLAVE1,Control access to slave 1 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 0. "SLAVE0,Control access to slave 0 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
tree.end
tree.end
tree "DCNF_S"
base ad:0x50000000
rgroup.long 0x420++0x03
line.long 0x00 "CPUID,CPU ID of this subsystem"
hexmask.long.byte 0x00 0.--7. 1. "CPUID,CPU ID"
tree "EXTPERI[0]"
group.long 0x440++0x03
line.long 0x00 "PROTECT,Description cluster: Control access for master connected to AMLI master port EXTPERI[n]"
bitfld.long 0x00 0. "SLAVE0,Control access to slave 0 of master EXTPERI[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
tree.end
tree "EXTRAM[0]"
group.long 0x460++0x03
line.long 0x00 "PROTECT,Description cluster: Control access from master connected to AMLI master port EXTRAM[n]"
bitfld.long 0x00 7. "SLAVE7,Control access to slave 7 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 6. "SLAVE6,Control access to slave 6 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 5. "SLAVE5,Control access to slave 5 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 4. "SLAVE4,Control access to slave 4 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 3. "SLAVE3,Control access to slave 3 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 2. "SLAVE2,Control access to slave 2 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
newline
bitfld.long 0x00 1. "SLAVE1,Control access to slave 1 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
bitfld.long 0x00 0. "SLAVE0,Control access to slave 0 of master EXTRAM[n]" "0: Access to slave is allowed,1: Access to slave is blocked"
tree.end
tree.end
endif
tree.end
tree "DPPIC (Distributed Programmable Peripheral Interconnect Controller)"
sif cpuis("NRF5340QKAA-NET")
tree "DPPIC_NS"
base ad:0x4100F000
group.long 0x500++0x03
line.long 0x00 "CHEN,Channel enable register"
bitfld.long 0x00 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel"
group.long 0x504++0x03
line.long 0x00 "CHENSET,Channel enable set register"
bitfld.long 0x00 15. "CH15,Channel 15 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
group.long 0x508++0x03
line.long 0x00 "CHENCLR,Channel enable clear register"
bitfld.long 0x00 15. "CH15,Channel 15 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x800)++0x03
line.long 0x00 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled $1"
bitfld.long 0x00 15. "CH15,Include or exclude channel 15" "0: Excluded,1: Included"
bitfld.long 0x00 14. "CH14,Include or exclude channel 14" "0: Excluded,1: Included"
newline
bitfld.long 0x00 13. "CH13,Include or exclude channel 13" "0: Excluded,1: Included"
bitfld.long 0x00 12. "CH12,Include or exclude channel 12" "0: Excluded,1: Included"
newline
bitfld.long 0x00 11. "CH11,Include or exclude channel 11" "0: Excluded,1: Included"
bitfld.long 0x00 10. "CH10,Include or exclude channel 10" "0: Excluded,1: Included"
newline
bitfld.long 0x00 9. "CH9,Include or exclude channel 9" "0: Excluded,1: Included"
bitfld.long 0x00 8. "CH8,Include or exclude channel 8" "0: Excluded,1: Included"
newline
bitfld.long 0x00 7. "CH7,Include or exclude channel 7" "0: Excluded,1: Included"
bitfld.long 0x00 6. "CH6,Include or exclude channel 6" "0: Excluded,1: Included"
newline
bitfld.long 0x00 5. "CH5,Include or exclude channel 5" "0: Excluded,1: Included"
bitfld.long 0x00 4. "CH4,Include or exclude channel 4" "0: Excluded,1: Included"
newline
bitfld.long 0x00 3. "CH3,Include or exclude channel 3" "0: Excluded,1: Included"
bitfld.long 0x00 2. "CH2,Include or exclude channel 2" "0: Excluded,1: Included"
newline
bitfld.long 0x00 1. "CH1,Include or exclude channel 1" "0: Excluded,1: Included"
bitfld.long 0x00 0. "CH0,Include or exclude channel 0" "0: Excluded,1: Included"
repeat.end
repeat 6. (increment 0 1)(increment 0 0x8)
tree "TASKS_CHG[$1]"
wgroup.long ($2+0x00)++0x03
line.long 0x00 "EN,Description cluster: Enable channel group n"
bitfld.long 0x00 0. "EN,Enable channel group n" "?,1: Trigger task"
wgroup.long ($2+0x04)++0x03
line.long 0x00 "DIS,Description cluster: Disable channel group n"
bitfld.long 0x00 0. "DIS,Disable channel group n" "?,1: Trigger task"
tree.end
repeat.end
repeat 6. (increment 0 1)(increment 0 0x88)
tree "SUBSCRIBE_CHG[$1]"
group.long ($2+0x80)++0x03
line.long 0x00 "EN,Description cluster: Subscribe configuration for task CHG[n].EN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CHG[n].EN will subscribe to"
group.long ($2+0x84)++0x03
line.long 0x00 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CHG[n].DIS will subscribe to"
tree.end
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "DPPIC_NS"
base ad:0x40017000
group.long 0x500++0x03
line.long 0x00 "CHEN,Channel enable register"
bitfld.long 0x00 31. "CH31,Enable or disable channel 31" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 30. "CH30,Enable or disable channel 30" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 29. "CH29,Enable or disable channel 29" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 28. "CH28,Enable or disable channel 28" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 27. "CH27,Enable or disable channel 27" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 26. "CH26,Enable or disable channel 26" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 25. "CH25,Enable or disable channel 25" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 24. "CH24,Enable or disable channel 24" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel"
group.long 0x504++0x03
line.long 0x00 "CHENSET,Channel enable set register"
bitfld.long 0x00 31. "CH31,Channel 31 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 30. "CH30,Channel 30 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 29. "CH29,Channel 29 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 28. "CH28,Channel 28 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 27. "CH27,Channel 27 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 26. "CH26,Channel 26 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 25. "CH25,Channel 25 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 24. "CH24,Channel 24 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 23. "CH23,Channel 23 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 22. "CH22,Channel 22 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 21. "CH21,Channel 21 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 20. "CH20,Channel 20 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 19. "CH19,Channel 19 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 18. "CH18,Channel 18 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 17. "CH17,Channel 17 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 16. "CH16,Channel 16 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 15. "CH15,Channel 15 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
group.long 0x508++0x03
line.long 0x00 "CHENCLR,Channel enable clear register"
bitfld.long 0x00 31. "CH31,Channel 31 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 30. "CH30,Channel 30 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 29. "CH29,Channel 29 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 28. "CH28,Channel 28 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 27. "CH27,Channel 27 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 26. "CH26,Channel 26 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 25. "CH25,Channel 25 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 24. "CH24,Channel 24 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 23. "CH23,Channel 23 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 22. "CH22,Channel 22 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 21. "CH21,Channel 21 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 20. "CH20,Channel 20 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 19. "CH19,Channel 19 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 18. "CH18,Channel 18 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 17. "CH17,Channel 17 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 16. "CH16,Channel 16 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 15. "CH15,Channel 15 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x800)++0x03
line.long 0x00 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled $1"
bitfld.long 0x00 31. "CH31,Include or exclude channel 31" "0: Excluded,1: Included"
bitfld.long 0x00 30. "CH30,Include or exclude channel 30" "0: Excluded,1: Included"
newline
bitfld.long 0x00 29. "CH29,Include or exclude channel 29" "0: Excluded,1: Included"
bitfld.long 0x00 28. "CH28,Include or exclude channel 28" "0: Excluded,1: Included"
newline
bitfld.long 0x00 27. "CH27,Include or exclude channel 27" "0: Excluded,1: Included"
bitfld.long 0x00 26. "CH26,Include or exclude channel 26" "0: Excluded,1: Included"
newline
bitfld.long 0x00 25. "CH25,Include or exclude channel 25" "0: Excluded,1: Included"
bitfld.long 0x00 24. "CH24,Include or exclude channel 24" "0: Excluded,1: Included"
newline
bitfld.long 0x00 23. "CH23,Include or exclude channel 23" "0: Excluded,1: Included"
bitfld.long 0x00 22. "CH22,Include or exclude channel 22" "0: Excluded,1: Included"
newline
bitfld.long 0x00 21. "CH21,Include or exclude channel 21" "0: Excluded,1: Included"
bitfld.long 0x00 20. "CH20,Include or exclude channel 20" "0: Excluded,1: Included"
newline
bitfld.long 0x00 19. "CH19,Include or exclude channel 19" "0: Excluded,1: Included"
bitfld.long 0x00 18. "CH18,Include or exclude channel 18" "0: Excluded,1: Included"
newline
bitfld.long 0x00 17. "CH17,Include or exclude channel 17" "0: Excluded,1: Included"
bitfld.long 0x00 16. "CH16,Include or exclude channel 16" "0: Excluded,1: Included"
newline
bitfld.long 0x00 15. "CH15,Include or exclude channel 15" "0: Excluded,1: Included"
bitfld.long 0x00 14. "CH14,Include or exclude channel 14" "0: Excluded,1: Included"
newline
bitfld.long 0x00 13. "CH13,Include or exclude channel 13" "0: Excluded,1: Included"
bitfld.long 0x00 12. "CH12,Include or exclude channel 12" "0: Excluded,1: Included"
newline
bitfld.long 0x00 11. "CH11,Include or exclude channel 11" "0: Excluded,1: Included"
bitfld.long 0x00 10. "CH10,Include or exclude channel 10" "0: Excluded,1: Included"
newline
bitfld.long 0x00 9. "CH9,Include or exclude channel 9" "0: Excluded,1: Included"
bitfld.long 0x00 8. "CH8,Include or exclude channel 8" "0: Excluded,1: Included"
newline
bitfld.long 0x00 7. "CH7,Include or exclude channel 7" "0: Excluded,1: Included"
bitfld.long 0x00 6. "CH6,Include or exclude channel 6" "0: Excluded,1: Included"
newline
bitfld.long 0x00 5. "CH5,Include or exclude channel 5" "0: Excluded,1: Included"
bitfld.long 0x00 4. "CH4,Include or exclude channel 4" "0: Excluded,1: Included"
newline
bitfld.long 0x00 3. "CH3,Include or exclude channel 3" "0: Excluded,1: Included"
bitfld.long 0x00 2. "CH2,Include or exclude channel 2" "0: Excluded,1: Included"
newline
bitfld.long 0x00 1. "CH1,Include or exclude channel 1" "0: Excluded,1: Included"
bitfld.long 0x00 0. "CH0,Include or exclude channel 0" "0: Excluded,1: Included"
repeat.end
repeat 6. (increment 0 1)(increment 0 0x8)
tree "TASKS_CHG[$1]"
wgroup.long ($2+0x00)++0x03
line.long 0x00 "EN,Description cluster: Enable channel group n"
bitfld.long 0x00 0. "EN,Enable channel group n" "?,1: Trigger task"
wgroup.long ($2+0x04)++0x03
line.long 0x00 "DIS,Description cluster: Disable channel group n"
bitfld.long 0x00 0. "DIS,Disable channel group n" "?,1: Trigger task"
tree.end
repeat.end
repeat 6. (increment 0 1)(increment 0 0x88)
tree "SUBSCRIBE_CHG[$1]"
group.long ($2+0x80)++0x03
line.long 0x00 "EN,Description cluster: Subscribe configuration for task CHG[n].EN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to"
group.long ($2+0x84)++0x03
line.long 0x00 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to"
tree.end
repeat.end
tree.end
tree "DPPIC_S"
base ad:0x50017000
group.long 0x500++0x03
line.long 0x00 "CHEN,Channel enable register"
bitfld.long 0x00 31. "CH31,Enable or disable channel 31" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 30. "CH30,Enable or disable channel 30" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 29. "CH29,Enable or disable channel 29" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 28. "CH28,Enable or disable channel 28" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 27. "CH27,Enable or disable channel 27" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 26. "CH26,Enable or disable channel 26" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 25. "CH25,Enable or disable channel 25" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 24. "CH24,Enable or disable channel 24" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel"
newline
bitfld.long 0x00 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel"
bitfld.long 0x00 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel"
group.long 0x504++0x03
line.long 0x00 "CHENSET,Channel enable set register"
bitfld.long 0x00 31. "CH31,Channel 31 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 30. "CH30,Channel 30 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 29. "CH29,Channel 29 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 28. "CH28,Channel 28 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 27. "CH27,Channel 27 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 26. "CH26,Channel 26 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 25. "CH25,Channel 25 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 24. "CH24,Channel 24 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 23. "CH23,Channel 23 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 22. "CH22,Channel 22 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 21. "CH21,Channel 21 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 20. "CH20,Channel 20 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 19. "CH19,Channel 19 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 18. "CH18,Channel 18 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 17. "CH17,Channel 17 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 16. "CH16,Channel 16 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 15. "CH15,Channel 15 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable set register" "0: Read: Channel disabled,1: Read: Channel enabled"
group.long 0x508++0x03
line.long 0x00 "CHENCLR,Channel enable clear register"
bitfld.long 0x00 31. "CH31,Channel 31 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 30. "CH30,Channel 30 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 29. "CH29,Channel 29 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 28. "CH28,Channel 28 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 27. "CH27,Channel 27 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 26. "CH26,Channel 26 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 25. "CH25,Channel 25 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 24. "CH24,Channel 24 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 23. "CH23,Channel 23 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 22. "CH22,Channel 22 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 21. "CH21,Channel 21 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 20. "CH20,Channel 20 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 19. "CH19,Channel 19 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 18. "CH18,Channel 18 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 17. "CH17,Channel 17 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 16. "CH16,Channel 16 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 15. "CH15,Channel 15 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 14. "CH14,Channel 14 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 13. "CH13,Channel 13 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 12. "CH12,Channel 12 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 11. "CH11,Channel 11 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 10. "CH10,Channel 10 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 9. "CH9,Channel 9 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 8. "CH8,Channel 8 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 7. "CH7,Channel 7 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 6. "CH6,Channel 6 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 5. "CH5,Channel 5 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 4. "CH4,Channel 4 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 3. "CH3,Channel 3 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 2. "CH2,Channel 2 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
newline
bitfld.long 0x00 1. "CH1,Channel 1 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
bitfld.long 0x00 0. "CH0,Channel 0 enable clear register" "0: Read: Channel disabled,1: Read: Channel enabled"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x800)++0x03
line.long 0x00 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled $1"
bitfld.long 0x00 31. "CH31,Include or exclude channel 31" "0: Excluded,1: Included"
bitfld.long 0x00 30. "CH30,Include or exclude channel 30" "0: Excluded,1: Included"
newline
bitfld.long 0x00 29. "CH29,Include or exclude channel 29" "0: Excluded,1: Included"
bitfld.long 0x00 28. "CH28,Include or exclude channel 28" "0: Excluded,1: Included"
newline
bitfld.long 0x00 27. "CH27,Include or exclude channel 27" "0: Excluded,1: Included"
bitfld.long 0x00 26. "CH26,Include or exclude channel 26" "0: Excluded,1: Included"
newline
bitfld.long 0x00 25. "CH25,Include or exclude channel 25" "0: Excluded,1: Included"
bitfld.long 0x00 24. "CH24,Include or exclude channel 24" "0: Excluded,1: Included"
newline
bitfld.long 0x00 23. "CH23,Include or exclude channel 23" "0: Excluded,1: Included"
bitfld.long 0x00 22. "CH22,Include or exclude channel 22" "0: Excluded,1: Included"
newline
bitfld.long 0x00 21. "CH21,Include or exclude channel 21" "0: Excluded,1: Included"
bitfld.long 0x00 20. "CH20,Include or exclude channel 20" "0: Excluded,1: Included"
newline
bitfld.long 0x00 19. "CH19,Include or exclude channel 19" "0: Excluded,1: Included"
bitfld.long 0x00 18. "CH18,Include or exclude channel 18" "0: Excluded,1: Included"
newline
bitfld.long 0x00 17. "CH17,Include or exclude channel 17" "0: Excluded,1: Included"
bitfld.long 0x00 16. "CH16,Include or exclude channel 16" "0: Excluded,1: Included"
newline
bitfld.long 0x00 15. "CH15,Include or exclude channel 15" "0: Excluded,1: Included"
bitfld.long 0x00 14. "CH14,Include or exclude channel 14" "0: Excluded,1: Included"
newline
bitfld.long 0x00 13. "CH13,Include or exclude channel 13" "0: Excluded,1: Included"
bitfld.long 0x00 12. "CH12,Include or exclude channel 12" "0: Excluded,1: Included"
newline
bitfld.long 0x00 11. "CH11,Include or exclude channel 11" "0: Excluded,1: Included"
bitfld.long 0x00 10. "CH10,Include or exclude channel 10" "0: Excluded,1: Included"
newline
bitfld.long 0x00 9. "CH9,Include or exclude channel 9" "0: Excluded,1: Included"
bitfld.long 0x00 8. "CH8,Include or exclude channel 8" "0: Excluded,1: Included"
newline
bitfld.long 0x00 7. "CH7,Include or exclude channel 7" "0: Excluded,1: Included"
bitfld.long 0x00 6. "CH6,Include or exclude channel 6" "0: Excluded,1: Included"
newline
bitfld.long 0x00 5. "CH5,Include or exclude channel 5" "0: Excluded,1: Included"
bitfld.long 0x00 4. "CH4,Include or exclude channel 4" "0: Excluded,1: Included"
newline
bitfld.long 0x00 3. "CH3,Include or exclude channel 3" "0: Excluded,1: Included"
bitfld.long 0x00 2. "CH2,Include or exclude channel 2" "0: Excluded,1: Included"
newline
bitfld.long 0x00 1. "CH1,Include or exclude channel 1" "0: Excluded,1: Included"
bitfld.long 0x00 0. "CH0,Include or exclude channel 0" "0: Excluded,1: Included"
repeat.end
repeat 6. (increment 0 1)(increment 0 0x8)
tree "TASKS_CHG[$1]"
wgroup.long ($2+0x00)++0x03
line.long 0x00 "EN,Description cluster: Enable channel group n"
bitfld.long 0x00 0. "EN,Enable channel group n" "?,1: Trigger task"
wgroup.long ($2+0x04)++0x03
line.long 0x00 "DIS,Description cluster: Disable channel group n"
bitfld.long 0x00 0. "DIS,Disable channel group n" "?,1: Trigger task"
tree.end
repeat.end
repeat 6. (increment 0 1)(increment 0 0x88)
tree "SUBSCRIBE_CHG[$1]"
group.long ($2+0x80)++0x03
line.long 0x00 "EN,Description cluster: Subscribe configuration for task CHG[n].EN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to"
group.long ($2+0x84)++0x03
line.long 0x00 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to"
tree.end
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-NET")
tree "ECB (AES ECB Mode Encryption)"
base ad:0x4100D000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTECB,Start ECB block encrypt"
bitfld.long 0x00 0. "TASKS_STARTECB,Start ECB block encrypt" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPECB,Abort a possible executing ECB operation"
bitfld.long 0x00 0. "TASKS_STOPECB,Abort a possible executing ECB operation" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTECB,Subscribe configuration for task STARTECB"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STARTECB will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPECB,Subscribe configuration for task STOPECB"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOPECB will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_ENDECB,ECB block encrypt complete"
bitfld.long 0x00 0. "EVENTS_ENDECB,ECB block encrypt complete" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_ERRORECB,ECB block encrypt aborted because of a STOPECB task or due to an error"
bitfld.long 0x00 0. "EVENTS_ERRORECB,ECB block encrypt aborted because of a STOPECB task or due to an error" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_ENDECB,Publish configuration for event ENDECB"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDECB will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_ERRORECB,Publish configuration for event ERRORECB"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ERRORECB will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "ERRORECB,Write '1' to enable interrupt for event ERRORECB" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "ENDECB,Write '1' to enable interrupt for event ENDECB" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "ERRORECB,Write '1' to disable interrupt for event ERRORECB" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "ENDECB,Write '1' to disable interrupt for event ENDECB" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "ECBDATAPTR,ECB block encrypt memory pointers"
hexmask.long 0x00 0.--31. 1. "ECBDATAPTR,Pointer to the ECB data structure (see Table 1 ECB data structure overview)"
tree.end
endif
tree "EGU (Event Generator Unit)"
sif cpuis("NRF5340QKAA-NET")
tree "EGU0_NS"
base ad:0x41014000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "EGU0_NS"
base ad:0x4001B000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU0_S"
base ad:0x5001B000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU1_NS"
base ad:0x4001C000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU1_S"
base ad:0x5001C000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU2_NS"
base ad:0x4001D000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU2_S"
base ad:0x5001D000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU3_NS"
base ad:0x4001E000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU3_S"
base ad:0x5001E000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU4_NS"
base ad:0x4001F000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU4_S"
base ad:0x5001F000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU5_NS"
base ad:0x40020000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "EGU5_S"
base ad:0x50020000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event $1"
bitfld.long 0x00 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task $1"
bitfld.long 0x00 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Read: Enabled"
tree.end
endif
tree.end
tree "FICR (Factory Information Configuration Registers)"
sif cpuis("NRF5340QKAA-NET")
base ad:0x1FF0000
repeat 4. (increment 0 1) (increment 0 0x04)
rgroup.long ($2+0x280)++0x03
line.long 0x00 "ER[$1],Description collection: Encryption Root word n $1"
hexmask.long 0x00 0.--31. 1. "ER,Encryption Root word n"
repeat.end
repeat 4. (increment 0 1) (increment 0 0x04)
rgroup.long ($2+0x290)++0x03
line.long 0x00 "IR[$1],Description collection: Identity Root word n $1"
hexmask.long 0x00 0.--31. 1. "IR,Identity Root word n"
repeat.end
rgroup.long 0x2A0++0x03
line.long 0x00 "DEVICEADDRTYPE,Device address type"
bitfld.long 0x00 0. "DEVICEADDRTYPE,Device address type" "0: Public address,1: Random address"
repeat 2. (increment 0 1) (increment 0 0x04)
rgroup.long ($2+0x2A4)++0x03
line.long 0x00 "DEVICEADDR[$1],Description collection: Device address n $1"
hexmask.long 0x00 0.--31. 1. "DEVICEADDR,48 bit device address"
repeat.end
repeat 32. (increment 0 1)(increment 0 0x08)
tree "TRIMCNF[$1]"
group.long ($2+0x300)++0x03
line.long 0x00 "ADDR,Description cluster: Address"
hexmask.long 0x00 0.--31. 1. "Address,Address"
rgroup.long ($2+0x304)++0x03
line.long 0x00 "DATA,Description cluster: Data"
hexmask.long 0x00 0.--31. 1. "Data,Data"
tree.end
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
base ad:0xFF0000
rgroup.long 0xC20++0x03
line.long 0x00 "XOSC32MTRIM,XOSC32M capacitor selection trim values"
bitfld.long 0x00 5.--9. "OFFSET,Offset trim factor on integer form" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "SLOPE,Slope trim factor on twos complement form" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat 32. (increment 0 1)(increment 0 0x08)
tree "TRIMCNF[$1]"
group.long ($2+0x300)++0x03
line.long 0x00 "ADDR,Description cluster: Address of the PAR register which will be written"
hexmask.long 0x00 0.--31. 1. "Address,Address"
rgroup.long ($2+0x304)++0x03
line.long 0x00 "DATA,Description cluster: Data"
hexmask.long 0x00 0.--31. 1. "Data,Data to be written into the PAR register"
tree.end
repeat.end
tree "NFC"
rgroup.long 0x450++0x03
line.long 0x00 "TAGHEADER0,Default header for NFC Tag"
hexmask.long.byte 0x00 24.--31. 1. "UD3,Unique identifier byte 3"
hexmask.long.byte 0x00 16.--23. 1. "UD2,Unique identifier byte 2"
newline
hexmask.long.byte 0x00 8.--15. 1. "UD1,Unique identifier byte 1"
hexmask.long.byte 0x00 0.--7. 1. "MFGID,Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F"
rgroup.long 0x454++0x03
line.long 0x00 "TAGHEADER1,Default header for NFC Tag"
hexmask.long.byte 0x00 24.--31. 1. "UD7,Unique identifier byte 7"
hexmask.long.byte 0x00 16.--23. 1. "UD6,Unique identifier byte 6"
newline
hexmask.long.byte 0x00 8.--15. 1. "UD5,Unique identifier byte 5"
hexmask.long.byte 0x00 0.--7. 1. "UD4,Unique identifier byte 4"
rgroup.long 0x458++0x03
line.long 0x00 "TAGHEADER2,Default header for NFC Tag"
hexmask.long.byte 0x00 24.--31. 1. "UD11,Unique identifier byte 11"
hexmask.long.byte 0x00 16.--23. 1. "UD10,Unique identifier byte 10"
newline
hexmask.long.byte 0x00 8.--15. 1. "UD9,Unique identifier byte 9"
hexmask.long.byte 0x00 0.--7. 1. "UD8,Unique identifier byte 8"
rgroup.long 0x45C++0x03
line.long 0x00 "TAGHEADER3,Default header for NFC Tag"
hexmask.long.byte 0x00 24.--31. 1. "UD15,Unique identifier byte 15"
hexmask.long.byte 0x00 16.--23. 1. "UD14,Unique identifier byte 14"
newline
hexmask.long.byte 0x00 8.--15. 1. "UD13,Unique identifier byte 13"
hexmask.long.byte 0x00 0.--7. 1. "UD12,Unique identifier byte 12"
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "FPU (FPU Control Peripheral)"
tree "FPU_NS"
base ad:0x40000000
group.long 0x100++0x03
line.long 0x00 "EVENTS_INVALIDOPERATION,An FPUIOC exception triggered by an invalid operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_INVALIDOPERATION,An FPUIOC exception triggered by an invalid operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DIVIDEBYZERO,An FPUDZC exception triggered by a floating-point divide-by-zero operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_DIVIDEBYZERO,An FPUDZC exception triggered by a floating-point divide-by-zero operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_OVERFLOW,An FPUOFC exception triggered by a floating-point overflow has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_OVERFLOW,An FPUOFC exception triggered by a floating-point overflow has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_UNDERFLOW,An FPUUFC exception triggered by a floating-point underflow has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_UNDERFLOW,An FPUUFC exception triggered by a floating-point underflow has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_INEXACT,An FPUIXC exception triggered by an inexact floating-point operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_INEXACT,An FPUIXC exception triggered by an inexact floating-point operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_DENORMALINPUT,An FPUIDC exception triggered by a denormal floating-point input has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_DENORMALINPUT,An FPUIDC exception triggered by a denormal floating-point input has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Enable or disable interrupt for event DENORMALINPUT" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "INEXACT,Enable or disable interrupt for event INEXACT" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Enable or disable interrupt for event UNDERFLOW" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Enable or disable interrupt for event OVERFLOW" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Enable or disable interrupt for event DIVIDEBYZERO" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Enable or disable interrupt for event INVALIDOPERATION" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Write '1' to enable interrupt for event DENORMALINPUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "INEXACT,Write '1' to enable interrupt for event INEXACT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Write '1' to enable interrupt for event UNDERFLOW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Write '1' to enable interrupt for event OVERFLOW" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Write '1' to enable interrupt for event DIVIDEBYZERO" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Write '1' to enable interrupt for event INVALIDOPERATION" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Write '1' to disable interrupt for event DENORMALINPUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "INEXACT,Write '1' to disable interrupt for event INEXACT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Write '1' to disable interrupt for event UNDERFLOW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Write '1' to disable interrupt for event OVERFLOW" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Write '1' to disable interrupt for event DIVIDEBYZERO" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Write '1' to disable interrupt for event INVALIDOPERATION" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree "FPU_S"
base ad:0x50000000
group.long 0x100++0x03
line.long 0x00 "EVENTS_INVALIDOPERATION,An FPUIOC exception triggered by an invalid operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_INVALIDOPERATION,An FPUIOC exception triggered by an invalid operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DIVIDEBYZERO,An FPUDZC exception triggered by a floating-point divide-by-zero operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_DIVIDEBYZERO,An FPUDZC exception triggered by a floating-point divide-by-zero operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_OVERFLOW,An FPUOFC exception triggered by a floating-point overflow has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_OVERFLOW,An FPUOFC exception triggered by a floating-point overflow has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_UNDERFLOW,An FPUUFC exception triggered by a floating-point underflow has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_UNDERFLOW,An FPUUFC exception triggered by a floating-point underflow has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_INEXACT,An FPUIXC exception triggered by an inexact floating-point operation has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_INEXACT,An FPUIXC exception triggered by an inexact floating-point operation has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_DENORMALINPUT,An FPUIDC exception triggered by a denormal floating-point input has occurred in the FPU"
bitfld.long 0x00 0. "EVENTS_DENORMALINPUT,An FPUIDC exception triggered by a denormal floating-point input has occurred in the FPU" "0: Event not generated,1: Event generated"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Enable or disable interrupt for event DENORMALINPUT" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "INEXACT,Enable or disable interrupt for event INEXACT" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Enable or disable interrupt for event UNDERFLOW" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Enable or disable interrupt for event OVERFLOW" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Enable or disable interrupt for event DIVIDEBYZERO" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Enable or disable interrupt for event INVALIDOPERATION" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Write '1' to enable interrupt for event DENORMALINPUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "INEXACT,Write '1' to enable interrupt for event INEXACT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Write '1' to enable interrupt for event UNDERFLOW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Write '1' to enable interrupt for event OVERFLOW" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Write '1' to enable interrupt for event DIVIDEBYZERO" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Write '1' to enable interrupt for event INVALIDOPERATION" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 5. "DENORMALINPUT,Write '1' to disable interrupt for event DENORMALINPUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "INEXACT,Write '1' to disable interrupt for event INEXACT" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "UNDERFLOW,Write '1' to disable interrupt for event UNDERFLOW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "OVERFLOW,Write '1' to disable interrupt for event OVERFLOW" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DIVIDEBYZERO,Write '1' to disable interrupt for event DIVIDEBYZERO" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "INVALIDOPERATION,Write '1' to disable interrupt for event INVALIDOPERATION" "0: Read: Disabled,1: Read: Enabled"
tree.end
tree.end
endif
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
tree "P0_NS"
sif cpuis("NRF5340QKAA-APP")
base ad:0x40842500
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
elif cpuis("NRF5340QKAA-NET")
base ad:0x418C0500
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "P0_S"
base ad:0x50842500
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
tree.end
endif
tree "P1_NS"
sif cpuis("NRF5340QKAA-APP")
base ad:0x40842800
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
elif cpuis("NRF5340QKAA-NET")
base ad:0x418C0800
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "P1_S"
base ad:0x50842800
group.long 0x04++0x03
line.long 0x00 "OUT,Write GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high"
group.long 0x08++0x03
line.long 0x00 "OUTSET,Set individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
group.long 0x0C++0x03
line.long 0x00 "OUTCLR,Clear individual bits in GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Read: pin driver is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Read: pin driver is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Read: pin driver is high"
rgroup.long 0x10++0x03
line.long 0x00 "IN,Read GPIO port"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high"
group.long 0x14++0x03
line.long 0x00 "DIR,Direction of GPIO pins"
bitfld.long 0x00 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output"
bitfld.long 0x00 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output"
group.long 0x18++0x03
line.long 0x00 "DIRSET,DIR set register"
bitfld.long 0x00 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x1C++0x03
line.long 0x00 "DIRCLR,DIR clear register"
bitfld.long 0x00 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Read: pin set as output"
newline
bitfld.long 0x00 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Read: pin set as output"
bitfld.long 0x00 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Read: pin set as output"
group.long 0x20++0x03
line.long 0x00 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers"
bitfld.long 0x00 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
newline
bitfld.long 0x00 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
bitfld.long 0x00 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "0: Criteria has not been met,1: Criteria has been met"
group.long 0x24++0x03
line.long 0x00 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
group.long 0x28++0x03
line.long 0x00 "DETECTMODE_SEC,Select between default DETECT signal behavior and LDETECT mode (For secure pin only)"
bitfld.long 0x00 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "PIN_CNF[$1],Description collection: Configuration of GPIO pins $1"
bitfld.long 0x00 28.--30. "MCUSEL,Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code" "0: Application MCU,1: Network MCU,?,3: Peripheral with dedicated pins,?,?,?,7: Trace and Debug Subsystem"
bitfld.long 0x00 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level"
newline
bitfld.long 0x00 8.--11. "DRIVE,Drive configuration" "0: Standard '0' standard '1',1: High drive '0' standard '1',2: Standard '0' high drive '1',3: High drive '0' high 'drive '1'',4: Disconnect '0' standard '1' (normally used..,5: Disconnect '0' high drive '1' (normally used..,6: Standard '0' disconnect '1' (normally used..,7: High drive '0' disconnect '1' (normally used..,?,9: Extra high drive '0' standard '1',10: Standard '0' extra high drive '1',11: Extra high drive '0' extra high drive '1',?,13: Disconnect '0' extra high drive '1'..,?,15: Extra high drive '0' disconnect '1'.."
bitfld.long 0x00 2.--3. "PULL,Pull configuration" "0: Disabled,1: Pull down on pin,?,3: Pull up on pin"
newline
bitfld.long 0x00 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer"
bitfld.long 0x00 0. "DIR,Pin direction" "0: Configure pin as an input pin,1: Configure pin as an output pin"
repeat.end
tree.end
endif
tree.end
tree "GPIOTE (PIO Tasks and Events)"
sif cpuis("NRF5340QKAA-APP")
tree "GPIOTE0_S"
base ad:0x5000D000
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x30)++0x03
line.long 0x00 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x60)++0x03
line.long 0x00 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xB0)++0x03
line.long 0x00 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xE0)++0x03
line.long 0x00 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_IN[$1],Description collection: Event generated from pin specified in CONFIG[n].PSEL $1"
bitfld.long 0x00 0. "EVENTS_IN,Event generated from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x17C++0x03
line.long 0x00 "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled"
bitfld.long 0x00 0. "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to"
repeat.end
group.long 0x1FC++0x03
line.long 0x00 "PUBLISH_PORT,Publish configuration for event PORT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PORT will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to enable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to disable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "CONFIG[$1],Description collection: Configuration for OUT[n] SET[n] and CLR[n] tasks and IN[n] event $1"
bitfld.long 0x00 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured" "0: Task mode,1: Task mode"
bitfld.long 0x00 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered" "0: Task mode,1: Task mode,2: Task mode,3: Task mode"
newline
bitfld.long 0x00 13. "PORT,Port number" "0,1"
bitfld.long 0x00 8.--12. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--1. "MODE,Mode" "0: Disabled,1: Event mode,?,3: Task mode"
repeat.end
tree.end
tree "GPIOTE1_NS"
base ad:0x4002F000
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x30)++0x03
line.long 0x00 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x60)++0x03
line.long 0x00 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xB0)++0x03
line.long 0x00 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xE0)++0x03
line.long 0x00 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_IN[$1],Description collection: Event generated from pin specified in CONFIG[n].PSEL $1"
bitfld.long 0x00 0. "EVENTS_IN,Event generated from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x17C++0x03
line.long 0x00 "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled"
bitfld.long 0x00 0. "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to"
repeat.end
group.long 0x1FC++0x03
line.long 0x00 "PUBLISH_PORT,Publish configuration for event PORT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PORT will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to enable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to disable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "CONFIG[$1],Description collection: Configuration for OUT[n] SET[n] and CLR[n] tasks and IN[n] event $1"
bitfld.long 0x00 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured" "0: Task mode,1: Task mode"
bitfld.long 0x00 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered" "0: Task mode,1: Task mode,2: Task mode,3: Task mode"
newline
bitfld.long 0x00 13. "PORT,Port number" "0,1"
bitfld.long 0x00 8.--12. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--1. "MODE,Mode" "0: Disabled,1: Event mode,?,3: Task mode"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "GPIOTE_NS"
base ad:0x4100A000
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x30)++0x03
line.long 0x00 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x60)++0x03
line.long 0x00 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL"
bitfld.long 0x00 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL" "?,1: Trigger task"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task OUT[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xB0)++0x03
line.long 0x00 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SET[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xE0)++0x03
line.long 0x00 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLR[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_IN[$1],Description collection: Event generated from pin specified in CONFIG[n].PSEL $1"
bitfld.long 0x00 0. "EVENTS_IN,Event generated from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x17C++0x03
line.long 0x00 "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled"
bitfld.long 0x00 0. "EVENTS_PORT,Event generated from multiple input GPIO pins with SENSE mechanism enabled" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event IN[n] will publish to"
repeat.end
group.long 0x1FC++0x03
line.long 0x00 "PUBLISH_PORT,Publish configuration for event PORT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event PORT will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to enable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 31. "PORT,Write '1' to disable interrupt for event PORT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Read: Enabled"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "CONFIG[$1],Description collection: Configuration for OUT[n] SET[n] and CLR[n] tasks and IN[n] event $1"
bitfld.long 0x00 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured" "0: Task mode,1: Task mode"
bitfld.long 0x00 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered" "0: Task mode,1: Task mode,2: Task mode,3: Task mode"
newline
bitfld.long 0x00 13. "PORT,Port number" "0,1"
bitfld.long 0x00 8.--12. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--1. "MODE,Mode" "0: Disabled,1: Event mode,?,3: Task mode"
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "I2S (Inter-Integrated Sound Bus Controller)"
tree "I2S0_NS"
base ad:0x40028000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Starts continuous I2S transfer"
bitfld.long 0x00 0. "TASKS_START,Starts continuous I2S transfer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops I2S transfer"
bitfld.long 0x00 0. "TASKS_STOP,Stops I2S transfer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers"
bitfld.long 0x00 0. "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_STOPPED,I2S transfer stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,I2S transfer stopped" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers"
bitfld.long 0x00 0. "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK"
bitfld.long 0x00 0. "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_RXPTRUPD,Publish configuration for event RXPTRUPD"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXPTRUPD will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_TXPTRUPD,Publish configuration for event TXPTRUPD"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXPTRUPD will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Enable or disable interrupt for event FRAMESTART" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Enable or disable interrupt for event TXPTRUPD" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Enable or disable interrupt for event RXPTRUPD" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Write '1' to enable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Write '1' to enable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Write '1' to disable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Write '1' to disable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable I2S module"
bitfld.long 0x00 0. "ENABLE,Enable I2S module" "0: Disabled,1: Enabled"
tree "CONFIG"
group.long 0x504++0x03
line.long 0x00 "MODE,I2S mode"
bitfld.long 0x00 0. "MODE,I2S mode" "0: Master mode,1: Slave mode"
group.long 0x508++0x03
line.long 0x00 "RXEN,Reception (RX) enable"
bitfld.long 0x00 0. "RXEN,Reception (RX) enable" "0: Reception disabled and now data will be..,1: Reception enabled"
group.long 0x50C++0x03
line.long 0x00 "TXEN,Transmission (TX) enable"
bitfld.long 0x00 0. "TXEN,Transmission (TX) enable" "0: Transmission disabled and now data will be..,1: Transmission enabled"
group.long 0x510++0x03
line.long 0x00 "MCKEN,Master clock generator enable"
bitfld.long 0x00 0. "MCKEN,Master clock generator enable" "0: Master clock generator disabled and PSEL.MCK..,1: Master clock generator running and MCK output.."
group.long 0x514++0x03
line.long 0x00 "MCKFREQ,I2S clock generator control"
hexmask.long 0x00 0.--31. 1. "MCKFREQ,I2S MCK frequency configuration NOTE: Enumerations are deprecated use MCKFREQ equation"
group.long 0x518++0x03
line.long 0x00 "RATIO,MCK / LRCK ratio"
bitfld.long 0x00 0.--3. "RATIO,MCK / LRCK ratio" "0: LRCK = MCK / 32,1: LRCK = MCK / 48,2: LRCK = MCK / 64,3: LRCK = MCK / 96,4: LRCK = MCK / 128,5: LRCK = MCK / 192,6: LRCK = MCK / 256,7: LRCK = MCK / 384,8: LRCK = MCK / 512,?..."
group.long 0x51C++0x03
line.long 0x00 "SWIDTH,Sample width"
bitfld.long 0x00 0.--2. "SWIDTH,Sample and half-frame width" "0: 8 bit sample,1: 16 bit sample,2: 24 bit sample,3: 32-bit sample,4: 8 bit sample in a 16 bit half-frame,5: 8 bit sample in a 32-bit half-frame,6: 16 bit sample in a 32-bit half-frame,7: 24 bit sample in a 32-bit half-frame"
group.long 0x520++0x03
line.long 0x00 "ALIGN,Alignment of sample within a frame"
bitfld.long 0x00 0. "ALIGN,Alignment of sample within a frame" "0: Left-aligned,1: Right-aligned"
group.long 0x524++0x03
line.long 0x00 "FORMAT,Frame format"
bitfld.long 0x00 0. "FORMAT,Frame format" "0: Original I2S format,1: Alternate (left- or right-aligned) format"
group.long 0x528++0x03
line.long 0x00 "CHANNELS,Enable channels"
bitfld.long 0x00 0.--1. "CHANNELS,Enable channels" "0: Stereo,1: Left only,2: Right only,?..."
group.long 0x52C++0x03
line.long 0x00 "CLKCONFIG,Clock source selection for the I2S module"
bitfld.long 0x00 8. "BYPASS,Bypass clock generator" "0: Disable bypass,1: Enable bypass"
bitfld.long 0x00 0. "CLKSRC,Clock source selection" "0: 32MHz peripheral clock,1: Audio PLL clock"
tree.end
tree "RXD"
group.long 0x538++0x03
line.long 0x00 "PTR,Receive buffer RAM start address"
hexmask.long 0x00 0.--31. 1. "PTR,Receive buffer Data RAM start address"
tree.end
tree "TXD"
group.long 0x540++0x03
line.long 0x00 "PTR,Transmit buffer RAM start address"
hexmask.long 0x00 0.--31. 1. "PTR,Transmit buffer Data RAM start address"
tree.end
tree "RXTXD"
group.long 0x550++0x03
line.long 0x00 "MAXCNT,Size of RXD and TXD buffers"
hexmask.long.word 0x00 0.--13. 1. "MAXCNT,Size of RXD and TXD buffers in number of 32 bit words"
tree.end
tree "PSEL"
group.long 0x560++0x03
line.long 0x00 "MCK,Pin select for MCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x564++0x03
line.long 0x00 "SCK,Pin select for SCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x568++0x03
line.long 0x00 "LRCK,Pin select for LRCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x56C++0x03
line.long 0x00 "SDIN,Pin select for SDIN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "SDOUT,Pin select for SDOUT signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "I2S0_S"
base ad:0x50028000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Starts continuous I2S transfer"
bitfld.long 0x00 0. "TASKS_START,Starts continuous I2S transfer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops I2S transfer"
bitfld.long 0x00 0. "TASKS_STOP,Stops I2S transfer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers"
bitfld.long 0x00 0. "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_STOPPED,I2S transfer stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,I2S transfer stopped" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers"
bitfld.long 0x00 0. "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK"
bitfld.long 0x00 0. "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_RXPTRUPD,Publish configuration for event RXPTRUPD"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXPTRUPD will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_TXPTRUPD,Publish configuration for event TXPTRUPD"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXPTRUPD will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Enable or disable interrupt for event FRAMESTART" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Enable or disable interrupt for event TXPTRUPD" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Enable or disable interrupt for event RXPTRUPD" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Write '1' to enable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Write '1' to enable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "TXPTRUPD,Write '1' to disable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "RXPTRUPD,Write '1' to disable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable I2S module"
bitfld.long 0x00 0. "ENABLE,Enable I2S module" "0: Disabled,1: Enabled"
tree "CONFIG"
group.long 0x504++0x03
line.long 0x00 "MODE,I2S mode"
bitfld.long 0x00 0. "MODE,I2S mode" "0: Master mode,1: Slave mode"
group.long 0x508++0x03
line.long 0x00 "RXEN,Reception (RX) enable"
bitfld.long 0x00 0. "RXEN,Reception (RX) enable" "0: Reception disabled and now data will be..,1: Reception enabled"
group.long 0x50C++0x03
line.long 0x00 "TXEN,Transmission (TX) enable"
bitfld.long 0x00 0. "TXEN,Transmission (TX) enable" "0: Transmission disabled and now data will be..,1: Transmission enabled"
group.long 0x510++0x03
line.long 0x00 "MCKEN,Master clock generator enable"
bitfld.long 0x00 0. "MCKEN,Master clock generator enable" "0: Master clock generator disabled and PSEL.MCK..,1: Master clock generator running and MCK output.."
group.long 0x514++0x03
line.long 0x00 "MCKFREQ,I2S clock generator control"
hexmask.long 0x00 0.--31. 1. "MCKFREQ,I2S MCK frequency configuration NOTE: Enumerations are deprecated use MCKFREQ equation"
group.long 0x518++0x03
line.long 0x00 "RATIO,MCK / LRCK ratio"
bitfld.long 0x00 0.--3. "RATIO,MCK / LRCK ratio" "0: LRCK = MCK / 32,1: LRCK = MCK / 48,2: LRCK = MCK / 64,3: LRCK = MCK / 96,4: LRCK = MCK / 128,5: LRCK = MCK / 192,6: LRCK = MCK / 256,7: LRCK = MCK / 384,8: LRCK = MCK / 512,?..."
group.long 0x51C++0x03
line.long 0x00 "SWIDTH,Sample width"
bitfld.long 0x00 0.--2. "SWIDTH,Sample and half-frame width" "0: 8 bit sample,1: 16 bit sample,2: 24 bit sample,3: 32-bit sample,4: 8 bit sample in a 16 bit half-frame,5: 8 bit sample in a 32-bit half-frame,6: 16 bit sample in a 32-bit half-frame,7: 24 bit sample in a 32-bit half-frame"
group.long 0x520++0x03
line.long 0x00 "ALIGN,Alignment of sample within a frame"
bitfld.long 0x00 0. "ALIGN,Alignment of sample within a frame" "0: Left-aligned,1: Right-aligned"
group.long 0x524++0x03
line.long 0x00 "FORMAT,Frame format"
bitfld.long 0x00 0. "FORMAT,Frame format" "0: Original I2S format,1: Alternate (left- or right-aligned) format"
group.long 0x528++0x03
line.long 0x00 "CHANNELS,Enable channels"
bitfld.long 0x00 0.--1. "CHANNELS,Enable channels" "0: Stereo,1: Left only,2: Right only,?..."
group.long 0x52C++0x03
line.long 0x00 "CLKCONFIG,Clock source selection for the I2S module"
bitfld.long 0x00 8. "BYPASS,Bypass clock generator" "0: Disable bypass,1: Enable bypass"
bitfld.long 0x00 0. "CLKSRC,Clock source selection" "0: 32MHz peripheral clock,1: Audio PLL clock"
tree.end
tree "RXD"
group.long 0x538++0x03
line.long 0x00 "PTR,Receive buffer RAM start address"
hexmask.long 0x00 0.--31. 1. "PTR,Receive buffer Data RAM start address"
tree.end
tree "TXD"
group.long 0x540++0x03
line.long 0x00 "PTR,Transmit buffer RAM start address"
hexmask.long 0x00 0.--31. 1. "PTR,Transmit buffer Data RAM start address"
tree.end
tree "RXTXD"
group.long 0x550++0x03
line.long 0x00 "MAXCNT,Size of RXD and TXD buffers"
hexmask.long.word 0x00 0.--13. 1. "MAXCNT,Size of RXD and TXD buffers in number of 32 bit words"
tree.end
tree "PSEL"
group.long 0x560++0x03
line.long 0x00 "MCK,Pin select for MCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x564++0x03
line.long 0x00 "SCK,Pin select for SCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x568++0x03
line.long 0x00 "LRCK,Pin select for LRCK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x56C++0x03
line.long 0x00 "SDIN,Pin select for SDIN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "SDOUT,Pin select for SDOUT signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree.end
endif
tree "IPC (Interprocessor Communication)"
sif cpuis("NRF5340QKAA-NET")
tree "IPC_NS"
base ad:0x41012000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_SEND[$1],Description collection: Trigger events on IPC channel enabled in SEND_CNF[n $1"
bitfld.long 0x00 0. "TASKS_SEND,Trigger events on IPC channel enabled in SEND_CNF[n]" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SEND[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_RECEIVE[$1],Description collection: Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n $1"
bitfld.long 0x00 0. "EVENTS_RECEIVE,Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n]" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RECEIVE[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Enable or disable interrupt for event RECEIVE[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Enable or disable interrupt for event RECEIVE[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Enable or disable interrupt for event RECEIVE[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Enable or disable interrupt for event RECEIVE[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Enable or disable interrupt for event RECEIVE[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Enable or disable interrupt for event RECEIVE[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Enable or disable interrupt for event RECEIVE[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Enable or disable interrupt for event RECEIVE[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Enable or disable interrupt for event RECEIVE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Enable or disable interrupt for event RECEIVE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Enable or disable interrupt for event RECEIVE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Enable or disable interrupt for event RECEIVE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Enable or disable interrupt for event RECEIVE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Enable or disable interrupt for event RECEIVE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Enable or disable interrupt for event RECEIVE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Enable or disable interrupt for event RECEIVE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to enable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to enable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to enable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to enable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to enable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to enable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to enable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to enable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to enable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to enable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to enable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to enable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to enable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to enable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to enable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to enable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to disable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to disable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to disable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to disable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to disable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to disable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to disable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to disable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to disable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to disable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to disable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to disable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to disable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to disable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to disable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to disable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 15. "RECEIVE15,Read pending status of interrupt for event RECEIVE[15]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 14. "RECEIVE14,Read pending status of interrupt for event RECEIVE[14]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 13. "RECEIVE13,Read pending status of interrupt for event RECEIVE[13]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 12. "RECEIVE12,Read pending status of interrupt for event RECEIVE[12]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 11. "RECEIVE11,Read pending status of interrupt for event RECEIVE[11]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 10. "RECEIVE10,Read pending status of interrupt for event RECEIVE[10]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 9. "RECEIVE9,Read pending status of interrupt for event RECEIVE[9]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "RECEIVE8,Read pending status of interrupt for event RECEIVE[8]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "RECEIVE7,Read pending status of interrupt for event RECEIVE[7]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 6. "RECEIVE6,Read pending status of interrupt for event RECEIVE[6]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 5. "RECEIVE5,Read pending status of interrupt for event RECEIVE[5]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 4. "RECEIVE4,Read pending status of interrupt for event RECEIVE[4]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 3. "RECEIVE3,Read pending status of interrupt for event RECEIVE[3]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 2. "RECEIVE2,Read pending status of interrupt for event RECEIVE[2]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 1. "RECEIVE1,Read pending status of interrupt for event RECEIVE[1]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 0. "RECEIVE0,Read pending status of interrupt for event RECEIVE[0]" "0: Read: Not pending,1: Read: Pending"
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "SEND_CNF[$1],Description collection: Send event configuration for TASKS_SEND[n $1"
bitfld.long 0x00 15. "CHEN15,Enable broadcasting on IPC channel 15" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 14. "CHEN14,Enable broadcasting on IPC channel 14" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 13. "CHEN13,Enable broadcasting on IPC channel 13" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 12. "CHEN12,Enable broadcasting on IPC channel 12" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 11. "CHEN11,Enable broadcasting on IPC channel 11" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 10. "CHEN10,Enable broadcasting on IPC channel 10" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 9. "CHEN9,Enable broadcasting on IPC channel 9" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 8. "CHEN8,Enable broadcasting on IPC channel 8" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 7. "CHEN7,Enable broadcasting on IPC channel 7" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 6. "CHEN6,Enable broadcasting on IPC channel 6" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 5. "CHEN5,Enable broadcasting on IPC channel 5" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 4. "CHEN4,Enable broadcasting on IPC channel 4" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 3. "CHEN3,Enable broadcasting on IPC channel 3" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 2. "CHEN2,Enable broadcasting on IPC channel 2" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 1. "CHEN1,Enable broadcasting on IPC channel 1" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 0. "CHEN0,Enable broadcasting on IPC channel 0" "0: Disable broadcast,1: Enable broadcast"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x590)++0x03
line.long 0x00 "RECEIVE_CNF[$1],Description collection: Receive event configuration for EVENTS_RECEIVE[n $1"
bitfld.long 0x00 15. "CHEN15,Enable subscription to IPC channel 15" "0: Disable events,1: Enable events"
bitfld.long 0x00 14. "CHEN14,Enable subscription to IPC channel 14" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 13. "CHEN13,Enable subscription to IPC channel 13" "0: Disable events,1: Enable events"
bitfld.long 0x00 12. "CHEN12,Enable subscription to IPC channel 12" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 11. "CHEN11,Enable subscription to IPC channel 11" "0: Disable events,1: Enable events"
bitfld.long 0x00 10. "CHEN10,Enable subscription to IPC channel 10" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 9. "CHEN9,Enable subscription to IPC channel 9" "0: Disable events,1: Enable events"
bitfld.long 0x00 8. "CHEN8,Enable subscription to IPC channel 8" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 7. "CHEN7,Enable subscription to IPC channel 7" "0: Disable events,1: Enable events"
bitfld.long 0x00 6. "CHEN6,Enable subscription to IPC channel 6" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 5. "CHEN5,Enable subscription to IPC channel 5" "0: Disable events,1: Enable events"
bitfld.long 0x00 4. "CHEN4,Enable subscription to IPC channel 4" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 3. "CHEN3,Enable subscription to IPC channel 3" "0: Disable events,1: Enable events"
bitfld.long 0x00 2. "CHEN2,Enable subscription to IPC channel 2" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 1. "CHEN1,Enable subscription to IPC channel 1" "0: Disable events,1: Enable events"
bitfld.long 0x00 0. "CHEN0,Enable subscription to IPC channel 0" "0: Disable events,1: Enable events"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x610)++0x03
line.long 0x00 "GPMEM[$1],Description collection: General purpose memory $1"
hexmask.long 0x00 0.--31. 1. "GPMEM,General purpose memory"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "IPC_NS"
base ad:0x4002A000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_SEND[$1],Description collection: Trigger events on IPC channel enabled in SEND_CNF[n $1"
bitfld.long 0x00 0. "TASKS_SEND,Trigger events on IPC channel enabled in SEND_CNF[n]" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_RECEIVE[$1],Description collection: Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n $1"
bitfld.long 0x00 0. "EVENTS_RECEIVE,Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n]" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Enable or disable interrupt for event RECEIVE[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Enable or disable interrupt for event RECEIVE[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Enable or disable interrupt for event RECEIVE[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Enable or disable interrupt for event RECEIVE[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Enable or disable interrupt for event RECEIVE[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Enable or disable interrupt for event RECEIVE[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Enable or disable interrupt for event RECEIVE[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Enable or disable interrupt for event RECEIVE[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Enable or disable interrupt for event RECEIVE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Enable or disable interrupt for event RECEIVE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Enable or disable interrupt for event RECEIVE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Enable or disable interrupt for event RECEIVE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Enable or disable interrupt for event RECEIVE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Enable or disable interrupt for event RECEIVE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Enable or disable interrupt for event RECEIVE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Enable or disable interrupt for event RECEIVE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to enable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to enable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to enable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to enable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to enable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to enable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to enable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to enable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to enable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to enable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to enable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to enable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to enable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to enable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to enable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to enable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to disable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to disable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to disable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to disable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to disable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to disable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to disable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to disable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to disable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to disable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to disable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to disable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to disable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to disable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to disable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to disable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 15. "RECEIVE15,Read pending status of interrupt for event RECEIVE[15]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 14. "RECEIVE14,Read pending status of interrupt for event RECEIVE[14]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 13. "RECEIVE13,Read pending status of interrupt for event RECEIVE[13]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 12. "RECEIVE12,Read pending status of interrupt for event RECEIVE[12]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 11. "RECEIVE11,Read pending status of interrupt for event RECEIVE[11]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 10. "RECEIVE10,Read pending status of interrupt for event RECEIVE[10]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 9. "RECEIVE9,Read pending status of interrupt for event RECEIVE[9]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "RECEIVE8,Read pending status of interrupt for event RECEIVE[8]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "RECEIVE7,Read pending status of interrupt for event RECEIVE[7]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 6. "RECEIVE6,Read pending status of interrupt for event RECEIVE[6]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 5. "RECEIVE5,Read pending status of interrupt for event RECEIVE[5]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 4. "RECEIVE4,Read pending status of interrupt for event RECEIVE[4]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 3. "RECEIVE3,Read pending status of interrupt for event RECEIVE[3]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 2. "RECEIVE2,Read pending status of interrupt for event RECEIVE[2]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 1. "RECEIVE1,Read pending status of interrupt for event RECEIVE[1]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 0. "RECEIVE0,Read pending status of interrupt for event RECEIVE[0]" "0: Read: Not pending,1: Read: Pending"
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "SEND_CNF[$1],Description collection: Send event configuration for TASKS_SEND[n $1"
bitfld.long 0x00 15. "CHEN15,Enable broadcasting on IPC channel 15" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 14. "CHEN14,Enable broadcasting on IPC channel 14" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 13. "CHEN13,Enable broadcasting on IPC channel 13" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 12. "CHEN12,Enable broadcasting on IPC channel 12" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 11. "CHEN11,Enable broadcasting on IPC channel 11" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 10. "CHEN10,Enable broadcasting on IPC channel 10" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 9. "CHEN9,Enable broadcasting on IPC channel 9" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 8. "CHEN8,Enable broadcasting on IPC channel 8" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 7. "CHEN7,Enable broadcasting on IPC channel 7" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 6. "CHEN6,Enable broadcasting on IPC channel 6" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 5. "CHEN5,Enable broadcasting on IPC channel 5" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 4. "CHEN4,Enable broadcasting on IPC channel 4" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 3. "CHEN3,Enable broadcasting on IPC channel 3" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 2. "CHEN2,Enable broadcasting on IPC channel 2" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 1. "CHEN1,Enable broadcasting on IPC channel 1" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 0. "CHEN0,Enable broadcasting on IPC channel 0" "0: Disable broadcast,1: Enable broadcast"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x590)++0x03
line.long 0x00 "RECEIVE_CNF[$1],Description collection: Receive event configuration for EVENTS_RECEIVE[n $1"
bitfld.long 0x00 15. "CHEN15,Enable subscription to IPC channel 15" "0: Disable events,1: Enable events"
bitfld.long 0x00 14. "CHEN14,Enable subscription to IPC channel 14" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 13. "CHEN13,Enable subscription to IPC channel 13" "0: Disable events,1: Enable events"
bitfld.long 0x00 12. "CHEN12,Enable subscription to IPC channel 12" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 11. "CHEN11,Enable subscription to IPC channel 11" "0: Disable events,1: Enable events"
bitfld.long 0x00 10. "CHEN10,Enable subscription to IPC channel 10" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 9. "CHEN9,Enable subscription to IPC channel 9" "0: Disable events,1: Enable events"
bitfld.long 0x00 8. "CHEN8,Enable subscription to IPC channel 8" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 7. "CHEN7,Enable subscription to IPC channel 7" "0: Disable events,1: Enable events"
bitfld.long 0x00 6. "CHEN6,Enable subscription to IPC channel 6" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 5. "CHEN5,Enable subscription to IPC channel 5" "0: Disable events,1: Enable events"
bitfld.long 0x00 4. "CHEN4,Enable subscription to IPC channel 4" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 3. "CHEN3,Enable subscription to IPC channel 3" "0: Disable events,1: Enable events"
bitfld.long 0x00 2. "CHEN2,Enable subscription to IPC channel 2" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 1. "CHEN1,Enable subscription to IPC channel 1" "0: Disable events,1: Enable events"
bitfld.long 0x00 0. "CHEN0,Enable subscription to IPC channel 0" "0: Disable events,1: Enable events"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x610)++0x03
line.long 0x00 "GPMEM[$1],Description collection: General purpose memory $1"
hexmask.long 0x00 0.--31. 1. "GPMEM,General purpose memory"
repeat.end
tree.end
tree "IPC_S"
base ad:0x5002A000
repeat 16. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x00)++0x03
line.long 0x00 "TASKS_SEND[$1],Description collection: Trigger events on IPC channel enabled in SEND_CNF[n $1"
bitfld.long 0x00 0. "TASKS_SEND,Trigger events on IPC channel enabled in SEND_CNF[n]" "?,1: Trigger task"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x4)
group.long ($2+0x80)++0x03
line.long 0x00 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "EVENTS_RECEIVE[$1],Description collection: Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n $1"
bitfld.long 0x00 0. "EVENTS_RECEIVE,Event received on one or more of the enabled IPC channels in RECEIVE_CNF[n]" "0: Event not generated,1: Event generated"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x180)++0x03
line.long 0x00 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to"
repeat.end
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Enable or disable interrupt for event RECEIVE[15]" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Enable or disable interrupt for event RECEIVE[14]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Enable or disable interrupt for event RECEIVE[13]" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Enable or disable interrupt for event RECEIVE[12]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Enable or disable interrupt for event RECEIVE[11]" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Enable or disable interrupt for event RECEIVE[10]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Enable or disable interrupt for event RECEIVE[9]" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Enable or disable interrupt for event RECEIVE[8]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Enable or disable interrupt for event RECEIVE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Enable or disable interrupt for event RECEIVE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Enable or disable interrupt for event RECEIVE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Enable or disable interrupt for event RECEIVE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Enable or disable interrupt for event RECEIVE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Enable or disable interrupt for event RECEIVE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Enable or disable interrupt for event RECEIVE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Enable or disable interrupt for event RECEIVE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to enable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to enable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to enable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to enable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to enable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to enable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to enable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to enable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to enable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to enable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to enable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to enable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to enable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to enable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to enable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to enable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 15. "RECEIVE15,Write '1' to disable interrupt for event RECEIVE[15]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "RECEIVE14,Write '1' to disable interrupt for event RECEIVE[14]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "RECEIVE13,Write '1' to disable interrupt for event RECEIVE[13]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "RECEIVE12,Write '1' to disable interrupt for event RECEIVE[12]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "RECEIVE11,Write '1' to disable interrupt for event RECEIVE[11]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "RECEIVE10,Write '1' to disable interrupt for event RECEIVE[10]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "RECEIVE9,Write '1' to disable interrupt for event RECEIVE[9]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "RECEIVE8,Write '1' to disable interrupt for event RECEIVE[8]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "RECEIVE7,Write '1' to disable interrupt for event RECEIVE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "RECEIVE6,Write '1' to disable interrupt for event RECEIVE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "RECEIVE5,Write '1' to disable interrupt for event RECEIVE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "RECEIVE4,Write '1' to disable interrupt for event RECEIVE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RECEIVE3,Write '1' to disable interrupt for event RECEIVE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "RECEIVE2,Write '1' to disable interrupt for event RECEIVE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "RECEIVE1,Write '1' to disable interrupt for event RECEIVE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "RECEIVE0,Write '1' to disable interrupt for event RECEIVE[0]" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 15. "RECEIVE15,Read pending status of interrupt for event RECEIVE[15]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 14. "RECEIVE14,Read pending status of interrupt for event RECEIVE[14]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 13. "RECEIVE13,Read pending status of interrupt for event RECEIVE[13]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 12. "RECEIVE12,Read pending status of interrupt for event RECEIVE[12]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 11. "RECEIVE11,Read pending status of interrupt for event RECEIVE[11]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 10. "RECEIVE10,Read pending status of interrupt for event RECEIVE[10]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 9. "RECEIVE9,Read pending status of interrupt for event RECEIVE[9]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 8. "RECEIVE8,Read pending status of interrupt for event RECEIVE[8]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 7. "RECEIVE7,Read pending status of interrupt for event RECEIVE[7]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 6. "RECEIVE6,Read pending status of interrupt for event RECEIVE[6]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 5. "RECEIVE5,Read pending status of interrupt for event RECEIVE[5]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 4. "RECEIVE4,Read pending status of interrupt for event RECEIVE[4]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 3. "RECEIVE3,Read pending status of interrupt for event RECEIVE[3]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 2. "RECEIVE2,Read pending status of interrupt for event RECEIVE[2]" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 1. "RECEIVE1,Read pending status of interrupt for event RECEIVE[1]" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 0. "RECEIVE0,Read pending status of interrupt for event RECEIVE[0]" "0: Read: Not pending,1: Read: Pending"
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x510)++0x03
line.long 0x00 "SEND_CNF[$1],Description collection: Send event configuration for TASKS_SEND[n $1"
bitfld.long 0x00 15. "CHEN15,Enable broadcasting on IPC channel 15" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 14. "CHEN14,Enable broadcasting on IPC channel 14" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 13. "CHEN13,Enable broadcasting on IPC channel 13" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 12. "CHEN12,Enable broadcasting on IPC channel 12" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 11. "CHEN11,Enable broadcasting on IPC channel 11" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 10. "CHEN10,Enable broadcasting on IPC channel 10" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 9. "CHEN9,Enable broadcasting on IPC channel 9" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 8. "CHEN8,Enable broadcasting on IPC channel 8" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 7. "CHEN7,Enable broadcasting on IPC channel 7" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 6. "CHEN6,Enable broadcasting on IPC channel 6" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 5. "CHEN5,Enable broadcasting on IPC channel 5" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 4. "CHEN4,Enable broadcasting on IPC channel 4" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 3. "CHEN3,Enable broadcasting on IPC channel 3" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 2. "CHEN2,Enable broadcasting on IPC channel 2" "0: Disable broadcast,1: Enable broadcast"
newline
bitfld.long 0x00 1. "CHEN1,Enable broadcasting on IPC channel 1" "0: Disable broadcast,1: Enable broadcast"
bitfld.long 0x00 0. "CHEN0,Enable broadcasting on IPC channel 0" "0: Disable broadcast,1: Enable broadcast"
repeat.end
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x590)++0x03
line.long 0x00 "RECEIVE_CNF[$1],Description collection: Receive event configuration for EVENTS_RECEIVE[n $1"
bitfld.long 0x00 15. "CHEN15,Enable subscription to IPC channel 15" "0: Disable events,1: Enable events"
bitfld.long 0x00 14. "CHEN14,Enable subscription to IPC channel 14" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 13. "CHEN13,Enable subscription to IPC channel 13" "0: Disable events,1: Enable events"
bitfld.long 0x00 12. "CHEN12,Enable subscription to IPC channel 12" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 11. "CHEN11,Enable subscription to IPC channel 11" "0: Disable events,1: Enable events"
bitfld.long 0x00 10. "CHEN10,Enable subscription to IPC channel 10" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 9. "CHEN9,Enable subscription to IPC channel 9" "0: Disable events,1: Enable events"
bitfld.long 0x00 8. "CHEN8,Enable subscription to IPC channel 8" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 7. "CHEN7,Enable subscription to IPC channel 7" "0: Disable events,1: Enable events"
bitfld.long 0x00 6. "CHEN6,Enable subscription to IPC channel 6" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 5. "CHEN5,Enable subscription to IPC channel 5" "0: Disable events,1: Enable events"
bitfld.long 0x00 4. "CHEN4,Enable subscription to IPC channel 4" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 3. "CHEN3,Enable subscription to IPC channel 3" "0: Disable events,1: Enable events"
bitfld.long 0x00 2. "CHEN2,Enable subscription to IPC channel 2" "0: Disable events,1: Enable events"
newline
bitfld.long 0x00 1. "CHEN1,Enable subscription to IPC channel 1" "0: Disable events,1: Enable events"
bitfld.long 0x00 0. "CHEN0,Enable subscription to IPC channel 0" "0: Disable events,1: Enable events"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x610)++0x03
line.long 0x00 "GPMEM[$1],Description collection: General purpose memory $1"
hexmask.long 0x00 0.--31. 1. "GPMEM,General purpose memory"
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "KMU (Key Management Unit)"
tree "KMU_NS"
base ad:0x40039000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_PUSH_KEYSLOT,Push a key slot over secure APB"
bitfld.long 0x00 0. "TASKS_PUSH_KEYSLOT,Push a key slot over secure APB" "?,1: Trigger task"
group.long 0x100++0x03
line.long 0x00 "EVENTS_KEYSLOT_PUSHED,Key slot successfully pushed over secure APB"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_PUSHED,Key slot successfully pushed over secure APB" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_KEYSLOT_REVOKED,Key slot has been revoked and cannot be tasked for selection"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_REVOKED,Key slot has been revoked and cannot be tasked for selection" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_KEYSLOT_ERROR,No key slot selected no destination address defined or error during push operation"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_ERROR,No key slot selected no destination address defined or error during push operation" "0: Event not generated,1: Event generated"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Enable or disable interrupt for event KEYSLOT_ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Enable or disable interrupt for event KEYSLOT_REVOKED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Enable or disable interrupt for event KEYSLOT_PUSHED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Write '1' to enable interrupt for event KEYSLOT_ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Write '1' to enable interrupt for event KEYSLOT_REVOKED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Write '1' to enable interrupt for event KEYSLOT_PUSHED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Write '1' to disable interrupt for event KEYSLOT_ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Write '1' to disable interrupt for event KEYSLOT_REVOKED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Write '1' to disable interrupt for event KEYSLOT_PUSHED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Read pending status of interrupt for event KEYSLOT_ERROR" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Read pending status of interrupt for event KEYSLOT_REVOKED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Read pending status of interrupt for event KEYSLOT_PUSHED" "0: Read: Not pending,1: Read: Pending"
rgroup.long 0x40C++0x03
line.long 0x00 "STATUS,Status bits for KMU operation"
bitfld.long 0x00 1. "BLOCKED,Violation status" "0: No access violation detected,1: Access violation detected and blocked"
bitfld.long 0x00 0. "SELECTED,Key slot ID successfully selected by the KMU" "0: No key slot ID selected by KMU,1: Key slot ID successfully selected by KMU"
group.long 0x500++0x03
line.long 0x00 "SELECTKEYSLOT,Select key slot to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started"
hexmask.long.byte 0x00 0.--7. 1. "ID,Select key slot ID to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started"
tree.end
tree "KMU_S"
base ad:0x50039000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_PUSH_KEYSLOT,Push a key slot over secure APB"
bitfld.long 0x00 0. "TASKS_PUSH_KEYSLOT,Push a key slot over secure APB" "?,1: Trigger task"
group.long 0x100++0x03
line.long 0x00 "EVENTS_KEYSLOT_PUSHED,Key slot successfully pushed over secure APB"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_PUSHED,Key slot successfully pushed over secure APB" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_KEYSLOT_REVOKED,Key slot has been revoked and cannot be tasked for selection"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_REVOKED,Key slot has been revoked and cannot be tasked for selection" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_KEYSLOT_ERROR,No key slot selected no destination address defined or error during push operation"
bitfld.long 0x00 0. "EVENTS_KEYSLOT_ERROR,No key slot selected no destination address defined or error during push operation" "0: Event not generated,1: Event generated"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Enable or disable interrupt for event KEYSLOT_ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Enable or disable interrupt for event KEYSLOT_REVOKED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Enable or disable interrupt for event KEYSLOT_PUSHED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Write '1' to enable interrupt for event KEYSLOT_ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Write '1' to enable interrupt for event KEYSLOT_REVOKED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Write '1' to enable interrupt for event KEYSLOT_PUSHED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Write '1' to disable interrupt for event KEYSLOT_ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Write '1' to disable interrupt for event KEYSLOT_REVOKED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Write '1' to disable interrupt for event KEYSLOT_PUSHED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x30C++0x03
line.long 0x00 "INTPEND,Pending interrupts"
bitfld.long 0x00 2. "KEYSLOT_ERROR,Read pending status of interrupt for event KEYSLOT_ERROR" "0: Read: Not pending,1: Read: Pending"
bitfld.long 0x00 1. "KEYSLOT_REVOKED,Read pending status of interrupt for event KEYSLOT_REVOKED" "0: Read: Not pending,1: Read: Pending"
newline
bitfld.long 0x00 0. "KEYSLOT_PUSHED,Read pending status of interrupt for event KEYSLOT_PUSHED" "0: Read: Not pending,1: Read: Pending"
rgroup.long 0x40C++0x03
line.long 0x00 "STATUS,Status bits for KMU operation"
bitfld.long 0x00 1. "BLOCKED,Violation status" "0: No access violation detected,1: Access violation detected and blocked"
bitfld.long 0x00 0. "SELECTED,Key slot ID successfully selected by the KMU" "0: No key slot ID selected by KMU,1: Key slot ID successfully selected by KMU"
group.long 0x500++0x03
line.long 0x00 "SELECTKEYSLOT,Select key slot to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started"
hexmask.long.byte 0x00 0.--7. 1. "ID,Select key slot ID to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started"
tree.end
tree.end
tree "LPCOMP (Low-power Comparator)"
tree "LPCOMP_NS"
base ad:0x4001A000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start comparator"
bitfld.long 0x00 0. "TASKS_START,Start comparator" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop comparator"
bitfld.long 0x00 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SAMPLE,Sample comparator value"
bitfld.long 0x00 0. "TASKS_SAMPLE,Sample comparator value" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,LPCOMP is ready and output is valid"
bitfld.long 0x00 0. "EVENTS_READY,LPCOMP is ready and output is valid" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DOWN,Downward crossing"
bitfld.long 0x00 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_UP,Upward crossing"
bitfld.long 0x00 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_CROSS,Downward or upward crossing"
bitfld.long 0x00 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_DOWN,Publish configuration for event DOWN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_UP,Publish configuration for event UP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_CROSS,Publish configuration for event CROSS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RESULT,Compare result"
bitfld.long 0x00 0. "RESULT,Result of last compare" "0: Input voltage is below the reference..,1: Input voltage is above the reference.."
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable LPCOMP"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable LPCOMP" "0: Disabled,1: Enabled,?..."
group.long 0x504++0x03
line.long 0x00 "PSEL,Input pin select"
bitfld.long 0x00 0.--2. "PSEL,Analog pin select" "0: AIN0 selected as analog input,1: AIN1 selected as analog input,2: AIN2 selected as analog input,3: AIN3 selected as analog input,4: AIN4 selected as analog input,5: AIN5 selected as analog input,6: AIN6 selected as analog input,7: AIN7 selected as analog input"
group.long 0x508++0x03
line.long 0x00 "REFSEL,Reference select"
bitfld.long 0x00 0.--3. "REFSEL,Reference select" "0: VDD * 1/8 selected as reference,1: VDD * 2/8 selected as reference,2: VDD * 3/8 selected as reference,3: VDD * 4/8 selected as reference,4: VDD * 5/8 selected as reference,5: VDD * 6/8 selected as reference,6: VDD * 7/8 selected as reference,7: External analog reference selected,8: VDD * 1/16 selected as reference,9: VDD * 3/16 selected as reference,10: VDD * 5/16 selected as reference,11: VDD * 7/16 selected as reference,12: VDD * 9/16 selected as reference,13: VDD * 11/16 selected as reference,14: VDD * 13/16 selected as reference,15: VDD * 15/16 selected as reference"
group.long 0x50C++0x03
line.long 0x00 "EXTREFSEL,External reference select"
bitfld.long 0x00 0. "EXTREFSEL,External analog reference select" "0: Use AIN0 as external analog reference,1: Use AIN1 as external analog reference"
group.long 0x520++0x03
line.long 0x00 "ANADETECT,Analog detect configuration"
bitfld.long 0x00 0.--1. "ANADETECT,Analog detect configuration" "0: Generate ANADETECT on crossing both upward..,1: Generate ANADETECT on upward crossing only,2: Generate ANADETECT on downward crossing only,?..."
group.long 0x538++0x03
line.long 0x00 "HYST,Comparator hysteresis enable"
bitfld.long 0x00 0. "HYST,Comparator hysteresis enable" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled"
tree.end
tree "LPCOMP_S"
base ad:0x5001A000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start comparator"
bitfld.long 0x00 0. "TASKS_START,Start comparator" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop comparator"
bitfld.long 0x00 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SAMPLE,Sample comparator value"
bitfld.long 0x00 0. "TASKS_SAMPLE,Sample comparator value" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,LPCOMP is ready and output is valid"
bitfld.long 0x00 0. "EVENTS_READY,LPCOMP is ready and output is valid" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_DOWN,Downward crossing"
bitfld.long 0x00 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_UP,Upward crossing"
bitfld.long 0x00 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_CROSS,Downward or upward crossing"
bitfld.long 0x00 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_DOWN,Publish configuration for event DOWN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_UP,Publish configuration for event UP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_CROSS,Publish configuration for event CROSS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RESULT,Compare result"
bitfld.long 0x00 0. "RESULT,Result of last compare" "0: Input voltage is below the reference..,1: Input voltage is above the reference.."
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable LPCOMP"
bitfld.long 0x00 0.--1. "ENABLE,Enable or disable LPCOMP" "0: Disabled,1: Enabled,?..."
group.long 0x504++0x03
line.long 0x00 "PSEL,Input pin select"
bitfld.long 0x00 0.--2. "PSEL,Analog pin select" "0: AIN0 selected as analog input,1: AIN1 selected as analog input,2: AIN2 selected as analog input,3: AIN3 selected as analog input,4: AIN4 selected as analog input,5: AIN5 selected as analog input,6: AIN6 selected as analog input,7: AIN7 selected as analog input"
group.long 0x508++0x03
line.long 0x00 "REFSEL,Reference select"
bitfld.long 0x00 0.--3. "REFSEL,Reference select" "0: VDD * 1/8 selected as reference,1: VDD * 2/8 selected as reference,2: VDD * 3/8 selected as reference,3: VDD * 4/8 selected as reference,4: VDD * 5/8 selected as reference,5: VDD * 6/8 selected as reference,6: VDD * 7/8 selected as reference,7: External analog reference selected,8: VDD * 1/16 selected as reference,9: VDD * 3/16 selected as reference,10: VDD * 5/16 selected as reference,11: VDD * 7/16 selected as reference,12: VDD * 9/16 selected as reference,13: VDD * 11/16 selected as reference,14: VDD * 13/16 selected as reference,15: VDD * 15/16 selected as reference"
group.long 0x50C++0x03
line.long 0x00 "EXTREFSEL,External reference select"
bitfld.long 0x00 0. "EXTREFSEL,External analog reference select" "0: Use AIN0 as external analog reference,1: Use AIN1 as external analog reference"
group.long 0x520++0x03
line.long 0x00 "ANADETECT,Analog detect configuration"
bitfld.long 0x00 0.--1. "ANADETECT,Analog detect configuration" "0: Generate ANADETECT on crossing both upward..,1: Generate ANADETECT on upward crossing only,2: Generate ANADETECT on downward crossing only,?..."
group.long 0x538++0x03
line.long 0x00 "HYST,Comparator hysteresis enable"
bitfld.long 0x00 0. "HYST,Comparator hysteresis enable" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled"
tree.end
tree.end
endif
tree "MUTEX (MUTEX 0)"
sif cpuis("NRF5340QKAA-NET")
tree "APPMUTEX_NS"
base ad:0x40030000
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x400)++0x03
line.long 0x00 "MUTEX[$1],Description collection: Mutex register $1"
bitfld.long 0x00 0. "MUTEX,Mutex register n" "0: Mutex n is in unlocked state,1: Mutex n is in locked state"
repeat.end
tree.end
tree "APPMUTEX_S"
base ad:0x50030000
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x400)++0x03
line.long 0x00 "MUTEX[$1],Description collection: Mutex register $1"
bitfld.long 0x00 0. "MUTEX,Mutex register n" "0: Mutex n is in unlocked state,1: Mutex n is in locked state"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "MUTEX_NS"
base ad:0x40030000
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x400)++0x03
line.long 0x00 "MUTEX[$1],Description collection: Mutex register $1"
bitfld.long 0x00 0. "MUTEX,Mutex register n" "0: Mutex n is in unlocked state,1: Mutex n is in locked state"
repeat.end
tree.end
tree "MUTEX_S"
base ad:0x50030000
repeat 16. (increment 0 1) (increment 0 0x04)
group.long ($2+0x400)++0x03
line.long 0x00 "MUTEX[$1],Description collection: Mutex register $1"
bitfld.long 0x00 0. "MUTEX,Mutex register n" "0: Mutex n is in unlocked state,1: Mutex n is in locked state"
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "NFCT (NFC-A Compatible Radio)"
tree "NFCT_NS"
base ad:0x4002D000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated"
bitfld.long 0x00 0. "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_DISABLE,Disable NFCT peripheral"
bitfld.long 0x00 0. "TASKS_DISABLE,Disable NFCT peripheral" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SENSE,Enable NFC sense field mode change state to sense mode"
bitfld.long 0x00 0. "TASKS_SENSE,Enable NFC sense field mode change state to sense mode" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit"
bitfld.long 0x00 0. "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive"
bitfld.long 0x00 0. "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_GOIDLE,Force state machine to IDLE state"
bitfld.long 0x00 0. "TASKS_GOIDLE,Force state machine to IDLE state" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_GOSLEEP,Force state machine to SLEEP_A state"
bitfld.long 0x00 0. "TASKS_GOSLEEP,Force state machine to SLEEP_A state" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SENSE,Subscribe configuration for task SENSE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SENSE will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_ENABLERXDATA,Subscribe configuration for task ENABLERXDATA"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ENABLERXDATA will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_GOIDLE,Subscribe configuration for task GOIDLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task GOIDLE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_GOSLEEP,Subscribe configuration for task GOSLEEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task GOSLEEP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,The NFCT peripheral is ready to receive and send frames"
bitfld.long 0x00 0. "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_FIELDDETECTED,Remote NFC field detected"
bitfld.long 0x00 0. "EVENTS_FIELDDETECTED,Remote NFC field detected" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_FIELDLOST,Remote NFC field lost"
bitfld.long 0x00 0. "EVENTS_FIELDLOST,Remote NFC field lost" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame"
bitfld.long 0x00 0. "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame"
bitfld.long 0x00 0. "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame"
bitfld.long 0x00 0. "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer"
bitfld.long 0x00 0. "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_ERROR,NFC error reported"
bitfld.long 0x00 0. "EVENTS_ERROR,NFC error reported" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_RXERROR,NFC RX frame error reported"
bitfld.long 0x00 0. "EVENTS_RXERROR,NFC RX frame error reported" "0: Event not generated,1: Event generated"
group.long 0x12C++0x03
line.long 0x00 "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full"
bitfld.long 0x00 0. "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full" "0: Event not generated,1: Event generated"
group.long 0x130++0x03
line.long 0x00 "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer"
bitfld.long 0x00 0. "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer" "0: Event not generated,1: Event generated"
group.long 0x138++0x03
line.long 0x00 "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started"
bitfld.long 0x00 0. "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_COLLISION,NFC auto collision resolution error reported"
bitfld.long 0x00 0. "EVENTS_COLLISION,NFC auto collision resolution error reported" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_SELECTED,NFC auto collision resolution successfully completed"
bitfld.long 0x00 0. "EVENTS_SELECTED,NFC auto collision resolution successfully completed" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_STARTED,EasyDMA is ready to receive or send frames"
bitfld.long 0x00 0. "EVENTS_STARTED,EasyDMA is ready to receive or send frames" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_FIELDDETECTED,Publish configuration for event FIELDDETECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FIELDDETECTED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_FIELDLOST,Publish configuration for event FIELDLOST"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FIELDLOST will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_TXFRAMESTART,Publish configuration for event TXFRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMESTART will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_TXFRAMEEND,Publish configuration for event TXFRAMEEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMEEND will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_RXFRAMESTART,Publish configuration for event RXFRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMESTART will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_RXFRAMEEND,Publish configuration for event RXFRAMEEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMEEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_RXERROR,Publish configuration for event RXERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXERROR will publish to"
group.long 0x1AC++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1B0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1B8++0x03
line.long 0x00 "PUBLISH_AUTOCOLRESSTARTED,Publish configuration for event AUTOCOLRESSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event AUTOCOLRESSTARTED will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_COLLISION,Publish configuration for event COLLISION"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COLLISION will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_SELECTED,Publish configuration for event SELECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SELECTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 5. "TXFRAMEEND_ENABLERXDATA,Shortcut between event TXFRAMEEND and task ENABLERXDATA" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "FIELDLOST_SENSE,Shortcut between event FIELDLOST and task SENSE" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "FIELDDETECTED_ACTIVATE,Shortcut between event FIELDDETECTED and task ACTIVATE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 20. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "SELECTED,Enable or disable interrupt for event SELECTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Enable or disable interrupt for event COLLISION" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Enable or disable interrupt for event AUTOCOLRESSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 11. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Enable or disable interrupt for event RXERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 7. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Enable or disable interrupt for event RXFRAMEEND" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Enable or disable interrupt for event RXFRAMESTART" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Enable or disable interrupt for event TXFRAMEEND" "0: Disabled,1: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Enable or disable interrupt for event TXFRAMESTART" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Enable or disable interrupt for event FIELDLOST" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Enable or disable interrupt for event FIELDDETECTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 20. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "SELECTED,Write '1' to enable interrupt for event SELECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Write '1' to enable interrupt for event COLLISION" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Write '1' to enable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Write '1' to enable interrupt for event RXERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Write '1' to enable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Write '1' to enable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Write '1' to enable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Write '1' to enable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Write '1' to enable interrupt for event FIELDLOST" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Write '1' to enable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 20. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "SELECTED,Write '1' to disable interrupt for event SELECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Write '1' to disable interrupt for event COLLISION" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Write '1' to disable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Write '1' to disable interrupt for event RXERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Write '1' to disable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Write '1' to disable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Write '1' to disable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Write '1' to disable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Write '1' to disable interrupt for event FIELDLOST" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Write '1' to disable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x404++0x03
line.long 0x00 "ERRORSTATUS,NFC Error Status register"
bitfld.long 0x00 0. "FRAMEDELAYTIMEOUT,No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX" "0,1"
rgroup.long 0x410++0x03
line.long 0x00 "NFCTAGSTATE,NfcTag state register"
bitfld.long 0x00 0.--2. "NFCTAGSTATE,NfcTag state" "0: Disabled or sense,?,2: RampUp,3: Idle,4: Receive,5: FrameDelay,6: Transmit,?..."
rgroup.long 0x420++0x03
line.long 0x00 "SLEEPSTATE,Sleep state during automatic collision resolution"
bitfld.long 0x00 0. "SLEEPSTATE,Reflects the sleep state during automatic collision resolution" "0: State is IDLE,1: State is SLEEP_A"
rgroup.long 0x43C++0x03
line.long 0x00 "FIELDPRESENT,Indicates the presence or not of a valid field"
bitfld.long 0x00 1. "LOCKDETECT,Indicates if the low level has locked to the field" "0: Not locked to field,1: Locked to field"
bitfld.long 0x00 0. "FIELDPRESENT,Indicates if a valid field is present" "0: No valid field detected,1: Valid field detected"
group.long 0x504++0x03
line.long 0x00 "FRAMEDELAYMIN,Minimum frame delay"
hexmask.long.word 0x00 0.--15. 1. "FRAMEDELAYMIN,Minimum frame delay in number of 13.56 MHz clocks"
group.long 0x508++0x03
line.long 0x00 "FRAMEDELAYMAX,Maximum frame delay"
hexmask.long.tbyte 0x00 0.--19. 1. "FRAMEDELAYMAX,Maximum frame delay in number of 13.56 MHz clocks"
group.long 0x50C++0x03
line.long 0x00 "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer"
bitfld.long 0x00 0.--1. "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" "0: Transmission is independent of frame timer..,1: Frame is transmitted between FRAMEDELAYMIN..,2: Frame is transmitted exactly at FRAMEDELAYMAX,3: Frame is transmitted on a bit grid between.."
group.long 0x510++0x03
line.long 0x00 "PACKETPTR,Packet pointer for TXD and RXD data storage in Data RAM"
hexmask.long 0x00 0.--31. 1. "PTR,Packet pointer for TXD and RXD data storage in Data RAM"
group.long 0x514++0x03
line.long 0x00 "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each"
hexmask.long.word 0x00 0.--8. 1. "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each"
group.long 0x52C++0x03
line.long 0x00 "MODULATIONCTRL,Enables the modulation output to a GPIO pin which can be connected to a second external antenna"
bitfld.long 0x00 0.--1. "MODULATIONCTRL,Configuration of modulation control" "0: Invalid defaults to same behaviour as for..,1: Use internal modulator only,2: Output digital modulation signal to a GPIO pin,3: Use internal modulator and output digital.."
group.long 0x538++0x03
line.long 0x00 "MODULATIONPSEL,Pin select for Modulation control"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5.--6. "PORT,Port number" "0,1,2,3"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x590++0x03
line.long 0x00 "NFCID1_LAST,Last NFCID1 part (4 7 or 10 bytes ID)"
hexmask.long.byte 0x00 24.--31. 1. "NFCID1_W,NFCID1 byte W"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_X,NFCID1 byte X"
newline
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_Y,NFCID1 byte Y"
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_Z,NFCID1 byte Z (very last byte sent)"
group.long 0x594++0x03
line.long 0x00 "NFCID1_2ND_LAST,Second last NFCID1 part (7 or 10 bytes ID)"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_T,NFCID1 byte T"
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_U,NFCID1 byte U"
newline
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_V,NFCID1 byte V"
group.long 0x598++0x03
line.long 0x00 "NFCID1_3RD_LAST,Third last NFCID1 part (10 bytes ID)"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_Q,NFCID1 byte Q"
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_R,NFCID1 byte R"
newline
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_S,NFCID1 byte S"
group.long 0x59C++0x03
line.long 0x00 "AUTOCOLRESCONFIG,Controls the auto collision resolution function"
bitfld.long 0x00 0. "MODE,Enables/disables auto collision resolution" "0: Auto collision resolution enabled,1: Auto collision resolution disabled"
group.long 0x5A0++0x03
line.long 0x00 "SENSRES,NFC-A SENS_RES auto-response settings"
bitfld.long 0x00 12.--15. "RFU74,Reserved for future use" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "PLATFCONFIG,Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 6.--7. "NFCIDSIZE,NFCID1 size" "0: NFCID1 size,1: NFCID1 size,2: NFCID1 size,?..."
bitfld.long 0x00 5. "RFU5,Reserved for future use" "0,1"
newline
bitfld.long 0x00 0.--4. "BITFRAMESDD,Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0: SDD pattern 00000,1: SDD pattern 00001,2: SDD pattern 00010,?,4: SDD pattern 00100,?,?,?,8: SDD pattern 01000,?,?,?,?,?,?,?,16: SDD pattern 10000,?..."
group.long 0x5A4++0x03
line.long 0x00 "SELRES,NFC-A SEL_RES auto-response settings"
bitfld.long 0x00 7. "RFU7,Reserved for future use" "0,1"
bitfld.long 0x00 5.--6. "PROTOCOL,Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3"
newline
bitfld.long 0x00 3.--4. "RFU43,Reserved for future use" "0,1,2,3"
bitfld.long 0x00 2. "CASCADE,Cascade as defined by the b3 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification (controlled by hardware shall be 0)" "0,1"
newline
bitfld.long 0x00 0.--1. "RFU10,Reserved for future use" "0,1,2,3"
tree "FRAMESTATUS"
group.long 0x40C++0x03
line.long 0x00 "RX,Result of last incoming frame"
bitfld.long 0x00 3. "OVERRUN,Overrun detected" "0: No overrun detected,1: Overrun error"
bitfld.long 0x00 2. "PARITYSTATUS,Parity status of received frame" "0: Frame received with parity OK,1: Frame received with parity error"
newline
bitfld.long 0x00 0. "CRCERROR,No valid end of frame (EoF) detected" "0: Valid CRC detected,1: CRC received does not match local check"
tree.end
tree "TXD"
group.long 0x518++0x03
line.long 0x00 "FRAMECONFIG,Configuration of outgoing frames"
bitfld.long 0x00 4. "CRCMODETX,CRC mode for outgoing frames" "0: CRC is not added to the frame,1: 16 bit CRC added to the frame based on all.."
bitfld.long 0x00 2. "SOF,Adding SoF or not in TX frames" "0: SoF symbol not added,1: SoF symbol added"
newline
bitfld.long 0x00 1. "DISCARDMODE,Discarding unused bits at start or end of a frame" "0: Unused bits are discarded at end of frame (EoF),1: Unused bits are discarded at start of frame.."
bitfld.long 0x00 0. "PARITY,Indicates if parity is added to the frame" "0: Parity is not added to TX frames,1: Parity is added to TX frames"
group.long 0x51C++0x03
line.long 0x00 "AMOUNT,Size of outgoing frame"
hexmask.long.word 0x00 3.--11. 1. "TXDATABYTES,Number of complete bytes that shall be included in the frame excluding CRC parity and framing"
bitfld.long 0x00 0.--2. "TXDATABITS,Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit)" "0,1,2,3,4,5,6,7"
tree.end
tree "RXD"
group.long 0x520++0x03
line.long 0x00 "FRAMECONFIG,Configuration of incoming frames"
bitfld.long 0x00 4. "CRCMODERX,CRC mode for incoming frames" "0: CRC is not expected in RX frames,1: Last 16 bits in RX frame is CRC CRC is.."
bitfld.long 0x00 2. "SOF,SoF expected or not in RX frames" "0: SoF symbol is not expected in RX frames,1: SoF symbol is expected in RX frames"
newline
bitfld.long 0x00 0. "PARITY,Indicates if parity expected in RX frame" "0: Parity is not expected in RX frames,1: Parity is expected in RX frames"
rgroup.long 0x524++0x03
line.long 0x00 "AMOUNT,Size of last incoming frame"
hexmask.long.word 0x00 3.--11. 1. "RXDATABYTES,Number of complete bytes received in the frame (including CRC but excluding parity and SoF/EoF framing)"
bitfld.long 0x00 0.--2. "RXDATABITS,Number of bits in the last byte in the frame if less than 8 (including CRC but excluding parity and SoF/EoF framing)" "0,1,2,3,4,5,6,7"
tree.end
tree.end
tree "NFCT_S"
base ad:0x5002D000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated"
bitfld.long 0x00 0. "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_DISABLE,Disable NFCT peripheral"
bitfld.long 0x00 0. "TASKS_DISABLE,Disable NFCT peripheral" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_SENSE,Enable NFC sense field mode change state to sense mode"
bitfld.long 0x00 0. "TASKS_SENSE,Enable NFC sense field mode change state to sense mode" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit"
bitfld.long 0x00 0. "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive"
bitfld.long 0x00 0. "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_GOIDLE,Force state machine to IDLE state"
bitfld.long 0x00 0. "TASKS_GOIDLE,Force state machine to IDLE state" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_GOSLEEP,Force state machine to SLEEP_A state"
bitfld.long 0x00 0. "TASKS_GOSLEEP,Force state machine to SLEEP_A state" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_SENSE,Subscribe configuration for task SENSE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SENSE will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_ENABLERXDATA,Subscribe configuration for task ENABLERXDATA"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ENABLERXDATA will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_GOIDLE,Subscribe configuration for task GOIDLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task GOIDLE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_GOSLEEP,Subscribe configuration for task GOSLEEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task GOSLEEP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,The NFCT peripheral is ready to receive and send frames"
bitfld.long 0x00 0. "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_FIELDDETECTED,Remote NFC field detected"
bitfld.long 0x00 0. "EVENTS_FIELDDETECTED,Remote NFC field detected" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_FIELDLOST,Remote NFC field lost"
bitfld.long 0x00 0. "EVENTS_FIELDLOST,Remote NFC field lost" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame"
bitfld.long 0x00 0. "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame"
bitfld.long 0x00 0. "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame"
bitfld.long 0x00 0. "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer"
bitfld.long 0x00 0. "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_ERROR,NFC error reported"
bitfld.long 0x00 0. "EVENTS_ERROR,NFC error reported" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_RXERROR,NFC RX frame error reported"
bitfld.long 0x00 0. "EVENTS_RXERROR,NFC RX frame error reported" "0: Event not generated,1: Event generated"
group.long 0x12C++0x03
line.long 0x00 "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full"
bitfld.long 0x00 0. "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full" "0: Event not generated,1: Event generated"
group.long 0x130++0x03
line.long 0x00 "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer"
bitfld.long 0x00 0. "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer" "0: Event not generated,1: Event generated"
group.long 0x138++0x03
line.long 0x00 "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started"
bitfld.long 0x00 0. "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_COLLISION,NFC auto collision resolution error reported"
bitfld.long 0x00 0. "EVENTS_COLLISION,NFC auto collision resolution error reported" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_SELECTED,NFC auto collision resolution successfully completed"
bitfld.long 0x00 0. "EVENTS_SELECTED,NFC auto collision resolution successfully completed" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_STARTED,EasyDMA is ready to receive or send frames"
bitfld.long 0x00 0. "EVENTS_STARTED,EasyDMA is ready to receive or send frames" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_FIELDDETECTED,Publish configuration for event FIELDDETECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FIELDDETECTED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_FIELDLOST,Publish configuration for event FIELDLOST"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FIELDLOST will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_TXFRAMESTART,Publish configuration for event TXFRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMESTART will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_TXFRAMEEND,Publish configuration for event TXFRAMEEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMEEND will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_RXFRAMESTART,Publish configuration for event RXFRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMESTART will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_RXFRAMEEND,Publish configuration for event RXFRAMEEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMEEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_RXERROR,Publish configuration for event RXERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXERROR will publish to"
group.long 0x1AC++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1B0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1B8++0x03
line.long 0x00 "PUBLISH_AUTOCOLRESSTARTED,Publish configuration for event AUTOCOLRESSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event AUTOCOLRESSTARTED will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_COLLISION,Publish configuration for event COLLISION"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COLLISION will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_SELECTED,Publish configuration for event SELECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SELECTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 5. "TXFRAMEEND_ENABLERXDATA,Shortcut between event TXFRAMEEND and task ENABLERXDATA" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "FIELDLOST_SENSE,Shortcut between event FIELDLOST and task SENSE" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "FIELDDETECTED_ACTIVATE,Shortcut between event FIELDDETECTED and task ACTIVATE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 20. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "SELECTED,Enable or disable interrupt for event SELECTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Enable or disable interrupt for event COLLISION" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Enable or disable interrupt for event AUTOCOLRESSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 11. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Enable or disable interrupt for event RXERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 7. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Enable or disable interrupt for event RXFRAMEEND" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Enable or disable interrupt for event RXFRAMESTART" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Enable or disable interrupt for event TXFRAMEEND" "0: Disabled,1: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Enable or disable interrupt for event TXFRAMESTART" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Enable or disable interrupt for event FIELDLOST" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Enable or disable interrupt for event FIELDDETECTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 20. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "SELECTED,Write '1' to enable interrupt for event SELECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Write '1' to enable interrupt for event COLLISION" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Write '1' to enable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Write '1' to enable interrupt for event RXERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Write '1' to enable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Write '1' to enable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Write '1' to enable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Write '1' to enable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Write '1' to enable interrupt for event FIELDLOST" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Write '1' to enable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 20. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "SELECTED,Write '1' to disable interrupt for event SELECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "COLLISION,Write '1' to disable interrupt for event COLLISION" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "AUTOCOLRESSTARTED,Write '1' to disable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "RXERROR,Write '1' to disable interrupt for event RXERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "RXFRAMEEND,Write '1' to disable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "RXFRAMESTART,Write '1' to disable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "TXFRAMEEND,Write '1' to disable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "TXFRAMESTART,Write '1' to disable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "FIELDLOST,Write '1' to disable interrupt for event FIELDLOST" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FIELDDETECTED,Write '1' to disable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x404++0x03
line.long 0x00 "ERRORSTATUS,NFC Error Status register"
bitfld.long 0x00 0. "FRAMEDELAYTIMEOUT,No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX" "0,1"
rgroup.long 0x410++0x03
line.long 0x00 "NFCTAGSTATE,NfcTag state register"
bitfld.long 0x00 0.--2. "NFCTAGSTATE,NfcTag state" "0: Disabled or sense,?,2: RampUp,3: Idle,4: Receive,5: FrameDelay,6: Transmit,?..."
rgroup.long 0x420++0x03
line.long 0x00 "SLEEPSTATE,Sleep state during automatic collision resolution"
bitfld.long 0x00 0. "SLEEPSTATE,Reflects the sleep state during automatic collision resolution" "0: State is IDLE,1: State is SLEEP_A"
rgroup.long 0x43C++0x03
line.long 0x00 "FIELDPRESENT,Indicates the presence or not of a valid field"
bitfld.long 0x00 1. "LOCKDETECT,Indicates if the low level has locked to the field" "0: Not locked to field,1: Locked to field"
bitfld.long 0x00 0. "FIELDPRESENT,Indicates if a valid field is present" "0: No valid field detected,1: Valid field detected"
group.long 0x504++0x03
line.long 0x00 "FRAMEDELAYMIN,Minimum frame delay"
hexmask.long.word 0x00 0.--15. 1. "FRAMEDELAYMIN,Minimum frame delay in number of 13.56 MHz clocks"
group.long 0x508++0x03
line.long 0x00 "FRAMEDELAYMAX,Maximum frame delay"
hexmask.long.tbyte 0x00 0.--19. 1. "FRAMEDELAYMAX,Maximum frame delay in number of 13.56 MHz clocks"
group.long 0x50C++0x03
line.long 0x00 "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer"
bitfld.long 0x00 0.--1. "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" "0: Transmission is independent of frame timer..,1: Frame is transmitted between FRAMEDELAYMIN..,2: Frame is transmitted exactly at FRAMEDELAYMAX,3: Frame is transmitted on a bit grid between.."
group.long 0x510++0x03
line.long 0x00 "PACKETPTR,Packet pointer for TXD and RXD data storage in Data RAM"
hexmask.long 0x00 0.--31. 1. "PTR,Packet pointer for TXD and RXD data storage in Data RAM"
group.long 0x514++0x03
line.long 0x00 "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each"
hexmask.long.word 0x00 0.--8. 1. "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each"
group.long 0x52C++0x03
line.long 0x00 "MODULATIONCTRL,Enables the modulation output to a GPIO pin which can be connected to a second external antenna"
bitfld.long 0x00 0.--1. "MODULATIONCTRL,Configuration of modulation control" "0: Invalid defaults to same behaviour as for..,1: Use internal modulator only,2: Output digital modulation signal to a GPIO pin,3: Use internal modulator and output digital.."
group.long 0x538++0x03
line.long 0x00 "MODULATIONPSEL,Pin select for Modulation control"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5.--6. "PORT,Port number" "0,1,2,3"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x590++0x03
line.long 0x00 "NFCID1_LAST,Last NFCID1 part (4 7 or 10 bytes ID)"
hexmask.long.byte 0x00 24.--31. 1. "NFCID1_W,NFCID1 byte W"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_X,NFCID1 byte X"
newline
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_Y,NFCID1 byte Y"
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_Z,NFCID1 byte Z (very last byte sent)"
group.long 0x594++0x03
line.long 0x00 "NFCID1_2ND_LAST,Second last NFCID1 part (7 or 10 bytes ID)"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_T,NFCID1 byte T"
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_U,NFCID1 byte U"
newline
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_V,NFCID1 byte V"
group.long 0x598++0x03
line.long 0x00 "NFCID1_3RD_LAST,Third last NFCID1 part (10 bytes ID)"
hexmask.long.byte 0x00 16.--23. 1. "NFCID1_Q,NFCID1 byte Q"
hexmask.long.byte 0x00 8.--15. 1. "NFCID1_R,NFCID1 byte R"
newline
hexmask.long.byte 0x00 0.--7. 1. "NFCID1_S,NFCID1 byte S"
group.long 0x59C++0x03
line.long 0x00 "AUTOCOLRESCONFIG,Controls the auto collision resolution function"
bitfld.long 0x00 0. "MODE,Enables/disables auto collision resolution" "0: Auto collision resolution enabled,1: Auto collision resolution disabled"
group.long 0x5A0++0x03
line.long 0x00 "SENSRES,NFC-A SENS_RES auto-response settings"
bitfld.long 0x00 12.--15. "RFU74,Reserved for future use" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "PLATFCONFIG,Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 6.--7. "NFCIDSIZE,NFCID1 size" "0: NFCID1 size,1: NFCID1 size,2: NFCID1 size,?..."
bitfld.long 0x00 5. "RFU5,Reserved for future use" "0,1"
newline
bitfld.long 0x00 0.--4. "BITFRAMESDD,Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0: SDD pattern 00000,1: SDD pattern 00001,2: SDD pattern 00010,?,4: SDD pattern 00100,?,?,?,8: SDD pattern 01000,?,?,?,?,?,?,?,16: SDD pattern 10000,?..."
group.long 0x5A4++0x03
line.long 0x00 "SELRES,NFC-A SEL_RES auto-response settings"
bitfld.long 0x00 7. "RFU7,Reserved for future use" "0,1"
bitfld.long 0x00 5.--6. "PROTOCOL,Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3"
newline
bitfld.long 0x00 3.--4. "RFU43,Reserved for future use" "0,1,2,3"
bitfld.long 0x00 2. "CASCADE,Cascade as defined by the b3 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification (controlled by hardware shall be 0)" "0,1"
newline
bitfld.long 0x00 0.--1. "RFU10,Reserved for future use" "0,1,2,3"
tree "FRAMESTATUS"
group.long 0x40C++0x03
line.long 0x00 "RX,Result of last incoming frame"
bitfld.long 0x00 3. "OVERRUN,Overrun detected" "0: No overrun detected,1: Overrun error"
bitfld.long 0x00 2. "PARITYSTATUS,Parity status of received frame" "0: Frame received with parity OK,1: Frame received with parity error"
newline
bitfld.long 0x00 0. "CRCERROR,No valid end of frame (EoF) detected" "0: Valid CRC detected,1: CRC received does not match local check"
tree.end
tree "TXD"
group.long 0x518++0x03
line.long 0x00 "FRAMECONFIG,Configuration of outgoing frames"
bitfld.long 0x00 4. "CRCMODETX,CRC mode for outgoing frames" "0: CRC is not added to the frame,1: 16 bit CRC added to the frame based on all.."
bitfld.long 0x00 2. "SOF,Adding SoF or not in TX frames" "0: SoF symbol not added,1: SoF symbol added"
newline
bitfld.long 0x00 1. "DISCARDMODE,Discarding unused bits at start or end of a frame" "0: Unused bits are discarded at end of frame (EoF),1: Unused bits are discarded at start of frame.."
bitfld.long 0x00 0. "PARITY,Indicates if parity is added to the frame" "0: Parity is not added to TX frames,1: Parity is added to TX frames"
group.long 0x51C++0x03
line.long 0x00 "AMOUNT,Size of outgoing frame"
hexmask.long.word 0x00 3.--11. 1. "TXDATABYTES,Number of complete bytes that shall be included in the frame excluding CRC parity and framing"
bitfld.long 0x00 0.--2. "TXDATABITS,Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit)" "0,1,2,3,4,5,6,7"
tree.end
tree "RXD"
group.long 0x520++0x03
line.long 0x00 "FRAMECONFIG,Configuration of incoming frames"
bitfld.long 0x00 4. "CRCMODERX,CRC mode for incoming frames" "0: CRC is not expected in RX frames,1: Last 16 bits in RX frame is CRC CRC is.."
bitfld.long 0x00 2. "SOF,SoF expected or not in RX frames" "0: SoF symbol is not expected in RX frames,1: SoF symbol is expected in RX frames"
newline
bitfld.long 0x00 0. "PARITY,Indicates if parity expected in RX frame" "0: Parity is not expected in RX frames,1: Parity is expected in RX frames"
rgroup.long 0x524++0x03
line.long 0x00 "AMOUNT,Size of last incoming frame"
hexmask.long.word 0x00 3.--11. 1. "RXDATABYTES,Number of complete bytes received in the frame (including CRC but excluding parity and SoF/EoF framing)"
bitfld.long 0x00 0.--2. "RXDATABITS,Number of bits in the last byte in the frame if less than 8 (including CRC but excluding parity and SoF/EoF framing)" "0,1,2,3,4,5,6,7"
tree.end
tree.end
tree.end
endif
tree "NVMC (Non-volatile Memory Controller)"
tree "NVMC_NS"
sif cpuis("NRF5340QKAA-APP")
base ad:0x40039000
sif cpuis("NRF5340QKAA-APP")
rgroup.long 0x400++0x03
line.long 0x00 "READY,Ready flag"
bitfld.long 0x00 0. "READY,NVMC is ready or busy" "0: NVMC is busy (on-going write or erase..,1: NVMC is ready"
rgroup.long 0x408++0x03
line.long 0x00 "READYNEXT,Ready flag"
bitfld.long 0x00 0. "READYNEXT,NVMC can accept a new write operation" "0: NVMC cannot accept any write operation,1: NVMC is ready"
group.long 0x504++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 0.--2. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?,4: Partial erase enabled,?..."
wgroup.long 0x50C++0x03
line.long 0x00 "ERASEALL,Register for erasing all non-volatile user memory"
bitfld.long 0x00 0. "ERASEALL,Erase all non-volatile memory including UICR registers" "0: No operation,1: Start chip erase"
group.long 0x51C++0x03
line.long 0x00 "ERASEPAGEPARTIALCFG,Register for partial erase configuration"
hexmask.long.byte 0x00 0.--6. 1. "DURATION,Duration of the partial erase in milliseconds"
group.long 0x540++0x03
line.long 0x00 "ICACHECNF,I-code cache configuration register"
bitfld.long 0x00 8. "CACHEPROFEN,Cache profiling enable" "0: Disable cache profiling,1: Enable cache profiling"
bitfld.long 0x00 0. "CACHEEN,Cache enable" "0: Disable cache,1: Enable cache"
group.long 0x548++0x03
line.long 0x00 "IHIT,I-code cache hit counter"
hexmask.long 0x00 0.--31. 1. "HITS,Number of cache hits Write zero to clear"
group.long 0x54C++0x03
line.long 0x00 "IMISS,I-code cache miss counter"
hexmask.long 0x00 0.--31. 1. "MISSES,Number of cache misses Write zero to clear"
group.long 0x584++0x03
line.long 0x00 "CONFIGNS,Unspecified"
bitfld.long 0x00 0.--1. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?..."
wgroup.long 0x588++0x03
line.long 0x00 "WRITEUICRNS,Non-secure APPROTECT enable register"
hexmask.long 0x00 4.--31. 1. "KEY,Key to write in order to validate the write operation"
bitfld.long 0x00 0. "SET,Allow non-secure code to set APPROTECT" "?,1: Set value"
endif
elif cpuis("NRF5340QKAA-NET")
base ad:0x41080000
sif cpuis("NRF5340QKAA-APP")
rgroup.long 0x400++0x03
line.long 0x00 "READY,Ready flag"
bitfld.long 0x00 0. "READY,NVMC is ready or busy" "0: NVMC is busy (on-going write or erase..,1: NVMC is ready"
rgroup.long 0x408++0x03
line.long 0x00 "READYNEXT,Ready flag"
bitfld.long 0x00 0. "READYNEXT,NVMC can accept a new write operation" "0: NVMC cannot accept any write operation,1: NVMC is ready"
group.long 0x504++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 0.--2. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?,4: Partial erase enabled,?..."
wgroup.long 0x50C++0x03
line.long 0x00 "ERASEALL,Register for erasing all non-volatile user memory"
bitfld.long 0x00 0. "ERASEALL,Erase all non-volatile memory including UICR registers" "0: No operation,1: Start chip erase"
group.long 0x51C++0x03
line.long 0x00 "ERASEPAGEPARTIALCFG,Register for partial erase configuration"
hexmask.long.byte 0x00 0.--6. 1. "DURATION,Duration of the partial erase in milliseconds"
group.long 0x540++0x03
line.long 0x00 "ICACHECNF,I-code cache configuration register"
bitfld.long 0x00 8. "CACHEPROFEN,Cache profiling enable" "0: Disable cache profiling,1: Enable cache profiling"
bitfld.long 0x00 0. "CACHEEN,Cache enable" "0: Disable cache,1: Enable cache"
group.long 0x548++0x03
line.long 0x00 "IHIT,I-code cache hit counter"
hexmask.long 0x00 0.--31. 1. "HITS,Number of cache hits Write zero to clear"
group.long 0x54C++0x03
line.long 0x00 "IMISS,I-code cache miss counter"
hexmask.long 0x00 0.--31. 1. "MISSES,Number of cache misses Write zero to clear"
group.long 0x584++0x03
line.long 0x00 "CONFIGNS,Unspecified"
bitfld.long 0x00 0.--1. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?..."
wgroup.long 0x588++0x03
line.long 0x00 "WRITEUICRNS,Non-secure APPROTECT enable register"
hexmask.long 0x00 4.--31. 1. "KEY,Key to write in order to validate the write operation"
bitfld.long 0x00 0. "SET,Allow non-secure code to set APPROTECT" "?,1: Set value"
endif
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "NVMC_S"
base ad:0x50039000
rgroup.long 0x400++0x03
line.long 0x00 "READY,Ready flag"
bitfld.long 0x00 0. "READY,NVMC is ready or busy" "0: NVMC is busy (on-going write or erase..,1: NVMC is ready"
rgroup.long 0x408++0x03
line.long 0x00 "READYNEXT,Ready flag"
bitfld.long 0x00 0. "READYNEXT,NVMC can accept a new write operation" "0: NVMC cannot accept any write operation,1: NVMC is ready"
group.long 0x504++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 0.--2. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?,4: Partial erase enabled,?..."
wgroup.long 0x50C++0x03
line.long 0x00 "ERASEALL,Register for erasing all non-volatile user memory"
bitfld.long 0x00 0. "ERASEALL,Erase all non-volatile memory including UICR registers" "0: No operation,1: Start chip erase"
group.long 0x51C++0x03
line.long 0x00 "ERASEPAGEPARTIALCFG,Register for partial erase configuration"
hexmask.long.byte 0x00 0.--6. 1. "DURATION,Duration of the partial erase in milliseconds"
group.long 0x540++0x03
line.long 0x00 "ICACHECNF,I-code cache configuration register"
bitfld.long 0x00 8. "CACHEPROFEN,Cache profiling enable" "0: Disable cache profiling,1: Enable cache profiling"
bitfld.long 0x00 0. "CACHEEN,Cache enable" "0: Disable cache,1: Enable cache"
group.long 0x548++0x03
line.long 0x00 "IHIT,I-code cache hit counter"
hexmask.long 0x00 0.--31. 1. "HITS,Number of cache hits Write zero to clear"
group.long 0x54C++0x03
line.long 0x00 "IMISS,I-code cache miss counter"
hexmask.long 0x00 0.--31. 1. "MISSES,Number of cache misses Write zero to clear"
group.long 0x584++0x03
line.long 0x00 "CONFIGNS,Unspecified"
bitfld.long 0x00 0.--1. "WEN,Program memory access mode" "0: Read only access,1: Write enabled,2: Erase enabled,?..."
wgroup.long 0x588++0x03
line.long 0x00 "WRITEUICRNS,Non-secure APPROTECT enable register"
hexmask.long 0x00 4.--31. 1. "KEY,Key to write in order to validate the write operation"
bitfld.long 0x00 0. "SET,Allow non-secure code to set APPROTECT" "?,1: Set value"
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "OSCILLATORS (Oscillator Control)"
tree "OSCILLATORS_NS"
base ad:0x40004000
group.long 0x5C4++0x03
line.long 0x00 "XOSC32MCAPS,Programmable capacitance of XC1 and XC2"
bitfld.long 0x00 8. "ENABLE,Enable on-chip capacitors on XC1 and XC2" "0: Capacitor disabled (use external caps),1: Capacitor enabled"
bitfld.long 0x00 0.--4. "CAPVALUE,Value representing capacitance calculated using provided equation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree "XOSC32KI"
group.long 0x6C0++0x03
line.long 0x00 "BYPASS,Enable or disable bypass of LFCLK crystal oscillator with external clock source"
bitfld.long 0x00 0. "BYPASS,Enable or disable bypass of LFCLK crystal oscillator with external clock source" "0: Disable (use with xtal or low-swing external..,1: Enable (use with rail-to-rail external source)"
group.long 0x6D0++0x03
line.long 0x00 "INTCAP,Control usage of internal load capacitors"
bitfld.long 0x00 0.--1. "INTCAP,Control usage of internal load capacitors" "0: Use external load capacitors,1: 6 pF internal load capacitance,2: 7 pF internal load capacitance,3: 11 pF internal load capacitance"
tree.end
tree.end
tree "OSCILLATORS_S"
base ad:0x50004000
group.long 0x5C4++0x03
line.long 0x00 "XOSC32MCAPS,Programmable capacitance of XC1 and XC2"
bitfld.long 0x00 8. "ENABLE,Enable on-chip capacitors on XC1 and XC2" "0: Capacitor disabled (use external caps),1: Capacitor enabled"
bitfld.long 0x00 0.--4. "CAPVALUE,Value representing capacitance calculated using provided equation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree "XOSC32KI"
group.long 0x6C0++0x03
line.long 0x00 "BYPASS,Enable or disable bypass of LFCLK crystal oscillator with external clock source"
bitfld.long 0x00 0. "BYPASS,Enable or disable bypass of LFCLK crystal oscillator with external clock source" "0: Disable (use with xtal or low-swing external..,1: Enable (use with rail-to-rail external source)"
group.long 0x6D0++0x03
line.long 0x00 "INTCAP,Control usage of internal load capacitors"
bitfld.long 0x00 0.--1. "INTCAP,Control usage of internal load capacitors" "0: Use external load capacitors,1: 6 pF internal load capacitance,2: 7 pF internal load capacitance,3: 11 pF internal load capacitance"
tree.end
tree.end
tree.end
tree "PDM (Pulse Density Modulation (Digital Microphone) Interface)"
tree "PDM0_NS"
base ad:0x40026000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Starts continuous PDM transfer"
bitfld.long 0x00 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PDM transfer"
bitfld.long 0x00 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_STARTED,PDM transfer has started"
bitfld.long 0x00 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,PDM transfer has finished"
bitfld.long 0x00 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"
bitfld.long 0x00 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "END,Enable or disable interrupt for event END" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PDM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PDM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "PDMCLKCTRL,PDM clock generator control"
hexmask.long 0x00 0.--31. 1. "FREQ,PDM_CLK frequency configuration"
group.long 0x508++0x03
line.long 0x00 "MODE,Defines the routing of the connected PDM microphones' signals"
bitfld.long 0x00 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled" "0: Left (or mono) is sampled on falling edge of..,1: Left (or mono) is sampled on rising edge of.."
bitfld.long 0x00 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples.."
group.long 0x518++0x03
line.long 0x00 "GAINL,Left output gain adjustment"
hexmask.long.byte 0x00 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5.."
group.long 0x51C++0x03
line.long 0x00 "GAINR,Right output gain adjustment"
hexmask.long.byte 0x00 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)"
group.long 0x520++0x03
line.long 0x00 "RATIO,Selects the ratio between PDM_CLK and output sample rate"
bitfld.long 0x00 0. "RATIO,Selects the ratio between PDM_CLK and output sample rate" "0: Ratio of 64,1: Ratio of 80"
group.long 0x54C++0x03
line.long 0x00 "MCLKCONFIG,Master clock generator configuration"
bitfld.long 0x00 0. "SRC,Master clock source selection" "0: 32 MHz peripheral clock,1: Audio PLL clock"
tree "PSEL"
group.long 0x540++0x03
line.long 0x00 "CLK,Pin number configuration for PDM CLK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x544++0x03
line.long 0x00 "DIN,Pin number configuration for PDM DIN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "SAMPLE"
group.long 0x560++0x03
line.long 0x00 "PTR,RAM address pointer to write samples to with EasyDMA"
hexmask.long 0x00 0.--31. 1. "SAMPLEPTR,Address to write PDM samples to over DMA"
group.long 0x564++0x03
line.long 0x00 "MAXCNT,Number of samples to allocate memory for in EasyDMA mode"
hexmask.long.word 0x00 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of samples"
tree.end
tree.end
tree "PDM0_S"
base ad:0x50026000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Starts continuous PDM transfer"
bitfld.long 0x00 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PDM transfer"
bitfld.long 0x00 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_STARTED,PDM transfer has started"
bitfld.long 0x00 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,PDM transfer has finished"
bitfld.long 0x00 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"
bitfld.long 0x00 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "END,Enable or disable interrupt for event END" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PDM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PDM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "PDMCLKCTRL,PDM clock generator control"
hexmask.long 0x00 0.--31. 1. "FREQ,PDM_CLK frequency configuration"
group.long 0x508++0x03
line.long 0x00 "MODE,Defines the routing of the connected PDM microphones' signals"
bitfld.long 0x00 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled" "0: Left (or mono) is sampled on falling edge of..,1: Left (or mono) is sampled on rising edge of.."
bitfld.long 0x00 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples.."
group.long 0x518++0x03
line.long 0x00 "GAINL,Left output gain adjustment"
hexmask.long.byte 0x00 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5.."
group.long 0x51C++0x03
line.long 0x00 "GAINR,Right output gain adjustment"
hexmask.long.byte 0x00 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)"
group.long 0x520++0x03
line.long 0x00 "RATIO,Selects the ratio between PDM_CLK and output sample rate"
bitfld.long 0x00 0. "RATIO,Selects the ratio between PDM_CLK and output sample rate" "0: Ratio of 64,1: Ratio of 80"
group.long 0x54C++0x03
line.long 0x00 "MCLKCONFIG,Master clock generator configuration"
bitfld.long 0x00 0. "SRC,Master clock source selection" "0: 32 MHz peripheral clock,1: Audio PLL clock"
tree "PSEL"
group.long 0x540++0x03
line.long 0x00 "CLK,Pin number configuration for PDM CLK signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x544++0x03
line.long 0x00 "DIN,Pin number configuration for PDM DIN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "SAMPLE"
group.long 0x560++0x03
line.long 0x00 "PTR,RAM address pointer to write samples to with EasyDMA"
hexmask.long 0x00 0.--31. 1. "SAMPLEPTR,Address to write PDM samples to over DMA"
group.long 0x564++0x03
line.long 0x00 "MAXCNT,Number of samples to allocate memory for in EasyDMA mode"
hexmask.long.word 0x00 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of samples"
tree.end
tree.end
tree.end
endif
tree "POWER (Power Control)"
sif cpuis("NRF5340QKAA-NET")
tree "POWER_NS"
base ad:0x41005000
wgroup.long 0x78++0x03
line.long 0x00 "TASKS_CONSTLAT,Enable constant latency mode"
bitfld.long 0x00 0. "TASKS_CONSTLAT,Enable constant latency mode" "?,1: Trigger task"
wgroup.long 0x7C++0x03
line.long 0x00 "TASKS_LOWPWR,Enable low power mode (variable latency)"
bitfld.long 0x00 0. "TASKS_LOWPWR,Enable low power mode (variable latency)" "?,1: Trigger task"
group.long 0xF8++0x03
line.long 0x00 "SUBSCRIBE_CONSTLAT,Subscribe configuration for task CONSTLAT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CONSTLAT will subscribe to"
group.long 0xFC++0x03
line.long 0x00 "SUBSCRIBE_LOWPWR,Subscribe configuration for task LOWPWR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task LOWPWR will subscribe to"
group.long 0x108++0x03
line.long 0x00 "EVENTS_POFWARN,Power failure warning"
bitfld.long 0x00 0. "EVENTS_POFWARN,Power failure warning" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_POFWARN,Publish configuration for event POFWARN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event POFWARN will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_SLEEPENTER,Publish configuration for event SLEEPENTER"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event SLEEPENTER will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_SLEEPEXIT,Publish configuration for event SLEEPEXIT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event SLEEPEXIT will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Enable or disable interrupt for event SLEEPEXIT" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Enable or disable interrupt for event SLEEPENTER" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Enable or disable interrupt for event POFWARN" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to enable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to enable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to enable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to disable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to disable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to disable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x51C)++0x03
line.long 0x00 "GPREGRET[$1],Description collection: General purpose retention register $1"
hexmask.long.byte 0x00 0.--7. 1. "GPREGRET,General purpose retention register"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "POWER_NS"
base ad:0x40005000
wgroup.long 0x78++0x03
line.long 0x00 "TASKS_CONSTLAT,Enable constant latency mode"
bitfld.long 0x00 0. "TASKS_CONSTLAT,Enable constant latency mode" "?,1: Trigger task"
wgroup.long 0x7C++0x03
line.long 0x00 "TASKS_LOWPWR,Enable low power mode (variable latency)"
bitfld.long 0x00 0. "TASKS_LOWPWR,Enable low power mode (variable latency)" "?,1: Trigger task"
group.long 0xF8++0x03
line.long 0x00 "SUBSCRIBE_CONSTLAT,Subscribe configuration for task CONSTLAT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CONSTLAT will subscribe to"
group.long 0xFC++0x03
line.long 0x00 "SUBSCRIBE_LOWPWR,Subscribe configuration for task LOWPWR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LOWPWR will subscribe to"
group.long 0x108++0x03
line.long 0x00 "EVENTS_POFWARN,Power failure warning"
bitfld.long 0x00 0. "EVENTS_POFWARN,Power failure warning" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_POFWARN,Publish configuration for event POFWARN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event POFWARN will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_SLEEPENTER,Publish configuration for event SLEEPENTER"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SLEEPENTER will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_SLEEPEXIT,Publish configuration for event SLEEPEXIT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SLEEPEXIT will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Enable or disable interrupt for event SLEEPEXIT" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Enable or disable interrupt for event SLEEPENTER" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Enable or disable interrupt for event POFWARN" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to enable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to enable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to enable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to disable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to disable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to disable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x51C)++0x03
line.long 0x00 "GPREGRET[$1],Description collection: General purpose retention register $1"
hexmask.long.byte 0x00 0.--7. 1. "GPREGRET,General purpose retention register"
repeat.end
tree.end
tree "POWER_S"
base ad:0x50005000
wgroup.long 0x78++0x03
line.long 0x00 "TASKS_CONSTLAT,Enable constant latency mode"
bitfld.long 0x00 0. "TASKS_CONSTLAT,Enable constant latency mode" "?,1: Trigger task"
wgroup.long 0x7C++0x03
line.long 0x00 "TASKS_LOWPWR,Enable low power mode (variable latency)"
bitfld.long 0x00 0. "TASKS_LOWPWR,Enable low power mode (variable latency)" "?,1: Trigger task"
group.long 0xF8++0x03
line.long 0x00 "SUBSCRIBE_CONSTLAT,Subscribe configuration for task CONSTLAT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CONSTLAT will subscribe to"
group.long 0xFC++0x03
line.long 0x00 "SUBSCRIBE_LOWPWR,Subscribe configuration for task LOWPWR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task LOWPWR will subscribe to"
group.long 0x108++0x03
line.long 0x00 "EVENTS_POFWARN,Power failure warning"
bitfld.long 0x00 0. "EVENTS_POFWARN,Power failure warning" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep"
bitfld.long 0x00 0. "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" "0: Event not generated,1: Event generated"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_POFWARN,Publish configuration for event POFWARN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event POFWARN will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_SLEEPENTER,Publish configuration for event SLEEPENTER"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SLEEPENTER will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_SLEEPEXIT,Publish configuration for event SLEEPEXIT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SLEEPEXIT will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Enable or disable interrupt for event SLEEPEXIT" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Enable or disable interrupt for event SLEEPENTER" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Enable or disable interrupt for event POFWARN" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to enable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to enable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to enable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 6. "SLEEPEXIT,Write '1' to disable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "SLEEPENTER,Write '1' to disable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "POFWARN,Write '1' to disable interrupt for event POFWARN" "0: Read: Disabled,1: Read: Enabled"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x51C)++0x03
line.long 0x00 "GPREGRET[$1],Description collection: General purpose retention register $1"
hexmask.long.byte 0x00 0.--7. 1. "GPREGRET,General purpose retention register"
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "PWM (Pulse-Width Modulator)"
tree "PWM0_NS"
base ad:0x40021000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM0_S"
base ad:0x50021000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM1_NS"
base ad:0x40022000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM1_S"
base ad:0x50022000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM2_NS"
base ad:0x40023000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM2_S"
base ad:0x50023000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM3_NS"
base ad:0x40024000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree "PWM3_S"
base ad:0x50024000
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback"
bitfld.long 0x00 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task"
repeat 2. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x08)++0x03
line.long 0x00 "TASKS_SEQSTART[$1],Description collection: Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE"
bitfld.long 0x00 0. "TASKS_SEQSTART,Loads the first PWM value on all enabled channels from sequence n and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE" "?,1: Trigger task"
repeat.end
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep"
bitfld.long 0x00 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep" "?,1: Trigger task"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0x88)++0x03
line.long 0x00 "SUBSCRIBE_SEQSTART[$1],Description collection: Subscribe configuration for task SEQSTART[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SEQSTART[n] will subscribe to"
repeat.end
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated"
bitfld.long 0x00 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n $1"
bitfld.long 0x00 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x110)++0x03
line.long 0x00 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n when last value from RAM has been applied to wave counter $1"
bitfld.long 0x00 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x118++0x03
line.long 0x00 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period"
bitfld.long 0x00 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT"
bitfld.long 0x00 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to"
repeat.end
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x190)++0x03
line.long 0x00 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to"
repeat.end
group.long 0x198++0x03
line.long 0x00 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "LOOPSDONE_SEQSTART1,Shortcut between event LOOPSDONE and task SEQSTART[1]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "LOOPSDONE_SEQSTART0,Shortcut between event LOOPSDONE and task SEQSTART[0]" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SEQEND1_STOP,Shortcut between event SEQEND[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "SEQEND0_STOP,Shortcut between event SEQEND[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,PWM module enable register"
bitfld.long 0x00 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Selects operating mode of the wave counter"
bitfld.long 0x00 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty.."
group.long 0x508++0x03
line.long 0x00 "COUNTERTOP,Value up to which the pulse generator counter counts"
hexmask.long.word 0x00 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts"
group.long 0x50C++0x03
line.long 0x00 "PRESCALER,Configuration for PWM_CLK"
bitfld.long 0x00 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)"
group.long 0x510++0x03
line.long 0x00 "DECODER,Configuration of the decoder"
bitfld.long 0x00 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded.."
bitfld.long 0x00 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM..,1: 1st half word (16-bit) used in channel 0..1..,2: 1st half word (16-bit) in ch.0 2nd in ch.1,3: 1st half word (16-bit) in ch.0 2nd in ch.1"
group.long 0x514++0x03
line.long 0x00 "LOOP,Number of playbacks of a loop"
hexmask.long.word 0x00 0.--15. 1. "CNT,Number of playbacks of pattern cycles"
repeat 2. (increment 0 1)(increment 0 0x20)
tree "SEQ[$1]"
group.long ($2+0x520)++0x03
line.long 0x00 "PTR,Description cluster: Beginning address in RAM of this sequence"
hexmask.long 0x00 0.--31. 1. "PTR,Beginning address in RAM of this sequence"
group.long ($2+0x524)++0x03
line.long 0x00 "CNT,Description cluster: Number of values (duty cycles) in this sequence"
hexmask.long.word 0x00 0.--14. 1. "CNT,Number of values (duty cycles) in this sequence"
group.long ($2+0x528)++0x03
line.long 0x00 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"
group.long ($2+0x52C)++0x03
line.long 0x00 "ENDDELAY,Description cluster: Time added after the sequence"
hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Time added after the sequence in PWM periods"
tree.end
repeat.end
tree.end
tree.end
tree "QDEC (Quadrature Decoder)"
tree "QDEC0_NS"
base ad:0x40033000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Task starting the quadrature decoder"
bitfld.long 0x00 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Task stopping the quadrature decoder"
bitfld.long 0x00 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_READCLRACC,Read and clear ACC and ACCDBL"
bitfld.long 0x00 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_RDCLRACC,Read and clear ACC"
bitfld.long 0x00 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_RDCLRDBL,Read and clear ACCDBL"
bitfld.long 0x00 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register"
bitfld.long 0x00 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_REPORTRDY,Non-null report ready"
bitfld.long 0x00 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_ACCOF,ACC or ACCDBL register overflow"
bitfld.long 0x00 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_DBLRDY,Double displacement(s) detected"
bitfld.long 0x00 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_STOPPED,QDEC has been stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_ACCOF,Publish configuration for event ACCOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_DBLRDY,Publish configuration for event DBLRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable the quadrature decoder"
bitfld.long 0x00 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "LEDPOL,LED output pin polarity"
bitfld.long 0x00 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high"
group.long 0x508++0x03
line.long 0x00 "SAMPLEPER,Sample period"
bitfld.long 0x00 0.--3. "SAMPLEPER,Sample period" "0: 128 us,1: 256 us,2: 512 us,3: 1024 us,4: 2048 us,5: 4096 us,6: 8192 us,7: 16384 us,8: 32768 us,9: 65536 us,10: 131072 us,?..."
rgroup.long 0x50C++0x03
line.long 0x00 "SAMPLE,Motion sample value"
hexmask.long 0x00 0.--31. 1. "SAMPLE,Last motion sample"
group.long 0x510++0x03
line.long 0x00 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated"
bitfld.long 0x00 0.--3. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated" "0: 10 samples / report,1: 40 samples / report,2: 80 samples / report,3: 120 samples / report,4: 160 samples / report,5: 200 samples / report,6: 240 samples / report,7: 280 samples / report,8: 1 sample / report,?..."
rgroup.long 0x514++0x03
line.long 0x00 "ACC,Register accumulating the valid transitions"
hexmask.long 0x00 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register"
rgroup.long 0x518++0x03
line.long 0x00 "ACCREAD,Snapshot of the ACC register updated by the READCLRACC or RDCLRACC task"
hexmask.long 0x00 0.--31. 1. "ACCREAD,Snapshot of the ACC register"
group.long 0x528++0x03
line.long 0x00 "DBFEN,Enable input debounce filters"
bitfld.long 0x00 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled"
group.long 0x540++0x03
line.long 0x00 "LEDPRE,Time period the LED is switched ON prior to sampling"
hexmask.long.word 0x00 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling"
rgroup.long 0x544++0x03
line.long 0x00 "ACCDBL,Register accumulating the number of detected double transitions"
bitfld.long 0x00 0.--3. "ACCDBL,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x548++0x03
line.long 0x00 "ACCDBLREAD,Snapshot of the ACCDBL updated by the READCLRACC or RDCLRDBL task"
bitfld.long 0x00 0.--3. "ACCDBLREAD,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree "PSEL"
group.long 0x51C++0x03
line.long 0x00 "LED,Pin select for LED signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x520++0x03
line.long 0x00 "A,Pin select for A signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x524++0x03
line.long 0x00 "B,Pin select for B signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "QDEC0_S"
base ad:0x50033000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Task starting the quadrature decoder"
bitfld.long 0x00 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Task stopping the quadrature decoder"
bitfld.long 0x00 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_READCLRACC,Read and clear ACC and ACCDBL"
bitfld.long 0x00 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_RDCLRACC,Read and clear ACC"
bitfld.long 0x00 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_RDCLRDBL,Read and clear ACCDBL"
bitfld.long 0x00 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register"
bitfld.long 0x00 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_REPORTRDY,Non-null report ready"
bitfld.long 0x00 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_ACCOF,ACC or ACCDBL register overflow"
bitfld.long 0x00 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_DBLRDY,Double displacement(s) detected"
bitfld.long 0x00 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_STOPPED,QDEC has been stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_ACCOF,Publish configuration for event ACCOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_DBLRDY,Publish configuration for event DBLRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable the quadrature decoder"
bitfld.long 0x00 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "LEDPOL,LED output pin polarity"
bitfld.long 0x00 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high"
group.long 0x508++0x03
line.long 0x00 "SAMPLEPER,Sample period"
bitfld.long 0x00 0.--3. "SAMPLEPER,Sample period" "0: 128 us,1: 256 us,2: 512 us,3: 1024 us,4: 2048 us,5: 4096 us,6: 8192 us,7: 16384 us,8: 32768 us,9: 65536 us,10: 131072 us,?..."
rgroup.long 0x50C++0x03
line.long 0x00 "SAMPLE,Motion sample value"
hexmask.long 0x00 0.--31. 1. "SAMPLE,Last motion sample"
group.long 0x510++0x03
line.long 0x00 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated"
bitfld.long 0x00 0.--3. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated" "0: 10 samples / report,1: 40 samples / report,2: 80 samples / report,3: 120 samples / report,4: 160 samples / report,5: 200 samples / report,6: 240 samples / report,7: 280 samples / report,8: 1 sample / report,?..."
rgroup.long 0x514++0x03
line.long 0x00 "ACC,Register accumulating the valid transitions"
hexmask.long 0x00 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register"
rgroup.long 0x518++0x03
line.long 0x00 "ACCREAD,Snapshot of the ACC register updated by the READCLRACC or RDCLRACC task"
hexmask.long 0x00 0.--31. 1. "ACCREAD,Snapshot of the ACC register"
group.long 0x528++0x03
line.long 0x00 "DBFEN,Enable input debounce filters"
bitfld.long 0x00 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled"
group.long 0x540++0x03
line.long 0x00 "LEDPRE,Time period the LED is switched ON prior to sampling"
hexmask.long.word 0x00 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling"
rgroup.long 0x544++0x03
line.long 0x00 "ACCDBL,Register accumulating the number of detected double transitions"
bitfld.long 0x00 0.--3. "ACCDBL,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x548++0x03
line.long 0x00 "ACCDBLREAD,Snapshot of the ACCDBL updated by the READCLRACC or RDCLRDBL task"
bitfld.long 0x00 0.--3. "ACCDBLREAD,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree "PSEL"
group.long 0x51C++0x03
line.long 0x00 "LED,Pin select for LED signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x520++0x03
line.long 0x00 "A,Pin select for A signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x524++0x03
line.long 0x00 "B,Pin select for B signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "QDEC1_NS"
base ad:0x40034000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Task starting the quadrature decoder"
bitfld.long 0x00 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Task stopping the quadrature decoder"
bitfld.long 0x00 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_READCLRACC,Read and clear ACC and ACCDBL"
bitfld.long 0x00 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_RDCLRACC,Read and clear ACC"
bitfld.long 0x00 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_RDCLRDBL,Read and clear ACCDBL"
bitfld.long 0x00 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register"
bitfld.long 0x00 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_REPORTRDY,Non-null report ready"
bitfld.long 0x00 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_ACCOF,ACC or ACCDBL register overflow"
bitfld.long 0x00 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_DBLRDY,Double displacement(s) detected"
bitfld.long 0x00 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_STOPPED,QDEC has been stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_ACCOF,Publish configuration for event ACCOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_DBLRDY,Publish configuration for event DBLRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable the quadrature decoder"
bitfld.long 0x00 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "LEDPOL,LED output pin polarity"
bitfld.long 0x00 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high"
group.long 0x508++0x03
line.long 0x00 "SAMPLEPER,Sample period"
bitfld.long 0x00 0.--3. "SAMPLEPER,Sample period" "0: 128 us,1: 256 us,2: 512 us,3: 1024 us,4: 2048 us,5: 4096 us,6: 8192 us,7: 16384 us,8: 32768 us,9: 65536 us,10: 131072 us,?..."
rgroup.long 0x50C++0x03
line.long 0x00 "SAMPLE,Motion sample value"
hexmask.long 0x00 0.--31. 1. "SAMPLE,Last motion sample"
group.long 0x510++0x03
line.long 0x00 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated"
bitfld.long 0x00 0.--3. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated" "0: 10 samples / report,1: 40 samples / report,2: 80 samples / report,3: 120 samples / report,4: 160 samples / report,5: 200 samples / report,6: 240 samples / report,7: 280 samples / report,8: 1 sample / report,?..."
rgroup.long 0x514++0x03
line.long 0x00 "ACC,Register accumulating the valid transitions"
hexmask.long 0x00 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register"
rgroup.long 0x518++0x03
line.long 0x00 "ACCREAD,Snapshot of the ACC register updated by the READCLRACC or RDCLRACC task"
hexmask.long 0x00 0.--31. 1. "ACCREAD,Snapshot of the ACC register"
group.long 0x528++0x03
line.long 0x00 "DBFEN,Enable input debounce filters"
bitfld.long 0x00 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled"
group.long 0x540++0x03
line.long 0x00 "LEDPRE,Time period the LED is switched ON prior to sampling"
hexmask.long.word 0x00 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling"
rgroup.long 0x544++0x03
line.long 0x00 "ACCDBL,Register accumulating the number of detected double transitions"
bitfld.long 0x00 0.--3. "ACCDBL,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x548++0x03
line.long 0x00 "ACCDBLREAD,Snapshot of the ACCDBL updated by the READCLRACC or RDCLRDBL task"
bitfld.long 0x00 0.--3. "ACCDBLREAD,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree "PSEL"
group.long 0x51C++0x03
line.long 0x00 "LED,Pin select for LED signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x520++0x03
line.long 0x00 "A,Pin select for A signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x524++0x03
line.long 0x00 "B,Pin select for B signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "QDEC1_S"
base ad:0x50034000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Task starting the quadrature decoder"
bitfld.long 0x00 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Task stopping the quadrature decoder"
bitfld.long 0x00 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_READCLRACC,Read and clear ACC and ACCDBL"
bitfld.long 0x00 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_RDCLRACC,Read and clear ACC"
bitfld.long 0x00 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_RDCLRDBL,Read and clear ACCDBL"
bitfld.long 0x00 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register"
bitfld.long 0x00 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_REPORTRDY,Non-null report ready"
bitfld.long 0x00 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_ACCOF,ACC or ACCDBL register overflow"
bitfld.long 0x00 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_DBLRDY,Double displacement(s) detected"
bitfld.long 0x00 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_STOPPED,QDEC has been stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_ACCOF,Publish configuration for event ACCOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_DBLRDY,Publish configuration for event DBLRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable the quadrature decoder"
bitfld.long 0x00 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disabled,1: Enabled"
group.long 0x504++0x03
line.long 0x00 "LEDPOL,LED output pin polarity"
bitfld.long 0x00 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high"
group.long 0x508++0x03
line.long 0x00 "SAMPLEPER,Sample period"
bitfld.long 0x00 0.--3. "SAMPLEPER,Sample period" "0: 128 us,1: 256 us,2: 512 us,3: 1024 us,4: 2048 us,5: 4096 us,6: 8192 us,7: 16384 us,8: 32768 us,9: 65536 us,10: 131072 us,?..."
rgroup.long 0x50C++0x03
line.long 0x00 "SAMPLE,Motion sample value"
hexmask.long 0x00 0.--31. 1. "SAMPLE,Last motion sample"
group.long 0x510++0x03
line.long 0x00 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated"
bitfld.long 0x00 0.--3. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated" "0: 10 samples / report,1: 40 samples / report,2: 80 samples / report,3: 120 samples / report,4: 160 samples / report,5: 200 samples / report,6: 240 samples / report,7: 280 samples / report,8: 1 sample / report,?..."
rgroup.long 0x514++0x03
line.long 0x00 "ACC,Register accumulating the valid transitions"
hexmask.long 0x00 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register"
rgroup.long 0x518++0x03
line.long 0x00 "ACCREAD,Snapshot of the ACC register updated by the READCLRACC or RDCLRACC task"
hexmask.long 0x00 0.--31. 1. "ACCREAD,Snapshot of the ACC register"
group.long 0x528++0x03
line.long 0x00 "DBFEN,Enable input debounce filters"
bitfld.long 0x00 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled"
group.long 0x540++0x03
line.long 0x00 "LEDPRE,Time period the LED is switched ON prior to sampling"
hexmask.long.word 0x00 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling"
rgroup.long 0x544++0x03
line.long 0x00 "ACCDBL,Register accumulating the number of detected double transitions"
bitfld.long 0x00 0.--3. "ACCDBL,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x548++0x03
line.long 0x00 "ACCDBLREAD,Snapshot of the ACCDBL updated by the READCLRACC or RDCLRDBL task"
bitfld.long 0x00 0.--3. "ACCDBLREAD,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree "PSEL"
group.long 0x51C++0x03
line.long 0x00 "LED,Pin select for LED signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x520++0x03
line.long 0x00 "A,Pin select for A signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x524++0x03
line.long 0x00 "B,Pin select for B signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree.end
tree "QSPI (Queued Synchronous Peripheral Interface)"
tree "QSPI_NS"
base ad:0x4002B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_ACTIVATE,Activate QSPI interface"
bitfld.long 0x00 0. "TASKS_ACTIVATE,Activate QSPI interface" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_READSTART,Start transfer from external flash memory to internal RAM"
bitfld.long 0x00 0. "TASKS_READSTART,Start transfer from external flash memory to internal RAM" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_WRITESTART,Start transfer from internal RAM to external flash memory"
bitfld.long 0x00 0. "TASKS_WRITESTART,Start transfer from internal RAM to external flash memory" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_ERASESTART,Start external flash memory erase operation"
bitfld.long 0x00 0. "TASKS_ERASESTART,Start external flash memory erase operation" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_DEACTIVATE,Deactivate QSPI interface"
bitfld.long 0x00 0. "TASKS_DEACTIVATE,Deactivate QSPI interface" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_READSTART,Subscribe configuration for task READSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READSTART will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_WRITESTART,Subscribe configuration for task WRITESTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task WRITESTART will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_ERASESTART,Subscribe configuration for task ERASESTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ERASESTART will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_DEACTIVATE,Subscribe configuration for task DEACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DEACTIVATE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,QSPI peripheral is ready"
bitfld.long 0x00 0. "EVENTS_READY,QSPI peripheral is ready" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable QSPI peripheral and acquire the pins selected in PSELn registers"
bitfld.long 0x00 0. "ENABLE,Enable or disable QSPI" "0: Disable QSPI,1: Enable QSPI"
group.long 0x540++0x03
line.long 0x00 "XIPOFFSET,Address offset into the external memory for Execute in Place operation"
hexmask.long 0x00 0.--31. 1. "XIPOFFSET,Address offset into the external memory for Execute in Place operation"
group.long 0x544++0x03
line.long 0x00 "IFCONFIG0,Interface configuration"
bitfld.long 0x00 12. "PPSIZE,Page size for commands PP PP2O PP4O and PP4IO" "0: 256 bytes,1: 512 bytes"
bitfld.long 0x00 7. "DPMENABLE,Enable deep power-down mode (DPM) feature" "0: Disable DPM feature,1: Enable DPM feature"
newline
bitfld.long 0x00 6. "ADDRMODE,Addressing mode" "0: 24-bit addressing,1: 32-bit addressing"
bitfld.long 0x00 3.--5. "WRITEOC,Configure number of data lines and opcode used for writing" "0: Single data line SPI,1: Dual data line SPI,2: Quad data line SPI,3: Quad data line SPI,?..."
newline
bitfld.long 0x00 0.--2. "READOC,Configure number of data lines and opcode used for reading" "0: Single data line SPI,1: Dual data line SPI,2: Dual data line SPI,3: Quad data line SPI,4: Quad data line SPI,?..."
group.long 0x54C++0x03
line.long 0x00 "XIPEN,Enable Execute in Place operation"
bitfld.long 0x00 0. "XIPEN,Enable XIP AHB Slave interface and access to XIP memory range" "0: Disable XIP interface,1: Enable XIP interface"
group.long 0x600++0x03
line.long 0x00 "IFCONFIG1,Interface configuration"
bitfld.long 0x00 28.--31. "SCKFREQ,SCK frequency is given as 96 MHz / (SCKFREQ + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "SPIMODE,Select SPI mode" "0: Mode 0,1: Mode 3"
newline
bitfld.long 0x00 24. "DPMEN,Enter/exit deep power-down mode (DPM) for external flash memory" "0: Exit DPM,1: Enter DPM"
hexmask.long.byte 0x00 0.--7. 1. "SCKDELAY,Minimum amount of time that the CSN pin must stay high before it can go low again"
rgroup.long 0x604++0x03
line.long 0x00 "STATUS,Status register"
hexmask.long.byte 0x00 24.--31. 1. "SREG,Value of external flash device Status Register"
bitfld.long 0x00 3. "READY,Ready status" "0: QSPI peripheral is busy,1: QSPI peripheral is ready"
newline
bitfld.long 0x00 2. "DPM,Deep power-down mode (DPM) status of external flash" "0: External flash is not in DPM,1: External flash is in DPM"
group.long 0x614++0x03
line.long 0x00 "DPMDUR,Set the duration required to enter/exit deep power-down mode (DPM)"
hexmask.long.word 0x00 16.--31. 1. "EXIT,Duration needed by external flash to exit DPM"
hexmask.long.word 0x00 0.--15. 1. "ENTER,Duration needed by external flash to enter DPM"
group.long 0x624++0x03
line.long 0x00 "ADDRCONF,Extended address configuration"
bitfld.long 0x00 27. "WREN,Send WREN (write enable opcode 0x06) before instruction" "0: Do not send WREN,1: Send WREN"
bitfld.long 0x00 26. "WIPWAIT,Wait for write complete before sending command" "0: No wait,1: Enable"
newline
bitfld.long 0x00 24.--25. "MODE,Extended addressing mode" "0: Do not send any instruction,1: Send opcode,2: Send opcode byte0,3: Send opcode byte0 byte1"
hexmask.long.byte 0x00 16.--23. 1. "BYTE1,Byte 1 following byte 0"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE0,Byte 0 following opcode"
hexmask.long.byte 0x00 0.--7. 1. "OPCODE,Opcode that enters the 32-bit addressing mode"
group.long 0x634++0x03
line.long 0x00 "CINSTRCONF,Custom instruction configuration register"
bitfld.long 0x00 17. "LFSTOP,Stop (finalize) long frame transaction" "?,1: Stop"
bitfld.long 0x00 16. "LFEN,Enable long frame mode" "0: Long frame mode disabled,1: Long frame mode enabled"
newline
bitfld.long 0x00 15. "WREN,Send WREN (write enable opcode 0x06) before instruction" "0: Do not send WREN,1: Send WREN"
bitfld.long 0x00 14. "WIPWAIT,Wait for write complete before sending command" "0: No wait,1: Enable"
newline
bitfld.long 0x00 13. "LIO3,Level of the IO3 pin (if connected) during transmission of custom instruction" "0,1"
bitfld.long 0x00 12. "LIO2,Level of the IO2 pin (if connected) during transmission of custom instruction" "0,1"
newline
bitfld.long 0x00 8.--11. "LENGTH,Length of custom instruction in number of bytes" "?,1: Send opcode only,2: Send opcode CINSTRDAT0.BYTE0,3: Send opcode CINSTRDAT0.BYTE0 -&gt..,4: Send opcode CINSTRDAT0.BYTE0 -&gt..,5: Send opcode CINSTRDAT0.BYTE0 -&gt..,6: Send opcode CINSTRDAT0.BYTE0 -&gt..,7: Send opcode CINSTRDAT0.BYTE0 -&gt..,8: Send opcode CINSTRDAT0.BYTE0 -&gt..,9: Send opcode CINSTRDAT0.BYTE0 -&gt..,?..."
hexmask.long.byte 0x00 0.--7. 1. "OPCODE,Opcode of Custom instruction"
group.long 0x638++0x03
line.long 0x00 "CINSTRDAT0,Custom instruction data register 0"
hexmask.long.byte 0x00 24.--31. 1. "BYTE3,Data byte 3"
hexmask.long.byte 0x00 16.--23. 1. "BYTE2,Data byte 2"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE1,Data byte 1"
hexmask.long.byte 0x00 0.--7. 1. "BYTE0,Data byte 0"
group.long 0x63C++0x03
line.long 0x00 "CINSTRDAT1,Custom instruction data register 1"
hexmask.long.byte 0x00 24.--31. 1. "BYTE7,Data byte 7"
hexmask.long.byte 0x00 16.--23. 1. "BYTE6,Data byte 6"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE5,Data byte 5"
hexmask.long.byte 0x00 0.--7. 1. "BYTE4,Data byte 4"
group.long 0x640++0x03
line.long 0x00 "IFTIMING,SPI interface timing"
bitfld.long 0x00 8.--10. "RXDELAY,Timing related to sampling of the input serial data" "0,1,2,3,4,5,6,7"
tree "READ"
group.long 0x504++0x03
line.long 0x00 "SRC,Flash memory source address"
hexmask.long 0x00 0.--31. 1. "SRC,Word-aligned flash memory source address"
group.long 0x508++0x03
line.long 0x00 "DST,RAM destination address"
hexmask.long 0x00 0.--31. 1. "DST,Word-aligned RAM destination address"
group.long 0x50C++0x03
line.long 0x00 "CNT,Read transfer length"
hexmask.long.tbyte 0x00 0.--20. 1. "CNT,Read transfer length in number of bytes"
tree.end
tree "WRITE"
group.long 0x510++0x03
line.long 0x00 "DST,Flash destination address"
hexmask.long 0x00 0.--31. 1. "DST,Word-aligned flash destination address"
group.long 0x514++0x03
line.long 0x00 "SRC,RAM source address"
hexmask.long 0x00 0.--31. 1. "SRC,Word-aligned RAM source address"
group.long 0x518++0x03
line.long 0x00 "CNT,Write transfer length"
hexmask.long.tbyte 0x00 0.--20. 1. "CNT,Write transfer length in number of bytes"
tree.end
tree "ERASE"
group.long 0x51C++0x03
line.long 0x00 "PTR,Start address of flash block to be erased"
hexmask.long 0x00 0.--31. 1. "PTR,Word-aligned start address of block to be erased"
group.long 0x520++0x03
line.long 0x00 "LEN,Size of block to be erased"
bitfld.long 0x00 0.--1. "LEN,LEN" "0: Erase 4 kB block (flash command 0x20),1: Erase 64 kB block (flash command 0xD8),2: Erase all (flash command 0xC7),?..."
tree.end
tree "PSEL"
group.long 0x524++0x03
line.long 0x00 "SCK,Pin select for serial clock SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x528++0x03
line.long 0x00 "CSN,Pin select for chip select signal CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x530++0x03
line.long 0x00 "IO0,Pin select for serial data MOSI/IO0"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x534++0x03
line.long 0x00 "IO1,Pin select for serial data MISO/IO1"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat 2. (strings "2" "3" )(list 0x00 0x04 )
group.long ($2+0x538)++0x03
line.long 0x00 "IO$1,Pin select for serial data IO2"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat.end
tree.end
tree "XIP_ENC"
wgroup.long 0x560++0x03
line.long 0x00 "KEY0,Bits 31:0 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY0,Bits 31:0 of XIP AES KEY"
wgroup.long 0x564++0x03
line.long 0x00 "KEY1,Bits 63:32 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY1,Bits 63:32 of XIP AES KEY"
wgroup.long 0x568++0x03
line.long 0x00 "KEY2,Bits 95:64 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY2,Bits 95:64 of XIP AES KEY"
wgroup.long 0x56C++0x03
line.long 0x00 "KEY3,Bits 127:96 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY3,Bits 127:96 of XIP AES KEY"
wgroup.long 0x570++0x03
line.long 0x00 "NONCE0,Bits 31:0 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE0,Bits 31:0 of XIP NONCE"
wgroup.long 0x574++0x03
line.long 0x00 "NONCE1,Bits 63:32 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE1,Bits 63:32 of XIP NONCE"
wgroup.long 0x578++0x03
line.long 0x00 "NONCE2,Bits 95:64 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE2,Bits 95:64 of XIP NONCE"
group.long 0x57C++0x03
line.long 0x00 "ENABLE,Enable stream cipher for XIP"
bitfld.long 0x00 0. "ENABLE,Enable or disable stream cipher for XIP" "0: Disable stream cipher for QSPI XIP,1: Enable stream cipher for QSPI XIP"
tree.end
tree "DMA_ENC"
wgroup.long 0x580++0x03
line.long 0x00 "KEY0,Bits 31:0 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY0,Bits 31:0 of DMA AES KEY"
wgroup.long 0x584++0x03
line.long 0x00 "KEY1,Bits 63:32 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY1,Bits 63:32 of DMA AES KEY"
wgroup.long 0x588++0x03
line.long 0x00 "KEY2,Bits 95:64 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY2,Bits 95:64 of DMA AES KEY"
wgroup.long 0x58C++0x03
line.long 0x00 "KEY3,Bits 127:96 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY3,Bits 127:96 of DMA AES KEY"
wgroup.long 0x590++0x03
line.long 0x00 "NONCE0,Bits 31:0 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE0,Bits 31:0 of DMA NONCE"
wgroup.long 0x594++0x03
line.long 0x00 "NONCE1,Bits 63:32 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE1,Bits 63:32 of DMA NONCE"
wgroup.long 0x598++0x03
line.long 0x00 "NONCE2,Bits 95:64 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE2,Bits 95:64 of DMA NONCE"
group.long 0x59C++0x03
line.long 0x00 "ENABLE,Enable stream cipher for XIP"
bitfld.long 0x00 0. "ENABLE,Enable or disable stream cipher for XIP" "0: Disable stream cipher for QSPI XIP,1: Enable stream cipher for QSPI XIP"
tree.end
tree.end
tree "QSPI_S"
base ad:0x5002B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_ACTIVATE,Activate QSPI interface"
bitfld.long 0x00 0. "TASKS_ACTIVATE,Activate QSPI interface" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_READSTART,Start transfer from external flash memory to internal RAM"
bitfld.long 0x00 0. "TASKS_READSTART,Start transfer from external flash memory to internal RAM" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_WRITESTART,Start transfer from internal RAM to external flash memory"
bitfld.long 0x00 0. "TASKS_WRITESTART,Start transfer from internal RAM to external flash memory" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_ERASESTART,Start external flash memory erase operation"
bitfld.long 0x00 0. "TASKS_ERASESTART,Start external flash memory erase operation" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_DEACTIVATE,Deactivate QSPI interface"
bitfld.long 0x00 0. "TASKS_DEACTIVATE,Deactivate QSPI interface" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_READSTART,Subscribe configuration for task READSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task READSTART will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_WRITESTART,Subscribe configuration for task WRITESTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task WRITESTART will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_ERASESTART,Subscribe configuration for task ERASESTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ERASESTART will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_DEACTIVATE,Subscribe configuration for task DEACTIVATE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DEACTIVATE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,QSPI peripheral is ready"
bitfld.long 0x00 0. "EVENTS_READY,QSPI peripheral is ready" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 0. "READY,Enable or disable interrupt for event READY" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable QSPI peripheral and acquire the pins selected in PSELn registers"
bitfld.long 0x00 0. "ENABLE,Enable or disable QSPI" "0: Disable QSPI,1: Enable QSPI"
group.long 0x540++0x03
line.long 0x00 "XIPOFFSET,Address offset into the external memory for Execute in Place operation"
hexmask.long 0x00 0.--31. 1. "XIPOFFSET,Address offset into the external memory for Execute in Place operation"
group.long 0x544++0x03
line.long 0x00 "IFCONFIG0,Interface configuration"
bitfld.long 0x00 12. "PPSIZE,Page size for commands PP PP2O PP4O and PP4IO" "0: 256 bytes,1: 512 bytes"
bitfld.long 0x00 7. "DPMENABLE,Enable deep power-down mode (DPM) feature" "0: Disable DPM feature,1: Enable DPM feature"
newline
bitfld.long 0x00 6. "ADDRMODE,Addressing mode" "0: 24-bit addressing,1: 32-bit addressing"
bitfld.long 0x00 3.--5. "WRITEOC,Configure number of data lines and opcode used for writing" "0: Single data line SPI,1: Dual data line SPI,2: Quad data line SPI,3: Quad data line SPI,?..."
newline
bitfld.long 0x00 0.--2. "READOC,Configure number of data lines and opcode used for reading" "0: Single data line SPI,1: Dual data line SPI,2: Dual data line SPI,3: Quad data line SPI,4: Quad data line SPI,?..."
group.long 0x54C++0x03
line.long 0x00 "XIPEN,Enable Execute in Place operation"
bitfld.long 0x00 0. "XIPEN,Enable XIP AHB Slave interface and access to XIP memory range" "0: Disable XIP interface,1: Enable XIP interface"
group.long 0x600++0x03
line.long 0x00 "IFCONFIG1,Interface configuration"
bitfld.long 0x00 28.--31. "SCKFREQ,SCK frequency is given as 96 MHz / (SCKFREQ + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "SPIMODE,Select SPI mode" "0: Mode 0,1: Mode 3"
newline
bitfld.long 0x00 24. "DPMEN,Enter/exit deep power-down mode (DPM) for external flash memory" "0: Exit DPM,1: Enter DPM"
hexmask.long.byte 0x00 0.--7. 1. "SCKDELAY,Minimum amount of time that the CSN pin must stay high before it can go low again"
rgroup.long 0x604++0x03
line.long 0x00 "STATUS,Status register"
hexmask.long.byte 0x00 24.--31. 1. "SREG,Value of external flash device Status Register"
bitfld.long 0x00 3. "READY,Ready status" "0: QSPI peripheral is busy,1: QSPI peripheral is ready"
newline
bitfld.long 0x00 2. "DPM,Deep power-down mode (DPM) status of external flash" "0: External flash is not in DPM,1: External flash is in DPM"
group.long 0x614++0x03
line.long 0x00 "DPMDUR,Set the duration required to enter/exit deep power-down mode (DPM)"
hexmask.long.word 0x00 16.--31. 1. "EXIT,Duration needed by external flash to exit DPM"
hexmask.long.word 0x00 0.--15. 1. "ENTER,Duration needed by external flash to enter DPM"
group.long 0x624++0x03
line.long 0x00 "ADDRCONF,Extended address configuration"
bitfld.long 0x00 27. "WREN,Send WREN (write enable opcode 0x06) before instruction" "0: Do not send WREN,1: Send WREN"
bitfld.long 0x00 26. "WIPWAIT,Wait for write complete before sending command" "0: No wait,1: Enable"
newline
bitfld.long 0x00 24.--25. "MODE,Extended addressing mode" "0: Do not send any instruction,1: Send opcode,2: Send opcode byte0,3: Send opcode byte0 byte1"
hexmask.long.byte 0x00 16.--23. 1. "BYTE1,Byte 1 following byte 0"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE0,Byte 0 following opcode"
hexmask.long.byte 0x00 0.--7. 1. "OPCODE,Opcode that enters the 32-bit addressing mode"
group.long 0x634++0x03
line.long 0x00 "CINSTRCONF,Custom instruction configuration register"
bitfld.long 0x00 17. "LFSTOP,Stop (finalize) long frame transaction" "?,1: Stop"
bitfld.long 0x00 16. "LFEN,Enable long frame mode" "0: Long frame mode disabled,1: Long frame mode enabled"
newline
bitfld.long 0x00 15. "WREN,Send WREN (write enable opcode 0x06) before instruction" "0: Do not send WREN,1: Send WREN"
bitfld.long 0x00 14. "WIPWAIT,Wait for write complete before sending command" "0: No wait,1: Enable"
newline
bitfld.long 0x00 13. "LIO3,Level of the IO3 pin (if connected) during transmission of custom instruction" "0,1"
bitfld.long 0x00 12. "LIO2,Level of the IO2 pin (if connected) during transmission of custom instruction" "0,1"
newline
bitfld.long 0x00 8.--11. "LENGTH,Length of custom instruction in number of bytes" "?,1: Send opcode only,2: Send opcode CINSTRDAT0.BYTE0,3: Send opcode CINSTRDAT0.BYTE0 -&gt..,4: Send opcode CINSTRDAT0.BYTE0 -&gt..,5: Send opcode CINSTRDAT0.BYTE0 -&gt..,6: Send opcode CINSTRDAT0.BYTE0 -&gt..,7: Send opcode CINSTRDAT0.BYTE0 -&gt..,8: Send opcode CINSTRDAT0.BYTE0 -&gt..,9: Send opcode CINSTRDAT0.BYTE0 -&gt..,?..."
hexmask.long.byte 0x00 0.--7. 1. "OPCODE,Opcode of Custom instruction"
group.long 0x638++0x03
line.long 0x00 "CINSTRDAT0,Custom instruction data register 0"
hexmask.long.byte 0x00 24.--31. 1. "BYTE3,Data byte 3"
hexmask.long.byte 0x00 16.--23. 1. "BYTE2,Data byte 2"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE1,Data byte 1"
hexmask.long.byte 0x00 0.--7. 1. "BYTE0,Data byte 0"
group.long 0x63C++0x03
line.long 0x00 "CINSTRDAT1,Custom instruction data register 1"
hexmask.long.byte 0x00 24.--31. 1. "BYTE7,Data byte 7"
hexmask.long.byte 0x00 16.--23. 1. "BYTE6,Data byte 6"
newline
hexmask.long.byte 0x00 8.--15. 1. "BYTE5,Data byte 5"
hexmask.long.byte 0x00 0.--7. 1. "BYTE4,Data byte 4"
group.long 0x640++0x03
line.long 0x00 "IFTIMING,SPI interface timing"
bitfld.long 0x00 8.--10. "RXDELAY,Timing related to sampling of the input serial data" "0,1,2,3,4,5,6,7"
tree "READ"
group.long 0x504++0x03
line.long 0x00 "SRC,Flash memory source address"
hexmask.long 0x00 0.--31. 1. "SRC,Word-aligned flash memory source address"
group.long 0x508++0x03
line.long 0x00 "DST,RAM destination address"
hexmask.long 0x00 0.--31. 1. "DST,Word-aligned RAM destination address"
group.long 0x50C++0x03
line.long 0x00 "CNT,Read transfer length"
hexmask.long.tbyte 0x00 0.--20. 1. "CNT,Read transfer length in number of bytes"
tree.end
tree "WRITE"
group.long 0x510++0x03
line.long 0x00 "DST,Flash destination address"
hexmask.long 0x00 0.--31. 1. "DST,Word-aligned flash destination address"
group.long 0x514++0x03
line.long 0x00 "SRC,RAM source address"
hexmask.long 0x00 0.--31. 1. "SRC,Word-aligned RAM source address"
group.long 0x518++0x03
line.long 0x00 "CNT,Write transfer length"
hexmask.long.tbyte 0x00 0.--20. 1. "CNT,Write transfer length in number of bytes"
tree.end
tree "ERASE"
group.long 0x51C++0x03
line.long 0x00 "PTR,Start address of flash block to be erased"
hexmask.long 0x00 0.--31. 1. "PTR,Word-aligned start address of block to be erased"
group.long 0x520++0x03
line.long 0x00 "LEN,Size of block to be erased"
bitfld.long 0x00 0.--1. "LEN,LEN" "0: Erase 4 kB block (flash command 0x20),1: Erase 64 kB block (flash command 0xD8),2: Erase all (flash command 0xC7),?..."
tree.end
tree "PSEL"
group.long 0x524++0x03
line.long 0x00 "SCK,Pin select for serial clock SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x528++0x03
line.long 0x00 "CSN,Pin select for chip select signal CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x530++0x03
line.long 0x00 "IO0,Pin select for serial data MOSI/IO0"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x534++0x03
line.long 0x00 "IO1,Pin select for serial data MISO/IO1"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat 2. (strings "2" "3" )(list 0x00 0x04 )
group.long ($2+0x538)++0x03
line.long 0x00 "IO$1,Pin select for serial data IO2"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat.end
tree.end
tree "XIP_ENC"
wgroup.long 0x560++0x03
line.long 0x00 "KEY0,Bits 31:0 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY0,Bits 31:0 of XIP AES KEY"
wgroup.long 0x564++0x03
line.long 0x00 "KEY1,Bits 63:32 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY1,Bits 63:32 of XIP AES KEY"
wgroup.long 0x568++0x03
line.long 0x00 "KEY2,Bits 95:64 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY2,Bits 95:64 of XIP AES KEY"
wgroup.long 0x56C++0x03
line.long 0x00 "KEY3,Bits 127:96 of XIP AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY3,Bits 127:96 of XIP AES KEY"
wgroup.long 0x570++0x03
line.long 0x00 "NONCE0,Bits 31:0 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE0,Bits 31:0 of XIP NONCE"
wgroup.long 0x574++0x03
line.long 0x00 "NONCE1,Bits 63:32 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE1,Bits 63:32 of XIP NONCE"
wgroup.long 0x578++0x03
line.long 0x00 "NONCE2,Bits 95:64 of XIP NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE2,Bits 95:64 of XIP NONCE"
group.long 0x57C++0x03
line.long 0x00 "ENABLE,Enable stream cipher for XIP"
bitfld.long 0x00 0. "ENABLE,Enable or disable stream cipher for XIP" "0: Disable stream cipher for QSPI XIP,1: Enable stream cipher for QSPI XIP"
tree.end
tree "DMA_ENC"
wgroup.long 0x580++0x03
line.long 0x00 "KEY0,Bits 31:0 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY0,Bits 31:0 of DMA AES KEY"
wgroup.long 0x584++0x03
line.long 0x00 "KEY1,Bits 63:32 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY1,Bits 63:32 of DMA AES KEY"
wgroup.long 0x588++0x03
line.long 0x00 "KEY2,Bits 95:64 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY2,Bits 95:64 of DMA AES KEY"
wgroup.long 0x58C++0x03
line.long 0x00 "KEY3,Bits 127:96 of DMA AES KEY"
hexmask.long 0x00 0.--31. 1. "KEY3,Bits 127:96 of DMA AES KEY"
wgroup.long 0x590++0x03
line.long 0x00 "NONCE0,Bits 31:0 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE0,Bits 31:0 of DMA NONCE"
wgroup.long 0x594++0x03
line.long 0x00 "NONCE1,Bits 63:32 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE1,Bits 63:32 of DMA NONCE"
wgroup.long 0x598++0x03
line.long 0x00 "NONCE2,Bits 95:64 of DMA NONCE"
hexmask.long 0x00 0.--31. 1. "NONCE2,Bits 95:64 of DMA NONCE"
group.long 0x59C++0x03
line.long 0x00 "ENABLE,Enable stream cipher for XIP"
bitfld.long 0x00 0. "ENABLE,Enable or disable stream cipher for XIP" "0: Disable stream cipher for QSPI XIP,1: Enable stream cipher for QSPI XIP"
tree.end
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "RADIO (2.4 GHz Radio)"
base ad:0x41008000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_TXEN,Enable RADIO in TX mode"
bitfld.long 0x00 0. "TASKS_TXEN,Enable RADIO in TX mode" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_RXEN,Enable RADIO in RX mode"
bitfld.long 0x00 0. "TASKS_RXEN,Enable RADIO in RX mode" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_START,Start RADIO"
bitfld.long 0x00 0. "TASKS_START,Start RADIO" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOP,Stop RADIO"
bitfld.long 0x00 0. "TASKS_STOP,Stop RADIO" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_DISABLE,Disable RADIO"
bitfld.long 0x00 0. "TASKS_DISABLE,Disable RADIO" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength"
bitfld.long 0x00 0. "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength" "?,1: Trigger task"
wgroup.long 0x18++0x03
line.long 0x00 "TASKS_RSSISTOP,Stop the RSSI measurement"
bitfld.long 0x00 0. "TASKS_RSSISTOP,Stop the RSSI measurement" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_BCSTART,Start the bit counter"
bitfld.long 0x00 0. "TASKS_BCSTART,Start the bit counter" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_BCSTOP,Stop the bit counter"
bitfld.long 0x00 0. "TASKS_BCSTOP,Stop the bit counter" "?,1: Trigger task"
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode"
bitfld.long 0x00 0. "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_EDSTOP,Stop the energy detect measurement"
bitfld.long 0x00 0. "TASKS_EDSTOP,Stop the energy detect measurement" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode"
bitfld.long 0x00 0. "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_CCASTOP,Stop the clear channel assessment"
bitfld.long 0x00 0. "TASKS_CCASTOP,Stop the clear channel assessment" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_TXEN,Subscribe configuration for task TXEN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task TXEN will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_RXEN,Subscribe configuration for task RXEN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RXEN will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task DISABLE will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_RSSISTART,Subscribe configuration for task RSSISTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RSSISTART will subscribe to"
group.long 0x98++0x03
line.long 0x00 "SUBSCRIBE_RSSISTOP,Subscribe configuration for task RSSISTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RSSISTOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_BCSTART,Subscribe configuration for task BCSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task BCSTART will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_BCSTOP,Subscribe configuration for task BCSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task BCSTOP will subscribe to"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_EDSTART,Subscribe configuration for task EDSTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task EDSTART will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_EDSTOP,Subscribe configuration for task EDSTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task EDSTOP will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_CCASTART,Subscribe configuration for task CCASTART"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CCASTART will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_CCASTOP,Subscribe configuration for task CCASTOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CCASTOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_READY,RADIO has ramped up and is ready to be started"
bitfld.long 0x00 0. "EVENTS_READY,RADIO has ramped up and is ready to be started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_ADDRESS,Address sent or received"
bitfld.long 0x00 0. "EVENTS_ADDRESS,Address sent or received" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_PAYLOAD,Packet payload sent or received"
bitfld.long 0x00 0. "EVENTS_PAYLOAD,Packet payload sent or received" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_END,Packet sent or received"
bitfld.long 0x00 0. "EVENTS_END,Packet sent or received" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_DISABLED,RADIO has been disabled"
bitfld.long 0x00 0. "EVENTS_DISABLED,RADIO has been disabled" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_DEVMATCH,A device address match occurred on the last received packet"
bitfld.long 0x00 0. "EVENTS_DEVMATCH,A device address match occurred on the last received packet" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_DEVMISS,No device address match occurred on the last received packet"
bitfld.long 0x00 0. "EVENTS_DEVMISS,No device address match occurred on the last received packet" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_RSSIEND,Sampling of receive signal strength complete"
bitfld.long 0x00 0. "EVENTS_RSSIEND,Sampling of receive signal strength complete" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_BCMATCH,Bit counter reached bit count value"
bitfld.long 0x00 0. "EVENTS_BCMATCH,Bit counter reached bit count value" "0: Event not generated,1: Event generated"
group.long 0x130++0x03
line.long 0x00 "EVENTS_CRCOK,Packet received with CRC ok"
bitfld.long 0x00 0. "EVENTS_CRCOK,Packet received with CRC ok" "0: Event not generated,1: Event generated"
group.long 0x134++0x03
line.long 0x00 "EVENTS_CRCERROR,Packet received with CRC error"
bitfld.long 0x00 0. "EVENTS_CRCERROR,Packet received with CRC error" "0: Event not generated,1: Event generated"
group.long 0x138++0x03
line.long 0x00 "EVENTS_FRAMESTART,IEEE 802.15.4 length field received"
bitfld.long 0x00 0. "EVENTS_FRAMESTART,IEEE 802.15.4 length field received" "0: Event not generated,1: Event generated"
group.long 0x13C++0x03
line.long 0x00 "EVENTS_EDEND,Sampling of energy detection complete"
bitfld.long 0x00 0. "EVENTS_EDEND,Sampling of energy detection complete" "0: Event not generated,1: Event generated"
group.long 0x140++0x03
line.long 0x00 "EVENTS_EDSTOPPED,The sampling of energy detection has stopped"
bitfld.long 0x00 0. "EVENTS_EDSTOPPED,The sampling of energy detection has stopped" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_CCAIDLE,Wireless medium in idle - clear to send"
bitfld.long 0x00 0. "EVENTS_CCAIDLE,Wireless medium in idle - clear to send" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_CCABUSY,Wireless medium busy - do not send"
bitfld.long 0x00 0. "EVENTS_CCABUSY,Wireless medium busy - do not send" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_CCASTOPPED,The CCA has stopped"
bitfld.long 0x00 0. "EVENTS_CCASTOPPED,The CCA has stopped" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_RATEBOOST,Ble_LR CI field received receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit"
bitfld.long 0x00 0. "EVENTS_RATEBOOST,Ble_LR CI field received receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit" "0: Event not generated,1: Event generated"
group.long 0x154++0x03
line.long 0x00 "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path"
bitfld.long 0x00 0. "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path"
bitfld.long 0x00 0. "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_MHRMATCH,MAC header match found"
bitfld.long 0x00 0. "EVENTS_MHRMATCH,MAC header match found" "0: Event not generated,1: Event generated"
group.long 0x16C++0x03
line.long 0x00 "EVENTS_PHYEND,Generated when last bit is sent on air"
bitfld.long 0x00 0. "EVENTS_PHYEND,Generated when last bit is sent on air" "0: Event not generated,1: Event generated"
group.long 0x170++0x03
line.long 0x00 "EVENTS_CTEPRESENT,CTE is present (early warning right after receiving CTEInfo byte)"
bitfld.long 0x00 0. "EVENTS_CTEPRESENT,CTE is present (early warning right after receiving CTEInfo byte)" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_READY,Publish configuration for event READY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event READY will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_ADDRESS,Publish configuration for event ADDRESS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ADDRESS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_PAYLOAD,Publish configuration for event PAYLOAD"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event PAYLOAD will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_DISABLED,Publish configuration for event DISABLED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event DISABLED will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_DEVMATCH,Publish configuration for event DEVMATCH"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event DEVMATCH will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_DEVMISS,Publish configuration for event DEVMISS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event DEVMISS will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_RSSIEND,Publish configuration for event RSSIEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RSSIEND will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_BCMATCH,Publish configuration for event BCMATCH"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event BCMATCH will publish to"
group.long 0x1B0++0x03
line.long 0x00 "PUBLISH_CRCOK,Publish configuration for event CRCOK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CRCOK will publish to"
group.long 0x1B4++0x03
line.long 0x00 "PUBLISH_CRCERROR,Publish configuration for event CRCERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CRCERROR will publish to"
group.long 0x1B8++0x03
line.long 0x00 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event FRAMESTART will publish to"
group.long 0x1BC++0x03
line.long 0x00 "PUBLISH_EDEND,Publish configuration for event EDEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event EDEND will publish to"
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_EDSTOPPED,Publish configuration for event EDSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event EDSTOPPED will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_CCAIDLE,Publish configuration for event CCAIDLE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CCAIDLE will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_CCABUSY,Publish configuration for event CCABUSY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CCABUSY will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_CCASTOPPED,Publish configuration for event CCASTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CCASTOPPED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_RATEBOOST,Publish configuration for event RATEBOOST"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RATEBOOST will publish to"
group.long 0x1D4++0x03
line.long 0x00 "PUBLISH_TXREADY,Publish configuration for event TXREADY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXREADY will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_RXREADY,Publish configuration for event RXREADY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXREADY will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_MHRMATCH,Publish configuration for event MHRMATCH"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event MHRMATCH will publish to"
group.long 0x1EC++0x03
line.long 0x00 "PUBLISH_PHYEND,Publish configuration for event PHYEND"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event PHYEND will publish to"
group.long 0x1F0++0x03
line.long 0x00 "PUBLISH_CTEPRESENT,Publish configuration for event CTEPRESENT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CTEPRESENT will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "PHYEND_START,Shortcut between event PHYEND and task START" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "PHYEND_DISABLE,Shortcut between event PHYEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "RXREADY_START,Shortcut between event RXREADY and task START" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "TXREADY_START,Shortcut between event TXREADY and task START" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "CCAIDLE_STOP,Shortcut between event CCAIDLE and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "EDEND_DISABLE,Shortcut between event EDEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 15. "READY_EDSTART,Shortcut between event READY and task EDSTART" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 14. "FRAMESTART_BCSTART,Shortcut between event FRAMESTART and task BCSTART" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 13. "CCABUSY_DISABLE,Shortcut between event CCABUSY and task DISABLE" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 12. "CCAIDLE_TXEN,Shortcut between event CCAIDLE and task TXEN" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 11. "RXREADY_CCASTART,Shortcut between event RXREADY and task CCASTART" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 8. "DISABLED_RSSISTOP,Shortcut between event DISABLED and task RSSISTOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 6. "ADDRESS_BCSTART,Shortcut between event ADDRESS and task BCSTART" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 4. "ADDRESS_RSSISTART,Shortcut between event ADDRESS and task RSSISTART" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "DISABLED_RXEN,Shortcut between event DISABLED and task RXEN" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "DISABLED_TXEN,Shortcut between event DISABLED and task TXEN" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "END_DISABLE,Shortcut between event END and task DISABLE" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "READY_START,Shortcut between event READY and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 28. "CTEPRESENT,Write '1' to enable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 27. "PHYEND,Write '1' to enable interrupt for event PHYEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 23. "MHRMATCH,Write '1' to enable interrupt for event MHRMATCH" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "TXREADY,Write '1' to enable interrupt for event TXREADY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "RATEBOOST,Write '1' to enable interrupt for event RATEBOOST" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CCASTOPPED,Write '1' to enable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CCABUSY,Write '1' to enable interrupt for event CCABUSY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CCAIDLE,Write '1' to enable interrupt for event CCAIDLE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "EDSTOPPED,Write '1' to enable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "EDEND,Write '1' to enable interrupt for event EDEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CRCERROR,Write '1' to enable interrupt for event CRCERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CRCOK,Write '1' to enable interrupt for event CRCOK" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "BCMATCH,Write '1' to enable interrupt for event BCMATCH" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "RSSIEND,Write '1' to enable interrupt for event RSSIEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "DEVMISS,Write '1' to enable interrupt for event DEVMISS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "DEVMATCH,Write '1' to enable interrupt for event DEVMATCH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "DISABLED,Write '1' to enable interrupt for event DISABLED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "PAYLOAD,Write '1' to enable interrupt for event PAYLOAD" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "ADDRESS,Write '1' to enable interrupt for event ADDRESS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 28. "CTEPRESENT,Write '1' to disable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 27. "PHYEND,Write '1' to disable interrupt for event PHYEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 23. "MHRMATCH,Write '1' to disable interrupt for event MHRMATCH" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "TXREADY,Write '1' to disable interrupt for event TXREADY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "RATEBOOST,Write '1' to disable interrupt for event RATEBOOST" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CCASTOPPED,Write '1' to disable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CCABUSY,Write '1' to disable interrupt for event CCABUSY" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CCAIDLE,Write '1' to disable interrupt for event CCAIDLE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "EDSTOPPED,Write '1' to disable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "EDEND,Write '1' to disable interrupt for event EDEND" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CRCERROR,Write '1' to disable interrupt for event CRCERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CRCOK,Write '1' to disable interrupt for event CRCOK" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "BCMATCH,Write '1' to disable interrupt for event BCMATCH" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "RSSIEND,Write '1' to disable interrupt for event RSSIEND" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "DEVMISS,Write '1' to disable interrupt for event DEVMISS" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "DEVMATCH,Write '1' to disable interrupt for event DEVMATCH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "DISABLED,Write '1' to disable interrupt for event DISABLED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "PAYLOAD,Write '1' to disable interrupt for event PAYLOAD" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "ADDRESS,Write '1' to disable interrupt for event ADDRESS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "CRCSTATUS,CRC status"
bitfld.long 0x00 0. "CRCSTATUS,CRC status of packet received" "0: Packet received with CRC error,1: Packet received with CRC ok"
rgroup.long 0x408++0x03
line.long 0x00 "RXMATCH,Received address"
bitfld.long 0x00 0.--2. "RXMATCH,Received address" "0,1,2,3,4,5,6,7"
rgroup.long 0x40C++0x03
line.long 0x00 "RXCRC,CRC field of previously received packet"
hexmask.long.tbyte 0x00 0.--23. 1. "RXCRC,CRC field of previously received packet"
rgroup.long 0x410++0x03
line.long 0x00 "DAI,Device address match index"
bitfld.long 0x00 0.--2. "DAI,Device address match index" "0,1,2,3,4,5,6,7"
rgroup.long 0x414++0x03
line.long 0x00 "PDUSTAT,Payload status"
bitfld.long 0x00 1.--2. "CISTAT,Status on what rate packet is received with in Long Range" "0: Frame is received at 125 kbps,1: Frame is received at 500 kbps,?..."
bitfld.long 0x00 0. "PDUSTAT,Status on payload length vs" "0: Payload less than PCNF1.MAXLEN,1: Payload greater than PCNF1.MAXLEN"
rgroup.long 0x44C++0x03
line.long 0x00 "CTESTATUS,CTEInfo parsed from received packet"
bitfld.long 0x00 6.--7. "CTETYPE,CTEType parsed from packet" "0,1,2,3"
bitfld.long 0x00 5. "RFU,RFU parsed from packet" "0,1"
newline
bitfld.long 0x00 0.--4. "CTETIME,CTETime parsed from packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x458++0x03
line.long 0x00 "DFESTATUS,DFE status information"
bitfld.long 0x00 4. "SAMPLINGSTATE,Internal state of sampling state machine" "0: Sampling state Idle,1: Sampling state Sampling"
bitfld.long 0x00 0.--2. "SWITCHINGSTATE,Internal state of switching state machine" "0: Switching state Idle,1: Switching state Offset,2: Switching state Guard,3: Switching state Ref,4: Switching state Switching,5: Switching state Ending,?..."
group.long 0x504++0x03
line.long 0x00 "PACKETPTR,Packet pointer"
hexmask.long 0x00 0.--31. 1. "PACKETPTR,Packet pointer"
group.long 0x508++0x03
line.long 0x00 "FREQUENCY,Frequency"
bitfld.long 0x00 8. "MAP,Channel map selection" "0: Channel map between 2400 MHZ,1: Channel map between 2360 MHZ"
hexmask.long.byte 0x00 0.--6. 1. "FREQUENCY,Radio channel frequency"
group.long 0x50C++0x03
line.long 0x00 "TXPOWER,Output power"
hexmask.long.byte 0x00 0.--7. 1. "TXPOWER,RADIO output power"
group.long 0x510++0x03
line.long 0x00 "MODE,Data rate and modulation"
bitfld.long 0x00 0.--3. "MODE,Radio data rate and modulation setting" "0: 1 Mbps Nordic proprietary radio mode,1: 2 Mbps Nordic proprietary radio mode,?,3: 1 Mbps BLE,4: 2 Mbps BLE,5: Long range 125 kbps TX 125 kbps and 500 kbps RX,6: Long range 500 kbps TX 125 kbps and 500 kbps RX,?,?,?,?,?,?,?,?,15: IEEE 802.15.4-2006 250 kbps"
group.long 0x514++0x03
line.long 0x00 "PCNF0,Packet configuration register 0"
bitfld.long 0x00 29.--30. "TERMLEN,Length of TERM field in Long Range operation" "0,1,2,3"
bitfld.long 0x00 26. "CRCINC,Indicates if LENGTH field contains CRC or not" "0: LENGTH does not contain CRC,1: LENGTH includes CRC"
newline
bitfld.long 0x00 24.--25. "PLEN,Length of preamble on air" "0: 8-bit preamble,1: 16-bit preamble,2: 32-bit zero preamble - used for IEEE 802.15.4,3: Preamble - used for BLE long range"
bitfld.long 0x00 22.--23. "CILEN,Length of code indicator - long range" "0,1,2,3"
newline
bitfld.long 0x00 20. "S1INCL,Include or exclude S1 field in RAM" "0: Include S1 field in RAM only if S1LEN &gt 0,1: Always include S1 field in RAM independent of.."
bitfld.long 0x00 16.--19. "S1LEN,Length on air of S1 field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 8. "S0LEN,Length on air of S0 field in number of bytes" "0,1"
bitfld.long 0x00 0.--3. "LFLEN,Length on air of LENGTH field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x518++0x03
line.long 0x00 "PCNF1,Packet configuration register 1"
bitfld.long 0x00 25. "WHITEEN,Enable or disable packet whitening" "0: Disabled,1: Enabled"
bitfld.long 0x00 24. "ENDIAN,On-air endianness of packet this applies to the S0 LENGTH S1 and the PAYLOAD fields" "0: Least significant bit on air first,1: Most significant bit on air first"
newline
bitfld.long 0x00 16.--18. "BALEN,Base address length in number of bytes" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--15. 1. "STATLEN,Static length in number of bytes"
newline
hexmask.long.byte 0x00 0.--7. 1. "MAXLEN,Maximum length of packet payload"
group.long 0x51C++0x03
line.long 0x00 "BASE0,Base address 0"
hexmask.long 0x00 0.--31. 1. "BASE0,Base address 0"
group.long 0x520++0x03
line.long 0x00 "BASE1,Base address 1"
hexmask.long 0x00 0.--31. 1. "BASE1,Base address 1"
group.long 0x524++0x03
line.long 0x00 "PREFIX0,Prefixes bytes for logical addresses 0-3"
hexmask.long.byte 0x00 24.--31. 1. "AP3,Address prefix 3"
hexmask.long.byte 0x00 16.--23. 1. "AP2,Address prefix 2"
newline
hexmask.long.byte 0x00 8.--15. 1. "AP1,Address prefix 1"
hexmask.long.byte 0x00 0.--7. 1. "AP0,Address prefix 0"
group.long 0x528++0x03
line.long 0x00 "PREFIX1,Prefixes bytes for logical addresses 4-7"
hexmask.long.byte 0x00 24.--31. 1. "AP7,Address prefix 7"
hexmask.long.byte 0x00 16.--23. 1. "AP6,Address prefix 6"
newline
hexmask.long.byte 0x00 8.--15. 1. "AP5,Address prefix 5"
hexmask.long.byte 0x00 0.--7. 1. "AP4,Address prefix 4"
group.long 0x52C++0x03
line.long 0x00 "TXADDRESS,Transmit address select"
bitfld.long 0x00 0.--2. "TXADDRESS,Transmit address select" "0,1,2,3,4,5,6,7"
group.long 0x530++0x03
line.long 0x00 "RXADDRESSES,Receive address select"
bitfld.long 0x00 7. "ADDR7,Enable or disable reception on logical address 7" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "ADDR6,Enable or disable reception on logical address 6" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "ADDR5,Enable or disable reception on logical address 5" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ADDR4,Enable or disable reception on logical address 4" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "ADDR3,Enable or disable reception on logical address 3" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "ADDR2,Enable or disable reception on logical address 2" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "ADDR1,Enable or disable reception on logical address 1" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDR0,Enable or disable reception on logical address 0" "0: Disabled,1: Enabled"
group.long 0x534++0x03
line.long 0x00 "CRCCNF,CRC configuration"
bitfld.long 0x00 8.--9. "SKIPADDR,Include or exclude packet address field out of CRC calculation" "0: CRC calculation includes address field,1: CRC calculation does not include address field,2: CRC calculation as per 802.15.4 standard,?..."
bitfld.long 0x00 0.--1. "LEN,CRC length in number of bytes" "0: CRC length is zero and CRC calculation is..,1: CRC length is one byte and CRC calculation is..,2: CRC length is two bytes and CRC calculation..,3: CRC length is three bytes and CRC calculation.."
group.long 0x538++0x03
line.long 0x00 "CRCPOLY,CRC polynomial"
hexmask.long.tbyte 0x00 0.--23. 1. "CRCPOLY,CRC polynomial"
group.long 0x53C++0x03
line.long 0x00 "CRCINIT,CRC initial value"
hexmask.long.tbyte 0x00 0.--23. 1. "CRCINIT,CRC initial value"
group.long 0x544++0x03
line.long 0x00 "TIFS,Interframe spacing in us"
hexmask.long.word 0x00 0.--9. 1. "TIFS,Interframe spacing in us"
rgroup.long 0x548++0x03
line.long 0x00 "RSSISAMPLE,RSSI sample"
hexmask.long.byte 0x00 0.--6. 1. "RSSISAMPLE,RSSI sample"
rgroup.long 0x550++0x03
line.long 0x00 "STATE,Current radio state"
bitfld.long 0x00 0.--3. "STATE,Current radio state" "0: RADIO is in the Disabled state,1: RADIO is in the RXRU state,2: RADIO is in the RXIDLE state,3: RADIO is in the RX state,4: RADIO is in the RXDISABLED state,?,?,?,?,9: RADIO is in the TXRU state,10: RADIO is in the TXIDLE state,11: RADIO is in the TX state,12: RADIO is in the TXDISABLED state,?..."
group.long 0x554++0x03
line.long 0x00 "DATAWHITEIV,Data whitening initial value"
hexmask.long.byte 0x00 0.--6. 1. "DATAWHITEIV,Data whitening initial value"
group.long 0x560++0x03
line.long 0x00 "BCC,Bit counter compare"
hexmask.long 0x00 0.--31. 1. "BCC,Bit counter compare"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x600)++0x03
line.long 0x00 "DAB[$1],Description collection: Device address base segment n $1"
hexmask.long 0x00 0.--31. 1. "DAB,Device address base segment n"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x620)++0x03
line.long 0x00 "DAP[$1],Description collection: Device address prefix n $1"
hexmask.long.word 0x00 0.--15. 1. "DAP,Device address prefix n"
repeat.end
group.long 0x640++0x03
line.long 0x00 "DACNF,Device address match configuration"
bitfld.long 0x00 15. "TXADD7,TxAdd for device address 7" "0,1"
bitfld.long 0x00 14. "TXADD6,TxAdd for device address 6" "0,1"
newline
bitfld.long 0x00 13. "TXADD5,TxAdd for device address 5" "0,1"
bitfld.long 0x00 12. "TXADD4,TxAdd for device address 4" "0,1"
newline
bitfld.long 0x00 11. "TXADD3,TxAdd for device address 3" "0,1"
bitfld.long 0x00 10. "TXADD2,TxAdd for device address 2" "0,1"
newline
bitfld.long 0x00 9. "TXADD1,TxAdd for device address 1" "0,1"
bitfld.long 0x00 8. "TXADD0,TxAdd for device address 0" "0,1"
newline
bitfld.long 0x00 7. "ENA7,Enable or disable device address matching using device address 7" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "ENA6,Enable or disable device address matching using device address 6" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "ENA5,Enable or disable device address matching using device address 5" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENA4,Enable or disable device address matching using device address 4" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "ENA3,Enable or disable device address matching using device address 3" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "ENA2,Enable or disable device address matching using device address 2" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "ENA1,Enable or disable device address matching using device address 1" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ENA0,Enable or disable device address matching using device address 0" "0: Disabled,1: Enabled"
group.long 0x644++0x03
line.long 0x00 "MHRMATCHCONF,Search pattern configuration"
hexmask.long 0x00 0.--31. 1. "MHRMATCHCONF,Search pattern configuration"
group.long 0x648++0x03
line.long 0x00 "MHRMATCHMAS,Pattern mask"
hexmask.long 0x00 0.--31. 1. "MHRMATCHMAS,Pattern mask"
group.long 0x650++0x03
line.long 0x00 "MODECNF0,Radio mode configuration register 0"
bitfld.long 0x00 8.--9. "DTX,Default TX value" "0: Transmit '1',1: Transmit '0',2: Transmit center frequency,?..."
bitfld.long 0x00 0. "RU,Radio ramp-up time" "0: Default ramp-up time (tRXEN and tTXEN)..,1: Fast ramp-up (tRXEN FAST and tTXEN FAST) see.."
group.long 0x660++0x03
line.long 0x00 "SFD,IEEE 802.15.4 start of frame delimiter"
hexmask.long.byte 0x00 0.--7. 1. "SFD,IEEE 802.15.4 start of frame delimiter"
group.long 0x664++0x03
line.long 0x00 "EDCNT,IEEE 802.15.4 energy detect loop count"
hexmask.long.tbyte 0x00 0.--20. 1. "EDCNT,IEEE 802.15.4 energy detect loop count"
rgroup.long 0x668++0x03
line.long 0x00 "EDSAMPLE,IEEE 802.15.4 energy detect level"
hexmask.long.byte 0x00 0.--7. 1. "EDLVL,IEEE 802.15.4 energy detect level"
group.long 0x66C++0x03
line.long 0x00 "CCACTRL,IEEE 802.15.4 clear channel assessment control"
hexmask.long.byte 0x00 24.--31. 1. "CCACORRCNT,Limit for occurances above CCACORRTHRES"
hexmask.long.byte 0x00 16.--23. 1. "CCACORRTHRES,CCA correlator busy threshold"
newline
hexmask.long.byte 0x00 8.--15. 1. "CCAEDTHRES,CCA energy busy threshold"
bitfld.long 0x00 0.--2. "CCAMODE,CCA mode of operation" "0: Energy above threshold,1: Carrier seen,2: Energy above threshold AND carrier seen,3: Energy above threshold OR carrier seen,4: Energy above threshold test mode that will..,?..."
group.long 0x900++0x03
line.long 0x00 "DFEMODE,Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)"
bitfld.long 0x00 0.--1. "DFEOPMODE,Direction finding operation mode" "0: Direction finding mode disabled,?,2: Direction finding mode set to AoD,3: Direction finding mode set to AoA"
group.long 0x904++0x03
line.long 0x00 "CTEINLINECONF,Configuration for CTE inline mode"
hexmask.long.byte 0x00 24.--31. 1. "S0MASK,S0 bit mask to set which bit to match"
hexmask.long.byte 0x00 16.--23. 1. "S0CONF,S0 bit pattern to match"
newline
bitfld.long 0x00 13.--15. "CTEINLINERXMODE2US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 500ns,5: 0.25us,6: 0.125us,?..."
bitfld.long 0x00 10.--12. "CTEINLINERXMODE1US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 500ns,5: 0.25us,6: 0.125us,?..."
newline
bitfld.long 0x00 6.--7. "CTETIMEVALIDRANGE,Max range of CTETime" "0: 20 in 8us unit (default) Set to 20 if parsed..,1: 31 in 8us unit,2: 63 in 8us unit,?..."
bitfld.long 0x00 4. "CTEERRORHANDLING,Sampling/switching if CRC is not OK" "0: No sampling and antenna switching when CRC is..,1: Sampling and antenna switching also when CRC.."
newline
bitfld.long 0x00 3. "CTEINFOINS1,CTEInfo is S1 byte or not" "0: CTEInfo is NOT in S1 byte (advertising PDU),1: CTEInfo is in S1 byte (data PDU)"
bitfld.long 0x00 0. "CTEINLINECTRLEN,Enable parsing of CTEInfo from received packet in BLE modes" "0: Parsing of CTEInfo is disabled,1: Parsing of CTEInfo is enabled"
group.long 0x910++0x03
line.long 0x00 "DFECTRL1,Various configuration for Direction finding"
bitfld.long 0x00 24.--27. "AGCBACKOFFGAIN,Gain will be lowered by the specified number of gain steps at the start of CTE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "REPEATPATTERN,Repeat every antenna pattern N times" "0: Do not repeat (1 time in total),?..."
newline
bitfld.long 0x00 16.--18. "TSAMPLESPACING,Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0" "?,1: 4us,2: 2us,3: 1us,4: 500ns,5: 0.25us,6: 0.125us,?..."
bitfld.long 0x00 15. "SAMPLETYPE,Whether to sample I/Q or magnitude/phase" "0: Complex samples in I and Q,1: Complex samples as magnitude and phase"
newline
bitfld.long 0x00 12.--14. "TSAMPLESPACINGREF,Interval between samples in the REFERENCE period" "?,1: 4us,2: 2us,3: 1us,4: 500ns,5: 0.25us,6: 0.125us,?..."
bitfld.long 0x00 8.--10. "TSWITCHSPACING,Interval between every time the antenna is changed in the SWITCHING state" "?,1: 4us,2: 2us,3: 1us,?..."
newline
bitfld.long 0x00 7. "DFEINEXTENSION,Add CTE extension and do antenna switching/sampling in this extension" "0: Antenna switching/sampling is done in the..,1: AoA/AoD procedure triggered at end of CRC"
bitfld.long 0x00 0.--5. "NUMBEROF8US,Length of the AoA/AoD procedure in number of 8 us units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x914++0x03
line.long 0x00 "DFECTRL2,Start offset for Direction finding"
hexmask.long.word 0x00 16.--27. 1. "TSAMPLEOFFSET,Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start"
hexmask.long.word 0x00 0.--12. 1. "TSWITCHOFFSET,Signed value offset after the end of the CRC before starting switching in number of 16M cycles"
group.long 0x928++0x03
line.long 0x00 "SWITCHPATTERN,GPIO patterns to be used for each antenna"
hexmask.long.byte 0x00 0.--7. 1. "SWITCHPATTERN,Fill array of GPIO patterns for antenna control"
group.long 0x92C++0x03
line.long 0x00 "CLEARPATTERN,Clear the GPIO pattern array for antenna control"
eventfld.long 0x00 0. "CLEARPATTERN,Clears GPIO pattern array for antenna control" "?,1: Clear the GPIO pattern"
group.long 0xFFC++0x03
line.long 0x00 "POWER,Peripheral power control"
bitfld.long 0x00 0. "POWER,Peripheral power control" "0: Peripheral is powered off,1: Peripheral is powered on"
tree "PSEL"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x930)++0x03
line.long 0x00 "DFEGPIO[$1],Description collection: Pin select for DFE pin n $1"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
repeat.end
tree.end
tree "DFEPACKET"
group.long 0x950++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x954++0x03
line.long 0x00 "MAXCNT,Maximum number of buffer words to transfer"
hexmask.long.word 0x00 0.--13. 1. "MAXCNT,Maximum number of buffer words to transfer"
rgroup.long 0x958++0x03
line.long 0x00 "AMOUNT,Number of samples transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of samples transferred in the last transaction"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "REGULATORS (Voltage Regulators)"
tree "REGULATORS_NS"
base ad:0x40004000
rgroup.long 0x428++0x03
line.long 0x00 "MAINREGSTATUS,Main supply status"
bitfld.long 0x00 0. "VREGH,VREGH status" "0: Normal voltage mode,1: High voltage mode"
wgroup.long 0x500++0x03
line.long 0x00 "SYSTEMOFF,System OFF register"
bitfld.long 0x00 0. "SYSTEMOFF,Enable System OFF mode" "?,1: Enable System OFF mode"
group.long 0x510++0x03
line.long 0x00 "POFCON,Power-fail comparator configuration"
bitfld.long 0x00 8.--11. "THRESHOLDVDDH,Power-fail comparator threshold setting for voltage supply on VDDH" "0: Set threshold to 2.7 V,1: Set threshold to 2.8 V,2: Set threshold to 2.9 V,3: Set threshold to 3.0 V,4: Set threshold to 3.1 V,5: Set threshold to 3.2 V,6: Set threshold to 3.3 V,7: Set threshold to 3.4 V,8: Set threshold to 3.5 V,9: Set threshold to 3.6 V,10: Set threshold to 3.7 V,11: Set threshold to 3.8 V,12: Set threshold to 3.9 V,13: Set threshold to 4.0 V,14: Set threshold to 4.1 V,15: Set threshold to 4.2 V"
bitfld.long 0x00 1.--4. "THRESHOLD,Power-fail comparator threshold setting" "?,?,?,?,?,?,6: Set threshold to 1.9 V,7: Set threshold to 2.0 V,8: Set threshold to 2.1 V,9: Set threshold to 2.2 V,10: Set threshold to 2.3 V,11: Set threshold to 2.4 V,12: Set threshold to 2.5 V,13: Set threshold to 2.6 V,14: Set threshold to 2.7 V,15: Set threshold to 2.8 V"
newline
bitfld.long 0x00 0. "POF,Enable or disable power-fail comparator" "0: Disabled,1: Enabled"
tree "VREGMAIN"
group.long 0x704++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGMAIN"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree "VREGRADIO"
group.long 0x904++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGRADIO"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree "VREGH"
group.long 0xB00++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGH"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree.end
tree "REGULATORS_S"
base ad:0x50004000
rgroup.long 0x428++0x03
line.long 0x00 "MAINREGSTATUS,Main supply status"
bitfld.long 0x00 0. "VREGH,VREGH status" "0: Normal voltage mode,1: High voltage mode"
wgroup.long 0x500++0x03
line.long 0x00 "SYSTEMOFF,System OFF register"
bitfld.long 0x00 0. "SYSTEMOFF,Enable System OFF mode" "?,1: Enable System OFF mode"
group.long 0x510++0x03
line.long 0x00 "POFCON,Power-fail comparator configuration"
bitfld.long 0x00 8.--11. "THRESHOLDVDDH,Power-fail comparator threshold setting for voltage supply on VDDH" "0: Set threshold to 2.7 V,1: Set threshold to 2.8 V,2: Set threshold to 2.9 V,3: Set threshold to 3.0 V,4: Set threshold to 3.1 V,5: Set threshold to 3.2 V,6: Set threshold to 3.3 V,7: Set threshold to 3.4 V,8: Set threshold to 3.5 V,9: Set threshold to 3.6 V,10: Set threshold to 3.7 V,11: Set threshold to 3.8 V,12: Set threshold to 3.9 V,13: Set threshold to 4.0 V,14: Set threshold to 4.1 V,15: Set threshold to 4.2 V"
bitfld.long 0x00 1.--4. "THRESHOLD,Power-fail comparator threshold setting" "?,?,?,?,?,?,6: Set threshold to 1.9 V,7: Set threshold to 2.0 V,8: Set threshold to 2.1 V,9: Set threshold to 2.2 V,10: Set threshold to 2.3 V,11: Set threshold to 2.4 V,12: Set threshold to 2.5 V,13: Set threshold to 2.6 V,14: Set threshold to 2.7 V,15: Set threshold to 2.8 V"
newline
bitfld.long 0x00 0. "POF,Enable or disable power-fail comparator" "0: Disabled,1: Enabled"
tree "VREGMAIN"
group.long 0x704++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGMAIN"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree "VREGRADIO"
group.long 0x904++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGRADIO"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree "VREGH"
group.long 0xB00++0x03
line.long 0x00 "DCDCEN,DC/DC enable register for VREGH"
bitfld.long 0x00 0. "DCDCEN,Enable or disable DC/DC converter" "0: Disabled,1: Enabled"
tree.end
tree.end
tree.end
endif
tree "RESET (Reset Control)"
sif cpuis("NRF5340QKAA-NET")
tree "RESET_NS"
base ad:0x41005000
group.long 0x400++0x03
line.long 0x00 "RESETREAS,Reset reason"
bitfld.long 0x00 27. "LCTRLAP,Reset from network CTRL-AP detected" "0: Not detected,1: Detected"
bitfld.long 0x00 26. "VBUS,Reset after wakeup from System OFF mode due to VBUS rising into valid range" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 25. "DOG1,Reset from application watchdog timer 1 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 24. "NFC,Reset after wakeup from System OFF mode due to NFC field being detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 23. "MFORCEOFF,Force off reset from application core detected" "0: Not detected,1: Detected"
bitfld.long 0x00 18. "LDOG,Reset from network watchdog timer detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 17. "LLOCKUP,Reset from network CPU lockup detected" "0: Not detected,1: Detected"
bitfld.long 0x00 16. "LSREQ,Reset from network soft reset detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 7. "DIF,Reset due to wakeup from System OFF mode when wakeup is triggered by entering the debug interface mode" "0: Not detected,1: Detected"
bitfld.long 0x00 6. "LPCOMP,Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal from LPCOMP" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 5. "OFF,Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal from GPIO" "0: Not detected,1: Detected"
bitfld.long 0x00 4. "LOCKUP,Reset from application CPU lockup detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 3. "SREQ,Reset from application soft reset detected" "0: Not detected,1: Detected"
bitfld.long 0x00 2. "CTRLAP,Reset from application CTRL-AP detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 1. "DOG0,Reset from application watchdog timer 0 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 0. "RESETPIN,Reset from pin reset detected" "0: Not detected,1: Detected"
tree "NETWORK"
group.long 0x614++0x03
line.long 0x00 "FORCEOFF,Force off power and clock in network core"
bitfld.long 0x00 0. "FORCEOFF,Force off power and clock in network core" "0: Release force off signal,1: Hold force off signal"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "RESET_NS"
base ad:0x40005000
group.long 0x400++0x03
line.long 0x00 "RESETREAS,Reset reason"
bitfld.long 0x00 27. "LCTRLAP,Reset from network CTRL-AP detected" "0: Not detected,1: Detected"
bitfld.long 0x00 26. "VBUS,Reset after wakeup from System OFF mode due to VBUS rising into valid range" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 25. "DOG1,Reset from application watchdog timer 1 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 24. "NFC,Reset after wakeup from System OFF mode due to NFC field being detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 23. "MFORCEOFF,Force off reset from application core detected" "0: Not detected,1: Detected"
bitfld.long 0x00 18. "LDOG,Reset from network watchdog timer detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 17. "LLOCKUP,Reset from network CPU lockup detected" "0: Not detected,1: Detected"
bitfld.long 0x00 16. "LSREQ,Reset from network soft reset detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 7. "DIF,Reset due to wakeup from System OFF mode when wakeup is triggered by entering the debug interface mode" "0: Not detected,1: Detected"
bitfld.long 0x00 6. "LPCOMP,Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal from LPCOMP" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 5. "OFF,Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal from GPIO" "0: Not detected,1: Detected"
bitfld.long 0x00 4. "LOCKUP,Reset from application CPU lockup detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 3. "SREQ,Reset from application soft reset detected" "0: Not detected,1: Detected"
bitfld.long 0x00 2. "CTRLAP,Reset from application CTRL-AP detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 1. "DOG0,Reset from application watchdog timer 0 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 0. "RESETPIN,Reset from pin reset detected" "0: Not detected,1: Detected"
tree "NETWORK"
group.long 0x614++0x03
line.long 0x00 "FORCEOFF,Force off power and clock in network core"
bitfld.long 0x00 0. "FORCEOFF,Force off power and clock in network core" "0: Release force off signal,1: Hold force off signal"
tree.end
tree.end
tree "RESET_S"
base ad:0x50005000
group.long 0x400++0x03
line.long 0x00 "RESETREAS,Reset reason"
bitfld.long 0x00 27. "LCTRLAP,Reset from network CTRL-AP detected" "0: Not detected,1: Detected"
bitfld.long 0x00 26. "VBUS,Reset after wakeup from System OFF mode due to VBUS rising into valid range" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 25. "DOG1,Reset from application watchdog timer 1 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 24. "NFC,Reset after wakeup from System OFF mode due to NFC field being detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 23. "MFORCEOFF,Force off reset from application core detected" "0: Not detected,1: Detected"
bitfld.long 0x00 18. "LDOG,Reset from network watchdog timer detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 17. "LLOCKUP,Reset from network CPU lockup detected" "0: Not detected,1: Detected"
bitfld.long 0x00 16. "LSREQ,Reset from network soft reset detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 7. "DIF,Reset due to wakeup from System OFF mode when wakeup is triggered by entering the debug interface mode" "0: Not detected,1: Detected"
bitfld.long 0x00 6. "LPCOMP,Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal from LPCOMP" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 5. "OFF,Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal from GPIO" "0: Not detected,1: Detected"
bitfld.long 0x00 4. "LOCKUP,Reset from application CPU lockup detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 3. "SREQ,Reset from application soft reset detected" "0: Not detected,1: Detected"
bitfld.long 0x00 2. "CTRLAP,Reset from application CTRL-AP detected" "0: Not detected,1: Detected"
newline
bitfld.long 0x00 1. "DOG0,Reset from application watchdog timer 0 detected" "0: Not detected,1: Detected"
bitfld.long 0x00 0. "RESETPIN,Reset from pin reset detected" "0: Not detected,1: Detected"
tree "NETWORK"
group.long 0x614++0x03
line.long 0x00 "FORCEOFF,Force off power and clock in network core"
bitfld.long 0x00 0. "FORCEOFF,Force off power and clock in network core" "0: Release force off signal,1: Hold force off signal"
tree.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-NET")
tree "RNG (Random Number Generator)"
base ad:0x41009000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Task starting the random number generator"
bitfld.long 0x00 0. "TASKS_START,Task starting the random number generator" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Task stopping the random number generator"
bitfld.long 0x00 0. "TASKS_STOP,Task stopping the random number generator" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_VALRDY,Event being generated for every new random number written to the VALUE register"
bitfld.long 0x00 0. "EVENTS_VALRDY,Event being generated for every new random number written to the VALUE register" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_VALRDY,Publish configuration for event VALRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event VALRDY will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 0. "VALRDY_STOP,Shortcut between event VALRDY and task STOP" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 0. "VALRDY,Write '1' to enable interrupt for event VALRDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 0. "VALRDY,Write '1' to disable interrupt for event VALRDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 0. "DERCEN,Bias correction" "0: Disabled,1: Enabled"
rgroup.long 0x508++0x03
line.long 0x00 "VALUE,Output random number"
hexmask.long.byte 0x00 0.--7. 1. "VALUE,Generated random number"
tree.end
endif
tree "RTC (Real-time Counter)"
tree "RTC0_NS"
sif cpuis("NRF5340QKAA-APP")
base ad:0x40014000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
sif cpuis("NRF5340QKAA-NET")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task TRIGOVRFLW will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGOVRFLW will subscribe to"
group.long 0xC0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[0],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[1],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
sif cpuis("NRF5340QKAA-APP")
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TICK will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event OVRFLW will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event OVRFLW will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_COMPARE[1],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_COMPARE[2],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_COMPARE[3],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_COMPARE[3],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
elif cpuis("NRF5340QKAA-NET")
base ad:0x41011000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
sif cpuis("NRF5340QKAA-NET")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task TRIGOVRFLW will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGOVRFLW will subscribe to"
group.long 0xC0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[0],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[1],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
sif cpuis("NRF5340QKAA-APP")
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TICK will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event OVRFLW will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event OVRFLW will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_COMPARE[1],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_COMPARE[2],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_COMPARE[3],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_COMPARE[3],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "RTC0_S"
base ad:0x50014000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGOVRFLW will subscribe to"
repeat 4. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event OVRFLW will publish to"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "RTC1_NS"
base ad:0x41016000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task TRIGOVRFLW will subscribe to"
repeat 4. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event OVRFLW will publish to"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "RTC1_NS"
base ad:0x40015000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGOVRFLW will subscribe to"
repeat 4. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event OVRFLW will publish to"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
tree.end
tree "RTC1_S"
base ad:0x50015000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start RTC counter"
bitfld.long 0x00 0. "TASKS_START,Start RTC counter" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop RTC counter"
bitfld.long 0x00 0. "TASKS_STOP,Stop RTC counter" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_CLEAR,Clear RTC counter"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear RTC counter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0"
bitfld.long 0x00 0. "TASKS_TRIGOVRFLW,Set counter to 0xFFFFF0" "?,1: Trigger task"
repeat 4. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture RTC counter to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture RTC counter to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_TRIGOVRFLW,Subscribe configuration for task TRIGOVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task TRIGOVRFLW will subscribe to"
repeat 4. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
group.long 0x100++0x03
line.long 0x00 "EVENTS_TICK,Event on counter increment"
bitfld.long 0x00 0. "EVENTS_TICK,Event on counter increment" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_OVRFLW,Event on counter overflow"
bitfld.long 0x00 0. "EVENTS_OVRFLW,Event on counter overflow" "0: Event not generated,1: Event generated"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TICK,Publish configuration for event TICK"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TICK will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_OVRFLW,Publish configuration for event OVRFLW"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event OVRFLW will publish to"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable interrupt for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable interrupt for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x340++0x03
line.long 0x00 "EVTEN,Enable or disable event routing"
bitfld.long 0x00 19. "COMPARE3,Enable or disable event routing for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable event routing for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable event routing for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable event routing for event COMPARE[0]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Enable or disable event routing for event OVRFLW" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "TICK,Enable or disable event routing for event TICK" "0: Disabled,1: Enabled"
group.long 0x344++0x03
line.long 0x00 "EVTENSET,Enable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to enable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to enable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
group.long 0x348++0x03
line.long 0x00 "EVTENCLR,Disable event routing"
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable event routing for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable event routing for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable event routing for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable event routing for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "OVRFLW,Write '1' to disable event routing for event OVRFLW" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TICK,Write '1' to disable event routing for event TICK" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x504++0x03
line.long 0x00 "COUNTER,Current counter value"
hexmask.long.tbyte 0x00 0.--23. 1. "COUNTER,Counter value"
group.long 0x508++0x03
line.long 0x00 "PRESCALER,12-bit prescaler for counter frequency (32768/(PRESCALER+1))"
hexmask.long.word 0x00 0.--11. 1. "PRESCALER,Prescaler value"
repeat 4. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Compare register n $1"
hexmask.long.tbyte 0x00 0.--23. 1. "COMPARE,Compare value"
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "SAADC (Analog to Digital Converter)"
tree "SAADC_NS"
base ad:0x4000E000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the ADC and prepare the result buffer in RAM"
bitfld.long 0x00 0. "TASKS_START,Start the ADC and prepare the result buffer in RAM" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled"
bitfld.long 0x00 0. "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STOP,Stop the ADC and terminate any on-going conversion"
bitfld.long 0x00 0. "TASKS_STOP,Stop the ADC and terminate any on-going conversion" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration"
bitfld.long 0x00 0. "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CALIBRATEOFFSET,Subscribe configuration for task CALIBRATEOFFSET"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CALIBRATEOFFSET will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_STARTED,The ADC has started"
bitfld.long 0x00 0. "EVENTS_STARTED,The ADC has started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,The ADC has filled up the Result buffer"
bitfld.long 0x00 0. "EVENTS_END,The ADC has filled up the Result buffer" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_DONE,A conversion task has been completed"
bitfld.long 0x00 0. "EVENTS_DONE,A conversion task has been completed" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_RESULTDONE,A result is ready to get transferred to RAM"
bitfld.long 0x00 0. "EVENTS_RESULTDONE,A result is ready to get transferred to RAM" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_CALIBRATEDONE,Calibration is complete"
bitfld.long 0x00 0. "EVENTS_CALIBRATEDONE,Calibration is complete" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_STOPPED,The ADC has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,The ADC has stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_DONE,Publish configuration for event DONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_RESULTDONE,Publish configuration for event RESULTDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RESULTDONE will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_CALIBRATEDONE,Publish configuration for event CALIBRATEDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CALIBRATEDONE will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Enable or disable interrupt for event CH7LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Enable or disable interrupt for event CH7LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Enable or disable interrupt for event CH6LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Enable or disable interrupt for event CH6LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Enable or disable interrupt for event CH5LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Enable or disable interrupt for event CH5LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Enable or disable interrupt for event CH4LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Enable or disable interrupt for event CH4LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Enable or disable interrupt for event CH3LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Enable or disable interrupt for event CH3LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Enable or disable interrupt for event CH2LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Enable or disable interrupt for event CH2LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Enable or disable interrupt for event CH1LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Enable or disable interrupt for event CH1LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Enable or disable interrupt for event CH0LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Enable or disable interrupt for event CH0LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Enable or disable interrupt for event CALIBRATEDONE" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Enable or disable interrupt for event RESULTDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "DONE,Enable or disable interrupt for event DONE" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "END,Enable or disable interrupt for event END" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Write '1' to enable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Write '1' to enable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Write '1' to enable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Write '1' to enable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Write '1' to enable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Write '1' to enable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Write '1' to enable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Write '1' to enable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Write '1' to enable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Write '1' to enable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Write '1' to enable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Write '1' to enable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Write '1' to enable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Write '1' to enable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Write '1' to enable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Write '1' to enable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Write '1' to enable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Write '1' to enable interrupt for event RESULTDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Write '1' to disable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Write '1' to disable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Write '1' to disable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Write '1' to disable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Write '1' to disable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Write '1' to disable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Write '1' to disable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Write '1' to disable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Write '1' to disable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Write '1' to disable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Write '1' to disable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Write '1' to disable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Write '1' to disable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Write '1' to disable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Write '1' to disable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Write '1' to disable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Write '1' to disable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Write '1' to disable interrupt for event RESULTDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "STATUS,Status"
bitfld.long 0x00 0. "STATUS,Status" "0: ADC is ready,1: ADC is busy"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable or disable ADC"
bitfld.long 0x00 0. "ENABLE,Enable or disable ADC" "0: Disable ADC,1: Enable ADC"
group.long 0x5F0++0x03
line.long 0x00 "RESOLUTION,Resolution configuration"
bitfld.long 0x00 0.--2. "VAL,Set the resolution" "0: 8 bit,1: 10 bit,2: 12 bit,3: 14 bit,?..."
group.long 0x5F4++0x03
line.long 0x00 "OVERSAMPLE,Oversampling configuration"
bitfld.long 0x00 0.--3. "OVERSAMPLE,Oversample control" "0: Bypass oversampling,1: Oversample 2x,2: Oversample 4x,3: Oversample 8x,4: Oversample 16x,5: Oversample 32x,6: Oversample 64x,7: Oversample 128x,8: Oversample 256x,?..."
group.long 0x5F8++0x03
line.long 0x00 "SAMPLERATE,Controls normal or continuous sample rate"
bitfld.long 0x00 12. "MODE,Select mode for sample rate control" "0: Rate is controlled from SAMPLE task,1: Rate is controlled from local timer (use CC.."
hexmask.long.word 0x00 0.--10. 1. "CC,Capture and compare value"
repeat 8. (increment 0 1)(increment 0 0x08)
tree "EVENTS_CH[$1]"
group.long ($2+0x118)++0x03
line.long 0x00 "LIMITH,Description cluster: Last results is equal or above CH[n].LIMIT.HIGH"
bitfld.long 0x00 0. "LIMITH,Last results is equal or above CH[n].LIMIT.HIGH" "0: Event not generated,1: Event generated"
group.long ($2+0x11C)++0x03
line.long 0x00 "LIMITL,Description cluster: Last results is equal or below CH[n].LIMIT.LOW"
bitfld.long 0x00 0. "LIMITL,Last results is equal or below CH[n].LIMIT.LOW" "0: Event not generated,1: Event generated"
tree.end
repeat.end
repeat 8. (increment 0 1)(increment 0 0x88)
tree "PUBLISH_CH[$1]"
group.long ($2+0x198)++0x03
line.long 0x00 "LIMITH,Description cluster: Publish configuration for event CH[n].LIMITH"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITH will publish to"
group.long ($2+0x19C)++0x03
line.long 0x00 "LIMITL,Description cluster: Publish configuration for event CH[n].LIMITL"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITL will publish to"
tree.end
repeat.end
repeat 8. (increment 0 1)(increment 0 0x408)
tree "CH[$1]"
group.long ($2+0x510)++0x03
line.long 0x00 "PSELP,Description cluster: Input positive pin selection for CH[n]"
bitfld.long 0x00 0.--4. "PSELP,Analog positive input channel" "0: Not connected,1: AnalogInput0,2: AnalogInput1,3: AnalogInput2,4: AnalogInput3,5: AnalogInput4,6: AnalogInput5,7: AnalogInput6,8: AnalogInput7,9: VDD,?,?,?,13: VDDHDIV5,?..."
group.long ($2+0x514)++0x03
line.long 0x00 "PSELN,Description cluster: Input negative pin selection for CH[n]"
bitfld.long 0x00 0.--4. "PSELN,Analog negative input enables differential channel" "0: Not connected,1: AnalogInput0,2: AnalogInput1,3: AnalogInput2,4: AnalogInput3,5: AnalogInput4,6: AnalogInput5,7: AnalogInput6,8: AnalogInput7,9: VDD,?,?,?,13: VDDHDIV5,?..."
group.long ($2+0x518)++0x03
line.long 0x00 "CONFIG,Description cluster: Input configuration for CH[n]"
bitfld.long 0x00 24. "BURST,Enable burst mode" "0: Burst mode is disabled (normal operation),1: Burst mode is enabled"
bitfld.long 0x00 20. "MODE,Enable differential mode" "0: Single ended PSELN will be ignored negative..,1: Differential"
newline
bitfld.long 0x00 16.--18. "TACQ,Acquisition time the time the ADC uses to sample the input voltage" "0: 3 us,1: 5 us,2: 10 us,3: 15 us,4: 20 us,5: 40 us,?..."
bitfld.long 0x00 12. "REFSEL,Reference control" "0: Internal reference (0.6 V),1: VDD/4 as reference"
newline
bitfld.long 0x00 8.--10. "GAIN,Gain control" "0: Gain1_6,1: Gain1_5,2: Gain1_4,3: Gain1_3,4: Gain1_2,5: Gain1,6: Gain2,7: Gain4"
bitfld.long 0x00 4.--5. "RESN,Negative channel resistor control" "0: Bypass resistor ladder,1: Pull-down to GND,2: Pull-up to VDD,3: Set input at VDD/2"
newline
bitfld.long 0x00 0.--1. "RESP,Positive channel resistor control" "0: Bypass resistor ladder,1: Pull-down to GND,2: Pull-up to VDD,3: Set input at VDD/2"
group.long ($2+0x51C)++0x03
line.long 0x00 "LIMIT,Description cluster: High/low limits for event monitoring a channel"
hexmask.long.word 0x00 16.--31. 1. "HIGH,High level limit"
hexmask.long.word 0x00 0.--15. 1. "LOW,Low level limit"
tree.end
repeat.end
tree.end
tree "SAADC_S"
base ad:0x5000E000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the ADC and prepare the result buffer in RAM"
bitfld.long 0x00 0. "TASKS_START,Start the ADC and prepare the result buffer in RAM" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled"
bitfld.long 0x00 0. "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STOP,Stop the ADC and terminate any on-going conversion"
bitfld.long 0x00 0. "TASKS_STOP,Stop the ADC and terminate any on-going conversion" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration"
bitfld.long 0x00 0. "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CALIBRATEOFFSET,Subscribe configuration for task CALIBRATEOFFSET"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CALIBRATEOFFSET will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_STARTED,The ADC has started"
bitfld.long 0x00 0. "EVENTS_STARTED,The ADC has started" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,The ADC has filled up the Result buffer"
bitfld.long 0x00 0. "EVENTS_END,The ADC has filled up the Result buffer" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_DONE,A conversion task has been completed"
bitfld.long 0x00 0. "EVENTS_DONE,A conversion task has been completed" "0: Event not generated,1: Event generated"
group.long 0x10C++0x03
line.long 0x00 "EVENTS_RESULTDONE,A result is ready to get transferred to RAM"
bitfld.long 0x00 0. "EVENTS_RESULTDONE,A result is ready to get transferred to RAM" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_CALIBRATEDONE,Calibration is complete"
bitfld.long 0x00 0. "EVENTS_CALIBRATEDONE,Calibration is complete" "0: Event not generated,1: Event generated"
group.long 0x114++0x03
line.long 0x00 "EVENTS_STOPPED,The ADC has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,The ADC has stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_DONE,Publish configuration for event DONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to"
group.long 0x18C++0x03
line.long 0x00 "PUBLISH_RESULTDONE,Publish configuration for event RESULTDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RESULTDONE will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_CALIBRATEDONE,Publish configuration for event CALIBRATEDONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CALIBRATEDONE will publish to"
group.long 0x194++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Enable or disable interrupt for event CH7LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Enable or disable interrupt for event CH7LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Enable or disable interrupt for event CH6LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Enable or disable interrupt for event CH6LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Enable or disable interrupt for event CH5LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Enable or disable interrupt for event CH5LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Enable or disable interrupt for event CH4LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Enable or disable interrupt for event CH4LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Enable or disable interrupt for event CH3LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Enable or disable interrupt for event CH3LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Enable or disable interrupt for event CH2LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Enable or disable interrupt for event CH2LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Enable or disable interrupt for event CH1LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Enable or disable interrupt for event CH1LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Enable or disable interrupt for event CH0LIMITL" "0: Disabled,1: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Enable or disable interrupt for event CH0LIMITH" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Enable or disable interrupt for event CALIBRATEDONE" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Enable or disable interrupt for event RESULTDONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 2. "DONE,Enable or disable interrupt for event DONE" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "END,Enable or disable interrupt for event END" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Write '1' to enable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Write '1' to enable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Write '1' to enable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Write '1' to enable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Write '1' to enable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Write '1' to enable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Write '1' to enable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Write '1' to enable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Write '1' to enable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Write '1' to enable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Write '1' to enable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Write '1' to enable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Write '1' to enable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Write '1' to enable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Write '1' to enable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Write '1' to enable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Write '1' to enable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Write '1' to enable interrupt for event RESULTDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "CH7LIMITL,Write '1' to disable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "CH7LIMITH,Write '1' to disable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "CH6LIMITL,Write '1' to disable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "CH6LIMITH,Write '1' to disable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "CH5LIMITL,Write '1' to disable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "CH5LIMITH,Write '1' to disable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 15. "CH4LIMITL,Write '1' to disable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 14. "CH4LIMITH,Write '1' to disable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 13. "CH3LIMITL,Write '1' to disable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 12. "CH3LIMITH,Write '1' to disable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 11. "CH2LIMITL,Write '1' to disable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 10. "CH2LIMITH,Write '1' to disable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "CH1LIMITL,Write '1' to disable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "CH1LIMITH,Write '1' to disable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "CH0LIMITL,Write '1' to disable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 6. "CH0LIMITH,Write '1' to disable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 5. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "CALIBRATEDONE,Write '1' to disable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 3. "RESULTDONE,Write '1' to disable interrupt for event RESULTDONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 2. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "STATUS,Status"
bitfld.long 0x00 0. "STATUS,Status" "0: ADC is ready,1: ADC is busy"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable or disable ADC"
bitfld.long 0x00 0. "ENABLE,Enable or disable ADC" "0: Disable ADC,1: Enable ADC"
group.long 0x5F0++0x03
line.long 0x00 "RESOLUTION,Resolution configuration"
bitfld.long 0x00 0.--2. "VAL,Set the resolution" "0: 8 bit,1: 10 bit,2: 12 bit,3: 14 bit,?..."
group.long 0x5F4++0x03
line.long 0x00 "OVERSAMPLE,Oversampling configuration"
bitfld.long 0x00 0.--3. "OVERSAMPLE,Oversample control" "0: Bypass oversampling,1: Oversample 2x,2: Oversample 4x,3: Oversample 8x,4: Oversample 16x,5: Oversample 32x,6: Oversample 64x,7: Oversample 128x,8: Oversample 256x,?..."
group.long 0x5F8++0x03
line.long 0x00 "SAMPLERATE,Controls normal or continuous sample rate"
bitfld.long 0x00 12. "MODE,Select mode for sample rate control" "0: Rate is controlled from SAMPLE task,1: Rate is controlled from local timer (use CC.."
hexmask.long.word 0x00 0.--10. 1. "CC,Capture and compare value"
repeat 8. (increment 0 1)(increment 0 0x08)
tree "EVENTS_CH[$1]"
group.long ($2+0x118)++0x03
line.long 0x00 "LIMITH,Description cluster: Last results is equal or above CH[n].LIMIT.HIGH"
bitfld.long 0x00 0. "LIMITH,Last results is equal or above CH[n].LIMIT.HIGH" "0: Event not generated,1: Event generated"
group.long ($2+0x11C)++0x03
line.long 0x00 "LIMITL,Description cluster: Last results is equal or below CH[n].LIMIT.LOW"
bitfld.long 0x00 0. "LIMITL,Last results is equal or below CH[n].LIMIT.LOW" "0: Event not generated,1: Event generated"
tree.end
repeat.end
repeat 8. (increment 0 1)(increment 0 0x88)
tree "PUBLISH_CH[$1]"
group.long ($2+0x198)++0x03
line.long 0x00 "LIMITH,Description cluster: Publish configuration for event CH[n].LIMITH"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITH will publish to"
group.long ($2+0x19C)++0x03
line.long 0x00 "LIMITL,Description cluster: Publish configuration for event CH[n].LIMITL"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITL will publish to"
tree.end
repeat.end
repeat 8. (increment 0 1)(increment 0 0x408)
tree "CH[$1]"
group.long ($2+0x510)++0x03
line.long 0x00 "PSELP,Description cluster: Input positive pin selection for CH[n]"
bitfld.long 0x00 0.--4. "PSELP,Analog positive input channel" "0: Not connected,1: AnalogInput0,2: AnalogInput1,3: AnalogInput2,4: AnalogInput3,5: AnalogInput4,6: AnalogInput5,7: AnalogInput6,8: AnalogInput7,9: VDD,?,?,?,13: VDDHDIV5,?..."
group.long ($2+0x514)++0x03
line.long 0x00 "PSELN,Description cluster: Input negative pin selection for CH[n]"
bitfld.long 0x00 0.--4. "PSELN,Analog negative input enables differential channel" "0: Not connected,1: AnalogInput0,2: AnalogInput1,3: AnalogInput2,4: AnalogInput3,5: AnalogInput4,6: AnalogInput5,7: AnalogInput6,8: AnalogInput7,9: VDD,?,?,?,13: VDDHDIV5,?..."
group.long ($2+0x518)++0x03
line.long 0x00 "CONFIG,Description cluster: Input configuration for CH[n]"
bitfld.long 0x00 24. "BURST,Enable burst mode" "0: Burst mode is disabled (normal operation),1: Burst mode is enabled"
bitfld.long 0x00 20. "MODE,Enable differential mode" "0: Single ended PSELN will be ignored negative..,1: Differential"
newline
bitfld.long 0x00 16.--18. "TACQ,Acquisition time the time the ADC uses to sample the input voltage" "0: 3 us,1: 5 us,2: 10 us,3: 15 us,4: 20 us,5: 40 us,?..."
bitfld.long 0x00 12. "REFSEL,Reference control" "0: Internal reference (0.6 V),1: VDD/4 as reference"
newline
bitfld.long 0x00 8.--10. "GAIN,Gain control" "0: Gain1_6,1: Gain1_5,2: Gain1_4,3: Gain1_3,4: Gain1_2,5: Gain1,6: Gain2,7: Gain4"
bitfld.long 0x00 4.--5. "RESN,Negative channel resistor control" "0: Bypass resistor ladder,1: Pull-down to GND,2: Pull-up to VDD,3: Set input at VDD/2"
newline
bitfld.long 0x00 0.--1. "RESP,Positive channel resistor control" "0: Bypass resistor ladder,1: Pull-down to GND,2: Pull-up to VDD,3: Set input at VDD/2"
group.long ($2+0x51C)++0x03
line.long 0x00 "LIMIT,Description cluster: High/low limits for event monitoring a channel"
hexmask.long.word 0x00 16.--31. 1. "HIGH,High level limit"
hexmask.long.word 0x00 0.--15. 1. "LOW,Low level limit"
tree.end
repeat.end
tree.end
tree.end
endif
tree "SPIM (Serial Peripheral Interface Master with EasyDMA)"
sif cpuis("NRF5340QKAA-NET")
tree "SPIM0_NS"
base ad:0x41013000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "SPIM0_NS"
base ad:0x40008000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM0_S"
base ad:0x50008000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM1_NS"
base ad:0x40009000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM1_S"
base ad:0x50009000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM2_NS"
base ad:0x4000B000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM2_S"
base ad:0x5000B000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM3_NS"
base ad:0x4000C000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM3_S"
base ad:0x5000C000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM4_NS"
base ad:0x4000A000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
tree "SPIM4_S"
base ad:0x5000A000
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_START,Start SPI transaction"
bitfld.long 0x00 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop SPI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend SPI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume SPI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,SPI transaction has stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x118++0x03
line.long 0x00 "EVENTS_END,End of RXD buffer and TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,End of TXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDTX,End of TXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_STARTED,Transaction started"
bitfld.long 0x00 0. "EVENTS_STARTED,Transaction started" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x198++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 19. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "STALLSTAT,Stall status for EasyDMA RAM accesses"
bitfld.long 0x00 1. "RX,Stall status for EasyDMA RAM writes" "0: No stall,1: A stall has occurred"
bitfld.long 0x00 0. "TX,Stall status for EasyDMA RAM reads" "0: No stall,1: A stall has occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPIM" "0: Disable SPIM,?,?,?,?,?,?,7: Enable SPIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,SPI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,SPI master data rate"
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x568++0x03
line.long 0x00 "CSNPOL,Polarity of CSN output"
bitfld.long 0x00 0. "CSNPOL,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)"
group.long 0x56C++0x03
line.long 0x00 "PSELDCX,Pin select for DCX signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x570++0x03
line.long 0x00 "DCXCNT,DCX configuration"
bitfld.long 0x00 0.--3. "DCXCNT,This register specifies the number of command bytes preceding the data bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "IFTIMING"
group.long 0x560++0x03
line.long 0x00 "RXDELAY,Sample delay for input serial data on MISO"
bitfld.long 0x00 0.--2. "RXDELAY,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
group.long 0x564++0x03
line.long 0x00 "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
hexmask.long.byte 0x00 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions"
tree.end
tree.end
endif
tree.end
tree "SPIS (Serial Peripheral Interface Slave with EasyDMA)"
sif cpuis("NRF5340QKAA-NET")
tree "SPIS0_NS"
base ad:0x41013000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "SPIS0_NS"
base ad:0x40008000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS0_S"
base ad:0x50008000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS1_NS"
base ad:0x40009000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS1_S"
base ad:0x50009000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS2_NS"
base ad:0x4000B000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS2_S"
base ad:0x5000B000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS3_NS"
base ad:0x4000C000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "SPIS3_S"
base ad:0x5000C000
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_ACQUIRE,Acquire SPI semaphore"
bitfld.long 0x00 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task"
wgroup.long 0x28++0x03
line.long 0x00 "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it"
bitfld.long 0x00 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task"
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to"
group.long 0xA8++0x03
line.long 0x00 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_END,Granted transaction completed"
bitfld.long 0x00 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,End of RXD buffer reached"
bitfld.long 0x00 0. "EVENTS_ENDRX,End of RXD buffer reached" "0: Event not generated,1: Event generated"
group.long 0x128++0x03
line.long 0x00 "EVENTS_ACQUIRED,Semaphore acquired"
bitfld.long 0x00 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_END,Publish configuration for event END"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event END will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 10. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "SEMSTAT,Semaphore status register"
bitfld.long 0x00 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover.."
group.long 0x440++0x03
line.long 0x00 "STATUS,Status from last transaction"
bitfld.long 0x00 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable SPI slave"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable SPI slave" "0: Disable SPI slave,?,2: Enable SPI slave,?..."
group.long 0x554++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low"
bitfld.long 0x00 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.."
newline
bitfld.long 0x00 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first"
group.long 0x55C++0x03
line.long 0x00 "DEF,Default character"
hexmask.long.byte 0x00 0.--7. 1. "DEF,Default character"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCK,Pin select for SCK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "MISO,Pin select for MISO signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "MOSI,Pin select for MOSI signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "CSN,Pin select for CSN signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes received in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes received in the last granted transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transmitted in last granted transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transmitted in last granted transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "SPU (System Protection Unit)"
base ad:0x50003000
group.long 0x100++0x03
line.long 0x00 "EVENTS_RAMACCERR,A security violation has been detected for the RAM memory space"
bitfld.long 0x00 0. "EVENTS_RAMACCERR,A security violation has been detected for the RAM memory space" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_FLASHACCERR,A security violation has been detected for the flash memory space"
bitfld.long 0x00 0. "EVENTS_FLASHACCERR,A security violation has been detected for the flash memory space" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals"
bitfld.long 0x00 0. "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_RAMACCERR,Publish configuration for event RAMACCERR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RAMACCERR will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_FLASHACCERR,Publish configuration for event FLASHACCERR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event FLASHACCERR will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_PERIPHACCERR,Publish configuration for event PERIPHACCERR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event PERIPHACCERR will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "PERIPHACCERR,Enable or disable interrupt for event PERIPHACCERR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "FLASHACCERR,Enable or disable interrupt for event FLASHACCERR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "RAMACCERR,Enable or disable interrupt for event RAMACCERR" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "PERIPHACCERR,Write '1' to enable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FLASHACCERR,Write '1' to enable interrupt for event FLASHACCERR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "RAMACCERR,Write '1' to enable interrupt for event RAMACCERR" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "PERIPHACCERR,Write '1' to disable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "FLASHACCERR,Write '1' to disable interrupt for event FLASHACCERR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "RAMACCERR,Write '1' to disable interrupt for event RAMACCERR" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "CAP,Show implemented features for the current device"
bitfld.long 0x00 0. "TZM,Show ARM TrustZone status" "0: ARM TrustZone support not available,1: ARM TrustZone support is available"
group.long 0x404++0x03
line.long 0x00 "CPULOCK,Configure bits to lock down CPU features at runtime"
bitfld.long 0x00 4. "LOCKSAU,Write '1' to prevent updating the secure SAU regions until the next reset" "0: These registers can be updated,1: Disables writes to the SAU_CTRL SAU_RNR.."
bitfld.long 0x00 3. "LOCKNSMPU,Write '1' to prevent updating the Non-secure MPU regions until the next reset" "0: These registers can be updated,1: Disables writes to the MPU_CTRL_NS MPU_RNR_NS.."
newline
bitfld.long 0x00 2. "LOCKSMPU,Write '1' to prevent updating the secure MPU regions until the next reset" "0: These registers can be updated,1: Disables writes to the MPU_CTRL MPU_RNR.."
bitfld.long 0x00 1. "LOCKNSVTOR,Write '1' to prevent updating the non-secure vector table base address until the next reset" "0: The address of the non-secure vector table..,1: The address of the non-secure vector table is.."
newline
bitfld.long 0x00 0. "LOCKSVTAIRCR,Write '1' to prevent updating the secure interrupt configuration until the next reset" "0: These registers can be updated,1: Disables writes to the VTOR_S AIRCR.PRIS and.."
tree "EXTDOMAIN[0]"
group.long 0x440++0x03
line.long 0x00 "PERM,Description cluster: Access for bus access generated from the external domain n List capabilities of the external domain n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 4. "SECATTR,Peripheral security mapping" "0: Bus accesses from this domain have the..,1: Bus accesses from this domain have secure.."
newline
rbitfld.long 0x00 0.--1. "SECUREMAPPING,Define configuration capabilities for TrustZone Cortex-M secure attribute" "0: The bus access from this external domain..,1: The bus access from this external domain..,2: Non-secure or secure attribute for bus access..,?..."
tree.end
tree "DPPI[0]"
group.long 0x480++0x03
line.long 0x00 "PERM,Description cluster: Select between secure and non-secure attribute for the DPPI channels"
bitfld.long 0x00 31. "CHANNEL31,Select secure attribute" "0: Channel31 has its non-secure attribute set,1: Channel31 has its secure attribute set"
bitfld.long 0x00 30. "CHANNEL30,Select secure attribute" "0: Channel30 has its non-secure attribute set,1: Channel30 has its secure attribute set"
newline
bitfld.long 0x00 29. "CHANNEL29,Select secure attribute" "0: Channel29 has its non-secure attribute set,1: Channel29 has its secure attribute set"
bitfld.long 0x00 28. "CHANNEL28,Select secure attribute" "0: Channel28 has its non-secure attribute set,1: Channel28 has its secure attribute set"
newline
bitfld.long 0x00 27. "CHANNEL27,Select secure attribute" "0: Channel27 has its non-secure attribute set,1: Channel27 has its secure attribute set"
bitfld.long 0x00 26. "CHANNEL26,Select secure attribute" "0: Channel26 has its non-secure attribute set,1: Channel26 has its secure attribute set"
newline
bitfld.long 0x00 25. "CHANNEL25,Select secure attribute" "0: Channel25 has its non-secure attribute set,1: Channel25 has its secure attribute set"
bitfld.long 0x00 24. "CHANNEL24,Select secure attribute" "0: Channel24 has its non-secure attribute set,1: Channel24 has its secure attribute set"
newline
bitfld.long 0x00 23. "CHANNEL23,Select secure attribute" "0: Channel23 has its non-secure attribute set,1: Channel23 has its secure attribute set"
bitfld.long 0x00 22. "CHANNEL22,Select secure attribute" "0: Channel22 has its non-secure attribute set,1: Channel22 has its secure attribute set"
newline
bitfld.long 0x00 21. "CHANNEL21,Select secure attribute" "0: Channel21 has its non-secure attribute set,1: Channel21 has its secure attribute set"
bitfld.long 0x00 20. "CHANNEL20,Select secure attribute" "0: Channel20 has its non-secure attribute set,1: Channel20 has its secure attribute set"
newline
bitfld.long 0x00 19. "CHANNEL19,Select secure attribute" "0: Channel19 has its non-secure attribute set,1: Channel19 has its secure attribute set"
bitfld.long 0x00 18. "CHANNEL18,Select secure attribute" "0: Channel18 has its non-secure attribute set,1: Channel18 has its secure attribute set"
newline
bitfld.long 0x00 17. "CHANNEL17,Select secure attribute" "0: Channel17 has its non-secure attribute set,1: Channel17 has its secure attribute set"
bitfld.long 0x00 16. "CHANNEL16,Select secure attribute" "0: Channel16 has its non-secure attribute set,1: Channel16 has its secure attribute set"
newline
bitfld.long 0x00 15. "CHANNEL15,Select secure attribute" "0: Channel15 has its non-secure attribute set,1: Channel15 has its secure attribute set"
bitfld.long 0x00 14. "CHANNEL14,Select secure attribute" "0: Channel14 has its non-secure attribute set,1: Channel14 has its secure attribute set"
newline
bitfld.long 0x00 13. "CHANNEL13,Select secure attribute" "0: Channel13 has its non-secure attribute set,1: Channel13 has its secure attribute set"
bitfld.long 0x00 12. "CHANNEL12,Select secure attribute" "0: Channel12 has its non-secure attribute set,1: Channel12 has its secure attribute set"
newline
bitfld.long 0x00 11. "CHANNEL11,Select secure attribute" "0: Channel11 has its non-secure attribute set,1: Channel11 has its secure attribute set"
bitfld.long 0x00 10. "CHANNEL10,Select secure attribute" "0: Channel10 has its non-secure attribute set,1: Channel10 has its secure attribute set"
newline
bitfld.long 0x00 9. "CHANNEL9,Select secure attribute" "0: Channel9 has its non-secure attribute set,1: Channel9 has its secure attribute set"
bitfld.long 0x00 8. "CHANNEL8,Select secure attribute" "0: Channel8 has its non-secure attribute set,1: Channel8 has its secure attribute set"
newline
bitfld.long 0x00 7. "CHANNEL7,Select secure attribute" "0: Channel7 has its non-secure attribute set,1: Channel7 has its secure attribute set"
bitfld.long 0x00 6. "CHANNEL6,Select secure attribute" "0: Channel6 has its non-secure attribute set,1: Channel6 has its secure attribute set"
newline
bitfld.long 0x00 5. "CHANNEL5,Select secure attribute" "0: Channel5 has its non-secure attribute set,1: Channel5 has its secure attribute set"
bitfld.long 0x00 4. "CHANNEL4,Select secure attribute" "0: Channel4 has its non-secure attribute set,1: Channel4 has its secure attribute set"
newline
bitfld.long 0x00 3. "CHANNEL3,Select secure attribute" "0: Channel3 has its non-secure attribute set,1: Channel3 has its secure attribute set"
bitfld.long 0x00 2. "CHANNEL2,Select secure attribute" "0: Channel2 has its non-secure attribute set,1: Channel2 has its secure attribute set"
newline
bitfld.long 0x00 1. "CHANNEL1,Select secure attribute" "0: Channel1 has its non-secure attribute set,1: Channel1 has its secure attribute set"
bitfld.long 0x00 0. "CHANNEL0,Select secure attribute" "0: Channel0 has its non-secure attribute set,1: Channel0 has its secure attribute set"
group.long 0x484++0x03
line.long 0x00 "LOCK,Description cluster: Prevent further modification of the corresponding PERM register"
bitfld.long 0x00 0. "LOCK," "0: DPPI[n].PERM register content can be changed,1: DPPI[n].PERM register can't be changed until.."
tree.end
repeat 2. (increment 0 1)(increment 0 0x88)
tree "GPIOPORT[$1]"
group.long ($2+0x4C0)++0x03
line.long 0x00 "PERM,Description cluster: Select between secure and non-secure attribute for pins 0 to 31 of port n"
bitfld.long 0x00 31. "PIN31,Select secure attribute attribute for PIN 31" "0: Pin 31 has its non-secure attribute set,1: Pin 31 has its secure attribute set"
bitfld.long 0x00 30. "PIN30,Select secure attribute attribute for PIN 30" "0: Pin 30 has its non-secure attribute set,1: Pin 30 has its secure attribute set"
newline
bitfld.long 0x00 29. "PIN29,Select secure attribute attribute for PIN 29" "0: Pin 29 has its non-secure attribute set,1: Pin 29 has its secure attribute set"
bitfld.long 0x00 28. "PIN28,Select secure attribute attribute for PIN 28" "0: Pin 28 has its non-secure attribute set,1: Pin 28 has its secure attribute set"
newline
bitfld.long 0x00 27. "PIN27,Select secure attribute attribute for PIN 27" "0: Pin 27 has its non-secure attribute set,1: Pin 27 has its secure attribute set"
bitfld.long 0x00 26. "PIN26,Select secure attribute attribute for PIN 26" "0: Pin 26 has its non-secure attribute set,1: Pin 26 has its secure attribute set"
newline
bitfld.long 0x00 25. "PIN25,Select secure attribute attribute for PIN 25" "0: Pin 25 has its non-secure attribute set,1: Pin 25 has its secure attribute set"
bitfld.long 0x00 24. "PIN24,Select secure attribute attribute for PIN 24" "0: Pin 24 has its non-secure attribute set,1: Pin 24 has its secure attribute set"
newline
bitfld.long 0x00 23. "PIN23,Select secure attribute attribute for PIN 23" "0: Pin 23 has its non-secure attribute set,1: Pin 23 has its secure attribute set"
bitfld.long 0x00 22. "PIN22,Select secure attribute attribute for PIN 22" "0: Pin 22 has its non-secure attribute set,1: Pin 22 has its secure attribute set"
newline
bitfld.long 0x00 21. "PIN21,Select secure attribute attribute for PIN 21" "0: Pin 21 has its non-secure attribute set,1: Pin 21 has its secure attribute set"
bitfld.long 0x00 20. "PIN20,Select secure attribute attribute for PIN 20" "0: Pin 20 has its non-secure attribute set,1: Pin 20 has its secure attribute set"
newline
bitfld.long 0x00 19. "PIN19,Select secure attribute attribute for PIN 19" "0: Pin 19 has its non-secure attribute set,1: Pin 19 has its secure attribute set"
bitfld.long 0x00 18. "PIN18,Select secure attribute attribute for PIN 18" "0: Pin 18 has its non-secure attribute set,1: Pin 18 has its secure attribute set"
newline
bitfld.long 0x00 17. "PIN17,Select secure attribute attribute for PIN 17" "0: Pin 17 has its non-secure attribute set,1: Pin 17 has its secure attribute set"
bitfld.long 0x00 16. "PIN16,Select secure attribute attribute for PIN 16" "0: Pin 16 has its non-secure attribute set,1: Pin 16 has its secure attribute set"
newline
bitfld.long 0x00 15. "PIN15,Select secure attribute attribute for PIN 15" "0: Pin 15 has its non-secure attribute set,1: Pin 15 has its secure attribute set"
bitfld.long 0x00 14. "PIN14,Select secure attribute attribute for PIN 14" "0: Pin 14 has its non-secure attribute set,1: Pin 14 has its secure attribute set"
newline
bitfld.long 0x00 13. "PIN13,Select secure attribute attribute for PIN 13" "0: Pin 13 has its non-secure attribute set,1: Pin 13 has its secure attribute set"
bitfld.long 0x00 12. "PIN12,Select secure attribute attribute for PIN 12" "0: Pin 12 has its non-secure attribute set,1: Pin 12 has its secure attribute set"
newline
bitfld.long 0x00 11. "PIN11,Select secure attribute attribute for PIN 11" "0: Pin 11 has its non-secure attribute set,1: Pin 11 has its secure attribute set"
bitfld.long 0x00 10. "PIN10,Select secure attribute attribute for PIN 10" "0: Pin 10 has its non-secure attribute set,1: Pin 10 has its secure attribute set"
newline
bitfld.long 0x00 9. "PIN9,Select secure attribute attribute for PIN 9" "0: Pin 9 has its non-secure attribute set,1: Pin 9 has its secure attribute set"
bitfld.long 0x00 8. "PIN8,Select secure attribute attribute for PIN 8" "0: Pin 8 has its non-secure attribute set,1: Pin 8 has its secure attribute set"
newline
bitfld.long 0x00 7. "PIN7,Select secure attribute attribute for PIN 7" "0: Pin 7 has its non-secure attribute set,1: Pin 7 has its secure attribute set"
bitfld.long 0x00 6. "PIN6,Select secure attribute attribute for PIN 6" "0: Pin 6 has its non-secure attribute set,1: Pin 6 has its secure attribute set"
newline
bitfld.long 0x00 5. "PIN5,Select secure attribute attribute for PIN 5" "0: Pin 5 has its non-secure attribute set,1: Pin 5 has its secure attribute set"
bitfld.long 0x00 4. "PIN4,Select secure attribute attribute for PIN 4" "0: Pin 4 has its non-secure attribute set,1: Pin 4 has its secure attribute set"
newline
bitfld.long 0x00 3. "PIN3,Select secure attribute attribute for PIN 3" "0: Pin 3 has its non-secure attribute set,1: Pin 3 has its secure attribute set"
bitfld.long 0x00 2. "PIN2,Select secure attribute attribute for PIN 2" "0: Pin 2 has its non-secure attribute set,1: Pin 2 has its secure attribute set"
newline
bitfld.long 0x00 1. "PIN1,Select secure attribute attribute for PIN 1" "0: Pin 1 has its non-secure attribute set,1: Pin 1 has its secure attribute set"
bitfld.long 0x00 0. "PIN0,Select secure attribute attribute for PIN 0" "0: Pin 0 has its non-secure attribute set,1: Pin 0 has its secure attribute set"
group.long ($2+0x4C4)++0x03
line.long 0x00 "LOCK,Description cluster: Prevent further modification of the corresponding PERM register"
bitfld.long 0x00 0. "LOCK," "0: GPIOPORT[n].PERM register content can be..,1: GPIOPORT[n].PERM register can't be changed.."
tree.end
repeat.end
repeat 2. (increment 0 1)(increment 0 0xC8)
tree "FLASHNSC[$1]"
group.long ($2+0x500)++0x03
line.long 0x00 "REGION,Description cluster: Define which flash region can contain the non-secure callable (NSC) region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 0.--5. "REGION,Region number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long ($2+0x504)++0x03
line.long 0x00 "SIZE,Description cluster: Define the size of the non-secure callable (NSC) region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 0.--3. "SIZE,Size of the non-secure callable (NSC) region n" "0: The region n is not defined as a non-secure..,1: The region n is defined as non-secure..,2: The region n is defined as non-secure..,3: The region n is defined as non-secure..,4: The region n is defined as non-secure..,5: The region n is defined as non-secure..,6: The region n is defined as non-secure..,7: The region n is defined as non-secure..,8: The region n is defined as non-secure..,?..."
tree.end
repeat.end
repeat 2. (increment 0 1)(increment 0 0x108)
tree "RAMNSC[$1]"
group.long ($2+0x540)++0x03
line.long 0x00 "REGION,Description cluster: Define which RAM region can contain the non-secure callable (NSC) region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 0.--5. "REGION,Region number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long ($2+0x544)++0x03
line.long 0x00 "SIZE,Description cluster: Define the size of the non-secure callable (NSC) region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 0.--3. "SIZE,Size of the non-secure callable (NSC) region n" "0: The region n is not defined as a non-secure..,1: The region n is defined as non-secure..,2: The region n is defined as non-secure..,3: The region n is defined as non-secure..,4: The region n is defined as non-secure..,5: The region n is defined as non-secure..,6: The region n is defined as non-secure..,7: The region n is defined as non-secure..,8: The region n is defined as non-secure..,?..."
tree.end
repeat.end
repeat 64. (increment 0 1)(increment 0 0x1C4)
tree "FLASHREGION[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "PERM,Description cluster: Access permissions for flash region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 4. "SECATTR,Security attribute for flash region n" "0: Flash region n security attribute is non-secure,1: Flash region n security attribute is secure"
newline
bitfld.long 0x00 2. "READ,Configure read permissions for flash region n" "0: Block read operation from flash region n,1: Allow read operation from flash region n"
bitfld.long 0x00 1. "WRITE,Configure write permission for flash region n" "0: Block write operation to region n,1: Allow write operation to region n"
newline
bitfld.long 0x00 0. "EXECUTE,Configure instruction fetch permissions from flash region n" "0: Block instruction fetches from flash region n,1: Allow instruction fetches from flash region n"
tree.end
repeat.end
repeat 64. (increment 0 1)(increment 0 0x2C4)
tree "RAMREGION[$1]"
group.long ($2+0x700)++0x03
line.long 0x00 "PERM,Description cluster: Access permissions for RAM region n"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
bitfld.long 0x00 4. "SECATTR,Security attribute for RAM region n" "0: RAM region n security attribute is non-secure,1: RAM region n security attribute is secure"
newline
bitfld.long 0x00 2. "READ,Configure read permissions for RAM region n" "0: Block read operation from RAM region n,1: Allow read operation from RAM region n"
bitfld.long 0x00 1. "WRITE,Configure write permission for RAM region n" "0: Block write operation to RAM region n,1: Allow write operation to RAM region n"
newline
bitfld.long 0x00 0. "EXECUTE,Configure instruction fetch permissions from RAM region n" "0: Block instruction fetches from RAM region n,1: Allow instruction fetches from RAM region n"
tree.end
repeat.end
repeat 256. (increment 0 1)(increment 0 0x3C4)
tree "PERIPHID[$1]"
group.long ($2+0x800)++0x03
line.long 0x00 "PERM,Description cluster: List capabilities and access permissions for the peripheral with ID n"
rbitfld.long 0x00 31. "PRESENT,Indicate if a peripheral is present with ID n" "0: Peripheral is not present,1: Peripheral is present"
bitfld.long 0x00 8. "LOCK," "0: This register can be updated,1: The content of this register can't be changed.."
newline
bitfld.long 0x00 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral..,1: DMA transfers initiated by this peripheral.."
bitfld.long 0x00 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable,1: Peripheral is mapped in secure peripheral.."
newline
rbitfld.long 0x00 2.--3. "DMA,Indicate if the peripheral has DMA capabilities and if DMA transfer can be assigned to a different security attribute than the peripheral itself" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always..,2: Peripheral has DMA and DMA transfers can have..,?..."
rbitfld.long 0x00 0.--1. "SECUREMAPPING,Define configuration capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.."
tree.end
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "SWI (Software Interrupt)"
tree "SWI0_NS"
base ad:0x4101A000
rgroup.long 0x00++0x03
line.long 0x00 "UNUSED,Unused"
tree.end
tree "SWI1_NS"
base ad:0x4101B000
rgroup.long 0x00++0x03
line.long 0x00 "UNUSED,Unused"
tree.end
tree "SWI2_NS"
base ad:0x4101C000
rgroup.long 0x00++0x03
line.long 0x00 "UNUSED,Unused"
tree.end
tree "SWI3_NS"
base ad:0x4101D000
rgroup.long 0x00++0x03
line.long 0x00 "UNUSED,Unused"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "TAD (Trace and Debug Control)"
base ad:0xE0080000
wgroup.long 0x04++0x03
line.long 0x00 "CLOCKSTART,Start all trace and debug clocks"
bitfld.long 0x00 0. "START," "?,1: Start all trace and debug clocks"
wgroup.long 0x08++0x03
line.long 0x00 "CLOCKSTOP,Stop all trace and debug clocks"
bitfld.long 0x00 0. "STOP," "?,1: Stop all trace and debug clocks"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable debug domain and aquire selected GPIOs"
bitfld.long 0x00 0. "ENABLE," "0: Disable debug domain and release selected GPIOs,1: Enable debug domain and aquire selected GPIOs"
group.long 0x518++0x03
line.long 0x00 "TRACEPORTSPEED,Clocking options for the Trace Port debug interface"
bitfld.long 0x00 0.--1. "TRACEPORTSPEED,Speed of Trace Port clock" "0: Trace Port clock is,1: Trace Port clock is,2: Trace Port clock is,3: Trace Port clock is"
tree "PSEL"
group.long 0x504++0x03
line.long 0x00 "TRACECLK,Pin configuration for TRACECLK"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 0.--4. "PIN,Pin number" "?,?,?,?,?,?,?,?,?,?,?,?,12: TRACECLK pin,?..."
group.long 0x508++0x03
line.long 0x00 "TRACEDATA0,Pin configuration for TRACEDATA[0] and SWO"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 0.--4. "PIN,Pin number" "?,?,?,?,?,?,?,?,?,?,?,11: TRACEDATA0/SWO pin,?..."
group.long 0x50C++0x03
line.long 0x00 "TRACEDATA1,Pin configuration for TRACEDATA[1]"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 0.--4. "PIN,Pin number" "?,?,?,?,?,?,?,?,?,?,10: TRACEDATA1 pin,?..."
group.long 0x510++0x03
line.long 0x00 "TRACEDATA2,Pin configuration for TRACEDATA[2]"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 0.--4. "PIN,Pin number" "?,?,?,?,?,?,?,?,?,9: TRACEDATA2 pin,?..."
group.long 0x514++0x03
line.long 0x00 "TRACEDATA3,Pin configuration for TRACEDATA[3]"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 0.--4. "PIN,Pin number" "?,?,?,?,?,?,?,?,8: TRACEDATA3 pin,?..."
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "TEMP (Temperature Sensor)"
base ad:0x41010000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start temperature measurement"
bitfld.long 0x00 0. "TASKS_START,Start temperature measurement" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop temperature measurement"
bitfld.long 0x00 0. "TASKS_STOP,Stop temperature measurement" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_DATARDY,Temperature measurement complete data ready"
bitfld.long 0x00 0. "EVENTS_DATARDY,Temperature measurement complete data ready" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_DATARDY,Publish configuration for event DATARDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event DATARDY will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 0. "DATARDY,Write '1' to enable interrupt for event DATARDY" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 0. "DATARDY,Write '1' to disable interrupt for event DATARDY" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x508++0x03
line.long 0x00 "TEMP,Temperature in degC (0.25deg steps)"
hexmask.long 0x00 0.--31. 1. "TEMP,Temperature in degC (0.25deg steps)"
group.long 0x520++0x03
line.long 0x00 "A0,Slope of 1st piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A0,Slope of 1st piece wise linear function"
group.long 0x524++0x03
line.long 0x00 "A1,Slope of 2nd piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A1,Slope of 2nd piece wise linear function"
group.long 0x528++0x03
line.long 0x00 "A2,Slope of 3rd piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A2,Slope of 3rd piece wise linear function"
group.long 0x52C++0x03
line.long 0x00 "A3,Slope of 4th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A3,Slope of 4th piece wise linear function"
group.long 0x530++0x03
line.long 0x00 "A4,Slope of 5th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A4,Slope of 5th piece wise linear function"
group.long 0x534++0x03
line.long 0x00 "A5,Slope of 6th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "A5,Slope of 6th piece wise linear function"
group.long 0x540++0x03
line.long 0x00 "B0,y-intercept of 1st piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B0,y-intercept of 1st piece wise linear function"
group.long 0x544++0x03
line.long 0x00 "B1,y-intercept of 2nd piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B1,y-intercept of 2nd piece wise linear function"
group.long 0x548++0x03
line.long 0x00 "B2,y-intercept of 3rd piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B2,y-intercept of 3rd piece wise linear function"
group.long 0x54C++0x03
line.long 0x00 "B3,y-intercept of 4th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B3,y-intercept of 4th piece wise linear function"
group.long 0x550++0x03
line.long 0x00 "B4,y-intercept of 5th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B4,y-intercept of 5th piece wise linear function"
group.long 0x554++0x03
line.long 0x00 "B5,y-intercept of 6th piece wise linear function"
hexmask.long.word 0x00 0.--11. 1. "B5,y-intercept of 6th piece wise linear function"
group.long 0x560++0x03
line.long 0x00 "T0,End point of 1st piece wise linear function"
hexmask.long.byte 0x00 0.--7. 1. "T0,End point of 1st piece wise linear function"
group.long 0x564++0x03
line.long 0x00 "T1,End point of 2nd piece wise linear function"
hexmask.long.byte 0x00 0.--7. 1. "T1,End point of 2nd piece wise linear function"
group.long 0x568++0x03
line.long 0x00 "T2,End point of 3rd piece wise linear function"
hexmask.long.byte 0x00 0.--7. 1. "T2,End point of 3rd piece wise linear function"
group.long 0x56C++0x03
line.long 0x00 "T3,End point of 4th piece wise linear function"
hexmask.long.byte 0x00 0.--7. 1. "T3,End point of 4th piece wise linear function"
group.long 0x570++0x03
line.long 0x00 "T4,End point of 5th piece wise linear function"
hexmask.long.byte 0x00 0.--7. 1. "T4,End point of 5th piece wise linear function"
tree.end
endif
tree "TIMER (Timer/Counter)"
tree "TIMER0_NS"
sif cpuis("NRF5340QKAA-APP")
base ad:0x4000F000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
endif
repeat.end
sif cpuis("NRF5340QKAA-NET")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task COUNT will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SHUTDOWN will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
group.long 0xC0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[0],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[1],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[4],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[4],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[5],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[5],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xD8)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
endif
repeat.end
sif cpuis("NRF5340QKAA-APP")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C8)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1CC)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_COMPARE[4],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1D4++0x03
line.long 0x00 "PUBLISH_COMPARE[5],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 3. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1D4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
sif cpuis("NRF5340QKAA-NET")
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
endif
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
endif
repeat.end
elif cpuis("NRF5340QKAA-NET")
base ad:0x4100C000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
endif
repeat.end
sif cpuis("NRF5340QKAA-NET")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task COUNT will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SHUTDOWN will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
group.long 0xC0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[0],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[1],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[2],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[3],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[4],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[4],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[5],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[5],Description collection: Subscribe configuration for task CAPTURE[n]"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x4)
group.long ($2+0xD8)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
endif
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
endif
repeat.end
sif cpuis("NRF5340QKAA-APP")
group.long 0x1C0++0x03
line.long 0x00 "PUBLISH_COMPARE[0],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C8)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1CC)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_COMPARE[4],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x1D4++0x03
line.long 0x00 "PUBLISH_COMPARE[5],Description collection: Publish configuration for event COMPARE[n]"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
endif
sif cpuis("NRF5340QKAA-NET")
repeat 3. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1D4)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
sif cpuis("NRF5340QKAA-APP")
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
sif cpuis("NRF5340QKAA-NET")
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
endif
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
sif cpuis("NRF5340QKAA-NET")
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
endif
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
sif cpuis("NRF5340QKAA-NET")
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
endif
repeat.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "TIMER0_S"
base ad:0x5000F000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 6. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
repeat 6. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "TIMER1_NS"
base ad:0x41018000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SHUTDOWN will subscribe to"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "TIMER1_NS"
base ad:0x40010000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 6. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
repeat 6. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
tree "TIMER1_S"
base ad:0x50010000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 6. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
repeat 6. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "TIMER2_NS"
base ad:0x41019000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SHUTDOWN will subscribe to"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disabled,1: Enabled"
bitfld.long 0x00 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "TIMER2_NS"
base ad:0x40011000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 6. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
repeat 6. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
tree "TIMER2_S"
base ad:0x50011000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start Timer"
bitfld.long 0x00 0. "TASKS_START,Start Timer" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop Timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_COUNT,Increment Timer (Counter mode only)"
bitfld.long 0x00 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_CLEAR,Clear time"
bitfld.long 0x00 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task"
wgroup.long 0x10++0x03
line.long 0x00 "TASKS_SHUTDOWN,Deprecated register - Shut down timer"
bitfld.long 0x00 0. "TASKS_SHUTDOWN,Deprecated field - Shut down timer" "?,1: Trigger task"
repeat 6. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x40)++0x03
line.long 0x00 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register $1"
bitfld.long 0x00 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task"
repeat.end
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to"
group.long 0x90++0x03
line.long 0x00 "SUBSCRIBE_SHUTDOWN,Deprecated register - Subscribe configuration for task SHUTDOWN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SHUTDOWN will subscribe to"
repeat 6. (increment 0 1) (increment 0 0x4)
group.long ($2+0xC0)++0x03
line.long 0x00 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x140)++0x03
line.long 0x00 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match $1"
bitfld.long 0x00 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1C0)++0x03
line.long 0x00 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to"
repeat.end
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disabled,1: Enabled"
bitfld.long 0x00 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Read: Enabled"
group.long 0x504++0x03
line.long 0x00 "MODE,Timer mode selection"
bitfld.long 0x00 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?..."
group.long 0x508++0x03
line.long 0x00 "BITMODE,Configure the number of bits used by the TIMER"
bitfld.long 0x00 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width"
group.long 0x510++0x03
line.long 0x00 "PRESCALER,Timer prescaler register"
bitfld.long 0x00 0.--3. "PRESCALER,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x540)++0x03
line.long 0x00 "CC[$1],Description collection: Capture/Compare register n $1"
hexmask.long 0x00 0.--31. 1. "CC,Capture/Compare value"
repeat.end
repeat 6. (increment 0 1) (increment 0 0x04)
group.long ($2+0x580)++0x03
line.long 0x00 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n $1"
bitfld.long 0x00 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation"
repeat.end
tree.end
endif
tree.end
tree "TWIM (I2C compatible Two-Wire Master Interface with EasyDMA)"
sif cpuis("NRF5340QKAA-NET")
tree "TWIM0_NS"
base ad:0x41013000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "TWIM0_NS"
base ad:0x40008000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM0_S"
base ad:0x50008000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM1_NS"
base ad:0x40009000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM1_S"
base ad:0x50009000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM2_NS"
base ad:0x4000B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM2_S"
base ad:0x5000B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM3_NS"
base ad:0x4000C000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIM3_S"
base ad:0x5000C000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start TWI receive sequence"
bitfld.long 0x00 0. "TASKS_STARTRX,Start TWI receive sequence" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start TWI transmit sequence"
bitfld.long 0x00 0. "TASKS_STARTTX,Start TWI transmit sequence" "?,1: Trigger task"
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x148++0x03
line.long 0x00 "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended"
bitfld.long 0x00 0. "EVENTS_SUSPENDED,Last byte has been sent out after the SUSPEND task has been issued TWI traffic is now suspended" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_LASTRX,Byte boundary starting to receive the last byte"
bitfld.long 0x00 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_LASTTX,Byte boundary starting to transmit the last byte"
bitfld.long 0x00 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C8++0x03
line.long 0x00 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_LASTRX,Publish configuration for event LASTRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_LASTTX,Publish configuration for event LASTTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 11. "LASTRX_SUSPEND,Shortcut between event LASTRX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 10. "LASTRX_STARTTX,Shortcut between event LASTRX and task STARTTX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 7. "LASTTX_STARTRX,Shortcut between event LASTTX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4C4++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIM"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIM" "0: Disable TWIM,?,?,?,?,?,6: Enable TWIM,?..."
group.long 0x524++0x03
line.long 0x00 "FREQUENCY,TWI frequency"
hexmask.long 0x00 0.--31. 1. "FREQUENCY,TWI master clock frequency"
group.long 0x588++0x03
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,Address used in the TWI transfer"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--2. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
tree.end
tree "TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA)"
sif cpuis("NRF5340QKAA-NET")
tree "TWIS0_NS"
base ad:0x41013000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "TWIS0_NS"
base ad:0x40008000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS0_S"
base ad:0x50008000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS1_NS"
base ad:0x40009000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS1_S"
base ad:0x50009000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS2_NS"
base ad:0x4000B000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS2_S"
base ad:0x5000B000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS3_NS"
base ad:0x4000C000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
tree "TWIS3_S"
base ad:0x5000C000
wgroup.long 0x14++0x03
line.long 0x00 "TASKS_STOP,Stop TWI transaction"
bitfld.long 0x00 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task"
wgroup.long 0x1C++0x03
line.long 0x00 "TASKS_SUSPEND,Suspend TWI transaction"
bitfld.long 0x00 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task"
wgroup.long 0x20++0x03
line.long 0x00 "TASKS_RESUME,Resume TWI transaction"
bitfld.long 0x00 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task"
wgroup.long 0x30++0x03
line.long 0x00 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command"
bitfld.long 0x00 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task"
wgroup.long 0x34++0x03
line.long 0x00 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command"
bitfld.long 0x00 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task"
group.long 0x94++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x9C++0x03
line.long 0x00 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to"
group.long 0xA0++0x03
line.long 0x00 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to"
group.long 0xB0++0x03
line.long 0x00 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to"
group.long 0xB4++0x03
line.long 0x00 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,TWI stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,TWI error"
bitfld.long 0x00 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,Receive sequence started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,Receive sequence started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,Transmit sequence started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,Transmit sequence started" "0: Event not generated,1: Event generated"
group.long 0x164++0x03
line.long 0x00 "EVENTS_WRITE,Write command received"
bitfld.long 0x00 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated"
group.long 0x168++0x03
line.long 0x00 "EVENTS_READ,Read command received"
bitfld.long 0x00 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1E4++0x03
line.long 0x00 "PUBLISH_WRITE,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to"
group.long 0x1E8++0x03
line.long 0x00 "PUBLISH_READ,Publish configuration for event"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 26. "READ,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
bitfld.long 0x00 25. "WRITE,Enable or disable interrupt for event" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to enable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 26. "READ,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 25. "WRITE,Write '1' to disable interrupt for event" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x4D0++0x03
line.long 0x00 "ERRORSRC,Error source"
bitfld.long 0x00 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred"
bitfld.long 0x00 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred"
newline
bitfld.long 0x00 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred"
rgroup.long 0x4D4++0x03
line.long 0x00 "MATCH,Status register indicating which address had a match"
bitfld.long 0x00 0. "MATCH,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable TWIS"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable TWIS" "0: Disable TWIS,?,?,?,?,?,?,?,?,9: Enable TWIS,?..."
repeat 2. (increment 0 1) (increment 0 0x04)
group.long ($2+0x588)++0x03
line.long 0x00 "ADDRESS[$1],Description collection: TWI slave address n $1"
hexmask.long.byte 0x00 0.--6. 1. "ADDRESS,TWI slave address"
repeat.end
group.long 0x594++0x03
line.long 0x00 "CONFIG,Configuration register for the address match mechanism"
bitfld.long 0x00 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled"
bitfld.long 0x00 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled"
group.long 0x5C0++0x03
line.long 0x00 "ORC,Over-read character"
hexmask.long.byte 0x00 0.--7. 1. "ORC,Over-read character"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "SCL,Pin select for SCL signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "SDA,Pin select for SDA signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,RXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,RXD Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in RXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in RXD buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last RXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last RXD transaction"
group.long 0x540++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,TXD Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,TXD Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in TXD buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in TXD buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last TXD transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last TXD transaction"
group.long 0x550++0x03
line.long 0x00 "LIST,EasyDMA list type"
bitfld.long 0x00 0.--1. "LIST,List type" "0: Disable EasyDMA list,1: Use array list,?..."
tree.end
tree.end
endif
tree.end
tree "UARTE (UART with EasyDMA)"
sif cpuis("NRF5340QKAA-NET")
tree "UARTE0_NS"
base ad:0x41013000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "UARTE0_NS"
base ad:0x40008000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE0_S"
base ad:0x50008000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE1_NS"
base ad:0x40009000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE1_S"
base ad:0x50009000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE2_NS"
base ad:0x4000B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE2_S"
base ad:0x5000B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE3_NS"
base ad:0x4000C000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
tree "UARTE3_S"
base ad:0x5000C000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_STARTRX,Start UART receiver"
bitfld.long 0x00 0. "TASKS_STARTRX,Start UART receiver" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOPRX,Stop UART receiver"
bitfld.long 0x00 0. "TASKS_STOPRX,Stop UART receiver" "?,1: Trigger task"
wgroup.long 0x08++0x03
line.long 0x00 "TASKS_STARTTX,Start UART transmitter"
bitfld.long 0x00 0. "TASKS_STARTTX,Start UART transmitter" "?,1: Trigger task"
wgroup.long 0x0C++0x03
line.long 0x00 "TASKS_STOPTX,Stop UART transmitter"
bitfld.long 0x00 0. "TASKS_STOPTX,Stop UART transmitter" "?,1: Trigger task"
wgroup.long 0x2C++0x03
line.long 0x00 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer"
bitfld.long 0x00 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_STARTRX,Subscribe configuration for task STARTRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTRX will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOPRX,Subscribe configuration for task STOPRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPRX will subscribe to"
group.long 0x88++0x03
line.long 0x00 "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to"
group.long 0x8C++0x03
line.long 0x00 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to"
group.long 0xAC++0x03
line.long 0x00 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_CTS,CTS is activated (set low)"
bitfld.long 0x00 0. "EVENTS_CTS,CTS is activated (set low)" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_NCTS,CTS is deactivated (set high)"
bitfld.long 0x00 0. "EVENTS_NCTS,CTS is deactivated (set high)" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)"
bitfld.long 0x00 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated"
group.long 0x110++0x03
line.long 0x00 "EVENTS_ENDRX,Receive buffer is filled up"
bitfld.long 0x00 0. "EVENTS_ENDRX,Receive buffer is filled up" "0: Event not generated,1: Event generated"
group.long 0x11C++0x03
line.long 0x00 "EVENTS_TXDRDY,Data sent from TXD"
bitfld.long 0x00 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated"
group.long 0x120++0x03
line.long 0x00 "EVENTS_ENDTX,Last TX byte transmitted"
bitfld.long 0x00 0. "EVENTS_ENDTX,Last TX byte transmitted" "0: Event not generated,1: Event generated"
group.long 0x124++0x03
line.long 0x00 "EVENTS_ERROR,Error detected"
bitfld.long 0x00 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated"
group.long 0x144++0x03
line.long 0x00 "EVENTS_RXTO,Receiver timeout"
bitfld.long 0x00 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated"
group.long 0x14C++0x03
line.long 0x00 "EVENTS_RXSTARTED,UART receiver has started"
bitfld.long 0x00 0. "EVENTS_RXSTARTED,UART receiver has started" "0: Event not generated,1: Event generated"
group.long 0x150++0x03
line.long 0x00 "EVENTS_TXSTARTED,UART transmitter has started"
bitfld.long 0x00 0. "EVENTS_TXSTARTED,UART transmitter has started" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_TXSTOPPED,Transmitter stopped"
bitfld.long 0x00 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_CTS,Publish configuration for event CTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_NCTS,Publish configuration for event NCTS"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to"
group.long 0x190++0x03
line.long 0x00 "PUBLISH_ENDRX,Publish configuration for event ENDRX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to"
group.long 0x19C++0x03
line.long 0x00 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to"
group.long 0x1A0++0x03
line.long 0x00 "PUBLISH_ENDTX,Publish configuration for event ENDTX"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to"
group.long 0x1A4++0x03
line.long 0x00 "PUBLISH_ERROR,Publish configuration for event ERROR"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to"
group.long 0x1C4++0x03
line.long 0x00 "PUBLISH_RXTO,Publish configuration for event RXTO"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to"
group.long 0x1CC++0x03
line.long 0x00 "PUBLISH_RXSTARTED,Publish configuration for event RXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event RXSTARTED will publish to"
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_TXSTARTED,Publish configuration for event TXSTARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTARTED will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 6. "ENDRX_STOPRX,Shortcut between event ENDRX and task STOPRX" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 5. "ENDRX_STARTRX,Shortcut between event ENDRX and task STARTRX" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disabled,1: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Enable or disable interrupt for event TXSTARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Enable or disable interrupt for event RXSTARTED" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "RXTO,Enable or disable interrupt for event RXTO" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Enable or disable interrupt for event ERROR" "0: Disabled,1: Enabled"
bitfld.long 0x00 8. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 4. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "CTS,Enable or disable interrupt for event CTS" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to enable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to enable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 22. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 20. "TXSTARTED,Write '1' to disable interrupt for event TXSTARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 19. "RXSTARTED,Write '1' to disable interrupt for event RXSTARTED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 9. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 8. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 7. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 4. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Read: Enabled"
group.long 0x480++0x03
line.long 0x00 "ERRORSRC,Error source Note : this register is read / write one to clear"
bitfld.long 0x00 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present"
newline
bitfld.long 0x00 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present"
bitfld.long 0x00 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable UART"
bitfld.long 0x00 0.--3. "ENABLE,Enable or disable UARTE" "0: Disable UARTE,?,?,?,?,?,?,?,8: Enable UARTE,?..."
group.long 0x524++0x03
line.long 0x00 "BAUDRATE,Baud rate"
hexmask.long 0x00 0.--31. 1. "BAUDRATE,Baud rate"
group.long 0x56C++0x03
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
bitfld.long 0x00 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity"
bitfld.long 0x00 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits"
newline
bitfld.long 0x00 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit"
bitfld.long 0x00 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled"
tree "PSEL"
group.long 0x508++0x03
line.long 0x00 "RTS,Pin select for RTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x50C++0x03
line.long 0x00 "TXD,Pin select for TXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x510++0x03
line.long 0x00 "CTS,Pin select for CTS signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x514++0x03
line.long 0x00 "RXD,Pin select for RXD signal"
bitfld.long 0x00 31. "CONNECT,Connection" "0: Connected,1: Disconnected"
bitfld.long 0x00 5. "PORT,Port number" "0,1"
newline
bitfld.long 0x00 0.--4. "PIN,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree "RXD"
group.long 0x534++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x538++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in receive buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in receive buffer"
rgroup.long 0x53C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree "TXD"
group.long 0x544++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x548++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes in transmit buffer"
hexmask.long.word 0x00 0.--15. 1. "MAXCNT,Maximum number of bytes in transmit buffer"
rgroup.long 0x54C++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
tree.end
endif
tree.end
tree "UICR (User Information Configuration Registers)"
sif cpuis("NRF5340QKAA-NET")
base ad:0x1FF8000
group.long 0x00++0x03
line.long 0x00 "APPROTECT,Access port protection"
hexmask.long 0x00 0.--31. 1. "PALL,Blocks debugger read/write access to all CPU registers and memory mapped addresses Any value except for the enumerations will yield unexpected results"
group.long 0x04++0x03
line.long 0x00 "ERASEPROTECT,Erase protection"
hexmask.long 0x00 0.--31. 1. "PALL,Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality"
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x200)++0x03
line.long 0x00 "NRFFW[$1],Description collection: Reserved for Nordic firmware design $1"
hexmask.long 0x00 0.--31. 1. "NRFFW,Reserved for Nordic firmware design"
repeat.end
repeat 32. (increment 0 1) (increment 0 0x04)
group.long ($2+0x300)++0x03
line.long 0x00 "CUSTOMER[$1],Description collection: Reserved for customer $1"
hexmask.long 0x00 0.--31. 1. "CUSTOMER,Reserved for customer"
repeat.end
endif
sif cpuis("NRF5340QKAA-APP")
base ad:0xFF8000
group.long 0x00++0x03
line.long 0x00 "APPROTECT,Access port protection"
hexmask.long 0x00 0.--31. 1. "PALL,Blocks debugger read/write access to all CPU registers and memory mapped addresses Using any value not listed below will yield unexpected results"
group.long 0x0C++0x03
line.long 0x00 "EXTSUPPLY,Enable external circuitry to be supplied from VDD pin"
bitfld.long 0x00 0. "EXTSUPPLY,Enable external circuitry to be supplied from VDD pin (output of VREGH stage)" "0: It is allowed to supply external circuitry..,1: No current can be drawn from the VDD pin"
group.long 0x10++0x03
line.long 0x00 "VREGHVOUT,GPIO reference voltage / external output supply voltage in 'High voltage mode'"
bitfld.long 0x00 0.--2. "VREGHVOUT,VREGH regulator output voltage" "0: 1.8 V,1: 2.1 V,2: 2.4 V,3: 2.7 V,4: 3.0 V,5: 3.3 V,?,7: Default voltage"
group.long 0x14++0x03
line.long 0x00 "HFXOCNT,HFXO startup counter"
hexmask.long.byte 0x00 0.--7. 1. "HFXOCNT,HFXO startup counter"
group.long 0x1C++0x03
line.long 0x00 "SECUREAPPROTECT,Secure access port protection"
hexmask.long 0x00 0.--31. 1. "PALL,Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses"
group.long 0x20++0x03
line.long 0x00 "ERASEPROTECT,Erase protection"
hexmask.long 0x00 0.--31. 1. "PALL,Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality"
group.long 0x24++0x03
line.long 0x00 "TINSTANCE,SW-DP Target instance"
bitfld.long 0x00 28.--31. "TINSTANCE,TINSTANCE bits are negated and used in the SW-DP DLPIDR.TINSTANCE field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x28++0x03
line.long 0x00 "NFCPINS,Setting of pins dedicated to NFC functionality: NFC antenna or GPIO"
bitfld.long 0x00 0. "PROTECT,Setting of pins dedicated to NFC functionality" "0: Operation as GPIO pins,1: Operation as NFC antenna pins"
repeat 192. (increment 0 1) (increment 0 0x04)
group.long ($2+0x100)++0x03
line.long 0x00 "OTP[$1],Description collection: One time programmable memory $1"
hexmask.long.word 0x00 16.--31. 1. "UPPER,Upper half word"
hexmask.long.word 0x00 0.--15. 1. "LOWER,Lower half word"
repeat.end
tree "KEYSLOT"
repeat 128. (increment 0 1)(increment 0 0x08)
tree "CONFIG[$1]"
group.long ($2+0x400)++0x03
line.long 0x00 "DEST,Description cluster: Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE[0-3]) will be pushed by KMU"
hexmask.long 0x00 0.--31. 1. "DEST,Secure APB destination address"
group.long ($2+0x404)++0x03
line.long 0x00 "PERM,Description cluster: Define permissions for the key slot"
bitfld.long 0x00 16. "STATE,Revocation state for the key slot" "0: Key value registers can no longer be read or..,1: Key value registers are readable (if enabled).."
bitfld.long 0x00 2. "PUSH,Push permission for key slot" "0: Disable pushing of key value registers over..,1: Enable pushing of key value registers over.."
newline
bitfld.long 0x00 1. "READ,Read permission for key slot" "0: Disable read from key value registers,1: Enable read from key value registers"
bitfld.long 0x00 0. "WRITE,Write permission for key slot" "0: Disable write to the key value registers,1: Enable write to the key value registers"
tree.end
repeat.end
repeat 128. (increment 0 1)(increment 0 0x410)
tree "KEY[$1]"
group.long ($2+0x800)++0x03
line.long 0x00 "VALUE[%s],Description collection: Define bits [31+o*32:0+o*32] of value assigned to KMU key slot"
hexmask.long 0x00 0.--31. 1. "VALUE,Define bits [31+o*32:0+o*32] of value assigned to KMU key slot"
tree.end
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-APP")
tree "USBD (Universal Serial Bus Device)"
tree "USBD_NS"
base ad:0x40036000
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x04)++0x03
line.long 0x00 "TASKS_STARTEPIN[$1],Description collection: Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values and enables endpoint IN n to respond to traffic from host $1"
bitfld.long 0x00 0. "TASKS_STARTEPIN,Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values and enables endpoint IN n to respond to traffic from host" "?,1: Trigger task"
repeat.end
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_STARTISOIN,Captures the ISOIN.PTR and ISOIN.MAXCNT registers values and enables sending data on ISO endpoint"
bitfld.long 0x00 0. "TASKS_STARTISOIN,Captures the ISOIN.PTR and ISOIN.MAXCNT registers values and enables sending data on ISO endpoint" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x28)++0x03
line.long 0x00 "TASKS_STARTEPOUT[$1],Description collection: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values and enables endpoint n to respond to traffic from host $1"
bitfld.long 0x00 0. "TASKS_STARTEPOUT,Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values and enables endpoint n to respond to traffic from host" "?,1: Trigger task"
repeat.end
wgroup.long 0x48++0x03
line.long 0x00 "TASKS_STARTISOOUT,Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values and enables receiving of data on ISO endpoint"
bitfld.long 0x00 0. "TASKS_STARTISOOUT,Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values and enables receiving of data on ISO endpoint" "?,1: Trigger task"
wgroup.long 0x4C++0x03
line.long 0x00 "TASKS_EP0RCVOUT,Allows OUT data stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0RCVOUT,Allows OUT data stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x50++0x03
line.long 0x00 "TASKS_EP0STATUS,Allows status stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0STATUS,Allows status stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x54++0x03
line.long 0x00 "TASKS_EP0STALL,Stalls data and status stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0STALL,Stalls data and status stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x58++0x03
line.long 0x00 "TASKS_DPDMDRIVE,Forces D+ and D- lines into the state defined in the DPDMVALUE register"
bitfld.long 0x00 0. "TASKS_DPDMDRIVE,Forces D+ and D- lines into the state defined in the DPDMVALUE register" "?,1: Trigger task"
wgroup.long 0x5C++0x03
line.long 0x00 "TASKS_DPDMNODRIVE,Stops forcing D+ and D- lines into any state (USB engine takes control)"
bitfld.long 0x00 0. "TASKS_DPDMNODRIVE,Stops forcing D+ and D- lines into any state (USB engine takes control)" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x84)++0x03
line.long 0x00 "SUBSCRIBE_STARTEPIN[$1],Description collection: Subscribe configuration for task STARTEPIN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTEPIN[n] will subscribe to"
repeat.end
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_STARTISOIN,Subscribe configuration for task STARTISOIN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTISOIN will subscribe to"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xA8)++0x03
line.long 0x00 "SUBSCRIBE_STARTEPOUT[$1],Description collection: Subscribe configuration for task STARTEPOUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTEPOUT[n] will subscribe to"
repeat.end
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_STARTISOOUT,Subscribe configuration for task STARTISOOUT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTISOOUT will subscribe to"
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_EP0RCVOUT,Subscribe configuration for task EP0RCVOUT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0RCVOUT will subscribe to"
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_EP0STATUS,Subscribe configuration for task EP0STATUS"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0STATUS will subscribe to"
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_EP0STALL,Subscribe configuration for task EP0STALL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0STALL will subscribe to"
group.long 0xD8++0x03
line.long 0x00 "SUBSCRIBE_DPDMDRIVE,Subscribe configuration for task DPDMDRIVE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DPDMDRIVE will subscribe to"
group.long 0xDC++0x03
line.long 0x00 "SUBSCRIBE_DPDMNODRIVE,Subscribe configuration for task DPDMNODRIVE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DPDMNODRIVE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_USBRESET,Signals that a USB reset condition has been detected on USB lines"
bitfld.long 0x00 0. "EVENTS_USBRESET,Signals that a USB reset condition has been detected on USB lines" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STARTED,Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register"
bitfld.long 0x00 0. "EVENTS_STARTED,Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_ENDEPIN[$1],Description collection: The whole EPIN[n] buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDEPIN,The whole EPIN[n] buffer has been consumed" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x128++0x03
line.long 0x00 "EVENTS_EP0DATADONE,An acknowledged data transfer has taken place on the control endpoint"
bitfld.long 0x00 0. "EVENTS_EP0DATADONE,An acknowledged data transfer has taken place on the control endpoint" "0: Event not generated,1: Event generated"
group.long 0x12C++0x03
line.long 0x00 "EVENTS_ENDISOIN,The whole ISOIN buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDISOIN,The whole ISOIN buffer has been consumed" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x130)++0x03
line.long 0x00 "EVENTS_ENDEPOUT[$1],Description collection: The whole EPOUT[n] buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDEPOUT,The whole EPOUT[n] buffer has been consumed" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x150++0x03
line.long 0x00 "EVENTS_ENDISOOUT,The whole ISOOUT buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDISOOUT,The whole ISOOUT buffer has been consumed" "0: Event not generated,1: Event generated"
group.long 0x154++0x03
line.long 0x00 "EVENTS_SOF,Signals that a SOF (start of frame) condition has been detected on USB lines"
bitfld.long 0x00 0. "EVENTS_SOF,Signals that a SOF (start of frame) condition has been detected on USB lines" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_USBEVENT,An event or an error not covered by specific events has occurred"
bitfld.long 0x00 0. "EVENTS_USBEVENT,An event or an error not covered by specific events has occurred" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_EP0SETUP,A valid SETUP token has been received (and acknowledged) on the control endpoint"
bitfld.long 0x00 0. "EVENTS_EP0SETUP,A valid SETUP token has been received (and acknowledged) on the control endpoint" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_EPDATA,A data transfer has occurred on a data endpoint indicated by the EPDATASTATUS register"
bitfld.long 0x00 0. "EVENTS_EPDATA,A data transfer has occurred on a data endpoint indicated by the EPDATASTATUS register" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_USBRESET,Publish configuration for event USBRESET"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBRESET will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_ENDEPIN[$1],Description collection: Publish configuration for event ENDEPIN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDEPIN[n] will publish to"
repeat.end
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_EP0DATADONE,Publish configuration for event EP0DATADONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EP0DATADONE will publish to"
group.long 0x1AC++0x03
line.long 0x00 "PUBLISH_ENDISOIN,Publish configuration for event ENDISOIN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDISOIN will publish to"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1B0)++0x03
line.long 0x00 "PUBLISH_ENDEPOUT[$1],Description collection: Publish configuration for event ENDEPOUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDEPOUT[n] will publish to"
repeat.end
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_ENDISOOUT,Publish configuration for event ENDISOOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDISOOUT will publish to"
group.long 0x1D4++0x03
line.long 0x00 "PUBLISH_SOF,Publish configuration for event SOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SOF will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_USBEVENT,Publish configuration for event USBEVENT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBEVENT will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_EP0SETUP,Publish configuration for event EP0SETUP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EP0SETUP will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_EPDATA,Publish configuration for event EPDATA"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EPDATA will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "ENDEPOUT0_EP0RCVOUT,Shortcut between event ENDEPOUT[0] and task EP0RCVOUT" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "ENDEPOUT0_EP0STATUS,Shortcut between event ENDEPOUT[0] and task EP0STATUS" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "EP0DATADONE_EP0STATUS,Shortcut between event EP0DATADONE and task EP0STATUS" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "EP0DATADONE_STARTEPOUT0,Shortcut between event EP0DATADONE and task STARTEPOUT[0]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "EP0DATADONE_STARTEPIN0,Shortcut between event EP0DATADONE and task STARTEPIN[0]" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "EPDATA,Enable or disable interrupt for event EPDATA" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Enable or disable interrupt for event EP0SETUP" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Enable or disable interrupt for event USBEVENT" "0: Disabled,1: Enabled"
bitfld.long 0x00 21. "SOF,Enable or disable interrupt for event SOF" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Enable or disable interrupt for event ENDISOOUT" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Enable or disable interrupt for event ENDEPOUT[7]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Enable or disable interrupt for event ENDEPOUT[6]" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Enable or disable interrupt for event ENDEPOUT[5]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Enable or disable interrupt for event ENDEPOUT[4]" "0: Disabled,1: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Enable or disable interrupt for event ENDEPOUT[3]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Enable or disable interrupt for event ENDEPOUT[2]" "0: Disabled,1: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Enable or disable interrupt for event ENDEPOUT[1]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Enable or disable interrupt for event ENDEPOUT[0]" "0: Disabled,1: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Enable or disable interrupt for event ENDISOIN" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Enable or disable interrupt for event EP0DATADONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Enable or disable interrupt for event ENDEPIN[7]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Enable or disable interrupt for event ENDEPIN[6]" "0: Disabled,1: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Enable or disable interrupt for event ENDEPIN[5]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Enable or disable interrupt for event ENDEPIN[4]" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Enable or disable interrupt for event ENDEPIN[3]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Enable or disable interrupt for event ENDEPIN[2]" "0: Disabled,1: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Enable or disable interrupt for event ENDEPIN[1]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Enable or disable interrupt for event ENDEPIN[0]" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Enable or disable interrupt for event USBRESET" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "EPDATA,Write '1' to enable interrupt for event EPDATA" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Write '1' to enable interrupt for event EP0SETUP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Write '1' to enable interrupt for event USBEVENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 21. "SOF,Write '1' to enable interrupt for event SOF" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Write '1' to enable interrupt for event ENDISOOUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Write '1' to enable interrupt for event ENDEPOUT[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Write '1' to enable interrupt for event ENDEPOUT[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Write '1' to enable interrupt for event ENDEPOUT[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Write '1' to enable interrupt for event ENDEPOUT[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Write '1' to enable interrupt for event ENDEPOUT[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Write '1' to enable interrupt for event ENDEPOUT[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Write '1' to enable interrupt for event ENDEPOUT[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Write '1' to enable interrupt for event ENDEPOUT[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Write '1' to enable interrupt for event ENDISOIN" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Write '1' to enable interrupt for event EP0DATADONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Write '1' to enable interrupt for event ENDEPIN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Write '1' to enable interrupt for event ENDEPIN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Write '1' to enable interrupt for event ENDEPIN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Write '1' to enable interrupt for event ENDEPIN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Write '1' to enable interrupt for event ENDEPIN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Write '1' to enable interrupt for event ENDEPIN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Write '1' to enable interrupt for event ENDEPIN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Write '1' to enable interrupt for event ENDEPIN[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Write '1' to enable interrupt for event USBRESET" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "EPDATA,Write '1' to disable interrupt for event EPDATA" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Write '1' to disable interrupt for event EP0SETUP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Write '1' to disable interrupt for event USBEVENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 21. "SOF,Write '1' to disable interrupt for event SOF" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Write '1' to disable interrupt for event ENDISOOUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Write '1' to disable interrupt for event ENDEPOUT[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Write '1' to disable interrupt for event ENDEPOUT[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Write '1' to disable interrupt for event ENDEPOUT[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Write '1' to disable interrupt for event ENDEPOUT[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Write '1' to disable interrupt for event ENDEPOUT[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Write '1' to disable interrupt for event ENDEPOUT[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Write '1' to disable interrupt for event ENDEPOUT[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Write '1' to disable interrupt for event ENDEPOUT[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Write '1' to disable interrupt for event ENDISOIN" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Write '1' to disable interrupt for event EP0DATADONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Write '1' to disable interrupt for event ENDEPIN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Write '1' to disable interrupt for event ENDEPIN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Write '1' to disable interrupt for event ENDEPIN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Write '1' to disable interrupt for event ENDEPIN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Write '1' to disable interrupt for event ENDEPIN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Write '1' to disable interrupt for event ENDEPIN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Write '1' to disable interrupt for event ENDEPIN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Write '1' to disable interrupt for event ENDEPIN[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Write '1' to disable interrupt for event USBRESET" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "EVENTCAUSE,Details on what caused the USBEVENT event"
bitfld.long 0x00 11. "READY,USB device is ready for normal operation" "0: USBEVENT was not issued due to USBD..,1: USBD peripheral is ready"
bitfld.long 0x00 10. "USBWUALLOWED,USB MAC has been woken up and operational" "0: Wake up not allowed,1: Wake up allowed"
newline
bitfld.long 0x00 9. "RESUME,Signals that a RESUME condition (K state or activity restart) has been detected on USB lines" "0: Resume not detected,1: Resume detected"
bitfld.long 0x00 8. "SUSPEND,Signals that USB lines have been idle long enough for the device to enter suspend" "0: Suspend not detected,1: Suspend detected"
newline
bitfld.long 0x00 0. "ISOOUTCRC,CRC error was detected on isochronous OUT endpoint 8" "0: No error detected,1: Error detected"
group.long 0x468++0x03
line.long 0x00 "EPSTATUS,Provides information on which endpoint's EasyDMA registers have been captured"
bitfld.long 0x00 24. "EPOUT8,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 23. "EPOUT7,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 22. "EPOUT6,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 21. "EPOUT5,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 20. "EPOUT4,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 19. "EPOUT3,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 18. "EPOUT2,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 17. "EPOUT1,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 16. "EPOUT0,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 8. "EPIN8,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 7. "EPIN7,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 6. "EPIN6,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 5. "EPIN5,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 4. "EPIN4,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 3. "EPIN3,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 2. "EPIN2,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 1. "EPIN1,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 0. "EPIN0,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
group.long 0x46C++0x03
line.long 0x00 "EPDATASTATUS,Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event)"
bitfld.long 0x00 23. "EPOUT7,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 22. "EPOUT6,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 21. "EPOUT5,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 20. "EPOUT4,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 19. "EPOUT3,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 18. "EPOUT2,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 17. "EPOUT1,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 7. "EPIN7,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 6. "EPIN6,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 5. "EPIN5,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 4. "EPIN4,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 3. "EPIN3,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 2. "EPIN2,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 1. "EPIN1,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
rgroup.long 0x470++0x03
line.long 0x00 "USBADDR,Device USB address"
hexmask.long.byte 0x00 0.--6. 1. "ADDR,Device USB address"
rgroup.long 0x480++0x03
line.long 0x00 "BMREQUESTTYPE,SETUP data byte 0 bmRequestType"
bitfld.long 0x00 7. "DIRECTION,Data transfer direction" "0: Host-to-device,1: Device-to-host"
bitfld.long 0x00 5.--6. "TYPE,Data transfer type" "0: Standard,1: Class,2: Vendor,?..."
newline
bitfld.long 0x00 0.--4. "RECIPIENT,Data transfer type" "0: Device,1: Interface,2: Endpoint,3: Other,?..."
rgroup.long 0x484++0x03
line.long 0x00 "BREQUEST,SETUP data byte 1 bRequest"
hexmask.long.byte 0x00 0.--7. 1. "BREQUEST,SETUP data byte 1 bRequest"
rgroup.long 0x488++0x03
line.long 0x00 "WVALUEL,SETUP data byte 2 LSB of wValue"
hexmask.long.byte 0x00 0.--7. 1. "WVALUEL,SETUP data byte 2 LSB of wValue"
rgroup.long 0x48C++0x03
line.long 0x00 "WVALUEH,SETUP data byte 3 MSB of wValue"
hexmask.long.byte 0x00 0.--7. 1. "WVALUEH,SETUP data byte 3 MSB of wValue"
rgroup.long 0x490++0x03
line.long 0x00 "WINDEXL,SETUP data byte 4 LSB of wIndex"
hexmask.long.byte 0x00 0.--7. 1. "WINDEXL,SETUP data byte 4 LSB of wIndex"
rgroup.long 0x494++0x03
line.long 0x00 "WINDEXH,SETUP data byte 5 MSB of wIndex"
hexmask.long.byte 0x00 0.--7. 1. "WINDEXH,SETUP data byte 5 MSB of wIndex"
rgroup.long 0x498++0x03
line.long 0x00 "WLENGTHL,SETUP data byte 6 LSB of wLength"
hexmask.long.byte 0x00 0.--7. 1. "WLENGTHL,SETUP data byte 6 LSB of wLength"
rgroup.long 0x49C++0x03
line.long 0x00 "WLENGTHH,SETUP data byte 7 MSB of wLength"
hexmask.long.byte 0x00 0.--7. 1. "WLENGTHH,SETUP data byte 7 MSB of wLength"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable USB"
bitfld.long 0x00 0. "ENABLE,Enable USB" "0: USB peripheral is disabled,1: USB peripheral is enabled"
group.long 0x504++0x03
line.long 0x00 "USBPULLUP,Control of the USB pull-up"
bitfld.long 0x00 0. "CONNECT,Control of the USB pull-up on the D+ line" "0: Pull-up is disconnected,1: Pull-up is connected to D+"
group.long 0x508++0x03
line.long 0x00 "DPDMVALUE,State D+ and D- lines will be forced into by the DPDMDRIVE task"
bitfld.long 0x00 0.--4. "STATE,State D+ and D- lines will be forced into by the DPDMDRIVE task" "?,1: D+ forced low D- forced high (K state) for a..,2: D+ forced high D- forced low (J state),?,4: D+ forced low D- forced high (K state),?..."
group.long 0x50C++0x03
line.long 0x00 "DTOGGLE,Data toggle control and status"
bitfld.long 0x00 8.--9. "VALUE,Data toggle value" "0: No action on data toggle when writing the..,1: Data toggle is DATA0 on endpoint set by EP..,2: Data toggle is DATA1 on endpoint set by EP..,?..."
bitfld.long 0x00 7. "IO,Selects IN or OUT endpoint" "0: Selects OUT endpoint,1: Selects IN endpoint"
newline
bitfld.long 0x00 0.--2. "EP,Select bulk endpoint number" "0,1,2,3,4,5,6,7"
group.long 0x510++0x03
line.long 0x00 "EPINEN,Endpoint IN enable"
bitfld.long 0x00 8. "ISOIN,Enable ISO IN endpoint" "0: Disable ISO IN endpoint 8,1: Enable ISO IN endpoint 8"
bitfld.long 0x00 7. "IN7,Enable IN endpoint 7" "0: Disable endpoint IN 7 (no response to IN..,1: Enable endpoint IN 7 (response to IN tokens)"
newline
bitfld.long 0x00 6. "IN6,Enable IN endpoint 6" "0: Disable endpoint IN 6 (no response to IN..,1: Enable endpoint IN 6 (response to IN tokens)"
bitfld.long 0x00 5. "IN5,Enable IN endpoint 5" "0: Disable endpoint IN 5 (no response to IN..,1: Enable endpoint IN 5 (response to IN tokens)"
newline
bitfld.long 0x00 4. "IN4,Enable IN endpoint 4" "0: Disable endpoint IN 4 (no response to IN..,1: Enable endpoint IN 4 (response to IN tokens)"
bitfld.long 0x00 3. "IN3,Enable IN endpoint 3" "0: Disable endpoint IN 3 (no response to IN..,1: Enable endpoint IN 3 (response to IN tokens)"
newline
bitfld.long 0x00 2. "IN2,Enable IN endpoint 2" "0: Disable endpoint IN 2 (no response to IN..,1: Enable endpoint IN 2 (response to IN tokens)"
bitfld.long 0x00 1. "IN1,Enable IN endpoint 1" "0: Disable endpoint IN 1 (no response to IN..,1: Enable endpoint IN 1 (response to IN tokens)"
newline
bitfld.long 0x00 0. "IN0,Enable IN endpoint 0" "0: Disable endpoint IN 0 (no response to IN..,1: Enable endpoint IN 0 (response to IN tokens)"
group.long 0x514++0x03
line.long 0x00 "EPOUTEN,Endpoint OUT enable"
bitfld.long 0x00 8. "ISOOUT,Enable ISO OUT endpoint 8" "0: Disable ISO OUT endpoint 8,1: Enable ISO OUT endpoint 8"
bitfld.long 0x00 7. "OUT7,Enable OUT endpoint 7" "0: Disable endpoint OUT 7 (no response to OUT..,1: Enable endpoint OUT 7 (response to OUT tokens)"
newline
bitfld.long 0x00 6. "OUT6,Enable OUT endpoint 6" "0: Disable endpoint OUT 6 (no response to OUT..,1: Enable endpoint OUT 6 (response to OUT tokens)"
bitfld.long 0x00 5. "OUT5,Enable OUT endpoint 5" "0: Disable endpoint OUT 5 (no response to OUT..,1: Enable endpoint OUT 5 (response to OUT tokens)"
newline
bitfld.long 0x00 4. "OUT4,Enable OUT endpoint 4" "0: Disable endpoint OUT 4 (no response to OUT..,1: Enable endpoint OUT 4 (response to OUT tokens)"
bitfld.long 0x00 3. "OUT3,Enable OUT endpoint 3" "0: Disable endpoint OUT 3 (no response to OUT..,1: Enable endpoint OUT 3 (response to OUT tokens)"
newline
bitfld.long 0x00 2. "OUT2,Enable OUT endpoint 2" "0: Disable endpoint OUT 2 (no response to OUT..,1: Enable endpoint OUT 2 (response to OUT tokens)"
bitfld.long 0x00 1. "OUT1,Enable OUT endpoint 1" "0: Disable endpoint OUT 1 (no response to OUT..,1: Enable endpoint OUT 1 (response to OUT tokens)"
newline
bitfld.long 0x00 0. "OUT0,Enable OUT endpoint 0" "0: Disable endpoint OUT 0 (no response to OUT..,1: Enable endpoint OUT 0 (response to OUT tokens)"
wgroup.long 0x518++0x03
line.long 0x00 "EPSTALL,STALL endpoints"
bitfld.long 0x00 8. "STALL,Stall selected endpoint" "0: Don't stall selected endpoint,1: Stall selected endpoint"
bitfld.long 0x00 7. "IO,Selects IN or OUT endpoint" "0: Selects OUT endpoint,1: Selects IN endpoint"
newline
bitfld.long 0x00 0.--2. "EP,Select endpoint number" "0,1,2,3,4,5,6,7"
group.long 0x51C++0x03
line.long 0x00 "ISOSPLIT,Controls the split of ISO buffers"
hexmask.long.word 0x00 0.--15. 1. "SPLIT,Controls the split of ISO buffers"
rgroup.long 0x520++0x03
line.long 0x00 "FRAMECNTR,Returns the current value of the start of frame counter"
hexmask.long.word 0x00 0.--10. 1. "FRAMECNTR,Returns the current value of the start of frame counter"
group.long 0x52C++0x03
line.long 0x00 "LOWPOWER,Controls USBD peripheral low power mode during USB suspend"
bitfld.long 0x00 0. "LOWPOWER,Controls USBD peripheral low-power mode during USB suspend" "0: Software must write this value to exit low..,1: Software must write this value to enter low.."
group.long 0x530++0x03
line.long 0x00 "ISOINCONFIG,Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent"
bitfld.long 0x00 0. "RESPONSE,Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent" "0: Endpoint does not respond in that case,1: Endpoint responds with a zero-length data.."
repeat 8. (increment 0 1)(increment 0 0x14)
tree "EPIN[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "PTR,Description cluster: Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long ($2+0x604)++0x03
line.long 0x00 "MAXCNT,Description cluster: Maximum number of bytes to transfer"
hexmask.long.byte 0x00 0.--6. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long ($2+0x608)++0x03
line.long 0x00 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction"
hexmask.long.byte 0x00 0.--6. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat.end
tree "ISOIN"
group.long 0x6A0++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x6A4++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes to transfer"
hexmask.long.word 0x00 0.--9. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long 0x6A8++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--9. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat 8. (increment 0 1)(increment 0 0x114)
tree "EPOUT[$1]"
group.long ($2+0x700)++0x03
line.long 0x00 "PTR,Description cluster: Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long ($2+0x704)++0x03
line.long 0x00 "MAXCNT,Description cluster: Maximum number of bytes to transfer"
hexmask.long.byte 0x00 0.--6. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long ($2+0x708)++0x03
line.long 0x00 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction"
hexmask.long.byte 0x00 0.--6. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat.end
tree.end
tree "USBD_S"
base ad:0x50036000
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x04)++0x03
line.long 0x00 "TASKS_STARTEPIN[$1],Description collection: Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values and enables endpoint IN n to respond to traffic from host $1"
bitfld.long 0x00 0. "TASKS_STARTEPIN,Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values and enables endpoint IN n to respond to traffic from host" "?,1: Trigger task"
repeat.end
wgroup.long 0x24++0x03
line.long 0x00 "TASKS_STARTISOIN,Captures the ISOIN.PTR and ISOIN.MAXCNT registers values and enables sending data on ISO endpoint"
bitfld.long 0x00 0. "TASKS_STARTISOIN,Captures the ISOIN.PTR and ISOIN.MAXCNT registers values and enables sending data on ISO endpoint" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
wgroup.long ($2+0x28)++0x03
line.long 0x00 "TASKS_STARTEPOUT[$1],Description collection: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values and enables endpoint n to respond to traffic from host $1"
bitfld.long 0x00 0. "TASKS_STARTEPOUT,Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values and enables endpoint n to respond to traffic from host" "?,1: Trigger task"
repeat.end
wgroup.long 0x48++0x03
line.long 0x00 "TASKS_STARTISOOUT,Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values and enables receiving of data on ISO endpoint"
bitfld.long 0x00 0. "TASKS_STARTISOOUT,Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values and enables receiving of data on ISO endpoint" "?,1: Trigger task"
wgroup.long 0x4C++0x03
line.long 0x00 "TASKS_EP0RCVOUT,Allows OUT data stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0RCVOUT,Allows OUT data stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x50++0x03
line.long 0x00 "TASKS_EP0STATUS,Allows status stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0STATUS,Allows status stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x54++0x03
line.long 0x00 "TASKS_EP0STALL,Stalls data and status stage on control endpoint 0"
bitfld.long 0x00 0. "TASKS_EP0STALL,Stalls data and status stage on control endpoint 0" "?,1: Trigger task"
wgroup.long 0x58++0x03
line.long 0x00 "TASKS_DPDMDRIVE,Forces D+ and D- lines into the state defined in the DPDMVALUE register"
bitfld.long 0x00 0. "TASKS_DPDMDRIVE,Forces D+ and D- lines into the state defined in the DPDMVALUE register" "?,1: Trigger task"
wgroup.long 0x5C++0x03
line.long 0x00 "TASKS_DPDMNODRIVE,Stops forcing D+ and D- lines into any state (USB engine takes control)"
bitfld.long 0x00 0. "TASKS_DPDMNODRIVE,Stops forcing D+ and D- lines into any state (USB engine takes control)" "?,1: Trigger task"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0x84)++0x03
line.long 0x00 "SUBSCRIBE_STARTEPIN[$1],Description collection: Subscribe configuration for task STARTEPIN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTEPIN[n] will subscribe to"
repeat.end
group.long 0xA4++0x03
line.long 0x00 "SUBSCRIBE_STARTISOIN,Subscribe configuration for task STARTISOIN"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTISOIN will subscribe to"
repeat 8. (increment 0 1) (increment 0 0x4)
group.long ($2+0xA8)++0x03
line.long 0x00 "SUBSCRIBE_STARTEPOUT[$1],Description collection: Subscribe configuration for task STARTEPOUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTEPOUT[n] will subscribe to"
repeat.end
group.long 0xC8++0x03
line.long 0x00 "SUBSCRIBE_STARTISOOUT,Subscribe configuration for task STARTISOOUT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STARTISOOUT will subscribe to"
group.long 0xCC++0x03
line.long 0x00 "SUBSCRIBE_EP0RCVOUT,Subscribe configuration for task EP0RCVOUT"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0RCVOUT will subscribe to"
group.long 0xD0++0x03
line.long 0x00 "SUBSCRIBE_EP0STATUS,Subscribe configuration for task EP0STATUS"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0STATUS will subscribe to"
group.long 0xD4++0x03
line.long 0x00 "SUBSCRIBE_EP0STALL,Subscribe configuration for task EP0STALL"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task EP0STALL will subscribe to"
group.long 0xD8++0x03
line.long 0x00 "SUBSCRIBE_DPDMDRIVE,Subscribe configuration for task DPDMDRIVE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DPDMDRIVE will subscribe to"
group.long 0xDC++0x03
line.long 0x00 "SUBSCRIBE_DPDMNODRIVE,Subscribe configuration for task DPDMNODRIVE"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task DPDMNODRIVE will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_USBRESET,Signals that a USB reset condition has been detected on USB lines"
bitfld.long 0x00 0. "EVENTS_USBRESET,Signals that a USB reset condition has been detected on USB lines" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STARTED,Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register"
bitfld.long 0x00 0. "EVENTS_STARTED,Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x108)++0x03
line.long 0x00 "EVENTS_ENDEPIN[$1],Description collection: The whole EPIN[n] buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDEPIN,The whole EPIN[n] buffer has been consumed" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x128++0x03
line.long 0x00 "EVENTS_EP0DATADONE,An acknowledged data transfer has taken place on the control endpoint"
bitfld.long 0x00 0. "EVENTS_EP0DATADONE,An acknowledged data transfer has taken place on the control endpoint" "0: Event not generated,1: Event generated"
group.long 0x12C++0x03
line.long 0x00 "EVENTS_ENDISOIN,The whole ISOIN buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDISOIN,The whole ISOIN buffer has been consumed" "0: Event not generated,1: Event generated"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x130)++0x03
line.long 0x00 "EVENTS_ENDEPOUT[$1],Description collection: The whole EPOUT[n] buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDEPOUT,The whole EPOUT[n] buffer has been consumed" "0: Event not generated,1: Event generated"
repeat.end
group.long 0x150++0x03
line.long 0x00 "EVENTS_ENDISOOUT,The whole ISOOUT buffer has been consumed"
bitfld.long 0x00 0. "EVENTS_ENDISOOUT,The whole ISOOUT buffer has been consumed" "0: Event not generated,1: Event generated"
group.long 0x154++0x03
line.long 0x00 "EVENTS_SOF,Signals that a SOF (start of frame) condition has been detected on USB lines"
bitfld.long 0x00 0. "EVENTS_SOF,Signals that a SOF (start of frame) condition has been detected on USB lines" "0: Event not generated,1: Event generated"
group.long 0x158++0x03
line.long 0x00 "EVENTS_USBEVENT,An event or an error not covered by specific events has occurred"
bitfld.long 0x00 0. "EVENTS_USBEVENT,An event or an error not covered by specific events has occurred" "0: Event not generated,1: Event generated"
group.long 0x15C++0x03
line.long 0x00 "EVENTS_EP0SETUP,A valid SETUP token has been received (and acknowledged) on the control endpoint"
bitfld.long 0x00 0. "EVENTS_EP0SETUP,A valid SETUP token has been received (and acknowledged) on the control endpoint" "0: Event not generated,1: Event generated"
group.long 0x160++0x03
line.long 0x00 "EVENTS_EPDATA,A data transfer has occurred on a data endpoint indicated by the EPDATASTATUS register"
bitfld.long 0x00 0. "EVENTS_EPDATA,A data transfer has occurred on a data endpoint indicated by the EPDATASTATUS register" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_USBRESET,Publish configuration for event USBRESET"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBRESET will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STARTED,Publish configuration for event STARTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x188)++0x03
line.long 0x00 "PUBLISH_ENDEPIN[$1],Description collection: Publish configuration for event ENDEPIN[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDEPIN[n] will publish to"
repeat.end
group.long 0x1A8++0x03
line.long 0x00 "PUBLISH_EP0DATADONE,Publish configuration for event EP0DATADONE"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EP0DATADONE will publish to"
group.long 0x1AC++0x03
line.long 0x00 "PUBLISH_ENDISOIN,Publish configuration for event ENDISOIN"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDISOIN will publish to"
repeat 8. (increment 0 1) (increment 0 0x04)
group.long ($2+0x1B0)++0x03
line.long 0x00 "PUBLISH_ENDEPOUT[$1],Description collection: Publish configuration for event ENDEPOUT[n $1"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDEPOUT[n] will publish to"
repeat.end
group.long 0x1D0++0x03
line.long 0x00 "PUBLISH_ENDISOOUT,Publish configuration for event ENDISOOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event ENDISOOUT will publish to"
group.long 0x1D4++0x03
line.long 0x00 "PUBLISH_SOF,Publish configuration for event SOF"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event SOF will publish to"
group.long 0x1D8++0x03
line.long 0x00 "PUBLISH_USBEVENT,Publish configuration for event USBEVENT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBEVENT will publish to"
group.long 0x1DC++0x03
line.long 0x00 "PUBLISH_EP0SETUP,Publish configuration for event EP0SETUP"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EP0SETUP will publish to"
group.long 0x1E0++0x03
line.long 0x00 "PUBLISH_EPDATA,Publish configuration for event EPDATA"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event EPDATA will publish to"
group.long 0x200++0x03
line.long 0x00 "SHORTS,Shortcuts between local events and tasks"
bitfld.long 0x00 4. "ENDEPOUT0_EP0RCVOUT,Shortcut between event ENDEPOUT[0] and task EP0RCVOUT" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 3. "ENDEPOUT0_EP0STATUS,Shortcut between event ENDEPOUT[0] and task EP0STATUS" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 2. "EP0DATADONE_EP0STATUS,Shortcut between event EP0DATADONE and task EP0STATUS" "0: Disable shortcut,1: Enable shortcut"
bitfld.long 0x00 1. "EP0DATADONE_STARTEPOUT0,Shortcut between event EP0DATADONE and task STARTEPOUT[0]" "0: Disable shortcut,1: Enable shortcut"
newline
bitfld.long 0x00 0. "EP0DATADONE_STARTEPIN0,Shortcut between event EP0DATADONE and task STARTEPIN[0]" "0: Disable shortcut,1: Enable shortcut"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 24. "EPDATA,Enable or disable interrupt for event EPDATA" "0: Disabled,1: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Enable or disable interrupt for event EP0SETUP" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Enable or disable interrupt for event USBEVENT" "0: Disabled,1: Enabled"
bitfld.long 0x00 21. "SOF,Enable or disable interrupt for event SOF" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Enable or disable interrupt for event ENDISOOUT" "0: Disabled,1: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Enable or disable interrupt for event ENDEPOUT[7]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Enable or disable interrupt for event ENDEPOUT[6]" "0: Disabled,1: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Enable or disable interrupt for event ENDEPOUT[5]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Enable or disable interrupt for event ENDEPOUT[4]" "0: Disabled,1: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Enable or disable interrupt for event ENDEPOUT[3]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Enable or disable interrupt for event ENDEPOUT[2]" "0: Disabled,1: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Enable or disable interrupt for event ENDEPOUT[1]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Enable or disable interrupt for event ENDEPOUT[0]" "0: Disabled,1: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Enable or disable interrupt for event ENDISOIN" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Enable or disable interrupt for event EP0DATADONE" "0: Disabled,1: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Enable or disable interrupt for event ENDEPIN[7]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Enable or disable interrupt for event ENDEPIN[6]" "0: Disabled,1: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Enable or disable interrupt for event ENDEPIN[5]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Enable or disable interrupt for event ENDEPIN[4]" "0: Disabled,1: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Enable or disable interrupt for event ENDEPIN[3]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Enable or disable interrupt for event ENDEPIN[2]" "0: Disabled,1: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Enable or disable interrupt for event ENDEPIN[1]" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Enable or disable interrupt for event ENDEPIN[0]" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "STARTED,Enable or disable interrupt for event STARTED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Enable or disable interrupt for event USBRESET" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 24. "EPDATA,Write '1' to enable interrupt for event EPDATA" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Write '1' to enable interrupt for event EP0SETUP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Write '1' to enable interrupt for event USBEVENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 21. "SOF,Write '1' to enable interrupt for event SOF" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Write '1' to enable interrupt for event ENDISOOUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Write '1' to enable interrupt for event ENDEPOUT[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Write '1' to enable interrupt for event ENDEPOUT[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Write '1' to enable interrupt for event ENDEPOUT[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Write '1' to enable interrupt for event ENDEPOUT[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Write '1' to enable interrupt for event ENDEPOUT[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Write '1' to enable interrupt for event ENDEPOUT[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Write '1' to enable interrupt for event ENDEPOUT[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Write '1' to enable interrupt for event ENDEPOUT[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Write '1' to enable interrupt for event ENDISOIN" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Write '1' to enable interrupt for event EP0DATADONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Write '1' to enable interrupt for event ENDEPIN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Write '1' to enable interrupt for event ENDEPIN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Write '1' to enable interrupt for event ENDEPIN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Write '1' to enable interrupt for event ENDEPIN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Write '1' to enable interrupt for event ENDEPIN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Write '1' to enable interrupt for event ENDEPIN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Write '1' to enable interrupt for event ENDEPIN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Write '1' to enable interrupt for event ENDEPIN[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Write '1' to enable interrupt for event USBRESET" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 24. "EPDATA,Write '1' to disable interrupt for event EPDATA" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 23. "EP0SETUP,Write '1' to disable interrupt for event EP0SETUP" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 22. "USBEVENT,Write '1' to disable interrupt for event USBEVENT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 21. "SOF,Write '1' to disable interrupt for event SOF" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 20. "ENDISOOUT,Write '1' to disable interrupt for event ENDISOOUT" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 19. "ENDEPOUT7,Write '1' to disable interrupt for event ENDEPOUT[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 18. "ENDEPOUT6,Write '1' to disable interrupt for event ENDEPOUT[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 17. "ENDEPOUT5,Write '1' to disable interrupt for event ENDEPOUT[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 16. "ENDEPOUT4,Write '1' to disable interrupt for event ENDEPOUT[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 15. "ENDEPOUT3,Write '1' to disable interrupt for event ENDEPOUT[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 14. "ENDEPOUT2,Write '1' to disable interrupt for event ENDEPOUT[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 13. "ENDEPOUT1,Write '1' to disable interrupt for event ENDEPOUT[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 12. "ENDEPOUT0,Write '1' to disable interrupt for event ENDEPOUT[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 11. "ENDISOIN,Write '1' to disable interrupt for event ENDISOIN" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 10. "EP0DATADONE,Write '1' to disable interrupt for event EP0DATADONE" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 9. "ENDEPIN7,Write '1' to disable interrupt for event ENDEPIN[7]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 8. "ENDEPIN6,Write '1' to disable interrupt for event ENDEPIN[6]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 7. "ENDEPIN5,Write '1' to disable interrupt for event ENDEPIN[5]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 6. "ENDEPIN4,Write '1' to disable interrupt for event ENDEPIN[4]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 5. "ENDEPIN3,Write '1' to disable interrupt for event ENDEPIN[3]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 4. "ENDEPIN2,Write '1' to disable interrupt for event ENDEPIN[2]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 3. "ENDEPIN1,Write '1' to disable interrupt for event ENDEPIN[1]" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 2. "ENDEPIN0,Write '1' to disable interrupt for event ENDEPIN[0]" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBRESET,Write '1' to disable interrupt for event USBRESET" "0: Read: Disabled,1: Read: Enabled"
group.long 0x400++0x03
line.long 0x00 "EVENTCAUSE,Details on what caused the USBEVENT event"
bitfld.long 0x00 11. "READY,USB device is ready for normal operation" "0: USBEVENT was not issued due to USBD..,1: USBD peripheral is ready"
bitfld.long 0x00 10. "USBWUALLOWED,USB MAC has been woken up and operational" "0: Wake up not allowed,1: Wake up allowed"
newline
bitfld.long 0x00 9. "RESUME,Signals that a RESUME condition (K state or activity restart) has been detected on USB lines" "0: Resume not detected,1: Resume detected"
bitfld.long 0x00 8. "SUSPEND,Signals that USB lines have been idle long enough for the device to enter suspend" "0: Suspend not detected,1: Suspend detected"
newline
bitfld.long 0x00 0. "ISOOUTCRC,CRC error was detected on isochronous OUT endpoint 8" "0: No error detected,1: Error detected"
group.long 0x468++0x03
line.long 0x00 "EPSTATUS,Provides information on which endpoint's EasyDMA registers have been captured"
bitfld.long 0x00 24. "EPOUT8,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 23. "EPOUT7,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 22. "EPOUT6,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 21. "EPOUT5,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 20. "EPOUT4,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 19. "EPOUT3,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 18. "EPOUT2,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 17. "EPOUT1,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 16. "EPOUT0,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 8. "EPIN8,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 7. "EPIN7,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 6. "EPIN6,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 5. "EPIN5,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 4. "EPIN4,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 3. "EPIN3,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 2. "EPIN2,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
newline
bitfld.long 0x00 1. "EPIN1,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
bitfld.long 0x00 0. "EPIN0,Captured state of endpoint's EasyDMA registers" "0: EasyDMA registers have not been captured for..,1: EasyDMA registers have been captured for this.."
group.long 0x46C++0x03
line.long 0x00 "EPDATASTATUS,Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event)"
bitfld.long 0x00 23. "EPOUT7,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 22. "EPOUT6,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 21. "EPOUT5,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 20. "EPOUT4,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 19. "EPOUT3,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 18. "EPOUT2,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 17. "EPOUT1,Acknowledged data transfer on this OUT endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 7. "EPIN7,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 6. "EPIN6,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 5. "EPIN5,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 4. "EPIN4,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 3. "EPIN3,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
newline
bitfld.long 0x00 2. "EPIN2,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
bitfld.long 0x00 1. "EPIN1,Acknowledged data transfer on this IN endpoint" "0: No acknowledged data transfer on this endpoint,1: Acknowledged data transfer on this endpoint.."
rgroup.long 0x470++0x03
line.long 0x00 "USBADDR,Device USB address"
hexmask.long.byte 0x00 0.--6. 1. "ADDR,Device USB address"
rgroup.long 0x480++0x03
line.long 0x00 "BMREQUESTTYPE,SETUP data byte 0 bmRequestType"
bitfld.long 0x00 7. "DIRECTION,Data transfer direction" "0: Host-to-device,1: Device-to-host"
bitfld.long 0x00 5.--6. "TYPE,Data transfer type" "0: Standard,1: Class,2: Vendor,?..."
newline
bitfld.long 0x00 0.--4. "RECIPIENT,Data transfer type" "0: Device,1: Interface,2: Endpoint,3: Other,?..."
rgroup.long 0x484++0x03
line.long 0x00 "BREQUEST,SETUP data byte 1 bRequest"
hexmask.long.byte 0x00 0.--7. 1. "BREQUEST,SETUP data byte 1 bRequest"
rgroup.long 0x488++0x03
line.long 0x00 "WVALUEL,SETUP data byte 2 LSB of wValue"
hexmask.long.byte 0x00 0.--7. 1. "WVALUEL,SETUP data byte 2 LSB of wValue"
rgroup.long 0x48C++0x03
line.long 0x00 "WVALUEH,SETUP data byte 3 MSB of wValue"
hexmask.long.byte 0x00 0.--7. 1. "WVALUEH,SETUP data byte 3 MSB of wValue"
rgroup.long 0x490++0x03
line.long 0x00 "WINDEXL,SETUP data byte 4 LSB of wIndex"
hexmask.long.byte 0x00 0.--7. 1. "WINDEXL,SETUP data byte 4 LSB of wIndex"
rgroup.long 0x494++0x03
line.long 0x00 "WINDEXH,SETUP data byte 5 MSB of wIndex"
hexmask.long.byte 0x00 0.--7. 1. "WINDEXH,SETUP data byte 5 MSB of wIndex"
rgroup.long 0x498++0x03
line.long 0x00 "WLENGTHL,SETUP data byte 6 LSB of wLength"
hexmask.long.byte 0x00 0.--7. 1. "WLENGTHL,SETUP data byte 6 LSB of wLength"
rgroup.long 0x49C++0x03
line.long 0x00 "WLENGTHH,SETUP data byte 7 MSB of wLength"
hexmask.long.byte 0x00 0.--7. 1. "WLENGTHH,SETUP data byte 7 MSB of wLength"
group.long 0x500++0x03
line.long 0x00 "ENABLE,Enable USB"
bitfld.long 0x00 0. "ENABLE,Enable USB" "0: USB peripheral is disabled,1: USB peripheral is enabled"
group.long 0x504++0x03
line.long 0x00 "USBPULLUP,Control of the USB pull-up"
bitfld.long 0x00 0. "CONNECT,Control of the USB pull-up on the D+ line" "0: Pull-up is disconnected,1: Pull-up is connected to D+"
group.long 0x508++0x03
line.long 0x00 "DPDMVALUE,State D+ and D- lines will be forced into by the DPDMDRIVE task"
bitfld.long 0x00 0.--4. "STATE,State D+ and D- lines will be forced into by the DPDMDRIVE task" "?,1: D+ forced low D- forced high (K state) for a..,2: D+ forced high D- forced low (J state),?,4: D+ forced low D- forced high (K state),?..."
group.long 0x50C++0x03
line.long 0x00 "DTOGGLE,Data toggle control and status"
bitfld.long 0x00 8.--9. "VALUE,Data toggle value" "0: No action on data toggle when writing the..,1: Data toggle is DATA0 on endpoint set by EP..,2: Data toggle is DATA1 on endpoint set by EP..,?..."
bitfld.long 0x00 7. "IO,Selects IN or OUT endpoint" "0: Selects OUT endpoint,1: Selects IN endpoint"
newline
bitfld.long 0x00 0.--2. "EP,Select bulk endpoint number" "0,1,2,3,4,5,6,7"
group.long 0x510++0x03
line.long 0x00 "EPINEN,Endpoint IN enable"
bitfld.long 0x00 8. "ISOIN,Enable ISO IN endpoint" "0: Disable ISO IN endpoint 8,1: Enable ISO IN endpoint 8"
bitfld.long 0x00 7. "IN7,Enable IN endpoint 7" "0: Disable endpoint IN 7 (no response to IN..,1: Enable endpoint IN 7 (response to IN tokens)"
newline
bitfld.long 0x00 6. "IN6,Enable IN endpoint 6" "0: Disable endpoint IN 6 (no response to IN..,1: Enable endpoint IN 6 (response to IN tokens)"
bitfld.long 0x00 5. "IN5,Enable IN endpoint 5" "0: Disable endpoint IN 5 (no response to IN..,1: Enable endpoint IN 5 (response to IN tokens)"
newline
bitfld.long 0x00 4. "IN4,Enable IN endpoint 4" "0: Disable endpoint IN 4 (no response to IN..,1: Enable endpoint IN 4 (response to IN tokens)"
bitfld.long 0x00 3. "IN3,Enable IN endpoint 3" "0: Disable endpoint IN 3 (no response to IN..,1: Enable endpoint IN 3 (response to IN tokens)"
newline
bitfld.long 0x00 2. "IN2,Enable IN endpoint 2" "0: Disable endpoint IN 2 (no response to IN..,1: Enable endpoint IN 2 (response to IN tokens)"
bitfld.long 0x00 1. "IN1,Enable IN endpoint 1" "0: Disable endpoint IN 1 (no response to IN..,1: Enable endpoint IN 1 (response to IN tokens)"
newline
bitfld.long 0x00 0. "IN0,Enable IN endpoint 0" "0: Disable endpoint IN 0 (no response to IN..,1: Enable endpoint IN 0 (response to IN tokens)"
group.long 0x514++0x03
line.long 0x00 "EPOUTEN,Endpoint OUT enable"
bitfld.long 0x00 8. "ISOOUT,Enable ISO OUT endpoint 8" "0: Disable ISO OUT endpoint 8,1: Enable ISO OUT endpoint 8"
bitfld.long 0x00 7. "OUT7,Enable OUT endpoint 7" "0: Disable endpoint OUT 7 (no response to OUT..,1: Enable endpoint OUT 7 (response to OUT tokens)"
newline
bitfld.long 0x00 6. "OUT6,Enable OUT endpoint 6" "0: Disable endpoint OUT 6 (no response to OUT..,1: Enable endpoint OUT 6 (response to OUT tokens)"
bitfld.long 0x00 5. "OUT5,Enable OUT endpoint 5" "0: Disable endpoint OUT 5 (no response to OUT..,1: Enable endpoint OUT 5 (response to OUT tokens)"
newline
bitfld.long 0x00 4. "OUT4,Enable OUT endpoint 4" "0: Disable endpoint OUT 4 (no response to OUT..,1: Enable endpoint OUT 4 (response to OUT tokens)"
bitfld.long 0x00 3. "OUT3,Enable OUT endpoint 3" "0: Disable endpoint OUT 3 (no response to OUT..,1: Enable endpoint OUT 3 (response to OUT tokens)"
newline
bitfld.long 0x00 2. "OUT2,Enable OUT endpoint 2" "0: Disable endpoint OUT 2 (no response to OUT..,1: Enable endpoint OUT 2 (response to OUT tokens)"
bitfld.long 0x00 1. "OUT1,Enable OUT endpoint 1" "0: Disable endpoint OUT 1 (no response to OUT..,1: Enable endpoint OUT 1 (response to OUT tokens)"
newline
bitfld.long 0x00 0. "OUT0,Enable OUT endpoint 0" "0: Disable endpoint OUT 0 (no response to OUT..,1: Enable endpoint OUT 0 (response to OUT tokens)"
wgroup.long 0x518++0x03
line.long 0x00 "EPSTALL,STALL endpoints"
bitfld.long 0x00 8. "STALL,Stall selected endpoint" "0: Don't stall selected endpoint,1: Stall selected endpoint"
bitfld.long 0x00 7. "IO,Selects IN or OUT endpoint" "0: Selects OUT endpoint,1: Selects IN endpoint"
newline
bitfld.long 0x00 0.--2. "EP,Select endpoint number" "0,1,2,3,4,5,6,7"
group.long 0x51C++0x03
line.long 0x00 "ISOSPLIT,Controls the split of ISO buffers"
hexmask.long.word 0x00 0.--15. 1. "SPLIT,Controls the split of ISO buffers"
rgroup.long 0x520++0x03
line.long 0x00 "FRAMECNTR,Returns the current value of the start of frame counter"
hexmask.long.word 0x00 0.--10. 1. "FRAMECNTR,Returns the current value of the start of frame counter"
group.long 0x52C++0x03
line.long 0x00 "LOWPOWER,Controls USBD peripheral low power mode during USB suspend"
bitfld.long 0x00 0. "LOWPOWER,Controls USBD peripheral low-power mode during USB suspend" "0: Software must write this value to exit low..,1: Software must write this value to enter low.."
group.long 0x530++0x03
line.long 0x00 "ISOINCONFIG,Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent"
bitfld.long 0x00 0. "RESPONSE,Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent" "0: Endpoint does not respond in that case,1: Endpoint responds with a zero-length data.."
repeat 8. (increment 0 1)(increment 0 0x14)
tree "EPIN[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "PTR,Description cluster: Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long ($2+0x604)++0x03
line.long 0x00 "MAXCNT,Description cluster: Maximum number of bytes to transfer"
hexmask.long.byte 0x00 0.--6. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long ($2+0x608)++0x03
line.long 0x00 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction"
hexmask.long.byte 0x00 0.--6. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat.end
tree "ISOIN"
group.long 0x6A0++0x03
line.long 0x00 "PTR,Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long 0x6A4++0x03
line.long 0x00 "MAXCNT,Maximum number of bytes to transfer"
hexmask.long.word 0x00 0.--9. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long 0x6A8++0x03
line.long 0x00 "AMOUNT,Number of bytes transferred in the last transaction"
hexmask.long.word 0x00 0.--9. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat 8. (increment 0 1)(increment 0 0x114)
tree "EPOUT[$1]"
group.long ($2+0x700)++0x03
line.long 0x00 "PTR,Description cluster: Data pointer"
hexmask.long 0x00 0.--31. 1. "PTR,Data pointer"
group.long ($2+0x704)++0x03
line.long 0x00 "MAXCNT,Description cluster: Maximum number of bytes to transfer"
hexmask.long.byte 0x00 0.--6. 1. "MAXCNT,Maximum number of bytes to transfer"
rgroup.long ($2+0x708)++0x03
line.long 0x00 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction"
hexmask.long.byte 0x00 0.--6. 1. "AMOUNT,Number of bytes transferred in the last transaction"
tree.end
repeat.end
tree.end
tree.end
tree "USBREG (USB Regulator)"
tree "USBREGULATOR_NS"
base ad:0x40037000
group.long 0x100++0x03
line.long 0x00 "EVENTS_USBDETECTED,Voltage supply detected on VBUS"
bitfld.long 0x00 0. "EVENTS_USBDETECTED,Voltage supply detected on VBUS" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_USBREMOVED,Voltage supply removed from VBUS"
bitfld.long 0x00 0. "EVENTS_USBREMOVED,Voltage supply removed from VBUS" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_USBPWRRDY,USB 3.3 V supply ready"
bitfld.long 0x00 0. "EVENTS_USBPWRRDY,USB 3.3 V supply ready" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_USBDETECTED,Publish configuration for event USBDETECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBDETECTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_USBREMOVED,Publish configuration for event USBREMOVED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBREMOVED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_USBPWRRDY,Publish configuration for event USBPWRRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBPWRRDY will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Enable or disable interrupt for event USBPWRRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Enable or disable interrupt for event USBREMOVED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Enable or disable interrupt for event USBDETECTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Write '1' to enable interrupt for event USBPWRRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Write '1' to enable interrupt for event USBREMOVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Write '1' to enable interrupt for event USBDETECTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Write '1' to disable interrupt for event USBPWRRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Write '1' to disable interrupt for event USBREMOVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Write '1' to disable interrupt for event USBDETECTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "USBREGSTATUS,USB supply status"
bitfld.long 0x00 1. "OUTPUTRDY,USB supply output settling time elapsed" "0: USBREG output settling time not elapsed,1: USBREG output settling time elapsed (same.."
bitfld.long 0x00 0. "VBUSDETECT,VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)" "0: VBUS voltage below valid threshold,1: VBUS voltage above valid threshold"
tree.end
tree "USBREGULATOR_S"
base ad:0x50037000
group.long 0x100++0x03
line.long 0x00 "EVENTS_USBDETECTED,Voltage supply detected on VBUS"
bitfld.long 0x00 0. "EVENTS_USBDETECTED,Voltage supply detected on VBUS" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_USBREMOVED,Voltage supply removed from VBUS"
bitfld.long 0x00 0. "EVENTS_USBREMOVED,Voltage supply removed from VBUS" "0: Event not generated,1: Event generated"
group.long 0x108++0x03
line.long 0x00 "EVENTS_USBPWRRDY,USB 3.3 V supply ready"
bitfld.long 0x00 0. "EVENTS_USBPWRRDY,USB 3.3 V supply ready" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_USBDETECTED,Publish configuration for event USBDETECTED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBDETECTED will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_USBREMOVED,Publish configuration for event USBREMOVED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBREMOVED will publish to"
group.long 0x188++0x03
line.long 0x00 "PUBLISH_USBPWRRDY,Publish configuration for event USBPWRRDY"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event USBPWRRDY will publish to"
group.long 0x300++0x03
line.long 0x00 "INTEN,Enable or disable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Enable or disable interrupt for event USBPWRRDY" "0: Disabled,1: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Enable or disable interrupt for event USBREMOVED" "0: Disabled,1: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Enable or disable interrupt for event USBDETECTED" "0: Disabled,1: Enabled"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Write '1' to enable interrupt for event USBPWRRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Write '1' to enable interrupt for event USBREMOVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Write '1' to enable interrupt for event USBDETECTED" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 2. "USBPWRRDY,Write '1' to disable interrupt for event USBPWRRDY" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 1. "USBREMOVED,Write '1' to disable interrupt for event USBREMOVED" "0: Read: Disabled,1: Read: Enabled"
newline
bitfld.long 0x00 0. "USBDETECTED,Write '1' to disable interrupt for event USBDETECTED" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "USBREGSTATUS,USB supply status"
bitfld.long 0x00 1. "OUTPUTRDY,USB supply output settling time elapsed" "0: USBREG output settling time not elapsed,1: USBREG output settling time elapsed (same.."
bitfld.long 0x00 0. "VBUSDETECT,VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)" "0: VBUS voltage below valid threshold,1: VBUS voltage above valid threshold"
tree.end
tree.end
endif
tree "VMC (Volatile Memory Controller)"
sif cpuis("NRF5340QKAA-NET")
tree "VMC_NS"
base ad:0x41081000
repeat 4. (increment 0 1)(increment 0 0x10)
tree "RAM[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "POWER,Description cluster: RAM[n] power control register"
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "0: Off,1: On"
group.long ($2+0x604)++0x03
line.long 0x00 "POWERSET,Description cluster: RAM[n] power control set register"
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: On"
group.long ($2+0x608)++0x03
line.long 0x00 "POWERCLR,Description cluster: RAM[n] power control clear register"
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: Off"
tree.end
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-APP")
tree "VMC_NS"
base ad:0x40081000
repeat 8. (increment 0 1)(increment 0 0x10)
tree "RAM[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "POWER,Description cluster: RAM[n] power control register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "0: Off,1: On"
group.long ($2+0x604)++0x03
line.long 0x00 "POWERSET,Description cluster: RAM[n] power control set register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: On"
group.long ($2+0x608)++0x03
line.long 0x00 "POWERCLR,Description cluster: RAM[n] power control clear register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: Off"
tree.end
repeat.end
tree.end
tree "VMC_S"
base ad:0x50081000
repeat 8. (increment 0 1)(increment 0 0x10)
tree "RAM[$1]"
group.long ($2+0x600)++0x03
line.long 0x00 "POWER,Description cluster: RAM[n] power control register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "0: Off,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "0: Off,1: On"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "0: Off,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "0: Off,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "0: Off,1: On"
group.long ($2+0x604)++0x03
line.long 0x00 "POWERSET,Description cluster: RAM[n] power control set register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: On"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: On"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: On"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: On"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: On"
group.long ($2+0x608)++0x03
line.long 0x00 "POWERCLR,Description cluster: RAM[n] power control clear register"
bitfld.long 0x00 31. "S15RETENTION,Keep retention on RAM section S15 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 30. "S14RETENTION,Keep retention on RAM section S14 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 29. "S13RETENTION,Keep retention on RAM section S13 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 28. "S12RETENTION,Keep retention on RAM section S12 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 27. "S11RETENTION,Keep retention on RAM section S11 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 26. "S10RETENTION,Keep retention on RAM section S10 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 25. "S9RETENTION,Keep retention on RAM section S9 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 24. "S8RETENTION,Keep retention on RAM section S8 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 23. "S7RETENTION,Keep retention on RAM section S7 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 22. "S6RETENTION,Keep retention on RAM section S6 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 21. "S5RETENTION,Keep retention on RAM section S5 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 20. "S4RETENTION,Keep retention on RAM section S4 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 19. "S3RETENTION,Keep retention on RAM section S3 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 18. "S2RETENTION,Keep retention on RAM section S2 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 17. "S1RETENTION,Keep retention on RAM section S1 of RAM[n] when RAM section is switched off" "?,1: Off"
bitfld.long 0x00 16. "S0RETENTION,Keep retention on RAM section S0 of RAM[n] when RAM section is switched off" "?,1: Off"
newline
bitfld.long 0x00 15. "S15POWER,Keep RAM section S15 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 14. "S14POWER,Keep RAM section S14 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 13. "S13POWER,Keep RAM section S13 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 12. "S12POWER,Keep RAM section S12 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 11. "S11POWER,Keep RAM section S11 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 10. "S10POWER,Keep RAM section S10 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 9. "S9POWER,Keep RAM section S9 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 8. "S8POWER,Keep RAM section S8 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 7. "S7POWER,Keep RAM section S7 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 6. "S6POWER,Keep RAM section S6 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 5. "S5POWER,Keep RAM section S5 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 4. "S4POWER,Keep RAM section S4 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 3. "S3POWER,Keep RAM section S3 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 2. "S2POWER,Keep RAM section S2 of RAM[n] on or off in System ON mode" "?,1: Off"
newline
bitfld.long 0x00 1. "S1POWER,Keep RAM section S1 of RAM[n] on or off in System ON mode" "?,1: Off"
bitfld.long 0x00 0. "S0POWER,Keep RAM section S0 of RAM[n] on or off in System ON mode" "?,1: Off"
tree.end
repeat.end
tree.end
endif
tree.end
sif cpuis("NRF5340QKAA-NET")
tree "VREQCTRL (Voltage Request Control)"
base ad:0x41004000
tree "VREGRADIO"
group.long 0x500++0x03
line.long 0x00 "VREQH,Request high voltage on RADIO After requesting high voltage the user must wait until VREQHREADY is set to Ready"
bitfld.long 0x00 0. "VREQH,Request high voltage" "0: Disabled,1: Enabled"
rgroup.long 0x508++0x03
line.long 0x00 "VREQHREADY,High voltage on RADIO is ready"
bitfld.long 0x00 0. "READY,RADIO is ready to operate on high voltage" "0: Not ready,1: Ready"
tree.end
tree.end
endif
tree "WDT (Watchdog Timer Unit)"
sif cpuis("NRF5340QKAA-APP")
tree "WDT0_NS"
base ad:0x40018000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the watchdog"
bitfld.long 0x00 0. "TASKS_START,Start the watchdog" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop the watchdog timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop the watchdog timer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_TIMEOUT,Watchdog timeout"
bitfld.long 0x00 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Watchdog stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x324++0x03
line.long 0x00 "NMIENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x328++0x03
line.long 0x00 "NMIENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RUNSTATUS,Run status"
bitfld.long 0x00 0. "RUNSTATUSWDT,Indicates whether or not the watchdog is running" "0: Watchdog not running,1: Watchdog is running"
rgroup.long 0x404++0x03
line.long 0x00 "REQSTATUS,Request status"
bitfld.long 0x00 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.."
bitfld.long 0x00 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.."
newline
bitfld.long 0x00 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.."
bitfld.long 0x00 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.."
newline
bitfld.long 0x00 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.."
bitfld.long 0x00 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.."
newline
bitfld.long 0x00 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.."
bitfld.long 0x00 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.."
group.long 0x504++0x03
line.long 0x00 "CRV,Counter reload value"
hexmask.long 0x00 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock"
group.long 0x508++0x03
line.long 0x00 "RREN,Enable register for reload request registers"
bitfld.long 0x00 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register"
bitfld.long 0x00 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register"
newline
bitfld.long 0x00 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register"
bitfld.long 0x00 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register"
newline
bitfld.long 0x00 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register"
bitfld.long 0x00 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register"
newline
bitfld.long 0x00 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register"
bitfld.long 0x00 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register"
group.long 0x50C++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 6. "STOPEN,Allow stopping the watchdog" "0: Do not allow stopping the watchdog,1: Allow stopping the watchdog"
bitfld.long 0x00 3. "HALT,Configure the watchdog to either be paused or kept running while the CPU is halted by the debugger" "0: Pause watchdog while the CPU is halted by the..,1: Keep the watchdog running while the CPU is.."
newline
bitfld.long 0x00 0. "SLEEP,Configure the watchdog to either be paused or kept running while the CPU is sleeping" "0: Pause watchdog while the CPU is sleeping,1: Keep the watchdog running while the CPU is.."
wgroup.long 0x520++0x03
line.long 0x00 "TSEN,Task Stop Enable"
hexmask.long 0x00 0.--31. 1. "TSEN,Task stop enable register"
repeat 8. (increment 0 1) (increment 0 0x04)
wgroup.long ($2+0x600)++0x03
line.long 0x00 "RR[$1],Description collection: Reload request n $1"
hexmask.long 0x00 0.--31. 1. "RR,Reload request register"
repeat.end
tree.end
tree "WDT0_S"
base ad:0x50018000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the watchdog"
bitfld.long 0x00 0. "TASKS_START,Start the watchdog" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop the watchdog timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop the watchdog timer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_TIMEOUT,Watchdog timeout"
bitfld.long 0x00 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Watchdog stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x324++0x03
line.long 0x00 "NMIENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x328++0x03
line.long 0x00 "NMIENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RUNSTATUS,Run status"
bitfld.long 0x00 0. "RUNSTATUSWDT,Indicates whether or not the watchdog is running" "0: Watchdog not running,1: Watchdog is running"
rgroup.long 0x404++0x03
line.long 0x00 "REQSTATUS,Request status"
bitfld.long 0x00 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.."
bitfld.long 0x00 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.."
newline
bitfld.long 0x00 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.."
bitfld.long 0x00 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.."
newline
bitfld.long 0x00 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.."
bitfld.long 0x00 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.."
newline
bitfld.long 0x00 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.."
bitfld.long 0x00 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.."
group.long 0x504++0x03
line.long 0x00 "CRV,Counter reload value"
hexmask.long 0x00 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock"
group.long 0x508++0x03
line.long 0x00 "RREN,Enable register for reload request registers"
bitfld.long 0x00 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register"
bitfld.long 0x00 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register"
newline
bitfld.long 0x00 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register"
bitfld.long 0x00 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register"
newline
bitfld.long 0x00 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register"
bitfld.long 0x00 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register"
newline
bitfld.long 0x00 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register"
bitfld.long 0x00 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register"
group.long 0x50C++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 6. "STOPEN,Allow stopping the watchdog" "0: Do not allow stopping the watchdog,1: Allow stopping the watchdog"
bitfld.long 0x00 3. "HALT,Configure the watchdog to either be paused or kept running while the CPU is halted by the debugger" "0: Pause watchdog while the CPU is halted by the..,1: Keep the watchdog running while the CPU is.."
newline
bitfld.long 0x00 0. "SLEEP,Configure the watchdog to either be paused or kept running while the CPU is sleeping" "0: Pause watchdog while the CPU is sleeping,1: Keep the watchdog running while the CPU is.."
wgroup.long 0x520++0x03
line.long 0x00 "TSEN,Task Stop Enable"
hexmask.long 0x00 0.--31. 1. "TSEN,Task stop enable register"
repeat 8. (increment 0 1) (increment 0 0x04)
wgroup.long ($2+0x600)++0x03
line.long 0x00 "RR[$1],Description collection: Reload request n $1"
hexmask.long 0x00 0.--31. 1. "RR,Reload request register"
repeat.end
tree.end
tree "WDT1_NS"
base ad:0x40019000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the watchdog"
bitfld.long 0x00 0. "TASKS_START,Start the watchdog" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop the watchdog timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop the watchdog timer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_TIMEOUT,Watchdog timeout"
bitfld.long 0x00 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Watchdog stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x324++0x03
line.long 0x00 "NMIENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x328++0x03
line.long 0x00 "NMIENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RUNSTATUS,Run status"
bitfld.long 0x00 0. "RUNSTATUSWDT,Indicates whether or not the watchdog is running" "0: Watchdog not running,1: Watchdog is running"
rgroup.long 0x404++0x03
line.long 0x00 "REQSTATUS,Request status"
bitfld.long 0x00 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.."
bitfld.long 0x00 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.."
newline
bitfld.long 0x00 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.."
bitfld.long 0x00 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.."
newline
bitfld.long 0x00 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.."
bitfld.long 0x00 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.."
newline
bitfld.long 0x00 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.."
bitfld.long 0x00 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.."
group.long 0x504++0x03
line.long 0x00 "CRV,Counter reload value"
hexmask.long 0x00 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock"
group.long 0x508++0x03
line.long 0x00 "RREN,Enable register for reload request registers"
bitfld.long 0x00 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register"
bitfld.long 0x00 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register"
newline
bitfld.long 0x00 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register"
bitfld.long 0x00 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register"
newline
bitfld.long 0x00 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register"
bitfld.long 0x00 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register"
newline
bitfld.long 0x00 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register"
bitfld.long 0x00 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register"
group.long 0x50C++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 6. "STOPEN,Allow stopping the watchdog" "0: Do not allow stopping the watchdog,1: Allow stopping the watchdog"
bitfld.long 0x00 3. "HALT,Configure the watchdog to either be paused or kept running while the CPU is halted by the debugger" "0: Pause watchdog while the CPU is halted by the..,1: Keep the watchdog running while the CPU is.."
newline
bitfld.long 0x00 0. "SLEEP,Configure the watchdog to either be paused or kept running while the CPU is sleeping" "0: Pause watchdog while the CPU is sleeping,1: Keep the watchdog running while the CPU is.."
wgroup.long 0x520++0x03
line.long 0x00 "TSEN,Task Stop Enable"
hexmask.long 0x00 0.--31. 1. "TSEN,Task stop enable register"
repeat 8. (increment 0 1) (increment 0 0x04)
wgroup.long ($2+0x600)++0x03
line.long 0x00 "RR[$1],Description collection: Reload request n $1"
hexmask.long 0x00 0.--31. 1. "RR,Reload request register"
repeat.end
tree.end
tree "WDT1_S"
base ad:0x50019000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the watchdog"
bitfld.long 0x00 0. "TASKS_START,Start the watchdog" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop the watchdog timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop the watchdog timer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_TIMEOUT,Watchdog timeout"
bitfld.long 0x00 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Watchdog stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x324++0x03
line.long 0x00 "NMIENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x328++0x03
line.long 0x00 "NMIENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RUNSTATUS,Run status"
bitfld.long 0x00 0. "RUNSTATUSWDT,Indicates whether or not the watchdog is running" "0: Watchdog not running,1: Watchdog is running"
rgroup.long 0x404++0x03
line.long 0x00 "REQSTATUS,Request status"
bitfld.long 0x00 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.."
bitfld.long 0x00 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.."
newline
bitfld.long 0x00 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.."
bitfld.long 0x00 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.."
newline
bitfld.long 0x00 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.."
bitfld.long 0x00 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.."
newline
bitfld.long 0x00 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.."
bitfld.long 0x00 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.."
group.long 0x504++0x03
line.long 0x00 "CRV,Counter reload value"
hexmask.long 0x00 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock"
group.long 0x508++0x03
line.long 0x00 "RREN,Enable register for reload request registers"
bitfld.long 0x00 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register"
bitfld.long 0x00 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register"
newline
bitfld.long 0x00 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register"
bitfld.long 0x00 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register"
newline
bitfld.long 0x00 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register"
bitfld.long 0x00 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register"
newline
bitfld.long 0x00 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register"
bitfld.long 0x00 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register"
group.long 0x50C++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 6. "STOPEN,Allow stopping the watchdog" "0: Do not allow stopping the watchdog,1: Allow stopping the watchdog"
bitfld.long 0x00 3. "HALT,Configure the watchdog to either be paused or kept running while the CPU is halted by the debugger" "0: Pause watchdog while the CPU is halted by the..,1: Keep the watchdog running while the CPU is.."
newline
bitfld.long 0x00 0. "SLEEP,Configure the watchdog to either be paused or kept running while the CPU is sleeping" "0: Pause watchdog while the CPU is sleeping,1: Keep the watchdog running while the CPU is.."
wgroup.long 0x520++0x03
line.long 0x00 "TSEN,Task Stop Enable"
hexmask.long 0x00 0.--31. 1. "TSEN,Task stop enable register"
repeat 8. (increment 0 1) (increment 0 0x04)
wgroup.long ($2+0x600)++0x03
line.long 0x00 "RR[$1],Description collection: Reload request n $1"
hexmask.long 0x00 0.--31. 1. "RR,Reload request register"
repeat.end
tree.end
endif
sif cpuis("NRF5340QKAA-NET")
tree "WDT_NS"
base ad:0x4100B000
wgroup.long 0x00++0x03
line.long 0x00 "TASKS_START,Start the watchdog"
bitfld.long 0x00 0. "TASKS_START,Start the watchdog" "?,1: Trigger task"
wgroup.long 0x04++0x03
line.long 0x00 "TASKS_STOP,Stop the watchdog timer"
bitfld.long 0x00 0. "TASKS_STOP,Stop the watchdog timer" "?,1: Trigger task"
group.long 0x80++0x03
line.long 0x00 "SUBSCRIBE_START,Subscribe configuration for task START"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task START will subscribe to"
group.long 0x84++0x03
line.long 0x00 "SUBSCRIBE_STOP,Subscribe configuration for task STOP"
bitfld.long 0x00 31. "EN," "0: Disable subscription,1: Enable subscription"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that task STOP will subscribe to"
group.long 0x100++0x03
line.long 0x00 "EVENTS_TIMEOUT,Watchdog timeout"
bitfld.long 0x00 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated"
group.long 0x104++0x03
line.long 0x00 "EVENTS_STOPPED,Watchdog stopped"
bitfld.long 0x00 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated"
group.long 0x180++0x03
line.long 0x00 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event TIMEOUT will publish to"
group.long 0x184++0x03
line.long 0x00 "PUBLISH_STOPPED,Publish configuration for event STOPPED"
bitfld.long 0x00 31. "EN," "0: Disable publishing,1: Enable publishing"
hexmask.long.byte 0x00 0.--7. 1. "CHIDX,Channel that event STOPPED will publish to"
group.long 0x304++0x03
line.long 0x00 "INTENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x308++0x03
line.long 0x00 "INTENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x324++0x03
line.long 0x00 "NMIENSET,Enable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
group.long 0x328++0x03
line.long 0x00 "NMIENCLR,Disable interrupt"
bitfld.long 0x00 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Read: Enabled"
bitfld.long 0x00 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Read: Enabled"
rgroup.long 0x400++0x03
line.long 0x00 "RUNSTATUS,Run status"
bitfld.long 0x00 0. "RUNSTATUSWDT,Indicates whether or not the watchdog is running" "0: Watchdog not running,1: Watchdog is running"
rgroup.long 0x404++0x03
line.long 0x00 "REQSTATUS,Request status"
bitfld.long 0x00 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.."
bitfld.long 0x00 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.."
newline
bitfld.long 0x00 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.."
bitfld.long 0x00 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.."
newline
bitfld.long 0x00 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.."
bitfld.long 0x00 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.."
newline
bitfld.long 0x00 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.."
bitfld.long 0x00 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.."
group.long 0x504++0x03
line.long 0x00 "CRV,Counter reload value"
hexmask.long 0x00 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock"
group.long 0x508++0x03
line.long 0x00 "RREN,Enable register for reload request registers"
bitfld.long 0x00 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register"
bitfld.long 0x00 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register"
newline
bitfld.long 0x00 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register"
bitfld.long 0x00 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register"
newline
bitfld.long 0x00 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register"
bitfld.long 0x00 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register"
newline
bitfld.long 0x00 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register"
bitfld.long 0x00 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register"
group.long 0x50C++0x03
line.long 0x00 "CONFIG,Configuration register"
bitfld.long 0x00 6. "STOPEN,Allow stopping the watchdog" "0: Do not allow stopping the watchdog,1: Allow stopping the watchdog"
bitfld.long 0x00 3. "HALT,Configure the watchdog to either be paused or kept running while the CPU is halted by the debugger" "0: Pause watchdog while the CPU is halted by the..,1: Keep the watchdog running while the CPU is.."
newline
bitfld.long 0x00 0. "SLEEP,Configure the watchdog to either be paused or kept running while the CPU is sleeping" "0: Pause watchdog while the CPU is sleeping,1: Keep the watchdog running while the CPU is.."
wgroup.long 0x520++0x03
line.long 0x00 "TSEN,Task Stop Enable"
hexmask.long 0x00 0.--31. 1. "TSEN,Task stop enable register"
repeat 8. (increment 0 1) (increment 0 0x04)
wgroup.long ($2+0x600)++0x03
line.long 0x00 "RR[$1],Description collection: Reload request n $1"
hexmask.long 0x00 0.--31. 1. "RR,Reload request register"
repeat.end
tree.end
endif
tree.end
autoindent.off
newline
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