26171 lines
1.8 MiB
26171 lines
1.8 MiB
; --------------------------------------------------------------------------------
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; @Title: NRF52xxx On-Chip Peripherals
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; @Props: Released
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; @Author: TRJ, MJW, BGI
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; @Changelog: 25-01-2017 TRJ
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; 12-02-2018 BGI
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; @Manufacturer: NORDICSEMI - Nordic Semiconductor
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; @Doc: nRF52832_PS_v1.0.pdf (2016-02-17)
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; nRF52832_PS_v1.1.pdf (2016-07)
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; nRF52832_PS_v1.2.pdf (2016-09)
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; nRF52840_OPS_v0.5.1.pdf (2017-07-06)
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; nRF52810_PS_v1.0.pdf (2017-09)
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; nRF52810_PS_v1.1.pdf (2017-11-15)
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; @Core: Cortex-M4
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; @Chip: NRF52832QFAA, NRF52832CEAA, NRF52832CIAA, NRF52832QFAB, NRF52840QI,
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; NRF52810QF, NRF52810QC
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pernrf52xxx.per 17736 2024-04-08 09:26:07Z kwisniewski $
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; Known problems:
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; In module Software Interrupts (SWI) - base addresses given, but no description
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sif CPUIS("NRF52810*")
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tree.close "Core Registers (Cortex-M4)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
else
|
|
tree.close "Core Registers (Cortex-M4F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
|
|
bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x07
|
|
line.long 0x00 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
line.long 0x04 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
width 10.
|
|
tree "Feature Registers"
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
config 16. 8.
|
|
tree "Non-Volatile Memory Controller (NVMC)"
|
|
base ad:0x4001E000
|
|
width 21.
|
|
rgroup.long 0x400++0x03 "REGISTERS"
|
|
line.long 0x00 "READY,Ready Flag"
|
|
bitfld.long 0x00 0. " READY ,NVMC is busy or ready" "Busy,Ready"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 0.--1. " WEN ,Program memory access mode" "Read only,Write enabled,Erase enabled,?..."
|
|
sif (!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "ERASEPAGE/ERASEPCR1,Register For Erasing A Page In Code Region 1"
|
|
line.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
bitfld.long 0x04 0. " ERASEALL ,Erase all non-volatile memory including UICR registers" "No operation,Started"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Register"
|
|
bitfld.long 0x00 0. " ERASEUICR ,Register starting erase of all user information configuration registers" "No operation,Started"
|
|
else
|
|
if (((per.l(ad:0x4001E000+0x504))&0x03)==0x02)
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "ERASEPAGE,Register For Erasing A Page In Code Area"
|
|
line.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
bitfld.long 0x04 0. " ERASEALL ,Erase all non-volatile memory including UICR registers" "No operation,Started"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Register"
|
|
bitfld.long 0x00 0. " ERASEUICR ,Register starting erase of all user information configuration registers" "No operation,Started"
|
|
else
|
|
hgroup.long 0x508++0x07
|
|
hide.long 0x00 "ERASEPAGE,Register For Erasing A Page In Code Area"
|
|
hide.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
hgroup.long 0x514++0x03
|
|
hide.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Registers"
|
|
endif
|
|
endif
|
|
sif (!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "ERASEPCR0,Register For Erasing A Page In Code Region 0"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52840QI"))
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "ICACHECNF,I-Code Cache Configuration Register"
|
|
bitfld.long 0x00 8. " CACHEPROFEN ,Cache profiling enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CACHEEN ,Cache enable" "Disabled,Enabled"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "IHIT,I-Code Cache Hit Counter"
|
|
line.long 0x04 "IMISS,I-Code Cache Miss Counter"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Factory Information Configuration Registers (FICR)"
|
|
base ad:0x10000000
|
|
width 17.
|
|
rgroup.long 0x10++0x07 "REGISTERS"
|
|
line.long 0x00 "CODEPAGESIZE,Code Memory Page Size"
|
|
line.long 0x04 "CODESIZE,Code Memory Size"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
rgroup.long 0x34++0x07
|
|
line.long 0x00 "NUMRAMBLOCK,Number Of Individually Controllable RAM Blocks"
|
|
line.long 0x04 "SIZERAMBLOCKS,RAM Block Size In Bytes"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "CONFIGID,Configuration Identifier"
|
|
hexmask.long.word 0x00 0.--15. 1. " HWID ,Identification number for the HW"
|
|
endif
|
|
rgroup.long 0x60++0x07
|
|
line.long 0x00 "DEVICEID[0],Device Identifier Bits 31-0"
|
|
line.long 0x04 "DEVICEID[1],Device Identifier Bits 63-32"
|
|
rgroup.long 0x80++0x2B
|
|
line.long 0x00 "ER[0],Encryption Root Bits 31-0"
|
|
line.long 0x04 "ER[1],Encryption Root Bits 63-32"
|
|
line.long 0x08 "ER[2],Encryption Root Bits 95-64"
|
|
line.long 0x0C "ER[3],Encryption Root Bits 127-96"
|
|
line.long 0x10 "IR[0],Identity Root Bits 31-0"
|
|
line.long 0x14 "IR[1],Identity Root Bits 63-32"
|
|
line.long 0x18 "IR[2],Identity Root Bits 95-64"
|
|
line.long 0x1C "IR[3],Identity Root Bits 127-96"
|
|
line.long 0x20 "DEVICEADDRTYPE,Device Address Type"
|
|
bitfld.long 0x20 0. " ADDRTYPE ,Device address type" "Public,Random"
|
|
line.long 0x24 "DEVICEADDR[0],Device Address Bit 31-0"
|
|
line.long 0x28 "DEVICEADDR[1],Device Address Bit 47-32"
|
|
hexmask.long.word 0x28 0.--15. 0x01 " ADDR ,Device address bit 47-32"
|
|
sif (!cpuis("NRF52832*")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "OVERRIDDEN,Override Enable"
|
|
bitfld.long 0x00 3. " NRF_1MBIT ,Default values for NRF_1MBIT mode" "Override,No override"
|
|
bitfld.long 0x00 0. " BLE_1MBIT ,Default values for BLE_1MBIT mode" "Override,No override"
|
|
rgroup.long 0xB0++0x03
|
|
line.long 0x00 "NRF_1MBIT[0],RADIO.OVERRIDE[0] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xB4++0x03
|
|
line.long 0x00 "NRF_1MBIT[1],RADIO.OVERRIDE[1] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xB8++0x03
|
|
line.long 0x00 "NRF_1MBIT[2],RADIO.OVERRIDE[2] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xBC++0x03
|
|
line.long 0x00 "NRF_1MBIT[3],RADIO.OVERRIDE[3] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "NRF_1MBIT[4],RADIO.OVERRIDE[4] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "BLE_1MBIT[0],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "BLE_1MBIT[1],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "BLE_1MBIT[2],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "BLE_1MBIT[3],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "BLE_1MBIT[4],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
rgroup.long 0x100++0x13
|
|
line.long 0x00 "INFO.PART,Part Code"
|
|
line.long 0x04 "INFO.VARIANT,Part Variant"
|
|
line.long 0x08 "INFO.PACKAGE,Package Option"
|
|
line.long 0x0C "INFO.RAM,RAM Variant"
|
|
line.long 0x10 "INFO.FLASH,Flash Variant"
|
|
rgroup.long 0x404++0x03
|
|
line.long 0x00 "TEMP.A0,Slope Definition A0"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x408++0x03
|
|
line.long 0x00 "TEMP.A1,Slope Definition A1"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x40C++0x03
|
|
line.long 0x00 "TEMP.A2,Slope Definition A2"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "TEMP.A3,Slope Definition A3"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "TEMP.A4,Slope Definition A4"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x418++0x03
|
|
line.long 0x00 "TEMP.A5,Slope Definition A5"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x41C++0x03
|
|
line.long 0x00 "TEMP.B0,Y-Intercept B0"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "TEMP.B1,Y-Intercept B1"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "TEMP.B2,Y-Intercept B2"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "TEMP.B3,Y-Intercept B3"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x42C++0x03
|
|
line.long 0x00 "TEMP.B4,Y-Intercept B4"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "TEMP.B5,Y-Intercept B5"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "TEMP.T0,Segment End T0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "TEMP.T1,Segment End T1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x43C++0x03
|
|
line.long 0x00 "TEMP.T2,Segment End T2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "TEMP.T3,Segment End T3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "TEMP.T4,Segment End T4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
sif !cpuis("NRF52810Q*")
|
|
rgroup.long 0x450++0x0F
|
|
line.long 0x00 "NFC.TAGHEADER0,Default Header For NFC Tag 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UD[3] ,Unique identifier byte 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " [2] ,Unique identifier byte 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " [1] ,Unique identifier byte 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MFGID ,Default manufacturer ID"
|
|
line.long 0x04 "NFC.TAGHEADER1,Default Header For NFC Tag 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " UD[7] ,Unique identifier byte 7"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [6] ,Unique identifier byte 6"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [5] ,Unique identifier byte 5"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [4] ,Unique identifier byte 4"
|
|
line.long 0x08 "NFC.TAGHEADER2,Default Header For NFC Tag 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " UD[11] ,Unique identifier byte 11"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [10] ,Unique identifier byte 10"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [9] ,Unique identifier byte 9"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [8] ,Unique identifier byte 8"
|
|
line.long 0x0C "NFC.TAGHEADER3,Default Header For NFC Tag 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " UD[15] ,Unique identifier byte 15"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " [14] ,Unique identifier byte 14"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " [13] ,Unique identifier byte 13"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " [12] ,Unique identifier byte 12"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "User Information Configuration Registers (UICR)"
|
|
base ad:0x10001000
|
|
width 16.
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x00++0x07 "REGISTERS"
|
|
line.long 0x00 "CLENR0,Length Of Code Region 0"
|
|
line.long 0x04 "RBPCONF,Read Back Protection Configuration"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PALL ,Readback protect all code in device"
|
|
hexmask.long.byte 0x04 0.--7. 1. " PR0 ,Readback protect code region 0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "XTALFREQ,Reset Value For XTALFREQ In Clock"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XTALFREQ ,Reset value for XTALFREQ in CLOCK"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FWID,Firmware ID"
|
|
hexmask.long.word 0x00 0.--15. 1. " FWID ,Identification number for the firmware loaded into the chip"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BOOTLOADERADDR,Bootloader Address"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "NRFFW[0],Reserved For Nordic Firmware Design"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "NRFFW[1],Reserved For Nordic Firmware Design"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "NRFFW[2],Reserved For Nordic Firmware Design"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "NRFFW[3],Reserved For Nordic Firmware Design"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "NRFFW[4],Reserved For Nordic Firmware Design"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "NRFFW[5],Reserved For Nordic Firmware Design"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "NRFFW[6],Reserved For Nordic Firmware Design"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "NRFFW[7],Reserved For Nordic Firmware Design"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "NRFFW[8],Reserved For Nordic Firmware Design"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "NRFFW[9],Reserved For Nordic Firmware Design"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "NRFFW[10],Reserved For Nordic Firmware Design"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "NRFFW[11],Reserved For Nordic Firmware Design"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "NRFFW[12],Reserved For Nordic Firmware Design"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "NRFFW[13],Reserved For Nordic Firmware Design"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "NRFFW[14],Reserved For Nordic Firmware Design"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "NRFHW[0],Reserved For Nordic Hardware Design"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "NRFHW[1],Reserved For Nordic Hardware Design"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "NRFHW[2],Reserved For Nordic Hardware Design"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "NRFHW[3],Reserved For Nordic Hardware Design"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "NRFHW[4],Reserved For Nordic Hardware Design"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "NRFHW[5],Reserved For Nordic Hardware Design"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "NRFHW[6],Reserved For Nordic Hardware Design"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "NRFHW[7],Reserved For Nordic Hardware Design"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "NRFHW[8],Reserved For Nordic Hardware Design"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "NRFHW[9],Reserved For Nordic Hardware Design"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "NRFHW[10],Reserved For Nordic Hardware Design"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "NRFHW[11],Reserved For Nordic Hardware Design"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CUSTOMER[0],Reserved For Customer"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CUSTOMER[1],Reserved For Customer"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CUSTOMER[2],Reserved For Customer"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CUSTOMER[3],Reserved For Customer"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CUSTOMER[4],Reserved For Customer"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CUSTOMER[5],Reserved For Customer"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CUSTOMER[6],Reserved For Customer"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "CUSTOMER[7],Reserved For Customer"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "CUSTOMER[8],Reserved For Customer"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "CUSTOMER[9],Reserved For Customer"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "CUSTOMER[10],Reserved For Customer"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CUSTOMER[11],Reserved For Customer"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "CUSTOMER[12],Reserved For Customer"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "CUSTOMER[13],Reserved For Customer"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "CUSTOMER[14],Reserved For Customer"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "CUSTOMER[15],Reserved For Customer"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CUSTOMER[16],Reserved For Customer"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "CUSTOMER[17],Reserved For Customer"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "CUSTOMER[18],Reserved For Customer"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "CUSTOMER[19],Reserved For Customer"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "CUSTOMER[20],Reserved For Customer"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "CUSTOMER[21],Reserved For Customer"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "CUSTOMER[22],Reserved For Customer"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "CUSTOMER[23],Reserved For Customer"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "CUSTOMER[24],Reserved For Customer"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "CUSTOMER[25],Reserved For Customer"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "CUSTOMER[26],Reserved For Customer"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "CUSTOMER[27],Reserved For Customer"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "CUSTOMER[28],Reserved For Customer"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "CUSTOMER[29],Reserved For Customer"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "CUSTOMER[30],Reserved For Customer"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CUSTOMER[31],Reserved For Customer"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
sif cpuis("NRF52810QF")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
elif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x10001000+0x200))&0x20)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x10001000+0x204))&0x20)==0x00)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
else
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "APPROTECT,Access Port Protection"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PALL ,Blocks debugger read/write access to all CPU register and memory mapped addresses"
|
|
sif !cpuis("NRF52810Q*")
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "NFCPINS,Setting Of Pins Dedicated To NFC Functionality"
|
|
bitfld.long 0x00 0. " PROTECT ,Setting of pins dedicated to NFC functionality" "Disabled,NFC"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "DEBUGCTRL,Processor Debug Control"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUFPBEN ,Configure CPU flash patch and breakpoint (FPB) unit behavior"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUNIDEN ,Configure CPU non-intrusive debug features"
|
|
group.long 0x300++0x07
|
|
line.long 0x00 "EXTSUPPLY,Enable External Circuitry To Be Supplied From VDD Pin"
|
|
bitfld.long 0x00 0. " EXTSUPPLY ,Enable external circuitry to be supplied from VDD pin" "Disabled,Enabled"
|
|
line.long 0x04 "REGOUT0,GPIO Reference Voltage/External Output Supply Voltage In High Voltage Mode"
|
|
bitfld.long 0x04 0.--2. " VOUT ,Output voltage from of REG0 regulator stage" "1.8 V,2.1 V,2.4 V,2.7 V,3.0 V,3.3 V,,Default (1.8 V)"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52840QI")
|
|
tree "Block Protection (BPROT)"
|
|
base ad:0x40000000
|
|
width 16.
|
|
group.long 0x600++0x0B
|
|
line.long 0x00 "CONFIG0,Block Protect Configuration Register 0"
|
|
bitfld.long 0x00 31. " REGION31 ,Enable protection for region 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " REGION30 ,Enable protection for region 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " REGION29 ,Enable protection for region 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " REGION28 ,Enable protection for region 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REGION27 ,Enable protection for region 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " REGION26 ,Enable protection for region 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " REGION25 ,Enable protection for region 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " REGION24 ,Enable protection for region 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REGION23 ,Enable protection for region 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " REGION22 ,Enable protection for region 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " REGION21 ,Enable protection for region 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " REGION20 ,Enable protection for region 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REGION19 ,Enable protection for region 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " REGION18 ,Enable protection for region 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " REGION17 ,Enable protection for region 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " REGION16 ,Enable protection for region 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " REGION15 ,Enable protection for region 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " REGION14 ,Enable protection for region 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REGION13 ,Enable protection for region 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " REGION12 ,Enable protection for region 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REGION11 ,Enable protection for region 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " REGION10 ,Enable protection for region 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " REGION9 ,Enable protection for region 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " REGION8 ,Enable protection for region 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REGION7 ,Enable protection for region 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " REGION6 ,Enable protection for region 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " REGION5 ,Enable protection for region 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " REGION4 ,Enable protection for region 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REGION3 ,Enable protection for region 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REGION2 ,Enable protection for region 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " REGION1 ,Enable protection for region 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REGION0 ,Enable protection for region 0" "Disabled,Enabled"
|
|
line.long 0x04 "CONFIG1,Block Protect Configuration Register 1"
|
|
sif !cpuis("NRF52810Q*")
|
|
bitfld.long 0x04 31. " REGION63 ,Enable protection for region 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " REGION62 ,Enable protection for region 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " REGION61 ,Enable protection for region 61" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " REGION60 ,Enable protection for region 60" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " REGION59 ,Enable protection for region 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " REGION58 ,Enable protection for region 58" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " REGION57 ,Enable protection for region 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " REGION56 ,Enable protection for region 56" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " REGION55 ,Enable protection for region 55" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " REGION54 ,Enable protection for region 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " REGION53 ,Enable protection for region 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " REGION52 ,Enable protection for region 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " REGION51 ,Enable protection for region 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " REGION50 ,Enable protection for region 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " REGION49 ,Enable protection for region 49" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " REGION48 ,Enable protection for region 48" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 15. " REGION47 ,Enable protection for region 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " REGION46 ,Enable protection for region 46" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " REGION45 ,Enable protection for region 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REGION44 ,Enable protection for region 44" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " REGION43 ,Enable protection for region 43" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " REGION42 ,Enable protection for region 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " REGION41 ,Enable protection for region 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " REGION40 ,Enable protection for region 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " REGION39 ,Enable protection for region 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " REGION38 ,Enable protection for region 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " REGION37 ,Enable protection for region 37" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " REGION36 ,Enable protection for region 36" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REGION35 ,Enable protection for region 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " REGION34 ,Enable protection for region 34" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " REGION33 ,Enable protection for region 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " REGION32 ,Enable protection for region 32" "Disabled,Enabled"
|
|
line.long 0x08 "DISABLEINDEBUG,Disable Protection Mechanism In Debug Mode"
|
|
bitfld.long 0x08 0. " DISABLEINDEBUG ,Disable the protection mechanism for NVM regions" "No,Yes"
|
|
sif !cpuis("NRF52810Q*")
|
|
group.long 0x610++0x07
|
|
line.long 0x00 "CONFIG2,Block Protect Configuration Register 2"
|
|
bitfld.long 0x00 31. " REGION95 ,Enable protection for region 95" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " REGION94 ,Enable protection for region 94" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " REGION93 ,Enable protection for region 93" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " REGION92 ,Enable protection for region 92" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REGION91 ,Enable protection for region 91" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " REGION90 ,Enable protection for region 90" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " REGION89 ,Enable protection for region 89" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " REGION88 ,Enable protection for region 88" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REGION87 ,Enable protection for region 87" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " REGION86 ,Enable protection for region 86" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " REGION85 ,Enable protection for region 85" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " REGION84 ,Enable protection for region 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REGION83 ,Enable protection for region 83" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " REGION82 ,Enable protection for region 82" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " REGION81 ,Enable protection for region 81" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " REGION80 ,Enable protection for region 80" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " REGION79 ,Enable protection for region 79" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " REGION78 ,Enable protection for region 78" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REGION77 ,Enable protection for region 77" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " REGION76 ,Enable protection for region 76" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REGION75 ,Enable protection for region 75" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " REGION74 ,Enable protection for region 74" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " REGION73 ,Enable protection for region 73" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " REGION72 ,Enable protection for region 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REGION71 ,Enable protection for region 71" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " REGION70 ,Enable protection for region 70" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " REGION69 ,Enable protection for region 69" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " REGION68 ,Enable protection for region 68" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REGION67 ,Enable protection for region 67" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REGION66 ,Enable protection for region 66" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " REGION65 ,Enable protection for region 65" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REGION64 ,Enable protection for region 64" "Disabled,Enabled"
|
|
line.long 0x04 "CONFIG3,Block Protect Configuration Register 3"
|
|
bitfld.long 0x04 31. " REGION127 ,Enable protection for region 127" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " REGION126 ,Enable protection for region 126" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " REGION125 ,Enable protection for region 125" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " REGION124 ,Enable protection for region 124" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " REGION123 ,Enable protection for region 123" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " REGION122 ,Enable protection for region 122" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " REGION121 ,Enable protection for region 121" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " REGION110 ,Enable protection for region 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " REGION119 ,Enable protection for region 119" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " REGION118 ,Enable protection for region 118" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " REGION117 ,Enable protection for region 117" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " REGION116 ,Enable protection for region 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " REGION115 ,Enable protection for region 115" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " REGION114 ,Enable protection for region 114" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " REGION113 ,Enable protection for region 113" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " REGION112 ,Enable protection for region 112" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " REGION111 ,Enable protection for region 111" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " REGION100 ,Enable protection for region 100" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " REGION109 ,Enable protection for region 109" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REGION108 ,Enable protection for region 108" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " REGION107 ,Enable protection for region 107" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " REGION106 ,Enable protection for region 106" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " REGION105 ,Enable protection for region 105" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " REGION104 ,Enable protection for region 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " REGION103 ,Enable protection for region 103" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " REGION102 ,Enable protection for region 102" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " REGION101 ,Enable protection for region 101" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " REGION100 ,Enable protection for region 100" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REGION99 ,Enable protection for region 99" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " REGION98 ,Enable protection for region 98" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " REGION97 ,Enable protection for region 97" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " REGION96 ,Enable protection for region 96" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree "Power management (POWER)"
|
|
base ad:0x40000000
|
|
width 15.
|
|
group.long 0x78++0x07 "TASKS"
|
|
line.long 0x00 "CONSTLAT,Enable Constant Latency Mode"
|
|
line.long 0x04 "LOWPWR,Enable Low Power Mode"
|
|
group.long 0x108++0x03 "EVENTS"
|
|
line.long 0x00 "POFWARN,Power Failure Warning"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x114++0x07
|
|
line.long 0x00 "SLEEPENTER,CPU Entered WFI/WFE Sleep"
|
|
line.long 0x04 "SLEEPEXIT,CPU Exited WFI/WFE Sleep"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x11C++0x0B
|
|
line.long 0x00 "USBDETECTED,Voltage Supply Detected On VBUS"
|
|
line.long 0x04 "USBREMOVED,Voltage Supply Removed From VBUS"
|
|
line.long 0x08 "USBPWRRDY,USB 3.3 V Supply Ready"
|
|
endif
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
sif cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " USBPWRRDY ,Enable interrupt on USBPWRRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " USBREMOVED ,Enable interrupt on USBREMOVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " USBDETECTED ,Enable interrupt on USBDETECTED event" "Disabled,Enabled"
|
|
textfld " "
|
|
endif
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " SLEEPEXIT ,Enable interrupt on SLEEPEXIT event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SLEEPENTER ,Enable interrupt on SLEEPENTER event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " POFWARN ,Enable interrupt on POFWARN event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x07 "REGISTERS"
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 2. " POFWARN ,Enable interrupt on POFWARN event" "No effect,Enabled"
|
|
line.long 0x04 "INTENCLR,Interrupt Enable Clear Register"
|
|
bitfld.long 0x04 2. " POFWARN ,Clear interrupt on POFWARN event" "No effect,Cleared"
|
|
endif
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "RESETREAS,Reset Reason"
|
|
sif cpuis("NRF52840QI")
|
|
eventfld.long 0x00 20. " VBUS ,Reset due to wake up from system off mode by Vbus rising into valid range" "Not detected,Detected"
|
|
textfld " "
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI"))
|
|
eventfld.long 0x00 19. " NFC ,Reset due to wake up from off mode by NFC field detect" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 18. " DIF ,Reset due to wake up from off mode (Debug mode triggered)" "Not detected,Detected"
|
|
sif !cpuis("NRF52810Q*")
|
|
textfld " "
|
|
eventfld.long 0x00 17. " LPCOMP ,Reset due to wake up from off mode (ANADETECT triggered)" "Not detected,Detected"
|
|
textfld " "
|
|
else
|
|
textfld " "
|
|
endif
|
|
eventfld.long 0x00 16. " OFF ,Reset due to wake-up from off mode (DETECT triggered)" "Not detected,Detected"
|
|
eventfld.long 0x00 3. " LOCKUP ,Reset from CPU lock-up detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 2. " SREQ ,Reset from AIRCR.SYSRESETREQ detected" "Not detected,Detected"
|
|
eventfld.long 0x00 1. " DOG ,Reset from watchdog detected" "Not detected,Detected"
|
|
eventfld.long 0x00 0. " RESETPIN ,Reset from pin-reset detected" "Not detected,Detected"
|
|
sif (!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI"))
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "RAMSTATUS,RAM Status Register"
|
|
sif (cpuis("NRF51422QFAC")||cpuis("NRF51422CFAC")||cpuis("NRF51822QFAC")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 3. " RAMBLOCK3 ,RAM block 3 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 2. " RAMBLOCK2 ,RAM block 2 is on or off/powering up" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RAMBLOCK1 ,RAM block 1 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 0. " RAMBLOCK0 ,RAM block 0 is on or off/powering up" "Off,On"
|
|
else
|
|
bitfld.long 0x00 1. " RAMBLOCK1 ,RAM block 1 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 0. " RAMBLOCK0 ,RAM block 0 is on or off/powering up" "Off,On"
|
|
endif
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "USBREGSTATUS,USB Supply Status"
|
|
bitfld.long 0x00 1. " OUTPUTRDY ,USB supply output settling time elapsed" "Not Ready,Ready"
|
|
bitfld.long 0x00 0. " VBUSDETECT ,VBUS input detection status" "No Vbus,Vbus Present"
|
|
endif
|
|
wgroup.long 0x500++0x03
|
|
line.long 0x00 "SYSTEMOFF,System OFF Register"
|
|
bitfld.long 0x00 0. " SYSTEMOFF ,Enter system off mode" ",Enter"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "POFCON,Power Failure Configuration"
|
|
sif cpuis("NRF52840QI")
|
|
bitfld.long 0x00 8.--11. " THRESHOLDVDDH ,Set threshold vddh" "2.7 V,2.8 V,2.9 V,3.0 V,3.1 V,3.2 V,3.3 V,3.4 V,3.5 V,3.6 V,3.7 V,3.8 V,3.9 V,4.0 V,4.1 V,4.2 V"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 1.--4. " THRESHOLD ,Set threshold" ",,,,1.7 V,1.8 V,1.9 V,2.0 V,2.1 V,2.2 V,2.3 V,2.4 V,2.5 V,2.6 V,2.7 V,2.8 V"
|
|
bitfld.long 0x00 0. " POF ,Power failure comparator" "Disabled,Enabled"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "POFCON,Power Failure Configuration"
|
|
bitfld.long 0x00 1.--2. " THRESHOLD ,Set threshold" "2.1 V,2.3 V,2.5 V,2.7 V"
|
|
bitfld.long 0x00 0. " POF ,Power failure comparator" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GPREGRET,General Purpose Retention Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPREGRET ,General purpose retention register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GPREGRET2,General Purpose Retention Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPREGRET ,General purpose retention register"
|
|
endif
|
|
sif (!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI"))
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "RAMON,RAM On/Off Register"
|
|
bitfld.long 0x00 17. " OFFRAM1 ,Keep retention on RAM block 1 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 16. " OFFRAM0 ,Keep retention on RAM block 0 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 1. " ONRAM1 ,Keep RAM block 1 in ON mode" "No,Yes"
|
|
bitfld.long 0x00 0. " ONRAM0 ,Keep RAM block 0 in ON mode" "No,Yes"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "RESET,Configure Reset Functionality"
|
|
bitfld.long 0x00 0. " RESET ,Enable pin reset in debug interface mode" "Disabled,Enabled"
|
|
endif
|
|
sif (cpuis("NRF51422QFAC")||cpuis("NRF51422CFAC")||cpuis("NRF51822QFAC")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "RAMONB,RAM On/Off Register"
|
|
bitfld.long 0x00 17. " OFFRAM3 ,Keep retention on RAM block 3 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 16. " OFFRAM2 ,Keep retention on RAM block 2 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 1. " ONRAM3 ,Keep RAM block 3 in ON mode" "No,Yes"
|
|
bitfld.long 0x00 0. " ONRAM2 ,Keep RAM block 2 in ON mode" "No,Yes"
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "DCDCEN,DCDC Enable Register"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter" "Disabled,Enabled"
|
|
else
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "DCDCEN,Enable DC/DC Converter For REG1 Stage"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter for REG1 stage" "Disabled,Enabled"
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DCDCEN0,Enable DC/DC Converter For REG0 Stage"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter for REG0 stage" "Disabled,Enabled"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x930)++0x03
|
|
line.long 0x00 "RAM[3].POWER,RAM3 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x940)++0x03
|
|
line.long 0x00 "RAM[4].POWER,RAM4 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x950)++0x03
|
|
line.long 0x00 "RAM[5].POWER,RAM5 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x960)++0x03
|
|
line.long 0x00 "RAM[6].POWER,RAM6 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x970)++0x03
|
|
line.long 0x00 "RAM[7].POWER,RAM7 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
elif cpuis("NRF52810Q*")
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
elif cpuis("NRF52840QI")
|
|
rgroup.long 0x640++0x03
|
|
line.long 0x00 "MAINREGSTATUS,Main Supply Status"
|
|
bitfld.long 0x00 0. " MAINREGSTATUS ,Main supply status bit" "Normal,High"
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x930)++0x03
|
|
line.long 0x00 "RAM[3].POWER,RAM3 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x940)++0x03
|
|
line.long 0x00 "RAM[4].POWER,RAM4 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x950)++0x03
|
|
line.long 0x00 "RAM[5].POWER,RAM5 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x960)++0x03
|
|
line.long 0x00 "RAM[6].POWER,RAM6 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x970)++0x03
|
|
line.long 0x00 "RAM[7].POWER,RAM7 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Clock management (CLOCK)"
|
|
base ad:0x40000000
|
|
width 15.
|
|
group.long 0x00++0x1B "TASKS"
|
|
line.long 0x00 "HFCLKSTART,Start HFCLK Crystal Oscillator"
|
|
line.long 0x04 "HFCLKSTOP,Stop HFCLK Crystal Oscillator"
|
|
line.long 0x08 "LFCLKSTART,Start LFCLK Source"
|
|
line.long 0x0C "LFCLKSTOP,Stop LFCLK Source"
|
|
line.long 0x10 "CAL,Start Calibration Of LFCLK RC Oscillator"
|
|
line.long 0x14 "CTSTART,Start Calibration Timer"
|
|
line.long 0x18 "CTSTOP,Stop Calibration Timer"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "HFCLKSTARTED,16 MHz Oscillator Started"
|
|
line.long 0x04 "LFCLKSTARTED,32 kHz Oscillator Started"
|
|
group.long 0x10C++0x07
|
|
line.long 0x00 "DONE,Calibration Of LFCLK RC Oscillator Complete Event"
|
|
line.long 0x04 "CTTO,Calibration Timer Timeout"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CTTO ,Enable interrupt on CTTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " DONE ,Enable interrupt on DONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " LFCLKSTARTED ,Enable interrupt on LFCLKSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " HFCLKSTARTED ,Enable interrupt on HFCLKSTARTED event" "Disabled,Enabled"
|
|
rgroup.long 0x408++0x07
|
|
line.long 0x00 "HFCLKRUN,Status Indicating That HFCLKSTART Task Has Been Triggered"
|
|
bitfld.long 0x00 0. " STATUS ,HFCLKSTART task triggered or not" "Not triggered,Triggered"
|
|
line.long 0x04 "HFCLKSTAT,HFCLK Source Is Running"
|
|
bitfld.long 0x04 16. " STATE ,HFCLK state" "Not running,Running"
|
|
bitfld.long 0x04 0. " SRC ,Active clock source" "Rc,Xtal"
|
|
rgroup.long 0x414++0x0B
|
|
line.long 0x00 "LFCLKRUN,Status Indicating That LFCLKSTART Task Has Been triggered"
|
|
bitfld.long 0x00 0. " STATUS ,LFCLKSTART task triggered or not" "Not triggered,Triggered"
|
|
line.long 0x04 "LFCLKSTAT,LFCLK Clock Status Register"
|
|
bitfld.long 0x04 16. " STATE ,LFCLK state" "Not running,Running"
|
|
bitfld.long 0x04 0.--1. " SRC ,Active clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
line.long 0x08 "LFCLKSRCCOPY,Copy Of LFCLKSRC Register"
|
|
bitfld.long 0x08 0.--1. " SRC ,Active clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
sif (cpuis("NRF52810Q*")||cpuis("NRF52840QI"))
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "LFCLKSRC,Clock Source For The 32 kHz Clock"
|
|
bitfld.long 0x00 17. " EXTERNAL ,Enable or disable external source for LFCLK" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " BYPASS ,Enable or disable bypass of LFCLK crystal oscillator with external clock source" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SRC ,Clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "LFCLKSRC,Clock Source For The 32 kHz Clock"
|
|
bitfld.long 0x00 0.--1. " SRC ,Clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "HFXODEBOUNCE,HFXO Debounce Time"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HFXODEBOUNCE ,HFXO debounce time"
|
|
endif
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "CTIV,Calibration Timer Interval"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CTIV ,Calibration timer interval in multiples"
|
|
sif !cpuis("NRF52810Q*")
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI"))
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "TRACECONFIG,Clocking Options For The Trace Port Debug Interface"
|
|
bitfld.long 0x00 16.--17. " TRACEMUX ,Pin multiplexing of trace signals" "GPIO,Serial,Parallel,?..."
|
|
bitfld.long 0x00 0.--1. " TRACEPORTSPEED ,Speed of trace port clock." "32MHz,16MHz,8MHz,4MHz"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "LFRCMODE,LFRC Mode Configuration"
|
|
bitfld.long 0x00 16. " STATUS ,Active LFRC mode" "Normal,Ultra-low power"
|
|
bitfld.long 0x00 0. " MODE ,Set LFRC mode" "Normal,Ultra-low power"
|
|
endif
|
|
else
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "XTALFREQ,Crystal Frequency"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XTALFREQ ,Select nominal frequency of external crystal for HFCLK"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "General purpose input/output (GPIO)"
|
|
tree "PORT 0"
|
|
base ad:0x50000000
|
|
width 13.
|
|
group.long 0x504++0x03 "REGISTERS"
|
|
line.long 0x00 "OUT_SET/CLR,Write GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. "PIN[31] ,PIN31 driver set" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,PIN30 driver set" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 driver set" "Low,High"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,PIN29 driver set" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,PIN27 driver set" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,PIN26 driver set" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 driver set" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,PIN24 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,PIN23 driver set" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,PIN22 driver set" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 driver set" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,PIN19 driver set" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 driver set" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,PIN17 driver set" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 driver set" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 driver set" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 driver set" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 driver set" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 driver set" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 driver set" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 driver set" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 driver set" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 driver set" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
endif
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "IN,Read GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. "PIN[31] ,PIN31 input set" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,PIN30 input set" "Low,High"
|
|
else
|
|
bitfld.long 0x00 30. "PIN[30] ,PIN30 input set" "Low,High"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,PIN29 input set" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,PIN28 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,PIN27 input set" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,PIN26 input set" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,PIN25 input set" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,PIN24 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,PIN23 input set" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,PIN22 input set" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,PIN21 input set" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,PIN20 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,PIN19 input set" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,PIN18 input set" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,PIN17 input set" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,PIN16 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. "PIN[15] ,PIN15 input set" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 13. " [13] ,PIN13 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,PIN11 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,PIN8 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,PIN7 input set" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,PIN3 input set" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,PIN2 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
else
|
|
bitfld.long 0x00 30. "PIN[30] ,PIN30 input set" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,PIN28 input set" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,PIN25 input set" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,PIN21 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,PIN20 input set" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,PIN18 input set" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,PIN16 input set" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,PIN15 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
endif
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "DIR_SET/CLR,Direction Of GPIO Pins"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. "PIN[31] ,PIN31 direction set" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,PIN30 direction set" "Input,Output"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 direction set" "Input,Output"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,PIN29 direction set" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,PIN27 direction set" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,PIN26 direction set" "Input,Output"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 direction set" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,PIN24 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,PIN23 direction set" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,PIN22 direction set" "Input,Output"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 direction set" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,PIN19 direction set" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 direction set" "Input,Output"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,PIN17 direction set" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 direction set" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 direction set" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 direction set" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 direction set" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 direction set" "Input,Output"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 direction set" "Input,Output"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 direction set" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 direction set" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 direction set" "Input,Output"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "LATCH,GPIO Pins Met Criteria Set In PIN_CNF[n].SENSE Register"
|
|
sif !cpuis("NRF52810QC")
|
|
bitfld.long 0x00 31. "LATCH[31] ,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 30. " [30] ,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 29. " [29] ,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 28. " [28] ,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 26. " [26] ,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 25. " [25] ,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 24. " [24] ,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 22. " [22] ,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 21. " [21] ,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 20. " [20] ,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 18. " [18] ,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 17. " [17] ,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 16. " [16] ,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 15. "LATCH[15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 13. " [13] ,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 8. " [8] ,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 2. " [2] ,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
else
|
|
bitfld.long 0x00 30. "LATCH[30] ,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 28. " [28] ,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 25. " [25] ,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 21. " [21] ,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 18. " [18] ,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 16. " [16] ,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 15. " [15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
endif
|
|
line.long 0x04 "DETECTMODE,Select Between Default DETECT Signal Behavior And LDETECT Mode"
|
|
bitfld.long 0x04 0. "DETECTMODE ,Select between default DETECT signal behavior and LDETECT mode" "Default,LDETECT"
|
|
endif
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "PIN_CNF[2],Configuration Of Pin 2"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "PIN_CNF[3],Configuration Of Pin 3"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "PIN_CNF[7],Configuration Of Pin 7"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "PIN_CNF[8],Configuration Of Pin 8"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "PIN_CNF[11],Configuration Of Pin 11"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "PIN_CNF[13],Configuration Of Pin 13"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "PIN_CNF[17],Configuration Of Pin 17"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "PIN_CNF[19],Configuration Of Pin 19"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "PIN_CNF[22],Configuration Of Pin 22"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "PIN_CNF[23],Configuration Of Pin 23"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "PIN_CNF[24],Configuration Of Pin 24"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "PIN_CNF[26],Configuration Of Pin 26"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "PIN_CNF[27],Configuration Of Pin 27"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "PIN_CNF[29],Configuration Of Pin 29"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "PIN_CNF[31],Configuration Of Pin 31"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
else
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "PIN_CNF[2],Configuration Of Pin 2"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "PIN_CNF[3],Configuration Of Pin 3"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "PIN_CNF[7],Configuration Of Pin 7"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "PIN_CNF[8],Configuration Of Pin 8"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "PIN_CNF[11],Configuration Of Pin 11"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "PIN_CNF[13],Configuration Of Pin 13"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "PIN_CNF[17],Configuration Of Pin 17"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "PIN_CNF[19],Configuration Of Pin 19"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "PIN_CNF[22],Configuration Of Pin 22"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "PIN_CNF[23],Configuration Of Pin 23"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "PIN_CNF[24],Configuration Of Pin 24"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "PIN_CNF[26],Configuration Of Pin 26"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "PIN_CNF[27],Configuration Of Pin 27"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "PIN_CNF[29],Configuration Of Pin 29"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif cpuis("NRF52840QI")
|
|
tree "PORT 1"
|
|
base ad:0x50000300
|
|
width 13.
|
|
group.long 0x504++0x03 "REGISTERS"
|
|
line.long 0x00 "OUT_SET/CLR,Write GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 driver set" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 driver set" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 driver set" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 driver set" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 driver set" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 driver set" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 driver set" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 driver set" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 driver set" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
endif
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "IN,Read GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
bitfld.long 0x00 15. "PIN[15] ,PIN15 input set" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 13. " [13] ,PIN13 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,PIN11 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,PIN8 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,PIN7 input set" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,PIN3 input set" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,PIN2 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
else
|
|
bitfld.long 0x00 30. "PIN[30] ,PIN30 input set" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,PIN28 input set" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,PIN25 input set" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,PIN21 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,PIN20 input set" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,PIN18 input set" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,PIN16 input set" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,PIN15 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
endif
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "DIR_SET/CLR,Direction Of GPIO Pins"
|
|
sif !cpuis("NRF52810QC")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 direction set" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 direction set" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 direction set" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 direction set" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 direction set" "Input,Output"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 direction set" "Input,Output"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 direction set" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 direction set" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 direction set" "Input,Output"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "LATCH,GPIO Pins Met Criteria Set In PIN_CNF[n].SENSE Register"
|
|
sif !cpuis("NRF52810QC")
|
|
bitfld.long 0x00 15. "LATCH[15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 13. " [13] ,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 8. " [8] ,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 2. " [2] ,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
else
|
|
bitfld.long 0x00 30. "LATCH[30] ,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 28. " [28] ,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 25. " [25] ,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 21. " [21] ,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 18. " [18] ,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 16. " [16] ,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 15. " [15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
endif
|
|
line.long 0x04 "DETECTMODE,Select Between Default DETECT Signal Behavior And LDETECT Mode"
|
|
bitfld.long 0x04 0. "DETECTMODE ,Select between default DETECT signal behavior and LDETECT mode" "Default,LDETECT"
|
|
endif
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "PIN_CNF[2],Configuration Of Pin 2"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "PIN_CNF[3],Configuration Of Pin 3"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "PIN_CNF[7],Configuration Of Pin 7"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "PIN_CNF[8],Configuration Of Pin 8"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "PIN_CNF[11],Configuration Of Pin 11"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "PIN_CNF[13],Configuration Of Pin 13"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "GPIO tasks and events (GPIOTE)"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
base ad:0x40006000
|
|
width 15.
|
|
group.long (0x0+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[0],Task For Writing To Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x0+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It High)"
|
|
group.long (0x0+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It Low)"
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[0],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x4+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[1],Task For Writing To Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x4+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It High)"
|
|
group.long (0x4+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It Low)"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[1],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x8+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[2],Task For Writing To Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0x8+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It High)"
|
|
group.long (0x8+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It Low)"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[2],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0xC+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[3],Task For Writing To Pin Specified By PSEL In CONFIG[3]"
|
|
group.long (0xC+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It High)"
|
|
group.long (0xC+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It Low)"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[3],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x10+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[4],Task For Writing To Pin Specified By PSEL In CONFIG[4]"
|
|
group.long (0x10+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It High)"
|
|
group.long (0x10+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It Low)"
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[4],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x14+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[5],Task For Writing To Pin Specified By PSEL In CONFIG[5]"
|
|
group.long (0x14+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It High)"
|
|
group.long (0x14+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It Low)"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[5],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x18+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[6],Task For Writing To Pin Specified By PSEL In CONFIG[6]"
|
|
group.long (0x18+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It High)"
|
|
group.long (0x18+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It Low)"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[6],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x1C+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[7],Task For Writing To Pin Specified By PSEL In CONFIG[7]"
|
|
group.long (0x1C+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It High)"
|
|
group.long (0x1C+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It Low)"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[7],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "EVENTS_PORT,Event Generate From Multiple Input Pins"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Enable Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " PORT ,PORT event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " IN[7] ,IN[7] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,IN[6] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,IN[5] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,IN[4] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,IN[3] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,IN[2] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,IN[1] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,IN[0] event interrupt enable" "Disabled,Enabled"
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x510))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x514))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x518))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x51C))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x520))&0x03)==0x03)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x520))&0x01)==0x01)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x520))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x520))&0x03)==0x03)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x520))&0x01)==0x01)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x520))&0x03)==0x03)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x520))&0x01)==0x01)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x524))&0x03)==0x03)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x524))&0x01)==0x01)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x524))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x524))&0x03)==0x03)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x524))&0x01)==0x01)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x524))&0x03)==0x03)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x524))&0x01)==0x01)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x528))&0x03)==0x03)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x528))&0x01)==0x01)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x528))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x528))&0x03)==0x03)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x528))&0x01)==0x01)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x528))&0x03)==0x03)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x528))&0x01)==0x01)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40006000+0x52C))&0x03)==0x03)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x52C))&0x01)==0x01)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
sif cpuis("NRF52810QF")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x52C))&0x2000)==0x00)
|
|
if (((per.l(ad:0x40006000+0x52C))&0x03)==0x03)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x52C))&0x01)==0x01)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x52C))&0x03)==0x03)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" "No effect,Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x52C))&0x01)==0x01)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on input" "No event,Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 13. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
else
|
|
base ad:0x40006000
|
|
width 15.
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
group.long (0x0+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[0],Task For Writing To Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x0+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It High)"
|
|
group.long (0x0+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It Low)"
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[0],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x4+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[1],Task For Writing To Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x4+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It High)"
|
|
group.long (0x4+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It Low)"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[1],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x8+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[2],Task For Writing To Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0x8+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It High)"
|
|
group.long (0x8+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It Low)"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[2],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0xC+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[3],Task For Writing To Pin Specified By PSEL In CONFIG[3]"
|
|
group.long (0xC+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It High)"
|
|
group.long (0xC+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It Low)"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[3],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x10+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[4],Task For Writing To Pin Specified By PSEL In CONFIG[4]"
|
|
group.long (0x10+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It High)"
|
|
group.long (0x10+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It Low)"
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[4],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x14+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[5],Task For Writing To Pin Specified By PSEL In CONFIG[5]"
|
|
group.long (0x14+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It High)"
|
|
group.long (0x14+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It Low)"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[5],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x18+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[6],Task For Writing To Pin Specified By PSEL In CONFIG[6]"
|
|
group.long (0x18+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It High)"
|
|
group.long (0x18+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It Low)"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[6],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x1C+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[7],Task For Writing To Pin Specified By PSEL In CONFIG[7]"
|
|
group.long (0x1C+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It High)"
|
|
group.long (0x1C+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It Low)"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[7],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
else
|
|
group.long (0x0+0x00)++0x03
|
|
line.long 0x00 "OUT[0],Task For Writing To Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "IN[0],Event Generated From Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x4+0x00)++0x03
|
|
line.long 0x00 "OUT[1],Task For Writing To Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "IN[1],Event Generated From Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x8+0x00)++0x03
|
|
line.long 0x00 "OUT[2],Task For Writing To Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "IN[2],Event Generated From Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0xC+0x00)++0x03
|
|
line.long 0x00 "OUT[3],Task For Writing To Pin Specified By PSEL In CONFIG[3]"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "IN[3],Event Generated From Pin Specified By PSEL In CONFIG[3]"
|
|
endif
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "EVENTS_PORT,Event Generate From Multiple Input Pins"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Enable Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " PORT ,PORT event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " IN[7] ,IN[7] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,IN[6] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,IN[5] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,IN[4] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,IN[3] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,IN[2] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,IN[1] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,IN[0] event interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Enable Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " PORT ,PORT event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " IN[3] ,IN[3] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,IN[2] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,IN[1] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,IN[0] event interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x520))&0x03)==0x03)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x520))&0x01)==0x01)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x524))&0x03)==0x03)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x524))&0x01)==0x01)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x528))&0x03)==0x03)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x528))&0x01)==0x01)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x52C))&0x03)==0x03)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x52C))&0x01)==0x01)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[0] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[1] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[2] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[3] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "Programmable Peripheral Interconnect (PPI)"
|
|
base ad:0x4001F000
|
|
width 14.
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x0++0x07 "TASKS"
|
|
line.long 0x00 "CHG[0]EN,Enable Channel Group 0"
|
|
line.long 0x04 "CHG[0]DIS,Disable Channel Group 0"
|
|
group.long 0x8++0x07 "TASKS"
|
|
line.long 0x00 "CHG[1]EN,Enable Channel Group 1"
|
|
line.long 0x04 "CHG[1]DIS,Disable Channel Group 1"
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "CHG[2]EN,Enable Channel Group 2"
|
|
line.long 0x04 "CHG[2]DIS,Disable Channel Group 2"
|
|
group.long 0x18++0x07 "TASKS"
|
|
line.long 0x00 "CHG[3]EN,Enable Channel Group 3"
|
|
line.long 0x04 "CHG[3]DIS,Disable Channel Group 3"
|
|
group.long 0x20++0x07 "TASKS"
|
|
line.long 0x00 "CHG[4]EN,Enable Channel Group 4"
|
|
line.long 0x04 "CHG[4]DIS,Disable Channel Group 4"
|
|
group.long 0x28++0x07 "TASKS"
|
|
line.long 0x00 "CHG[5]EN,Enable Channel Group 5"
|
|
line.long 0x04 "CHG[5]DIS,Disable Channel Group 5"
|
|
else
|
|
group.long 0x0++0x07
|
|
line.long 0x00 "CHG[0]EN,Enable Channel Group 0"
|
|
line.long 0x04 "CHG[0]DIS,Disable Channel Group 0"
|
|
group.long 0x8++0x07
|
|
line.long 0x00 "CHG[1]EN,Enable Channel Group 1"
|
|
line.long 0x04 "CHG[1]DIS,Disable Channel Group 1"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "CHG[2]EN,Enable Channel Group 2"
|
|
line.long 0x04 "CHG[2]DIS,Disable Channel Group 2"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "CHG[3]EN,Enable Channel Group 3"
|
|
line.long 0x04 "CHG[3]DIS,Disable Channel Group 3"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x500++0x03 "REGISTERS"
|
|
line.long 0x00 "CHEN_SET/CLR,Channel Enable"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CH[31] ,Enable channel 31" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Enable channel 30" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CH[30] ,Enable channel 30" "Disabled,Enabled"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Enable channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Enable channel 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Enable channel 27" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Enable channel 26" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Enable channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Enable channel 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Enable channel 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Enable channel 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Enable channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Enable channel 20" "Disabled,Enabled"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Enable channel 19" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Enable channel 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Enable channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Enable channel 16" "Disabled,Enabled"
|
|
endif
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Enable channel 15" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Enable channel 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Enable channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Enable channel 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Enable channel 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Enable channel 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Enable channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Enable channel 8" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Enable channel 7" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enable channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enable channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enable channel 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Enable channel 3" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enable channel 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enable channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enable channel 0" "Disabled,Enabled"
|
|
else
|
|
group.long 0x500++0x03 "REGISTERS"
|
|
line.long 0x00 "CHEN_SET/CLR,Channel Enable"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CH[30] ,Enable channel 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Enable channel 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Enable channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Enable channel 21" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Enable channel 20" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Enable channel 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Enable channel 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Enable channel 15" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Enable channel 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Enable channel 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Enable channel 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Enable channel 9" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enable channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enable channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enable channel 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enable channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enable channel 0" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "CH[0]EEP,Channel 0 Event Endpoint"
|
|
line.long 0x04 "CH[0]TEP,Channel 0 Task Endpoint"
|
|
group.long 0x518++0x07
|
|
line.long 0x00 "CH[1]EEP,Channel 1 Event Endpoint"
|
|
line.long 0x04 "CH[1]TEP,Channel 1 Task Endpoint"
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "CH[2]EEP,Channel 2 Event Endpoint"
|
|
line.long 0x04 "CH[2]TEP,Channel 2 Task Endpoint"
|
|
group.long 0x528++0x07
|
|
line.long 0x00 "CH[3]EEP,Channel 3 Event Endpoint"
|
|
line.long 0x04 "CH[3]TEP,Channel 3 Task Endpoint"
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "CH[4]EEP,Channel 4 Event Endpoint"
|
|
line.long 0x04 "CH[4]TEP,Channel 4 Task Endpoint"
|
|
group.long 0x538++0x07
|
|
line.long 0x00 "CH[5]EEP,Channel 5 Event Endpoint"
|
|
line.long 0x04 "CH[5]TEP,Channel 5 Task Endpoint"
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "CH[6]EEP,Channel 6 Event Endpoint"
|
|
line.long 0x04 "CH[6]TEP,Channel 6 Task Endpoint"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "CH[7]EEP,Channel 7 Event Endpoint"
|
|
line.long 0x04 "CH[7]TEP,Channel 7 Task Endpoint"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "CH[8]EEP,Channel 8 Event Endpoint"
|
|
line.long 0x04 "CH[8]TEP,Channel 8 Task Endpoint"
|
|
group.long 0x558++0x07
|
|
line.long 0x00 "CH[9]EEP,Channel 9 Event Endpoint"
|
|
line.long 0x04 "CH[9]TEP,Channel 9 Task Endpoint"
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "CH[10]EEP,Channel 10 Event Endpoint"
|
|
line.long 0x04 "CH[10]TEP,Channel 10 Task Endpoint"
|
|
group.long 0x568++0x07
|
|
line.long 0x00 "CH[11]EEP,Channel 11 Event Endpoint"
|
|
line.long 0x04 "CH[11]TEP,Channel 11 Task Endpoint"
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "CH[12]EEP,Channel 12 Event Endpoint"
|
|
line.long 0x04 "CH[12]TEP,Channel 12 Task Endpoint"
|
|
group.long 0x578++0x07
|
|
line.long 0x00 "CH[13]EEP,Channel 13 Event Endpoint"
|
|
line.long 0x04 "CH[13]TEP,Channel 13 Task Endpoint"
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "CH[14]EEP,Channel 14 Event Endpoint"
|
|
line.long 0x04 "CH[14]TEP,Channel 14 Task Endpoint"
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "CH[15]EEP,Channel 15 Event Endpoint"
|
|
line.long 0x04 "CH[15]TEP,Channel 15 Task Endpoint"
|
|
group.long 0x590++0x07
|
|
line.long 0x00 "CH[16]EEP,Channel 16 Event Endpoint"
|
|
line.long 0x04 "CH[16]TEP,Channel 16 Task Endpoint"
|
|
group.long 0x598++0x07
|
|
line.long 0x00 "CH[17]EEP,Channel 17 Event Endpoint"
|
|
line.long 0x04 "CH[17]TEP,Channel 17 Task Endpoint"
|
|
group.long 0x5A0++0x07
|
|
line.long 0x00 "CH[18]EEP,Channel 18 Event Endpoint"
|
|
line.long 0x04 "CH[18]TEP,Channel 18 Task Endpoint"
|
|
group.long 0x5A8++0x07
|
|
line.long 0x00 "CH[19]EEP,Channel 19 Event Endpoint"
|
|
line.long 0x04 "CH[19]TEP,Channel 19 Task Endpoint"
|
|
else
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "CH[0]EEP,Channel 0 Event Endpoint"
|
|
line.long 0x04 "CH[0]TEP,Channel 0 Task Endpoint"
|
|
group.long 0x518++0x07
|
|
line.long 0x00 "CH[1]EEP,Channel 1 Event Endpoint"
|
|
line.long 0x04 "CH[1]TEP,Channel 1 Task Endpoint"
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "CH[2]EEP,Channel 2 Event Endpoint"
|
|
line.long 0x04 "CH[2]TEP,Channel 2 Task Endpoint"
|
|
group.long 0x528++0x07
|
|
line.long 0x00 "CH[3]EEP,Channel 3 Event Endpoint"
|
|
line.long 0x04 "CH[3]TEP,Channel 3 Task Endpoint"
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "CH[4]EEP,Channel 4 Event Endpoint"
|
|
line.long 0x04 "CH[4]TEP,Channel 4 Task Endpoint"
|
|
group.long 0x538++0x07
|
|
line.long 0x00 "CH[5]EEP,Channel 5 Event Endpoint"
|
|
line.long 0x04 "CH[5]TEP,Channel 5 Task Endpoint"
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "CH[6]EEP,Channel 6 Event Endpoint"
|
|
line.long 0x04 "CH[6]TEP,Channel 6 Task Endpoint"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "CH[7]EEP,Channel 7 Event Endpoint"
|
|
line.long 0x04 "CH[7]TEP,Channel 7 Task Endpoint"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "CH[8]EEP,Channel 8 Event Endpoint"
|
|
line.long 0x04 "CH[8]TEP,Channel 8 Task Endpoint"
|
|
group.long 0x558++0x07
|
|
line.long 0x00 "CH[9]EEP,Channel 9 Event Endpoint"
|
|
line.long 0x04 "CH[9]TEP,Channel 9 Task Endpoint"
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "CH[10]EEP,Channel 10 Event Endpoint"
|
|
line.long 0x04 "CH[10]TEP,Channel 10 Task Endpoint"
|
|
group.long 0x568++0x07
|
|
line.long 0x00 "CH[11]EEP,Channel 11 Event Endpoint"
|
|
line.long 0x04 "CH[11]TEP,Channel 11 Task Endpoint"
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "CH[12]EEP,Channel 12 Event Endpoint"
|
|
line.long 0x04 "CH[12]TEP,Channel 12 Task Endpoint"
|
|
group.long 0x578++0x07
|
|
line.long 0x00 "CH[13]EEP,Channel 13 Event Endpoint"
|
|
line.long 0x04 "CH[13]TEP,Channel 13 Task Endpoint"
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "CH[14]EEP,Channel 14 Event Endpoint"
|
|
line.long 0x04 "CH[14]TEP,Channel 14 Task Endpoint"
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "CH[15]EEP,Channel 15 Event Endpoint"
|
|
line.long 0x04 "CH[15]TEP,Channel 15 Task Endpoint"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "CHG[0],Channel Group 0"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 0" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 0" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 0" "Excluded,Included"
|
|
else
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "CHG[0],Channel Group 0"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 0" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "CHG[1],Channel Group 1"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 1" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 1" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 1" "Excluded,Included"
|
|
else
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "CHG[1],Channel Group 1"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 1" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x808++0x03
|
|
line.long 0x00 "CHG[2],Channel Group 2"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 2" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 2" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 2" "Excluded,Included"
|
|
else
|
|
group.long 0x808++0x03
|
|
line.long 0x00 "CHG[2],Channel Group 2"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 2" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x80C++0x03
|
|
line.long 0x00 "CHG[3],Channel Group 3"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 3" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 3" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 3" "Excluded,Included"
|
|
else
|
|
group.long 0x80C++0x03
|
|
line.long 0x00 "CHG[3],Channel Group 3"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 3" "Excluded,Included"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "CHG[4],Channel Group 4"
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 4" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 4" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 4" "Excluded,Included"
|
|
else
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "CHG[4],Channel Group 4"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 4" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x814++0x03
|
|
line.long 0x00 "CHG[5],Channel Group 5"
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 5" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 5" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 5" "Excluded,Included"
|
|
else
|
|
group.long 0x814++0x03
|
|
line.long 0x00 "CHG[5],Channel Group 5"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 5" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "FORK[0].TEP,Channel 0 Task End-Point"
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "FORK[1].TEP,Channel 1 Task End-Point"
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "FORK[2].TEP,Channel 2 Task End-Point"
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "FORK[3].TEP,Channel 3 Task End-Point"
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "FORK[4].TEP,Channel 4 Task End-Point"
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "FORK[5].TEP,Channel 5 Task End-Point"
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "FORK[6].TEP,Channel 6 Task End-Point"
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "FORK[7].TEP,Channel 7 Task End-Point"
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "FORK[8].TEP,Channel 8 Task End-Point"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "FORK[9].TEP,Channel 9 Task End-Point"
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "FORK[10].TEP,Channel 10 Task End-Point"
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "FORK[11].TEP,Channel 11 Task End-Point"
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "FORK[12].TEP,Channel 12 Task End-Point"
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "FORK[13].TEP,Channel 13 Task End-Point"
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "FORK[14].TEP,Channel 14 Task End-Point"
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "FORK[15].TEP,Channel 15 Task End-Point"
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "FORK[16].TEP,Channel 16 Task End-Point"
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "FORK[17].TEP,Channel 17 Task End-Point"
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "FORK[18].TEP,Channel 18 Task End-Point"
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "FORK[19].TEP,Channel 19 Task End-Point"
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "FORK[20].TEP,Channel 20 Task End-Point"
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "FORK[21].TEP,Channel 21 Task End-Point"
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "FORK[22].TEP,Channel 22 Task End-Point"
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "FORK[23].TEP,Channel 23 Task End-Point"
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "FORK[24].TEP,Channel 24 Task End-Point"
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "FORK[25].TEP,Channel 25 Task End-Point"
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "FORK[26].TEP,Channel 26 Task End-Point"
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "FORK[27].TEP,Channel 27 Task End-Point"
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "FORK[28].TEP,Channel 28 Task End-Point"
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "FORK[29].TEP,Channel 29 Task End-Point"
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "FORK[30].TEP,Channel 30 Task End-Point"
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "FORK[31].TEP,Channel 31 Task End-Point"
|
|
else
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "FORK[0].TEP,Channel 0 Task End-Point"
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "FORK[1].TEP,Channel 1 Task End-Point"
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "FORK[4].TEP,Channel 4 Task End-Point"
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "FORK[5].TEP,Channel 5 Task End-Point"
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "FORK[6].TEP,Channel 6 Task End-Point"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "FORK[9].TEP,Channel 9 Task End-Point"
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "FORK[10].TEP,Channel 10 Task End-Point"
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "FORK[12].TEP,Channel 12 Task End-Point"
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "FORK[14].TEP,Channel 14 Task End-Point"
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "FORK[15].TEP,Channel 15 Task End-Point"
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "FORK[16].TEP,Channel 16 Task End-Point"
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "FORK[18].TEP,Channel 18 Task End-Point"
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "FORK[20].TEP,Channel 20 Task End-Point"
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "FORK[21].TEP,Channel 21 Task End-Point"
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "FORK[25].TEP,Channel 25 Task End-Point"
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "FORK[28].TEP,Channel 28 Task End-Point"
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "FORK[30].TEP,Channel 30 Task End-Point"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "2.4 GHz radio (RADIO)"
|
|
base ad:0x40001000
|
|
width 14.
|
|
group.long 0x00++0x23 "TASKS"
|
|
line.long 0x00 "TXEN,Enable Radio In TX Mode"
|
|
line.long 0x04 "RXEN,Enable Radio In RX Mode"
|
|
line.long 0x08 "START,Start Radio"
|
|
line.long 0x0C "STOP,Stop Radio"
|
|
line.long 0x10 "DISABLE,Disable Radio"
|
|
line.long 0x14 "RSSISTART,Task For Starting The RSSI Measurement"
|
|
line.long 0x18 "RSSISTOP,Task For Stopping The RSSI Measurement"
|
|
line.long 0x1C "BCSTART,Start Bit Counter"
|
|
line.long 0x20 "BCSTOP,Stop Bit Counter"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x24++0x0F
|
|
line.long 0x00 "EDSTART,Start The Energy Detect Measurement"
|
|
line.long 0x04 "EDSTOP,Stop The Energy Detect Measurement"
|
|
line.long 0x08 "CCASTART,Start The Clear Channel Assessment"
|
|
line.long 0x0C "CCASTOP,Stop The Clear Channel Assessment"
|
|
endif
|
|
group.long 0x100++0x1F "EVENTS"
|
|
line.long 0x00 "READY,Ready Event"
|
|
line.long 0x04 "ADDRESS,Address Event"
|
|
line.long 0x08 "PAYLOAD,Payload Event"
|
|
line.long 0x0C "END,End Event"
|
|
line.long 0x10 "DISABLED,Disabled Event"
|
|
line.long 0x14 "DEVMATCH,Device Address Match Occurred On The Last Received Packet"
|
|
line.long 0x18 "DEVMISS,No Device Address Match Occurred On The Last Received Packet"
|
|
line.long 0x1C "RSSIEND,Sampling Of Receive Signal Strength Complete"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "BCMATCH,Bit Counter Reached Bit Count Value Specified In BCC"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CRCOK,Packet Received With CRC Ok"
|
|
line.long 0x04 "CRCERROR,Packet Received With CRC Error"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x138++0x27
|
|
line.long 0x00 "FRAMESTART,IEEE 802.15.4 Length Field Received"
|
|
line.long 0x04 "EDEND,Sampling Of Energy Detection Complete"
|
|
line.long 0x08 "EDSTOPPED,The Sampling Of Energy Detection Has Stopped"
|
|
line.long 0x0C "CCAIDLE,Wireless Medium In Idle"
|
|
line.long 0x10 "CCABUSY,Wireless Medium Busy"
|
|
line.long 0x14 "CCASTOPPED,The CCA Has Stopped"
|
|
line.long 0x18 "RATEBOOST,Ble_LR CI Field Received"
|
|
line.long 0x1C "TXREADY,RADIO Has Ramped Up And Is Ready To Be Started TX Path"
|
|
line.long 0x20 "RXREADY,RADIO Has Ramped Up And Is Ready to Be Started RX Path"
|
|
line.long 0x24 "MHRMATCH,MAC Header Match Found"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "PHYEND,Generated In Ble_LR125Kbit, Ble_LR500Kbit And BleIeee802154_250Kbit Modes"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts For The Radio"
|
|
sif cpuis("NRF52840QI")
|
|
bitfld.long 0x00 21. " PHYEND_START ,Shortcut between PHYEND event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PHYEND_DISABLE ,Shortcut between PHYEND event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " RXREADY_START ,Shortcut between RXREADY event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TXREADY_START ,Shortcut between TXREADY event and START task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CCAIDLE_STOP ,Shortcut between CCAIDLE event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EDEND_DISABLE ,Shortcut between EDEND event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " READY_EDSTART ,Shortcut between READY event and EDSTART task" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " FRAMESTART_BCSTART ,Shortcut between FRAMESTART event and BCSTART task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CCABUSY_DISABLE ,Shortcut between CCABUSY event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CCAIDLE_TXEN ,Shortcut between CCAIDLE event and TXEN task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXREADY_CCASTART ,Shortcut between RXREADY event and CCASTART task" "Disabled,Enabled"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 8. " DISABLED_RSSISTOP ,Sortcut between DISABLED event and RSSISTOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ADDRESS_BCSTART ,Shortcut between ADDRESS event and BCSTART task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ADDRESS_RSSISTART ,Shortcut between ADDRESS event and RSSISTART task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DISABLED_RXEN ,Shortcut between DISABLED event and RXEN task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DISABLED_TXEN ,Shortcut between DISABLED event and TXEN task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " END_DISABLE ,Shortcut between END event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READY_START ,Shortcut between READY event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
sif cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " PHYEND ,Enable interrupt for PHYEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " MHRMATCH ,Enable interrupt for MHRMATCH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " RXREADY ,Enable interrupt for RXREADY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " TXREADY ,Enable interrupt for TXREADY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " RATEBOOST ,Enable interrupt for RATEBOOST event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " CCASTOPPED ,Enable interrupt for CCASTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " CCABUSY ,Enable interrupt for CCABUSY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " CCAIDLE ,Enable interrupt for CCAIDLE event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EDSTOPPED ,Enable interrupt for EDSTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EDEND ,Enable interrupt for EDEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " FRAMESTART ,Enable interrupt for FRAMESTART event" "Disabled,Enabled"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CRCERROR ,Enable interrupt for CRCERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CRCOK ,Enable interrupt for CRCOK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " BCMATCH ,Enable interrupt on BCMATCH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " RSSIEND ,Enable interrupt on RSSIEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " DEVMISS ,Enable interrupt on DEVMISS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " DEVMATCH ,Enable interrupt on DEVMATCH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " DISABLED ,Enable interrupt on DISABLED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " END ,Enable interrupt on END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " PAYLOAD ,Enable interrupt on PAYLOAD event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ADDRESS ,Enable interrupt on ADDRESS event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " READY ,Enable interrupt on READY event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "CRCSTATUS,CRC Status"
|
|
bitfld.long 0x00 0. " CRCSTATUS ,CRC status of packet received" "Error,No error"
|
|
rgroup.long 0x408++0x0B
|
|
line.long 0x00 "RXMATCH,Received Address"
|
|
hexmask.long.byte 0x00 0.--2. 0x01 " RXMATCH ,Logical address on which previous packet was received"
|
|
line.long 0x04 "RXCRC,Received CRC"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RXCRC ,CRC field of previously received packet"
|
|
line.long 0x08 "DAI,Device Address Match Index"
|
|
bitfld.long 0x08 0.--2. " DAI ,Index of device address" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("NRF52840QI")
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "PDUSTAT,Payload Status"
|
|
bitfld.long 0x00 1.--2. " CISTAT ,Status on what rate packet is received with in Long Range" "LR125kbit,LR500kbit,?..."
|
|
bitfld.long 0x00 0. " PDUSTAT ,Status on payload length vs. PCNF1.MAXLEN" "LessThan,GreaterThan"
|
|
endif
|
|
group.long 0x504++0x3B
|
|
line.long 0x00 "PACKETPTR,Packet Pointer"
|
|
line.long 0x04 "FREQUENCY,Frequency"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
bitfld.long 0x04 8. " MAP ,Channel map selection" "Default,Low"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
hexmask.long.byte 0x04 0.--6. 1. " FREQUENCY ,Radio channel frequency offset in MHz"
|
|
line.long 0x08 "TXPOWER,Output Power"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TXPOWER ,Radio output power. Decision point: TXEN task"
|
|
line.long 0x0C "MODE,Data Rate And Modulation"
|
|
sif !cpuis("NRF52840QI")&&!cpuis("NRF52810Q*")
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,NRF_250_KBIT,BLE_1MBIT,?..."
|
|
elif cpuis("NRF52810Q*")
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,,BLE_1MBIT,Ble_2Mbit,?..."
|
|
else
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,,BLE_1MBIT,Ble_2Mbit,Ble_LR125Kbit,Ble_LR500Kbit,,,,,,,,,Ble_LR500Kbit"
|
|
endif
|
|
line.long 0x10 "PCNF0,Packet Configuration 0"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
sif !cpuis("NRF52840QI")
|
|
bitfld.long 0x10 24. " PLEN ,Length of preamble on air" "8bit,16bit"
|
|
else
|
|
bitfld.long 0x10 29.--30. " TERMLEN ,Length of TERM field in Long Range operation" "0,1,2,3"
|
|
bitfld.long 0x10 26. " CRCINC ,Indicates if LENGTH field contains CRC or not" "Exclude,Include"
|
|
bitfld.long 0x10 24.--25. " PLEN ,Length of preamble on air. Decision point: TASKS_START task" "8bit,16bit,32bitZero,LongRange"
|
|
bitfld.long 0x10 22.--23. " CILEN ,Length of Code Indicator - Long Range" "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x10 20. " S1INCL ,Include or exclude S1 field in RAM" "Automatic,Include"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 16.--19. " S1LEN ,Length of S1 field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 8. " S0LEN ,Length on air of S0 field in number of bits" "0,1"
|
|
bitfld.long 0x10 0.--3. " LFLEN ,Length of length field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "PCNF1,Packet Configuration 1"
|
|
bitfld.long 0x14 25. " WHITEEN ,Packet whitening enabled" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " ENDIAN ,On air endianness of packet length field" "Little,Big"
|
|
bitfld.long 0x14 16.--18. " BALEN ,Base address length in number of bytes" ",,2,3,4,,,"
|
|
hexmask.long.byte 0x14 8.--15. 1. " STATLEN ,Static length in number of bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " MAXLEN ,Maximum length of packet payload"
|
|
line.long 0x18 "BASE0,Base Address 0"
|
|
line.long 0x1C "BASE1,Base Address 1"
|
|
line.long 0x20 "PREFIX0,Prefixes Bytes For Logical Addresses 0-3"
|
|
hexmask.long.byte 0x20 24.--31. 0x01 " AP[3] ,Address prefix 3"
|
|
hexmask.long.byte 0x20 16.--23. 0x01 " [2] ,Address prefix 2"
|
|
hexmask.long.byte 0x20 8.--15. 0x01 " [1] ,Address prefix 1"
|
|
hexmask.long.byte 0x20 0.--7. 0x01 " [0] ,Address prefix 0"
|
|
line.long 0x24 "PREFIX1,Prefixes Bytes For Logical Addresses 4-7"
|
|
hexmask.long.byte 0x24 24.--31. 0x01 " AP[7] ,Address prefix 7"
|
|
hexmask.long.byte 0x24 16.--23. 0x01 " [6] ,Address prefix 6"
|
|
hexmask.long.byte 0x24 8.--15. 0x01 " [5] ,Address prefix 5"
|
|
hexmask.long.byte 0x24 0.--7. 0x01 " [4] ,Address prefix 4"
|
|
line.long 0x28 "TXADDRESS,Transmit Address Select"
|
|
hexmask.long.byte 0x28 0.--2. 1. " TXADDRESS ,Logical address to be used when transmitting a packet"
|
|
line.long 0x2C "RXADDRESSES,Receive Address Select"
|
|
bitfld.long 0x2C 7. " ADR[7] ,Enable reception on logical address 7" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " [6] ,Enable reception on logical address 6" "Disabled,Enabled"
|
|
bitfld.long 0x2C 5. " [5] ,Enable reception on logical address 5" "Disabled,Enabled"
|
|
bitfld.long 0x2C 4. " [4] ,Enable reception on logical address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " [3] ,Enable reception on logical address 3" "Disabled,Enabled"
|
|
bitfld.long 0x2C 2. " [2] ,Enable reception on logical address 2" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " [1] ,Enable reception on logical address 1" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " [0] ,Enable reception on logical address 0" "Disabled,Enabled"
|
|
line.long 0x30 "CRCCNF,CRC Configuration"
|
|
sif !cpuis("NRF52840QI")
|
|
bitfld.long 0x30 8. " SKIP_ADR ,Leave packet address field out of CRC calculation" "Included,Not included"
|
|
textfld " "
|
|
else
|
|
bitfld.long 0x30 8.--9. " SKIP_ADR ,Leave packet address field out of CRC calculation" "Included,Not included,IEEE 802.15.4,?..."
|
|
endif
|
|
bitfld.long 0x30 0.--1. " LEN ,CRC length in number of bytes" "Disabled,1,2,3"
|
|
line.long 0x34 "CRCPOLY,CRC Polynomial"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " CRCPOLY ,CRC polynomial"
|
|
line.long 0x38 "CRCINIT,CRC Initial Value"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " CRCINIT ,Initial value for CRC calculation"
|
|
sif !cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "TEST,Test Features Enable Register"
|
|
bitfld.long 0x00 1. " PLL_LOCK ,PLL lock decision point" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CONST_CARRIER ,Constant carrier" "Disabled,Enabled"
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "TIFS,Interframe Spacing"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TIFS ,Interframe spacing"
|
|
else
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "TIFS,Interframe Spacing"
|
|
hexmask.long.word 0x00 0.--9. 1. " TIFS ,Interframe spacing"
|
|
endif
|
|
rgroup.long 0x548++0x03
|
|
line.long 0x00 "RSSISAMPLE,RSSI Sample"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RSSISAMPLE ,RSSI sample result"
|
|
rgroup.long 0x550++0x03
|
|
line.long 0x00 "STATE,Current Radio State"
|
|
bitfld.long 0x00 0.--3. " STATE ,Current radio state" "Disabled,RXRU,RX idle,RX,RX disabled,,,,,TXRU,TX idle,TX,TX disabled,?..."
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "DATAWHITEIV,Data Whitening Initial Value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
hexmask.long.byte 0x00 0.--6. 1. " DATAWHITEIV ,Data whitening initial value"
|
|
else
|
|
bitfld.long 0x00 0.--5. " DATAWHITEIV ,Data whitening initial value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "BCC,Bit Counter Compare"
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DAB[0],Device Address 0 Base Segment"
|
|
group.long (0x600+0x20)++0x03
|
|
line.long 0x00 "DAP[0],Device Address 0 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[0] ,Device address prefix"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "DAB[1],Device Address 1 Base Segment"
|
|
group.long (0x604+0x20)++0x03
|
|
line.long 0x00 "DAP[1],Device Address 1 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[1] ,Device address prefix"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "DAB[2],Device Address 2 Base Segment"
|
|
group.long (0x608+0x20)++0x03
|
|
line.long 0x00 "DAP[2],Device Address 2 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[2] ,Device address prefix"
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "DAB[3],Device Address 3 Base Segment"
|
|
group.long (0x60C+0x20)++0x03
|
|
line.long 0x00 "DAP[3],Device Address 3 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[3] ,Device address prefix"
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "DAB[4],Device Address 4 Base Segment"
|
|
group.long (0x610+0x20)++0x03
|
|
line.long 0x00 "DAP[4],Device Address 4 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[4] ,Device address prefix"
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "DAB[5],Device Address 5 Base Segment"
|
|
group.long (0x614+0x20)++0x03
|
|
line.long 0x00 "DAP[5],Device Address 5 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[5] ,Device address prefix"
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "DAB[6],Device Address 6 Base Segment"
|
|
group.long (0x618+0x20)++0x03
|
|
line.long 0x00 "DAP[6],Device Address 6 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[6] ,Device address prefix"
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "DAB[7],Device Address 7 Base Segment"
|
|
group.long (0x61C+0x20)++0x03
|
|
line.long 0x00 "DAP[7],Device Address 7 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[7] ,Device address prefix"
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DACNF,Device Address Match Configuration"
|
|
bitfld.long 0x00 15. " TXADD[7] ,TxAdd for device address 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [6] ,TxAdd for device address 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [5] ,TxAdd for device address 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [4] ,TxAdd for device address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [3] ,TxAdd for device address 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [2] ,TxAdd for device address 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [1] ,TxAdd for device address 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [0] ,TxAdd for device address 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENA[7] ,Enable or disable device address matching using device address 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Enable or disable device address matching using device address 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Enable or disable device address matching using device address 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Enable or disable device address matching using device address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Enable or disable device address matching using device address 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Enable or disable device address matching using device address 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Enable or disable device address matching using device address 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Enable or disable device address matching using device address 0" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
hgroup.long 0x644++0x07
|
|
hide.long 0x00 "MHRMATCHCONF,Search Pattern Configuration"
|
|
hide.long 0x04 "MHRMATCHMAS,Pattern Mask"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,Center,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
elif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40001000+0x510))&0x0F)==(0x00||0x01||0x03||0x04))
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,Center,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
else
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
endif
|
|
else
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "OVERRIDE[0],Override0 Radio Configuration Parameters"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "OVERRIDE[1],Override1 Radio Configuration Parameters"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "OVERRIDE[2],Override2 Radio Configuration Parameters"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "OVERRIDE[3],Override3 Radio Configuration Parameters"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "OVERRIDE[4],Override4 Radio Configuration Parameters"
|
|
bitfld.long 0x00 31. " OREN ,Override control" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--27. 1. " OVERRIDE ,Radio override"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x660++0x0F
|
|
line.long 0x00 "SFD,IEEE 802.15.4 Start Of Frame Delimiter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SFD ,Start of frame delimiter"
|
|
line.long 0x04 "EDCNT,IEEE 802.15.4 Energy Detect Loop Count"
|
|
hexmask.long.tbyte 0x04 0.--20. 1. " EDCNT ,Energy detect loop count"
|
|
line.long 0x08 "EDSAMPLE,IEEE 802.15.4 Energy Detect Level"
|
|
hexmask.long.byte 0x08 0.--7. 1. " EDLVL ,Energy detect level"
|
|
line.long 0x0C "CCACTRL,IEEE 802.15.4 Clear Channel Assessment Control"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " CCACORRCNT ,Limit for occurances above CCACORRTHRES"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " CCACORRTHRES ,CCA correlator busy threshold"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " CCAEDTHRES ,CCA energy busy threshold"
|
|
bitfld.long 0x0C 0.--2. " CCAMODE ,CCA mode of operation" "EdMode,CarrierMode,CarrierAndEdMode,CarrierOrEdMode,EdModeTest1,?..."
|
|
endif
|
|
group.long 0xFFC++0x03
|
|
line.long 0x00 "POWER,Peripheral Power Control"
|
|
bitfld.long 0x00 0. " POWER ,Peripheral power control" "Off,On"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Timer/counter (TIMER)"
|
|
tree "Timer 0"
|
|
base ad:0x40008000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40008000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40008000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer 1"
|
|
base ad:0x40009000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40009000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40009000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer 2"
|
|
base ad:0x4000A000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x4000A000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4000A000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")
|
|
tree "Timer 3"
|
|
base ad:0x4001A000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x4001A000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4001A000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CAPTURE[4],Capture Timer Value To CC[4] Register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAPTURE[5],Capture Timer Value To CC[5] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long (0x140+0x10)++0x03
|
|
line.long 0x00 "COMPARE[4],Compare Event On CC[4] Match"
|
|
group.long (0x140+0x14)++0x03
|
|
line.long 0x00 "COMPARE[5],Compare Event On CC[5] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 13. " COMPARE5_STOP ,Shortcut between COMPARE5 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " COMPARE4_STOP ,Shortcut between COMPARE4 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " COMPARE5_CLEAR ,Shortcut between COMPARE5 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " COMPARE4_CLEAR ,Shortcut between COMPARE4 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " COMPARE5 ,Enable interrupt on COMPARE[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " COMPARE4 ,Enable interrupt on COMPARE[4] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "CC[4],Capture/Compare Register 4"
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CC[5],Capture/Compare Register 5"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer 4"
|
|
base ad:0x4001B000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x4001B000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4001B000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CAPTURE[4],Capture Timer Value To CC[4] Register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAPTURE[5],Capture Timer Value To CC[5] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long (0x140+0x10)++0x03
|
|
line.long 0x00 "COMPARE[4],Compare Event On CC[4] Match"
|
|
group.long (0x140+0x14)++0x03
|
|
line.long 0x00 "COMPARE[5],Compare Event On CC[5] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 13. " COMPARE5_STOP ,Shortcut between COMPARE5 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " COMPARE4_STOP ,Shortcut between COMPARE4 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " COMPARE5_CLEAR ,Shortcut between COMPARE5 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " COMPARE4_CLEAR ,Shortcut between COMPARE4 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " COMPARE5 ,Enable interrupt on COMPARE[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " COMPARE4 ,Enable interrupt on COMPARE[4] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "CC[4],Capture/Compare Register 4"
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CC[5],Capture/Compare Register 5"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "Real Time Counter (RTC)"
|
|
tree "RTC 0"
|
|
base ad:0x4000B000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "RTC 1"
|
|
base ad:0x40011000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")&&!cpuis("NRF52840*")
|
|
tree "RTC 2"
|
|
base ad:0x40024000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Random Number Generator (RNG)"
|
|
base ad:0x4000D000
|
|
width 10.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Task Starting The Random Number Generator"
|
|
line.long 0x04 "STOP,Task Stopping The Random Number Generator"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "VALRDY,Event Being Generated For Every New Random Number Written To The VALUE"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 0. " VALRDY_STOP ,Shortcut between VALRDY event and STOP task" "Disabled,Enabled"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " VALRDY_set/clr ,Enable or disable interrupt on VALRDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " VALRDY_set/clr ,Enable or disable interrupt on VALRDY event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 0. " DERCEN ,Digital error correction" "Disabled,Enabled"
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "VALUE,Output Random Number"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Generated random number"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Temperature Sensor (TEMP)"
|
|
base ad:0x4000C000
|
|
width 9.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Temperature Measurement"
|
|
line.long 0x04 "STOP,Stop Temperature Measurement"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "DATARDY,Temperature Measurement Complete Data Ready"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " DATARDY_set/clr ,Enable or disable interrupt on DATARDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DATARDY_set/clr ,Enable or disable interrupt on DATARDY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "TEMP,Temperature In Celsius"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x520++0x17
|
|
line.long 0x00 "A0,Slope Of 1st Piece Wise Linear Function"
|
|
hexmask.long.word 0x00 0.--11. 1. " A0 ,Slope of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "A1,Slope Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.word 0x04 0.--11. 1. " A1 ,Slope of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "A2,Slope Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.word 0x08 0.--11. 1. " A2 ,Slope of 3rd Piece Wise Linear Function"
|
|
line.long 0x0C "A3,Slope Of 4th Piece Wise Linear Function"
|
|
hexmask.long.word 0x0C 0.--11. 1. " A3 ,Slope of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "A4,Slope Of 5th Piece Wise Linear Function"
|
|
hexmask.long.word 0x10 0.--11. 1. " A4 ,Slope of 5th Piece Wise Linear Function"
|
|
line.long 0x14 "A5,Slope of 6th Piece Wise Linear Function"
|
|
hexmask.long.word 0x14 0.--11. 1. " A5 ,Slope of 6th Piece Wise Linear Function"
|
|
group.long 0x540++0x17
|
|
line.long 0x00 "B0,Y-intercept Of 1st Piece Wise Linear Function"
|
|
hexmask.long.word 0x00 0.--13. 1. " B0 ,Y-intercept of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "B1,Y-intercept Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.word 0x04 0.--13. 1. " B1 ,Y-intercept of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "B2,Y-intercept Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.word 0x08 0.--13. 1. " B2 ,Y-intercept of 3rd Piece Wise Linear Function"
|
|
line.long 0x0C "B3,Y-intercept Of 4th Piece Wise Linear Function"
|
|
hexmask.long.word 0x0C 0.--13. 1. " B3 ,Y-intercept of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "B4,Y-intercept Of 5th Piece Wise Linear Function"
|
|
hexmask.long.word 0x10 0.--13. 1. " B4 ,Y-intercept of 5th Piece Wise Linear Function"
|
|
line.long 0x14 "B5,Y-intercept Of 6th Piece Wise Linear Function"
|
|
hexmask.long.word 0x14 0.--13. 1. " B5 ,Y-intercept of 6th Piece Wise Linear Function"
|
|
group.long 0x560++0x13
|
|
line.long 0x00 "T0,End Point Of 1st Piece Wise Linear Function"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T0 ,End point of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "T1,End Point Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.byte 0x04 0.--7. 1. " T1 ,End point of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "T2,End Point Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.byte 0x08 0.--7. 1. " T2 ,End point of 3nd Piece Wise Linear Function"
|
|
line.long 0x0C "T3,End Point Of 4th Piece Wise Linear Function"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " T3 ,End point of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "T4,End Point Of 5th Piece Wise Linear Function"
|
|
hexmask.long.byte 0x10 0.--7. 1. " T4 ,End point of 5th Piece Wise Linear Function"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "AES Electronic Codebook Mode Encryption (ECB)"
|
|
base ad:0x4000E000
|
|
width 12.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "STARTECB,Start ECB Block Encrypt"
|
|
line.long 0x04 "STOPECB,Abort A Possible Executing ECB operation"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "ENDECB,ECB Block Encrypt Complete"
|
|
line.long 0x04 "ERRORECB,ECB Block Encrypt Aborted"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ERRORECB ,Enable interrupt on ERRORECB event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " ENDECB ,Enable interrupt on ENDECB event" "Disabled,Enabled"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "ECBDATAPTR,ECB Block Encrypt Memory Pointers"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AES CCM Mode Encryption (CCM)"
|
|
base ad:0x4000F000
|
|
width 15.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "KSGEN,Start Generation Of Key-Stream"
|
|
line.long 0x04 "CRYPT,Start Encryption/Decryption"
|
|
line.long 0x08 "STOP,Stop Encryption/Decryption"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RATEOVERRIDE,Override DATARATE Setting In MODE Register With The Contents Of The RATEOVERRIDE Register For Any Ongoing Encryption/Decryption"
|
|
endif
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "ENDKSGEN,Key-Stream Generation Complete"
|
|
line.long 0x04 "ENDCRYPT,Encrypt/Decrypt Complete"
|
|
sif !cpuis("NRF52810Q*")&&!cpuis("NRF52840QI")
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ERROR,CCM Error Event"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 0. " ENDKSGEN_CRYPT ,Short-cut between ENDKSGEN event and CRYPT task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ENDCRYPT ,Enable interrupt on ENDCRYPT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " ENDKSGEN ,Enable interrupt on ENDKSGEN event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "MICSTATUS,MIC Check Result"
|
|
bitfld.long 0x00 0. " MICSTATUS ,Result of the MIC" "Failed,Passed"
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable or disable CCM" "Disabled,,Enabled,?..."
|
|
group.long 0x504++0x13
|
|
line.long 0x00 "MODE,Operation Mode"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 24. " LENGTH ,Packet length configuration" "Default,Extended"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 16.--17. " DATARATE ,Data rate CCM shall run" "1Mbit,2Mbit,125 Kbps,500 Kbps"
|
|
else
|
|
bitfld.long 0x00 16. " DATARATE ,Data rate CCM shall run" "1Mbit,2Mbit"
|
|
endif
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 0. " MODE ,The mode operation to be used" "Encryption,Decryption"
|
|
line.long 0x04 "CNFPTR,Pointer To Data Structure Holding AES Key And NONCE Vector"
|
|
line.long 0x08 "INPTR,Input Pointer"
|
|
line.long 0x0C "OUTPTR,Output Pointer"
|
|
line.long 0x10 "SCRATCHPTR,Pointer To Data Area Used For Temporary Storage"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4000F000+0x504))&0x1000000)==0x1000000)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "MAXPACKETSIZE,Length Of Key-Stream Generated"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MAXPACKETSIZE ,Length of key-stream generated"
|
|
endif
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "RATEOVERRIDE,Data Rate Override Setting"
|
|
bitfld.long 0x00 0.--1. "RATEOVERRIDE ,Data rate override setting" "1 Mbps,2 Mbps,125 Kbps,500 Kbps"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Accelerated Address Resolver (AAR)"
|
|
base ad:0x4000F000
|
|
width 13.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "START,Start Resolving Addresses Based On IRKs Specified In The IRK Data Structure"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STOP,Stop Resolving Addresses"
|
|
group.long 0x100++0x0B "EVENTS"
|
|
line.long 0x00 "END,Address Resolution Procedure Complete"
|
|
line.long 0x04 "RESOLVED,Address Resolved"
|
|
line.long 0x08 "NOTRESOLVED,Address Not Resolved"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " NOTRESOLVED ,Enable interrupt on NOTRESOLVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " RESOLVED ,Enable interrupt on RESOLVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " END ,Enable interrupt on END event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Resolution Status"
|
|
bitfld.long 0x00 0.--3. " STATUS ,The IRK that was used last time an address was resolved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x500++0x0B
|
|
line.long 0x00 "ENABLE,Enable AAR Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable AAR" "Disabled,,,Enabled"
|
|
line.long 0x04 "NIRK,Number Of IRKs"
|
|
bitfld.long 0x04 0.--4. " NIRK ,Number of identity root keys available in the IRK data structure" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x08 "IRKPTR,Pointer To IRK Data Structure"
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "ADDPTR,Pointer To The Resolvable Address"
|
|
line.long 0x04 "SCRATCHPTR,Pointer To Data Area Used For Temporary Storage"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Serial Communication Interface (SERCOM)"
|
|
tree "Sercom0"
|
|
base ad:0x40003000
|
|
width 8.
|
|
sif !cpuis("NRF52810QC")&&!cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40003500))&0x0F)==0x02)
|
|
base ad:0x40003000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40003500))&0x0F)==0x06)
|
|
base ad:0x40003000
|
|
width 19.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "STARTRX,Start TWI Receive Sequence"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STARTTX,Start TWI Transmit Sequence"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SUSPENDED,Last Byte Has Been Sent Out After The SUSPEND Task Has Beed Issued"
|
|
endif
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x15C++0x07
|
|
line.long 0x00 "LASTRX,Byte Boundary Starting To Receive The Last Byte"
|
|
line.long 0x04 "LASTTX,Byte Boundary Starting To Receive The Last Byte"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 12. " LASTRX_STOP ,Shortcut between LASTRX event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LASTRX_STARTTX ,Shortcut between LASTRX event and STARTTX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " LASTTX_STOP ,Shortcut between LASTTX event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LASTTX_SUSPEND ,Shortcut between LASTTX event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LASTTX_STARTRX ,Shortcut between LASTTX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " LASTTX_set/clr ,Enable or disable interrupt for LASTTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " LASTRX_set/clr ,Enable or disable interrupt for LASTRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SUSPENDED_set/clr ,Enable or disable interrupt for SUSPENDED event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "ERRORSRC,TWI Error Source"
|
|
eventfld.long 0x00 2. " DNACK ,NACK received after sending a data byte" "No error,Error"
|
|
eventfld.long 0x00 1. " ANACK ,NACK received after sending the address" "No error,Error"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0. " OVERRUN ,Overrun error" "Not received,Received"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWI Register"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable TWI" "Disabled,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,TWI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x08 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "ADDRESS,Address Used In The TWI Transfer"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,Address used in the TWI transfer"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40003500))&0x0F)==0x07)
|
|
base ad:0x40003000
|
|
width 17.
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "START,Start SPI Transaction"
|
|
line.long 0x04 "STOP,Stop SPI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend SPI Transaction"
|
|
line.long 0x04 "RESUME,Resume SPI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,SPI Transaction Has Stopped"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "END,End Of RXD Buffer And TXD Buffer Reached"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,End Of TXD Buffer Reached"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "STARTED,Transaction Started"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 17. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " STARTED ,Enable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " ENDTX ,Enable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " END ,Enable Interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX ,Enable Interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable Interrupt for STOPPED event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "STALLSTAT,Stall Status For EasyDMA RAM Accesses"
|
|
bitfld.long 0x00 1. " RX ,Stall status for EasyDMA RAM writes" "NOSTALL,STALL"
|
|
bitfld.long 0x00 0. " TX ,Stall status for EasyDMA RAM reads" "NOSTALL,STALL"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPIM Register"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPIM" "Disabled,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select Sor MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMOSI,Pin Select for MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum number Of Bytes In Receive Buffer"
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred on the last transaction"
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum number Of Bytes In Transmit buffer"
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "CONFIG,Configuration Register"
|
|
bitfld.long 0x04 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x04 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x04 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
sif cpuis("NRF52840QI")
|
|
endif
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40003500))&0x0F)==0x09)
|
|
base ad:0x40003000
|
|
width 12.
|
|
group.long 0x14++0x03 "TASKS"
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "PREPARERX,Prepare The TWI Slave To Respond To a Write Command"
|
|
line.long 0x04 "PREPARETX,Prepare The TWI Slave To Respond To a Read command"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x164++0x07
|
|
line.long 0x00 "WRITE,Write Command Received"
|
|
line.long 0x04 "READ,Read Command Received"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 14. " READ_SUSPEND ,Shortcut between READ event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " WRITE_SUSPEND ,Shortcut between WRITE event and SUSPEND task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " READ_set/clr ,Enable or disable interrupt for READ event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " WRITE_set/clr ,Enable or disable interrupt for WRITE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "ERRORSRC,Error Source"
|
|
bitfld.long 0x00 3. " OVERREAD ,TX buffer over-read detected" "No error,Error"
|
|
bitfld.long 0x00 2. " DNACK ,NACK received after receiving a data byte" "No error,Error"
|
|
bitfld.long 0x00 0. " OVERFLOW ,RX buffer overflow detected" "No error,Error"
|
|
rgroup.long 0x4D4++0x03
|
|
line.long 0x00 "MATCH,Status Register Indicating Which Address Had a Match"
|
|
bitfld.long 0x00 0. " MATCH ,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWIS"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable or disable TWIS" "Disabled,,,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
elif cpuis("NRF52810QF")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXDPTR,Data Pointer"
|
|
line.long 0x04 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "ADDRESS[0],TWI Slave Address 0"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
line.long 0x04 "ADDRESS[1],TWI slave address 1"
|
|
hexmask.long.byte 0x04 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register For The Address Match Mechanism"
|
|
bitfld.long 0x00 1. " ADDRESS1 ,Enable or disable address matching on ADDRESS[1]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADDRESS0 ,Enable or disable address matching on ADDRESS[0]" "Disabled,Enabled"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,SPIS,,,,TWIM,SPIM,,TWIS,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40003500))&0x0F)==0x06)
|
|
base ad:0x40003000
|
|
width 19.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "STARTRX,Start TWI Receive Sequence"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STARTTX,Start TWI Transmit Sequence"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SUSPENDED,Last Byte Has Been Sent Out After The SUSPEND Task Has Beed Issued"
|
|
endif
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x15C++0x07
|
|
line.long 0x00 "LASTRX,Byte Boundary Starting To Receive The Last Byte"
|
|
line.long 0x04 "LASTTX,Byte Boundary Starting To Receive The Last Byte"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 12. " LASTRX_STOP ,Shortcut between LASTRX event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LASTRX_STARTTX ,Shortcut between LASTRX event and STARTTX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " LASTTX_STOP ,Shortcut between LASTTX event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LASTTX_SUSPEND ,Shortcut between LASTTX event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LASTTX_STARTRX ,Shortcut between LASTTX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " LASTTX_set/clr ,Enable or disable interrupt for LASTTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " LASTRX_set/clr ,Enable or disable interrupt for LASTRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SUSPENDED_set/clr ,Enable or disable interrupt for SUSPENDED event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "ERRORSRC,TWI Error Source"
|
|
eventfld.long 0x00 2. " DNACK ,NACK received after sending a data byte" "No error,Error"
|
|
eventfld.long 0x00 1. " ANACK ,NACK received after sending the address" "No error,Error"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0. " OVERRUN ,Overrun error" "Not received,Received"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWI Register"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable TWI" "Disabled,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,TWI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x08 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "ADDRESS,Address Used In The TWI Transfer"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,Address used in the TWI transfer"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40003500))&0x0F)==0x09)
|
|
base ad:0x40003000
|
|
width 12.
|
|
group.long 0x14++0x03 "TASKS"
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "PREPARERX,Prepare The TWI Slave To Respond To a Write Command"
|
|
line.long 0x04 "PREPARETX,Prepare The TWI Slave To Respond To a Read command"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x164++0x07
|
|
line.long 0x00 "WRITE,Write Command Received"
|
|
line.long 0x04 "READ,Read Command Received"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 14. " READ_SUSPEND ,Shortcut between READ event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " WRITE_SUSPEND ,Shortcut between WRITE event and SUSPEND task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " READ_set/clr ,Enable or disable interrupt for READ event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " WRITE_set/clr ,Enable or disable interrupt for WRITE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "ERRORSRC,Error Source"
|
|
bitfld.long 0x00 3. " OVERREAD ,TX buffer over-read detected" "No error,Error"
|
|
bitfld.long 0x00 2. " DNACK ,NACK received after receiving a data byte" "No error,Error"
|
|
bitfld.long 0x00 0. " OVERFLOW ,RX buffer overflow detected" "No error,Error"
|
|
rgroup.long 0x4D4++0x03
|
|
line.long 0x00 "MATCH,Status Register Indicating Which Address Had a Match"
|
|
bitfld.long 0x00 0. " MATCH ,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWIS"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable or disable TWIS" "Disabled,,,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
elif cpuis("NRF52810QF")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXDPTR,Data Pointer"
|
|
line.long 0x04 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "ADDRESS[0],TWI Slave Address 0"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
line.long 0x04 "ADDRESS[1],TWI slave address 1"
|
|
hexmask.long.byte 0x04 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register For The Address Match Mechanism"
|
|
bitfld.long 0x00 1. " ADDRESS1 ,Enable or disable address matching on ADDRESS[1]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADDRESS0 ,Enable or disable address matching on ADDRESS[0]" "Disabled,Enabled"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,,,,,TWIM,,,TWIS,?..."
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Sercom1"
|
|
base ad:0x40004000
|
|
width 8.
|
|
sif cpuis("NRF52832*")||cpuis("NRF52840*")
|
|
if (((per.l(ad:0x40004500))&0x0F)==0x02)
|
|
base ad:0x40004000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40004500))&0x0F)==0x06)
|
|
base ad:0x40004000
|
|
width 19.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "STARTRX,Start TWI Receive Sequence"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STARTTX,Start TWI Transmit Sequence"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SUSPENDED,Last Byte Has Been Sent Out After The SUSPEND Task Has Beed Issued"
|
|
endif
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x15C++0x07
|
|
line.long 0x00 "LASTRX,Byte Boundary Starting To Receive The Last Byte"
|
|
line.long 0x04 "LASTTX,Byte Boundary Starting To Receive The Last Byte"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 12. " LASTRX_STOP ,Shortcut between LASTRX event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LASTRX_STARTTX ,Shortcut between LASTRX event and STARTTX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " LASTTX_STOP ,Shortcut between LASTTX event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LASTTX_SUSPEND ,Shortcut between LASTTX event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LASTTX_STARTRX ,Shortcut between LASTTX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " LASTTX_set/clr ,Enable or disable interrupt for LASTTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " LASTRX_set/clr ,Enable or disable interrupt for LASTRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SUSPENDED_set/clr ,Enable or disable interrupt for SUSPENDED event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "ERRORSRC,TWI Error Source"
|
|
eventfld.long 0x00 2. " DNACK ,NACK received after sending a data byte" "No error,Error"
|
|
eventfld.long 0x00 1. " ANACK ,NACK received after sending the address" "No error,Error"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0. " OVERRUN ,Overrun error" "Not received,Received"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWI Register"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable TWI" "Disabled,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Disconnected,Connected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,TWI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x08 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "ADDRESS,Address Used In The TWI Transfer"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,Address used in the TWI transfer"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40004500))&0x0F)==0x07)
|
|
base ad:0x40004000
|
|
width 17.
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "START,Start SPI Transaction"
|
|
line.long 0x04 "STOP,Stop SPI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend SPI Transaction"
|
|
line.long 0x04 "RESUME,Resume SPI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,SPI Transaction Has Stopped"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "END,End Of RXD Buffer And TXD Buffer Reached"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,End Of TXD Buffer Reached"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "STARTED,Transaction Started"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 17. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " STARTED ,Enable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " ENDTX ,Enable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " END ,Enable Interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX ,Enable Interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable Interrupt for STOPPED event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "STALLSTAT,Stall Status For EasyDMA RAM Accesses"
|
|
bitfld.long 0x00 1. " RX ,Stall status for EasyDMA RAM writes" "NOSTALL,STALL"
|
|
bitfld.long 0x00 0. " TX ,Stall status for EasyDMA RAM reads" "NOSTALL,STALL"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPIM Register"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPIM" "Disabled,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select Sor MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMOSI,Pin Select for MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum number Of Bytes In Receive Buffer"
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred on the last transaction"
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum number Of Bytes In Transmit buffer"
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "CONFIG,Configuration Register"
|
|
bitfld.long 0x04 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x04 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x04 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
sif cpuis("NRF52840QI")
|
|
endif
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40004500))&0x0F)==0x09)
|
|
base ad:0x40004000
|
|
width 12.
|
|
group.long 0x14++0x03 "TASKS"
|
|
line.long 0x00 "STOP,Stop TWI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI Transaction"
|
|
line.long 0x04 "RESUME,Resume TWI Transaction"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "PREPARERX,Prepare The TWI Slave To Respond To a Write Command"
|
|
line.long 0x04 "PREPARETX,Prepare The TWI Slave To Respond To a Read command"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI Stopped"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI Error"
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,Receive Sequence Started"
|
|
line.long 0x04 "TXSTARTED,Transmit Sequence Started"
|
|
group.long 0x164++0x07
|
|
line.long 0x00 "WRITE,Write Command Received"
|
|
line.long 0x04 "READ,Read Command Received"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 14. " READ_SUSPEND ,Shortcut between READ event and SUSPEND task" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " WRITE_SUSPEND ,Shortcut between WRITE event and SUSPEND task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " READ_set/clr ,Enable or disable interrupt for READ event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " WRITE_set/clr ,Enable or disable interrupt for WRITE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED_set/clr ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED_set/clr ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "ERRORSRC,Error Source"
|
|
bitfld.long 0x00 3. " OVERREAD ,TX buffer over-read detected" "No error,Error"
|
|
bitfld.long 0x00 2. " DNACK ,NACK received after receiving a data byte" "No error,Error"
|
|
bitfld.long 0x00 0. " OVERFLOW ,RX buffer overflow detected" "No error,Error"
|
|
rgroup.long 0x4D4++0x03
|
|
line.long 0x00 "MATCH,Status Register Indicating Which Address Had a Match"
|
|
bitfld.long 0x00 0. " MATCH ,Which of the addresses in {ADDRESS} matched the incoming address" "0,1"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWIS"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable or disable TWIS" "Disabled,,,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
elif cpuis("NRF52810QF")
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin Select For SCL"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELSDA,Pin Select For SDA"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDLIST ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXDPTR,Data Pointer"
|
|
line.long 0x04 "TXDMAXCNT,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred On The Last Transaction"
|
|
sif cpuis("NRF52810*")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "ADDRESS[0],TWI Slave Address 0"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
line.long 0x04 "ADDRESS[1],TWI slave address 1"
|
|
hexmask.long.byte 0x04 0.--6. 0x01 " ADDRESS ,TWI slave address"
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register For The Address Match Mechanism"
|
|
bitfld.long 0x00 1. " ADDRESS1 ,Enable or disable address matching on ADDRESS[1]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADDRESS0 ,Enable or disable address matching on ADDRESS[0]" "Disabled,Enabled"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,SPIS,,,,TWIM,SPIM,,TWIS,?..."
|
|
endif
|
|
elif cpuis("NRF52810*")
|
|
if (((per.l(ad:0x40004500))&0x0F)==0x02)
|
|
base ad:0x40004000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40004500))&0x0F)==0x07)
|
|
base ad:0x40004000
|
|
width 17.
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "START,Start SPI Transaction"
|
|
line.long 0x04 "STOP,Stop SPI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend SPI Transaction"
|
|
line.long 0x04 "RESUME,Resume SPI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,SPI Transaction Has Stopped"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "END,End Of RXD Buffer And TXD Buffer Reached"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,End Of TXD Buffer Reached"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "STARTED,Transaction Started"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 17. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " STARTED ,Enable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " ENDTX ,Enable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " END ,Enable Interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX ,Enable Interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable Interrupt for STOPPED event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "STALLSTAT,Stall Status For EasyDMA RAM Accesses"
|
|
bitfld.long 0x00 1. " RX ,Stall status for EasyDMA RAM writes" "NOSTALL,STALL"
|
|
bitfld.long 0x00 0. " TX ,Stall status for EasyDMA RAM reads" "NOSTALL,STALL"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPIM Register"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPIM" "Disabled,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40004000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40004000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select Sor MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMOSI,Pin Select for MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum number Of Bytes In Receive Buffer"
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred on the last transaction"
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum number Of Bytes In Transmit buffer"
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "CONFIG,Configuration Register"
|
|
bitfld.long 0x04 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x04 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x04 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
sif cpuis("NRF52840QI")
|
|
endif
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,SPIS,,,,,SPIM,,,?..."
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")
|
|
tree "Sercom2"
|
|
base ad:0x40023000
|
|
width 8.
|
|
if (((per.l(ad:0x40023500))&0x0F)==0x02)
|
|
base ad:0x40023000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40023000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40023000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40023000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40023000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40023500))&0x0F)==0x07)
|
|
base ad:0x40023000
|
|
width 17.
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "START,Start SPI Transaction"
|
|
line.long 0x04 "STOP,Stop SPI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend SPI Transaction"
|
|
line.long 0x04 "RESUME,Resume SPI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,SPI Transaction Has Stopped"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "END,End Of RXD Buffer And TXD Buffer Reached"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,End Of TXD Buffer Reached"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "STARTED,Transaction Started"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 17. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " STARTED ,Enable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " ENDTX ,Enable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " END ,Enable Interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX ,Enable Interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable Interrupt for STOPPED event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "STALLSTAT,Stall Status For EasyDMA RAM Accesses"
|
|
bitfld.long 0x00 1. " RX ,Stall status for EasyDMA RAM writes" "NOSTALL,STALL"
|
|
bitfld.long 0x00 0. " TX ,Stall status for EasyDMA RAM reads" "NOSTALL,STALL"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPIM Register"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPIM" "Disabled,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40023000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40023000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40023000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select Sor MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMOSI,Pin Select for MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum number Of Bytes In Receive Buffer"
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred on the last transaction"
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum number Of Bytes In Transmit buffer"
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "CONFIG,Configuration Register"
|
|
bitfld.long 0x04 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x04 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x04 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
sif cpuis("NRF52840QI")
|
|
endif
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,SPIS,,,,,SPIM,,,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
tree "Sercom3"
|
|
base ad:0x4002F000
|
|
width 8.
|
|
if (((per.l(ad:0x4002F500))&0x0F)==0x02)
|
|
base ad:0x4002F000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4002F000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
elif (((per.l(ad:0x4002F500))&0x0F)==0x07)
|
|
base ad:0x4002F000
|
|
width 17.
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "START,Start SPI Transaction"
|
|
line.long 0x04 "STOP,Stop SPI Transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend SPI Transaction"
|
|
line.long 0x04 "RESUME,Resume SPI Transaction"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "STOPPED,SPI Transaction Has Stopped"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "END,End Of RXD Buffer And TXD Buffer Reached"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,End Of TXD Buffer Reached"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "STARTED,Transaction Started"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 17. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " STARTED ,Enable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " ENDTX ,Enable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " END ,Enable Interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX ,Enable Interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable Interrupt for STOPPED event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "STALLSTAT,Stall Status For EasyDMA RAM Accesses"
|
|
bitfld.long 0x00 1. " RX ,Stall status for EasyDMA RAM writes" "NOSTALL,STALL"
|
|
bitfld.long 0x00 0. " TX ,Stall status for EasyDMA RAM reads" "NOSTALL,STALL"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPIM Register"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPIM" "Disabled,,,,,,,Enabled,?..."
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4002F000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select Sor MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4002F000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMOSI,Pin Select for MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI Frequency"
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,Data Pointer"
|
|
line.long 0x04 "RXDMAXCNT,Maximum number Of Bytes In Receive Buffer"
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "RXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred on the last transaction"
|
|
group.long 0x540++0x0B
|
|
line.long 0x00 "RXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "TXDPTR,Data Pointer"
|
|
line.long 0x08 "TXDMAXCNT,Maximum number Of Bytes In Transmit buffer"
|
|
hexmask.long.byte 0x08 0.--7. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "TXDAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "TXDLIST,EasyDMA List Type"
|
|
bitfld.long 0x00 0.--2. " LIST ,List type" "Disabled,ArrayList,?..."
|
|
line.long 0x04 "CONFIG,Configuration Register"
|
|
bitfld.long 0x04 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x04 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x04 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x560++0x0B
|
|
line.long 0x00 "IFTIMINGRXDELAY,Sample Delay For Input Serial Data On MISO"
|
|
bitfld.long 0x00 0.--2. " RXDELAY ,Sample delay for input serial data on MISO" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "IFTIMINGCSNDUR,Minimum Duration Between Edge Of CSN And Edge Of SCK"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CSNDUR ,Minimum duration between edge of CSN and edge of SCK"
|
|
line.long 0x08 "CSNPOL,Polarity Of CSN Output"
|
|
bitfld.long 0x08 0. " CSNPOL ,Polarity of CSN output" "Low,High"
|
|
if (((per.l(ad:0x4002F000+0x56C))&0x20)==0x00)
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSELDCX,Pin Select For DCX"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSELDCX,Pin Select For DCX"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "DCXCNT,DCX Configuration"
|
|
bitfld.long 0x00 0.--4. " DCXCNT ,Number of command bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,,SPIS,,,,,SPIM,,,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Universal asynchronous receiver (UART)"
|
|
tree "UART 0"
|
|
base ad:0x40002000
|
|
width 12.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "STARTRX,Start UART receiver"
|
|
line.long 0x04 "STOPRX,Stop UART receiver"
|
|
line.long 0x08 "STARTTX,Start UART transmitter"
|
|
line.long 0x0C "STOPTX,Stop UART transmitter"
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SUSPEND,Suspend UART"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "FLUSHRX,Flush RX FIFO into RX buffer"
|
|
endif
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "CTS,CTS is activated (set low). Clear To Send."
|
|
line.long 0x04 "NCTS,CTS is deactivated (set high). Not Clear To Send."
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "RXDRDY,Data received in RXD"
|
|
in
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,Receive buffer is filled up"
|
|
endif
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXDRDY,Data sent from TXD"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,Last TX byte transmitted"
|
|
endif
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,Error detected"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RXTO,Receiver timeout"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,UART receiver has started"
|
|
line.long 0x04 "TXSTARTED,UART transmitter has started"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "TXSTOPPED,Transmitter stopped"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 4. " NCTS_STOPRX ,Shortcut between NCTS event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CTS_STARTRX ,Shortcut between CTS event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 6. " ENDRX_STOPRX ,Shortcut between ENDRX event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ENDRX_STARTRX ,Shortcut between ENDRX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " TXSTOPPED ,Enable or disable interrupt for TXSTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO_set/clr ,Enable or disable interrupt on RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY_set/clr ,Enable or disable interrupt on TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY_set/clr ,Enable or disable interrupt on RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS_set/clr ,Enable or disable interrupt on NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS_set/clr ,Enable or disable interrupt on CTS event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "ERRORSRC,Error source"
|
|
eventfld.long 0x00 3. " BREAK ,Break condition" "Not occurred,Occurred"
|
|
eventfld.long 0x00 2. " FRAMING ,Framing error occurred" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PARITY ,Parity error" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERRUN ,Overrun error" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable UART"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,Enabled,?..."
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable UART" "Disabled,,,,Enabled,,,"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40002000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
endif
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data received in previous transfers"
|
|
wgroup.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data to be transferred"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "BAUDRATE,Baud rate"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x534++0x0B
|
|
line.long 0x00 "RXD_PTR,Data pointer"
|
|
line.long 0x04 "RXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
line.long 0x08 "RXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXD_PTR,Data pointer"
|
|
line.long 0x04 "TXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
line.long 0x08 "TXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
|
|
sif cpuis("NRF52810*")
|
|
bitfld.long 0x00 4. " STOP ,Stop bits" "1,2"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1.--3. " PARITY ,Parity" "Excluded,,,,,,,Included"
|
|
bitfld.long 0x00 0. " HWFC ,Hardware flow control" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
sif cpuis("NRF52840*")
|
|
tree "UART 1"
|
|
base ad:0x40028000
|
|
width 12.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "STARTRX,Start UART receiver"
|
|
line.long 0x04 "STOPRX,Stop UART receiver"
|
|
line.long 0x08 "STARTTX,Start UART transmitter"
|
|
line.long 0x0C "STOPTX,Stop UART transmitter"
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SUSPEND,Suspend UART"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "FLUSHRX,Flush RX FIFO into RX buffer"
|
|
endif
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "CTS,CTS is activated (set low). Clear To Send."
|
|
line.long 0x04 "NCTS,CTS is deactivated (set high). Not Clear To Send."
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "RXDRDY,Data received in RXD"
|
|
in
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,Receive buffer is filled up"
|
|
endif
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXDRDY,Data sent from TXD"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,Last TX byte transmitted"
|
|
endif
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,Error detected"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RXTO,Receiver timeout"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,UART receiver has started"
|
|
line.long 0x04 "TXSTARTED,UART transmitter has started"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "TXSTOPPED,Transmitter stopped"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 4. " NCTS_STOPRX ,Shortcut between NCTS event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CTS_STARTRX ,Shortcut between CTS event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 6. " ENDRX_STOPRX ,Shortcut between ENDRX event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ENDRX_STARTRX ,Shortcut between ENDRX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " TXSTOPPED ,Enable or disable interrupt for TXSTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO_set/clr ,Enable or disable interrupt on RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY_set/clr ,Enable or disable interrupt on TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY_set/clr ,Enable or disable interrupt on RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS_set/clr ,Enable or disable interrupt on NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS_set/clr ,Enable or disable interrupt on CTS event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "ERRORSRC,Error source"
|
|
eventfld.long 0x00 3. " BREAK ,Break condition" "Not occurred,Occurred"
|
|
eventfld.long 0x00 2. " FRAMING ,Framing error occurred" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PARITY ,Parity error" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERRUN ,Overrun error" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable UART"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,Enabled,?..."
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable UART" "Disabled,,,,Enabled,,,"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40028000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40028000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40028000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40028000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
endif
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data received in previous transfers"
|
|
wgroup.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data to be transferred"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "BAUDRATE,Baud rate"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x534++0x0B
|
|
line.long 0x00 "RXD_PTR,Data pointer"
|
|
line.long 0x04 "RXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
line.long 0x08 "RXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXD_PTR,Data pointer"
|
|
line.long 0x04 "TXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
line.long 0x08 "TXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
|
|
sif cpuis("NRF52810*")
|
|
bitfld.long 0x00 4. " STOP ,Stop bits" "1,2"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1.--3. " PARITY ,Parity" "Excluded,,,,,,,Included"
|
|
bitfld.long 0x00 0. " HWFC ,Hardware flow control" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Quadrature Decoder (QDEC)"
|
|
base ad:0x40012000
|
|
width 12.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Task Starting The Quadrature Decoder"
|
|
line.long 0x04 "STOP,Task Stopping The Quadrature Decoder"
|
|
line.long 0x08 "READCLRACC,Task Transferring The Content"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "RDCLRACC,Read And Clear ACC"
|
|
line.long 0x04 "RDCLRDBL,Read And Clear ACCDBL"
|
|
endif
|
|
group.long 0x100++0x0B "EVENTS"
|
|
line.long 0x00 "SAMPLERDY,Event Being Generated For Every New Sample Value Written To The SAMPLE Register"
|
|
line.long 0x04 "REPORTRDY,Event Being Generated When REPORTPER Number Of Samples Has Been Accumulated"
|
|
line.long 0x08 "ACCOF,ACC Or ACCDBL Register Overflow"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x10C++0x07
|
|
line.long 0x00 "DBLRDY,Double Displacement Detected"
|
|
line.long 0x04 "STOPPED,QDEC Has Been Stopped"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 6. " SAMPLERDY_READCLRACC ,Short SAMPLERDY event to READCLRACC task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DBLRDY_STOP ,Short DBLRDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DBLRDY_RDCLRDBL ,Short DBLRDY event to RDCLRDBL task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REPORTRDY_STOP ,Short REPORTRDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REPORTRDY_RDCLRACC ,Short REPORTRDY event to RDCLRACC task" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " SAMPLERDY_STOP ,Short SAMPLERDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REPORTRDY_READCLRACC ,Short REPORTRDY event to READCLRACC task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " STOPPED ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " DBLRDY ,Enable or disable interrupt on DBLRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ACCOF_set/clr ,Enable or disable interrupt on ACCOF event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " REPORTRDY_set/clr ,Enable or disable interrupt on REPORTRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " SAMPLERDY_set/clr ,Enable or disable interrupt on SAMPLERDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ACCOF_set/clr ,Enable or disable interrupt on ACCOF event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " REPORTRDY_set/clr ,Enable or disable interrupt on REPORTRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SAMPLERDY_set/clr ,Enable or disable interrupt on SAMPLERDY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable the quadrature decoder" "Disabled,Enabled"
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "LEDPOL,LED Output Pin Polarity"
|
|
bitfld.long 0x00 0. " LEDPOL ,LED output polarity" "Active Low,Active High"
|
|
line.long 0x04 "SAMPLEPER,Sample period"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x04 0.--3. " SAMPLEPER ,Sample period" "128us,256us,512us,1024us,2048us,4096us,8192us,16384us,32ms,65ms,131ms,?..."
|
|
else
|
|
bitfld.long 0x04 0.--2. " VAL ,Sample period" "128us,256us,512us,1024us,2048us,4096us,8192us,16384us"
|
|
endif
|
|
rgroup.long 0x50C++0x03
|
|
line.long 0x00 "SAMPLE,Motion Sample Value"
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "REPORTPER,Number Of Samples To Be Taken Before a REPORTRDY Event Is Generated"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF"))
|
|
bitfld.long 0x00 0.--3. " REPORTPER ,Specifies the number of samples to be accumulated in the ACC register" "10-SMPL,40-SMPL,80-SMPL,120-SMPL,160-SMPL,200-SMPL,240-SMPL,280-SMPL,1-SMPL,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " VAL ,Specifies the number of samples to be accumulated in the ACC register" "10-SMPL,40-SMPL,80-SMPL,120-SMPL,160-SMPL,200-SMPL,240-SMPL,280-SMPL"
|
|
endif
|
|
rgroup.long 0x514++0x07
|
|
line.long 0x00 "ACC,Register Accumulating The Valid Transitions"
|
|
line.long 0x04 "ACCREAD,Snapshot Of The ACC Register Updated By The READCLRACC Task"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40012000+0x51C))&0x20)==0x00)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40012000+0x520))&0x20)==0x00)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40012000+0x524))&0x20)==0x00)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
else
|
|
group.long 0x51C++0x0B
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
line.long 0x04 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
line.long 0x08 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
endif
|
|
group.long 0x528++0x0B
|
|
line.long 0x00 "DBFEN,Enable Input Debounce Filters"
|
|
bitfld.long 0x00 0. " DBFEN ,Enable input debounce filters" "Disabled,Enabled"
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "LEDPRE,Time Period The LED Is Switched ON Prior To Sampling"
|
|
hexmask.long.word 0x00 0.--8. 1. " LEDPRE ,Period in US the LED is switched on prior to sampling"
|
|
rgroup.long 0x544++0x07
|
|
line.long 0x00 "ACCDBL,Register Accumulating The Number Of Detected Double Transitions"
|
|
bitfld.long 0x00 0.--3. " ACCDBL ,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ACCDBLREAD,Snapshot Of The ACCDBL"
|
|
bitfld.long 0x04 0.--3. " ACCDBLREAD ,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Analog to digital converter (SAADC)"
|
|
base ad:0x40007000
|
|
width 18.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start The ADC And Prepare The Result Buffer In RAM"
|
|
line.long 0x04 "SAMPLE,Take One ADC Sample"
|
|
line.long 0x08 "STOP,Stop The ADC And Terminate Any On-Going Conversion"
|
|
line.long 0x0C "CALIBRATEOFFSET,Starts offset Auto-Calibration"
|
|
group.long 0x100++0x17 "EVENTS"
|
|
line.long 0x00 "STARTED,The ADC Has Started"
|
|
line.long 0x04 "END,The ADC Has Filled Up The Result Buffer"
|
|
line.long 0x08 "DONE,A Conversion Task Has Been Completed"
|
|
line.long 0x0C "RESULTDONE,A Result Is Ready To Get Transferred To RAM"
|
|
line.long 0x10 "CALIBRATEDONE,Calibration Is Complete"
|
|
line.long 0x14 "STOPPED,The ADC Has Stopped"
|
|
group.long (0x118+0x0)++0x07
|
|
line.long 0x00 "CH[0]LIMITH,Last Results Is Equal Or Above CH[0]LIMITHIGH"
|
|
line.long 0x04 "CH[0]LIMITL,Last Results Is Equal Or Below CH[0]LIMITLOW"
|
|
group.long (0x118+0x8)++0x07
|
|
line.long 0x00 "CH[1]LIMITH,Last Results Is Equal Or Above CH[1]LIMITHIGH"
|
|
line.long 0x04 "CH[1]LIMITL,Last Results Is Equal Or Below CH[1]LIMITLOW"
|
|
group.long (0x118+0x10)++0x07
|
|
line.long 0x00 "CH[2]LIMITH,Last Results Is Equal Or Above CH[2]LIMITHIGH"
|
|
line.long 0x04 "CH[2]LIMITL,Last Results Is Equal Or Below CH[2]LIMITLOW"
|
|
group.long (0x118+0x18)++0x07
|
|
line.long 0x00 "CH[3]LIMITH,Last Results Is Equal Or Above CH[3]LIMITHIGH"
|
|
line.long 0x04 "CH[3]LIMITL,Last Results Is Equal Or Below CH[3]LIMITLOW"
|
|
group.long (0x118+0x20)++0x07
|
|
line.long 0x00 "CH[4]LIMITH,Last Results Is Equal Or Above CH[4]LIMITHIGH"
|
|
line.long 0x04 "CH[4]LIMITL,Last Results Is Equal Or Below CH[4]LIMITLOW"
|
|
group.long (0x118+0x28)++0x07
|
|
line.long 0x00 "CH[5]LIMITH,Last Results Is Equal Or Above CH[5]LIMITHIGH"
|
|
line.long 0x04 "CH[5]LIMITL,Last Results Is Equal Or Below CH[5]LIMITLOW"
|
|
group.long (0x118+0x30)++0x07
|
|
line.long 0x00 "CH[6]LIMITH,Last Results Is Equal Or Above CH[6]LIMITHIGH"
|
|
line.long 0x04 "CH[6]LIMITL,Last Results Is Equal Or Below CH[6]LIMITLOW"
|
|
group.long (0x118+0x38)++0x07
|
|
line.long 0x00 "CH[7]LIMITH,Last Results Is Equal Or Above CH[7]LIMITHIGH"
|
|
line.long 0x04 "CH[7]LIMITL,Last Results Is Equal Or Below CH[7]LIMITLOW"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " CH7LIMITL_set/clr ,Enable or disable interrupt for CH[7]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " CH7LIMITH_set/clr ,Enable or disable interrupt for CH[7]LIMITH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CH6LIMITL_set/clr ,Enable or disable interrupt for CH[6]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CH6LIMITH_set/clr ,Enable or disable interrupt for CH[6]LIMITH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CH5LIMITL_set/clr ,Enable or disable interrupt for CH[5]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CH5LIMITH_set/clr ,Enable or disable interrupt for CH[5]LIMITH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CH4LIMITL_set/clr ,Enable or disable interrupt for CH[4]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CH4LIMITH_set/clr ,Enable or disable interrupt for CH[4]LIMITH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CH3LIMITL_set/clr ,Enable or disable interrupt for CH[3]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " CH3LIMITH_set/clr ,Enable or disable interrupt for CH[3]LIMITH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " CH2LIMITL_set/clr ,Enable or disable interrupt for CH[2]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CH2LIMITH_set/clr ,Enable or disable interrupt for CH[2]LIMITH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CH1LIMITL_set/clr ,Enable or disable interrupt for CH[1]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CH1LIMITH_set/clr ,Enable or disable interrupt for CH[1]LIMITH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CH0LIMITL_set/clr ,Enable or disable interrupt for CH[0]LIMITL event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CH0LIMITH_set/clr ,Enable or disable interrupt for CH[0]LIMITH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " STOPPED_set/clr ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CALIBRATEDONE_set/clr ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RESULTDONE_set/clr ,Enable or disable interrupt for RESULTDONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DONE_set/clr ,Enable or disable interrupt for DONE event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable or disable interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " STARTED_set/clr ,Enable or disable interrupt for STARTED event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Status"
|
|
bitfld.long 0x00 0. " STATUS ,Status" "Ready,Busy"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Or Disable ADC"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable or disable ADC" "Disabled,Enabled"
|
|
group.long (0x510+0x0)++0x0F
|
|
line.long 0x00 "CH[0]PSELP,Input Positive Pin Selection For CH[0]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[0]PSELN,Input Negative Pin Selection For CH[0]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[0]CONFIG,Input Configuration For CH[0]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[0]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x10)++0x0F
|
|
line.long 0x00 "CH[1]PSELP,Input Positive Pin Selection For CH[1]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[1]PSELN,Input Negative Pin Selection For CH[1]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[1]CONFIG,Input Configuration For CH[1]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[1]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x20)++0x0F
|
|
line.long 0x00 "CH[2]PSELP,Input Positive Pin Selection For CH[2]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[2]PSELN,Input Negative Pin Selection For CH[2]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[2]CONFIG,Input Configuration For CH[2]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[2]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x30)++0x0F
|
|
line.long 0x00 "CH[3]PSELP,Input Positive Pin Selection For CH[3]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[3]PSELN,Input Negative Pin Selection For CH[3]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[3]CONFIG,Input Configuration For CH[3]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[3]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x40)++0x0F
|
|
line.long 0x00 "CH[4]PSELP,Input Positive Pin Selection For CH[4]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[4]PSELN,Input Negative Pin Selection For CH[4]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[4]CONFIG,Input Configuration For CH[4]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[4]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x50)++0x0F
|
|
line.long 0x00 "CH[5]PSELP,Input Positive Pin Selection For CH[5]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[5]PSELN,Input Negative Pin Selection For CH[5]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[5]CONFIG,Input Configuration For CH[5]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[5]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x60)++0x0F
|
|
line.long 0x00 "CH[6]PSELP,Input Positive Pin Selection For CH[6]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[6]PSELN,Input Negative Pin Selection For CH[6]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[6]CONFIG,Input Configuration For CH[6]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[6]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long (0x510+0x70)++0x0F
|
|
line.long 0x00 "CH[7]PSELP,Input Positive Pin Selection For CH[7]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PSELP ,Analog positive input channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x04 "CH[7]PSELN,Input Negative Pin Selection For CH[7]"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,,,AnalogInput2,AnalogInput3,AnalogInput4,,AnalogInput6,,VDD,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PSELN ,Analog negative input enables diffrential channel" "NC,AnalogInput0,AnalogInput1,AnalogInput2,AnalogInput3,AnalogInput4,AnalogInput5,AnalogInput6,AnalogInput7,VDD,?..."
|
|
endif
|
|
line.long 0x08 "CH[7]CONFIG,Input Configuration For CH[7]"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
bitfld.long 0x08 24. " BURST ,Enable burst mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 20. " MODE ,Enable differential mode" "SE,Diff"
|
|
bitfld.long 0x08 16.--18. " TACQ ,Acquisition time" "3us,5us,10us,15us,20us,40us,?..."
|
|
bitfld.long 0x08 12. " REFSEL ,Reference control" "Internal,VDD1_4"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " GAIN ,Gain control" "1/6,1/5,1/4,1/3,1/2,1,2,4"
|
|
bitfld.long 0x08 4.--5. " RESN ,Negative channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
bitfld.long 0x08 0.--1. " RESP ,Positive channel resistor control" "Bypass,Pulldown,Pullup,VDD1_2"
|
|
line.long 0x0C "CH[7]LIMIT,High/Low Limits For Event Monitoring a Channel"
|
|
hexmask.long.word 0x0C 16.--31. 1. " HIGH ,High level limit"
|
|
hexmask.long.word 0x0C 0.--15. 1. " LOW ,Low level limit"
|
|
group.long 0x5F0++0x0B
|
|
line.long 0x00 "RESOLUTION,Resolution Configuration"
|
|
bitfld.long 0x00 0.--2. " VAL ,Set the resolution" "8bit,10bit,12bit,14bit,?..."
|
|
line.long 0x04 "OVERSAMPLE,Oversampling Configuration"
|
|
bitfld.long 0x04 0.--3. " OVERSAMPLE ,Oversample control" "Bypass,Over2x,Over4x,Over8x,Over16x,Over32x,Over64x,Over128x,Over256x,?..."
|
|
line.long 0x08 "SAMPLERATE,Controls Normal Or Continuous Sample Rate"
|
|
bitfld.long 0x08 12. " MODE ,Select mode for sample rate control" "Task,Timers"
|
|
hexmask.long.word 0x08 0.--10. 1. " CC ,Capture and compare value"
|
|
group.long 0x62C++0x0B
|
|
line.long 0x00 "RESULTPTR,Data Pointer"
|
|
line.long 0x04 "RESULTMAXCNT,Maximum Number Of Buffer Words To Transfer"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
hexmask.long.word 0x04 0.--14. 1. " MAXCNT ,Maximum number of buffer words to transfer"
|
|
else
|
|
hexmask.long.word 0x04 0.--15. 1. " MAXCNT ,Maximum number of buffer words to transfer"
|
|
endif
|
|
line.long 0x08 "RESULTAMOUNT,Number Of Buffer Words Transferred Since Last START"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*"))
|
|
hexmask.long.word 0x08 0.--14. 1. " AMOUNT ,Number of buffer words transferred since last START"
|
|
else
|
|
hexmask.long.word 0x08 0.--15. 1. " AMOUNT ,Number of buffer words transferred since last START"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")
|
|
tree "Low Power Comparator/Comparator (LPCOMP/COMP)"
|
|
base ad:0x40013000
|
|
width 8.
|
|
if (((per.l(ad:0x40013500))&0x03)==0x01)
|
|
base ad:0x40013000
|
|
width 15.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Start Comparator"
|
|
line.long 0x04 "STOP,Stop Comparator"
|
|
line.long 0x08 "SAMPLE,Sample Comparator Value"
|
|
group.long 0x100++0x0F "EVENTS"
|
|
line.long 0x00 "READY,LPCOMP Is Ready And Output is Valid"
|
|
line.long 0x04 "DOWN,Downward Crossing"
|
|
line.long 0x08 "UP,Upward Crossing"
|
|
line.long 0x0C "CROSS,Downward Or Upward Crossing"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts For LPCOMP"
|
|
bitfld.long 0x00 4. " CROSS_STOP ,Shortcut between CROSS event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " UP_STOP ,Shortcut between UP event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOWN_STOP ,Shortcut between DOWN event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " READY_STOP ,Shortcut between READY event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " READY_SAMPLE ,Shortcut between READY event and SAMPLE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable or Disable Interrupt"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CROSS_set/clr ,Enable or disable interrupt on CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " UP_set/clr ,Enable or disable interrupt on UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " DOWN_set/clr ,Enable or disable interrupt on DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CROSS_set/clr ,Enable or disable interrupt on CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " UP_set/clr ,Enable or disable interrupt on UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOWN_set/clr ,Enable or disable interrupt on DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "RESULT,Compare Result"
|
|
bitfld.long 0x00 0. " RESULT ,Result of last compare" "Below,Above"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable register" "Disabled,Enabled,?..."
|
|
group.long 0x504++0x0B
|
|
line.long 0x00 "PSEL,Input Pin Select"
|
|
bitfld.long 0x00 0.--2. " PSEL ,Analog pin select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
line.long 0x04 "REFSEL,Reference Select"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x04 0.--3. " REFSEL ,Analog pin select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF,VDD*1/16,VDD*3/16,VDD*5/16,VDD*7/16,VDD*9/16,VDD*11/16,VDD*13/16,VDD*15/16"
|
|
elif cpuis("NRF52840*")
|
|
bitfld.long 0x04 0.--3. " REFSEL ,Reference select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF,VDD*1/16,VDD*3/16,VDD*5/16,VDD*7/16,VDD*9/16,VDD*11/16,VDD*13/16,VDD*15/16"
|
|
else
|
|
bitfld.long 0x04 0.--2. " REFSEL ,Reference select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF"
|
|
endif
|
|
line.long 0x08 "EXTREFSEL,External Reference Select"
|
|
bitfld.long 0x08 0. " EXTREFSEL ,External analog reference select" "AREF0,AREF1"
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "ANADETECT,Analog Detect Configuration"
|
|
bitfld.long 0x00 0.--1. " ANADETECT ,Analog detect configuration" "Crossed,Up,Down,?..."
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*"))
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "HYST,Comparator Hysteresis Enable"
|
|
bitfld.long 0x00 0. " HYST ,Comparator hysteresis enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
elif (((per.l(ad:0x40013500))&0x03)==0x02)
|
|
base ad:0x40013000
|
|
width 12.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Start Comparator"
|
|
line.long 0x04 "STOP,Stop Comparator"
|
|
line.long 0x08 "SAMPLE,Sample Comparator Value"
|
|
group.long 0x100++0x0F "EVENTS"
|
|
line.long 0x00 "READY,COMP Is Ready And Output Is Valid"
|
|
line.long 0x04 "DOWN,Downward Crossing"
|
|
line.long 0x08 "UP,Upward Crossing"
|
|
line.long 0x0C "CROSS,Downward Or Upward Crossing"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " CROSS_STOP ,Shortcut between CROSS event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " UP_STOP ,Shortcut between UP event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOWN_STOP ,Shortcut between DOWN event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " READY_STOP ,Shortcut between READY event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READY_SAMPLE ,Shortcut between READY event and SAMPLE task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CROSS ,Enable or disable interrupt for CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " UP ,Enable or disable interrupt for UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOWN ,Enable or disable interrupt for DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY ,Enable or disable interrupt for READY event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "RESULT,Compare Result"
|
|
bitfld.long 0x00 0. " RESULT ,Result of last compare" "Below,Above"
|
|
group.long 0x500++0x0F
|
|
line.long 0x00 "ENABLE,COMP Enable"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable or disable COMP" "Disabled,,Enabled,?..."
|
|
line.long 0x04 "PSEL,Pin select"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--2. " PSEL ,Analog pin select" ",,AIN2,AIN3,AIN4,,AIN6,?..."
|
|
else
|
|
bitfld.long 0x04 0.--2. " PSEL ,Analog pin select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
endif
|
|
line.long 0x08 "REFSEL,Reference Source Select"
|
|
sif cpuis("NRF52840QI")||cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 0.--2. " REFSEL ,Reference select" "Int1V2,Int1V8,Int2V4,,VDD,ARef,?..."
|
|
else
|
|
bitfld.long 0x08 0.--2. " REFSEL ,Reference select" "Int1V2,Int1V8,Int2V4,,VDD,,,ARef"
|
|
endif
|
|
line.long 0x0C "EXTREFSEL,External Reference Select"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x0C 0.--2. " EXTREFSEL ,External analog reference select" "AREF0,AREF1,AREF2,AREF3,AREF4,AREF5,AREF6,AREF7"
|
|
else
|
|
bitfld.long 0x0C 0. " EXTREFSEL ,External analog reference select" "AREF0,AREF1"
|
|
endif
|
|
group.long 0x530++0x0B
|
|
line.long 0x00 "TH,Threshold Configuration For Hysteresis Unit"
|
|
bitfld.long 0x00 8.--13. " THDOWN ,VDOWN = (THDOWN+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " THUP ,VUP = (THUP+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "MODE,Mode Configuration"
|
|
bitfld.long 0x04 8. " MAIN ,Main operation mode" "SE,Diff"
|
|
bitfld.long 0x04 0.--1. " SP ,Speed and power mode" "Low,Normal,High,?..."
|
|
line.long 0x08 "HYST,Comparator Hysteresis Enable"
|
|
bitfld.long 0x08 0. " HYST ,Comparator hysteresis" "Disabled,Enabled"
|
|
sif !cpuis("NRF52810QC")&&!cpuis("NRF52810QF")&&!cpuis("NRF52840QI")
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "ISOURCE,Current Source Select On Analog Input"
|
|
bitfld.long 0x00 0.--1. " ISOURCE ,Comparator hysteresis" "Off,Ien2mA5,Ien5mA,Ien10mA"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable"
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable mode" "Disabled,LPCOMP,COMP,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
else
|
|
tree "Comparator (COMP)"
|
|
base ad:0x40013000
|
|
width 12.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Start Comparator"
|
|
line.long 0x04 "STOP,Stop Comparator"
|
|
line.long 0x08 "SAMPLE,Sample Comparator Value"
|
|
group.long 0x100++0x0F "EVENTS"
|
|
line.long 0x00 "READY,COMP Is Ready And Output Is Valid"
|
|
line.long 0x04 "DOWN,Downward Crossing"
|
|
line.long 0x08 "UP,Upward Crossing"
|
|
line.long 0x0C "CROSS,Downward Or Upward Crossing"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " CROSS_STOP ,Shortcut between CROSS event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " UP_STOP ,Shortcut between UP event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOWN_STOP ,Shortcut between DOWN event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " READY_STOP ,Shortcut between READY event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READY_SAMPLE ,Shortcut between READY event and SAMPLE task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CROSS ,Enable or disable interrupt for CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " UP ,Enable or disable interrupt for UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOWN ,Enable or disable interrupt for DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY ,Enable or disable interrupt for READY event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "RESULT,Compare Result"
|
|
bitfld.long 0x00 0. " RESULT ,Result of last compare" "Below,Above"
|
|
group.long 0x500++0x0F
|
|
line.long 0x00 "ENABLE,COMP Enable"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable or disable COMP" "Disabled,,Enabled,?..."
|
|
line.long 0x04 "PSEL,Pin select"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--2. " PSEL ,Analog pin select" ",,AIN2,AIN3,AIN4,,AIN6,?..."
|
|
else
|
|
bitfld.long 0x04 0.--2. " PSEL ,Analog pin select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
endif
|
|
line.long 0x08 "REFSEL,Reference Source Select"
|
|
sif cpuis("NRF52840QI")||cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 0.--2. " REFSEL ,Reference select" "Int1V2,Int1V8,Int2V4,,VDD,ARef,?..."
|
|
else
|
|
bitfld.long 0x08 0.--2. " REFSEL ,Reference select" "Int1V2,Int1V8,Int2V4,,VDD,,,ARef"
|
|
endif
|
|
line.long 0x0C "EXTREFSEL,External Reference Select"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x0C 0.--2. " EXTREFSEL ,External analog reference select" "AREF0,AREF1,AREF2,AREF3,AREF4,AREF5,AREF6,AREF7"
|
|
else
|
|
bitfld.long 0x0C 0. " EXTREFSEL ,External analog reference select" "AREF0,AREF1"
|
|
endif
|
|
group.long 0x530++0x0B
|
|
line.long 0x00 "TH,Threshold Configuration For Hysteresis Unit"
|
|
bitfld.long 0x00 8.--13. " THDOWN ,VDOWN = (THDOWN+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " THUP ,VUP = (THUP+1)/64*VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "MODE,Mode Configuration"
|
|
bitfld.long 0x04 8. " MAIN ,Main operation mode" "SE,Diff"
|
|
bitfld.long 0x04 0.--1. " SP ,Speed and power mode" "Low,Normal,High,?..."
|
|
line.long 0x08 "HYST,Comparator Hysteresis Enable"
|
|
bitfld.long 0x08 0. " HYST ,Comparator hysteresis" "Disabled,Enabled"
|
|
sif !cpuis("NRF52810QC")&&!cpuis("NRF52810QF")&&!cpuis("NRF52840QI")
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "ISOURCE,Current Source Select On Analog Input"
|
|
bitfld.long 0x00 0.--1. " ISOURCE ,Comparator hysteresis" "Off,Ien2mA5,Ien5mA,Ien10mA"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree "Watchdog Timer (WDT)"
|
|
base ad:0x40010000
|
|
width 11.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "START,Start The Watchdog"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "TIMEOUT,Watchdog Timeout"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set Register"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TIMEOUT ,Enable interrupt on TIMEOUT event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x07
|
|
line.long 0x00 "RUNSTATUS,Run Status"
|
|
bitfld.long 0x00 0. " RUNSTATUS ,Indicates if the watchdog is running" "No,Yes"
|
|
textline " "
|
|
line.long 0x04 "REQSTATUS,Request Status"
|
|
bitfld.long 0x04 7. " RR[7] ,Request status for RR[7] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [6] ,Request status for RR[6] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " [5] ,Request status for RR[5] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [4] ,Request status for RR[4] register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [3] ,Request status for RR[3] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [2] ,Request status for RR[2] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " [1] ,Request status for RR[1] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [0] ,Request status for RR[0] register" "Disabled,Enabled"
|
|
group.long 0x504++0x0B
|
|
line.long 0x00 "CRV,Counter Reload Value"
|
|
line.long 0x04 "RREN,Reload Request Enable"
|
|
bitfld.long 0x04 7. " RR[7] ,Enable or disable RR[7] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [6] ,Enable or disable RR[6] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " [5] ,Enable or disable RR[5] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [4] ,Enable or disable RR[4] register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [3] ,Enable or disable RR[3] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [2] ,Enable or disable RR[2] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " [1] ,Enable or disable RR[1] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [0] ,Enable or disable RR[0] register" "Disabled,Enabled"
|
|
textline " "
|
|
line.long 0x08 "CONFIG,Configuration Register"
|
|
bitfld.long 0x08 3. " HALT ,Configure the watchdog to either be paused or kept running" "Paused,Running"
|
|
bitfld.long 0x08 0. " SLEEP ,Configure the watchdog to either be paused or kept running" "Paused,Running"
|
|
wgroup.long 0x600++0x03
|
|
line.long 0x00 "RR[0],Reload Request Register 0"
|
|
wgroup.long 0x604++0x03
|
|
line.long 0x00 "RR[1],Reload Request Register 1"
|
|
wgroup.long 0x608++0x03
|
|
line.long 0x00 "RR[2],Reload Request Register 2"
|
|
wgroup.long 0x60C++0x03
|
|
line.long 0x00 "RR[3],Reload Request Register 3"
|
|
wgroup.long 0x610++0x03
|
|
line.long 0x00 "RR[4],Reload Request Register 4"
|
|
wgroup.long 0x614++0x03
|
|
line.long 0x00 "RR[5],Reload Request Register 5"
|
|
wgroup.long 0x618++0x03
|
|
line.long 0x00 "RR[6],Reload Request Register 6"
|
|
wgroup.long 0x61C++0x03
|
|
line.long 0x00 "RR[7],Reload Request Register 7"
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")
|
|
tree "Near Field Communication Tag (NFCT)"
|
|
base ad:0x40005000
|
|
width 19.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "AACTIVE,Active NFC For Incoming And Outgoing Frames"
|
|
line.long 0x04 "DISABLE,Disable NFC"
|
|
line.long 0x08 "SENSE,Enable NFC Sense Field Mode"
|
|
line.long 0x0C "STARTTX,Start Transmission Of a Outgoing Frame"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ENABLERXDATA,Initializes The EasyDMA For Receive"
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "GOIDLE,Force State Machine To IDLE State"
|
|
line.long 0x04 "GOSLEEP,Force State Machine To SLEEP_A State"
|
|
group.long 0x100++0x1F "EVENTS"
|
|
line.long 0x00 "READY,The NFC Is Ready To Receive And Aend Frames"
|
|
line.long 0x04 "FIELDDETECTED,Remote NFC Field Detected"
|
|
line.long 0x08 "FIELDLOST,Remote NFC Field Lost"
|
|
line.long 0x0C "TXFRAMESTART,Marks The Start Of The First Symbol Of a Transmitted Frame"
|
|
line.long 0x10 "TXFRAMEEND,Marks The End Of The Last Transmitted On-Air Symbol Of a Frame"
|
|
line.long 0x14 "RXFRAMESTART,Marks The End Of The First Symbol Of a Received Frame"
|
|
line.long 0x18 "RXFRAMEEND,Received Data Have Been Checked And Transferred To RAM And EasyDMA Has Ended Accessing The RX buffer"
|
|
line.long 0x1C "ERROR,NFC Error Reported"
|
|
group.long 0x128++0x0B
|
|
line.long 0x00 "RXERROR,NFC RX Frame Error Reported"
|
|
line.long 0x04 "ENDRX,RX Buffer In Data RAM Full"
|
|
line.long 0x08 "ENDTX,Transmission Of Data In RAM Has Ended And EasyDMA Has Ended Accesing The TX Buffer"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "AUTOCOLRESSTARTED,Auto Collision Resolution Process Has Started"
|
|
group.long 0x148++0x0B
|
|
line.long 0x00 "COLLISION,NFC Auto Collision Resolution Error Reported"
|
|
line.long 0x04 "SELECTED,NFC Auto Collision Resolution Successfully Completed"
|
|
line.long 0x08 "STARTED,EasyDMA Is Ready To Receive Or Send Frames"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
sif cpuis("NRF52840*")
|
|
bitfld.long 0x00 5. " TXFRAMEEND_ENABLERXDATA ,Shortcut between TXFRAMEEND event and ENABLERXDATA task" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " FIELDLOST_SENSE ,Shortcut between FIELDLOST event and SENSE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FIELDDETECTED_ACTIVATE ,Shortcut between FIELDDETECTED event and ACTIVATE task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " STARTED_set/clr ,Enable or disable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SELECTED_set/clr ,Enable or disable interrupt for SELECTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COLLISION_set/clr ,Enable or disable interrupt for COLLISION event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " AUTOCOLRESSTARTED_set/clr ,Enable or disable interrupt for AUTOCOLRESSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " ENDTX_set/clr ,Enable or disable interrupt for ENDTX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " ENDRX_set/clr ,Enable or disable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " RXERROR_set/clr ,Enable or disable interrupt for RXERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ERROR_set/clr ,Enable or disable interrupt for ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " RXFRAMEEND_set/clr ,Enable or disable interrupt for RXFRAMEEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " RXFRAMESTART_set/clr ,Enable or disable interrupt for RXFRAMESTART event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TXFRAMEEND_set/clr ,Enable or disable interrupt for TXFRAMEEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TXFRAMESTART_set/clr ,Enable or disable interrupt for TXFRAMESTART event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " FIELDLOST_set/clr ,Enable or disable interrupt for FIELDLOST event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " FIELDDETECTED_set/clr ,Enable or disable interrupt for FIELDDETECTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY_set/clr ,Enable or disable interrupt for READY event" "Disabled,Enabled"
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "ERRORSTATUS,NFC Error Status register"
|
|
sif !cpuis("NFR52840*")
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
eventfld.long 0x00 6. " EOFERROR ,No valid End of Frame detected" "No error,Error"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 3. " NFCFIELDTOOWEAK ,Field level is too low at min load resistance" "No error,Error"
|
|
eventfld.long 0x00 2. " NFCFIELDTOOSTRONG ,Field level is too high at max load resistance" "No error,Error"
|
|
textline " "
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
eventfld.long 0x00 1. " INVALIDNFCSYMBOL ,The received pulse does not match a valid NFC-A symbol" "No error,Error"
|
|
textline " "
|
|
endif
|
|
endif
|
|
eventfld.long 0x00 0. " FRAMEDELAYTIMEOUT ,No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX" "No error,Error"
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "FRAMESTATUS.RX,Result Of Last Incoming Frames"
|
|
eventfld.long 0x00 3. " OVERRUN ,Overrun detected" "No overrun,Overrun"
|
|
eventfld.long 0x00 2. " PARITYSTATUS ,Parity status of received frame" "OK,Error"
|
|
eventfld.long 0x00 0. " CRCERROR ,No valid End of Frame detected" "CRC correct,CRC error"
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "NFCTAGSTATE,NfcTag State Register"
|
|
bitfld.long 0x00 0.--2. " NFCTAGSTATE ,NfcTag state register" "Disabled,,RampUp,Idle,Receive,FrameDelay,Transmit,?..."
|
|
sif !cpuis("NRF52840*")
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "CURRENTLOADCTRL,Current Value Driven To The NFC Load Control"
|
|
bitfld.long 0x00 0.--5. " CURRENTLOADCTRL ,Current value driven to the NFC Load Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
rgroup.long 0x43C++0x03
|
|
line.long 0x00 "FIELDPRESENT,Indicates The Presence Or Not Of a Valid Field"
|
|
bitfld.long 0x00 1. " LOCKDETECT ,Indicates if the low level has locked to the field" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " FIELDPRESENT ,Indicates the presence or not of a valid field" "No valid,Valid"
|
|
group.long 0x504++0x1F
|
|
line.long 0x00 "FRAMEDELAYMIN,Minimum Frame Delay"
|
|
hexmask.long.word 0x00 0.--15. 1. " FRAMEDELAYMIN ,Minimum frame delay in number of 13.56MHz clocks"
|
|
line.long 0x04 "FRAMEDELAYMAX,Maximum Frame Delay"
|
|
hexmask.long.word 0x04 0.--15. 1. " FRAMEDELAYMAX ,Maximum frame delay in number of 13.56MHz clocks"
|
|
line.long 0x08 "FRAMEDELAYMODE,Configuration Register For The Frame Delay Timer"
|
|
bitfld.long 0x08 0.--1. " FRAMEDELAYMODE ,Configuration register for the Frame Delay Timer" "FreeRun,Window,ExactVal,WindowGrid"
|
|
line.long 0x0C "PACKETPTR,Packet Pointer For TXD And RXD Data Storage In Data RAM"
|
|
line.long 0x10 "MAXLEN,Size Of Allocated For TXD And RXD Data Storage Buffer In Data RAM"
|
|
hexmask.long.word 0x10 0.--8. 1. " MAXLEN ,Size of allocated for TXD and RXD data storage buffer in Data RAM"
|
|
line.long 0x14 "TXD.FRAMECONFIG,Configuration Of Outgoing Frames"
|
|
bitfld.long 0x14 4. " CRCMODETX ,CRC mode for outgoing frames" "No CRCTX,CRC16TX"
|
|
bitfld.long 0x14 2. " SOF ,Adding SoF or not in TX frames" "Not added,Added"
|
|
bitfld.long 0x14 1. " DISCARDMODE ,Discarding unused bits in start or at end of a Frame" "End,Start"
|
|
bitfld.long 0x14 0. " PARITY ,Adding parity or not in the frame" "No parity,Parity"
|
|
line.long 0x18 "TXD.AMOUNT,Size Of Outgoing Frame"
|
|
hexmask.long.word 0x18 3.--11. 1. " TXDATABYTES ,Number of complete bytes that shall be included in the frame"
|
|
bitfld.long 0x18 0.--2. " TXDATABITS ,Number of bits in the last or first byte read from RAM that shall be included in the frame" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "RXD.FRAMECONFIG,Configuration Of Incoming Frames"
|
|
bitfld.long 0x1C 4. " CRCMODERX ,CRC mode for incoming frames" "No CRCRX,CRC16RX"
|
|
bitfld.long 0x1C 2. " SOF ,Start of frame expected or not in RX frames" "Not added,Added"
|
|
bitfld.long 0x1C 0. " PARITY ,Parity expected or not in RX frame" "No parity,Parity"
|
|
rgroup.long 0x524++0x03
|
|
line.long 0x00 "RXD.AMOUNT,Size Of Last Incoming Frame"
|
|
hexmask.long.word 0x00 3.--11. 1. " RXDATABYTES ,Number of complete bytes received in the frame"
|
|
bitfld.long 0x00 0.--2. " RXDATABITS ,Number of bits in the last byte in the frame" "0,1,2,3,4,5,6,7"
|
|
group.long 0x590++0x0B
|
|
line.long 0x00 "NFCID1_LAST,Last NFCID1 Part (4 Or 7 Or 10 Bytes ID)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " NFCID1_W ,NFCID1 byte W"
|
|
hexmask.long.byte 0x00 16.--23. 1. " NFCID1_X ,NFCID1 byte X"
|
|
hexmask.long.byte 0x00 8.--15. 1. " NFCID1_Y ,NFCID1 byte Y"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NFCID1_Z ,NFCID1 byte Z"
|
|
line.long 0x04 "NFCID1_2ND_LAST,Second Last NFCID1 Part (7 Or 10 Bytes ID)"
|
|
hexmask.long.byte 0x04 16.--23. 1. " NFCID1_T ,NFCID1 byte T"
|
|
hexmask.long.byte 0x04 8.--15. 1. " NFCID1_U ,NFCID1 byte U"
|
|
hexmask.long.byte 0x04 0.--7. 1. " NFCID1_V ,NFCID1 byte V"
|
|
line.long 0x08 "NFCID1_3RD_LAST,Third Last NFCID1 part (10 Bytes ID)"
|
|
hexmask.long.byte 0x08 16.--23. 1. " NFCID1_Q ,NFCID1 byte Q"
|
|
hexmask.long.byte 0x08 8.--15. 1. " NFCID1_R ,NFCID1 byte R"
|
|
hexmask.long.byte 0x08 0.--7. 1. " NFCID1_S ,NFCID1 byte S"
|
|
sif cpuis("NRF52840*")
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "AUTOCOLRESCONFIG,Controls The Auto Collision Resolution function"
|
|
bitfld.long 0x00 0. " MODE ,Enables/disables auto collision resolution" "Enabled,Disabled"
|
|
endif
|
|
group.long 0x5A0++0x07
|
|
line.long 0x00 "SENSRES,NFC-A SENS_RES Auto-Response Settings"
|
|
bitfld.long 0x00 8.--11. " PLATFCONFIG ,Tag platform configuration as defined by the b4-b1 of byte 2 in SENS_RES" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--7. " NFCIDSIZE ,NFCID1 size" "Single,Double,Triple,?..."
|
|
bitfld.long 0x00 0.--4. " BITFRAMESDD ,Bit frame SDD as defined by the b5-b1 of byte 1 in SENS_RES" "SDD00000,SDD00001,SDD00010,,SDD00100,,,,SDD01000,,,,,,,,SDD100000,?..."
|
|
line.long 0x04 "SELRES,NFC-A SEL_RES Auto-Response Settings"
|
|
bitfld.long 0x04 2. " CASCADE ,Cascade bit" "Completed,Not completed"
|
|
bitfld.long 0x04 5.--6. " PROTOCOL ,Protocol as defined by the b7-b6 of SEL_RES" "0,1,2,3"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree "Pulse Density Modulation Interface (PDM)"
|
|
base ad:0x4001D000
|
|
width 15.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Starts continuous PDM Transfer"
|
|
line.long 0x04 "STOP,Stops PDM Transfer"
|
|
group.long 0x100++0x0B "EVENTS"
|
|
line.long 0x00 "STARTED,PDM Transfer Has Started"
|
|
line.long 0x04 "STOPPED,PDM Transfer Has Finished"
|
|
line.long 0x08 "END,PDM Has written The Last Sample Specified By SAMPLE.MAXCNT To Data RAM"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " END_set/clr ,Enable or disable interrupt for END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " STARTED_set/clr ,Enable or disable interrupt for STARTED event" "Disabled,Enabled"
|
|
group.long 0x500++0x0B
|
|
line.long 0x00 "ENABLE,PDM Module Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable or disable PDM module" "Disabled,Enabled"
|
|
line.long 0x04 "PDMCLKCTRL,PDM Clock Generator Control"
|
|
line.long 0x08 "MODE,Defines the Routing Of The Connected PDM Microphones Signals"
|
|
bitfld.long 0x08 1. " EDGE ,Defines on which PDM_CLK edge Left is sampled" "Falling,Rising"
|
|
bitfld.long 0x08 0. " OPERATION ,Mono or stereo operation" "Stereo,Mono"
|
|
group.long 0x518++0x07
|
|
line.long 0x00 "GAINL,Left Output Gain Adjustment"
|
|
hexmask.long.byte 0x00 0.--6. 1. " GAINL ,Left output gain adjustment"
|
|
line.long 0x04 "GAINR,Right Output Gain Adjustment"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GAINR ,Right output gain adjustment"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "RATIO,Ratio Between PDM_CLK And Output Sample Rate"
|
|
bitfld.long 0x00 0. " RATIO ,Ratio between PDM_CLK and output sample rate" "64,80"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4001D000+0x540))&0x20)==0x00)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "PSEL.CLK,Pin Number Configuration For PDM CLK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "PSEL.CLK,Pin Number Configuration For PDM CLK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x4001D000+0x544))&0x20)==0x00)
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "PSEL.DIN,Pin Number Configuration For PDM DIN Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "PSEL.DIN,Pin Number Configuration For PDM DIN Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "PSEL.CLK,Pin Number Configuration For PDM CLK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSEL.DIN,Pin Number Configuration For PDM DIN Signal"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "PSEL.CLK,Pin Number Configuration For PDM CLK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSEL.DIN,Pin Number Configuration For PDM DIN Signal"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "SAMPLE.PTR,RAM Address Pointer To Write Samples To With EasyDMA"
|
|
line.long 0x04 "SAMPLE.MAXCNT,Number Of Samples To Allocate Memory For In EasyDMA Mode"
|
|
hexmask.long.word 0x04 0.--14. 1. " BUFFSIZE ,Length of DMA RAM allocation in number of samples"
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF52810*")
|
|
tree "Inter-IC Sound Interface (I2S)"
|
|
base ad:0x40025000
|
|
width 17.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Starts Continuous I2S Transfer"
|
|
line.long 0x04 "STOP,Stops I2S Transfer"
|
|
group.long 0x104++0x07 "EVENTS"
|
|
line.long 0x00 "RXPTRUPD,RXD.PTR Register Has Been Copied To Internal Double-Buffers"
|
|
line.long 0x04 "STOPPED,I2S Transfer Stopped"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "TXPTRUPD,TDX.PTR Register Has Been Copied To Internal Double-Buffers"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TXPTRUPD ,Enable or disable interrupt for TXPTRUPD event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " STOPPED ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " RXPTRUPD ,Enable or disable interrupt for RXPTRUPD event" "Disabled,Enabled"
|
|
group.long 0x500++0x2B
|
|
line.long 0x00 "ENABLE,Enable I2S Module"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable I2S module" "Disabled,Enabled"
|
|
line.long 0x04 "CONFIG.MODE,I2S Mode"
|
|
bitfld.long 0x04 0. " MODE ,I2S mode" "Master,Slave"
|
|
line.long 0x08 "CONFIG.RXEN,Reception Enable"
|
|
bitfld.long 0x08 0. " RXEN ,Reception enable" "Disabled,Enabled"
|
|
line.long 0x0C "CONFIG.TXEN,Transmission Enable"
|
|
bitfld.long 0x0C 0. " TXEN ,Transmission enable" "Disabled,Enabled"
|
|
line.long 0x10 "CONFIG.MCKEN,Master Clock Generator Enable"
|
|
bitfld.long 0x10 0. " MCKEN ,Master clock generator enable" "Disabled,Enabled"
|
|
line.long 0x14 "CONFIG.MCKFREQ,Master Clock Generator Frequency"
|
|
line.long 0x18 "CONFIG.RATIO,MCK/LRCK Ratio"
|
|
bitfld.long 0x18 0.--3. " RATIO ,MCK/LRCK ratio" "32,48,64,96,128,192,256,384,512,?..."
|
|
line.long 0x1C "CONFIG.SWIDTH,Sample Width"
|
|
bitfld.long 0x1C 0.--1. " SWIDTH ,Sample width" "8bit,16bit,24bit,?..."
|
|
line.long 0x20 "CONFIG.ALIGN,Alignment Of Sample Within a Frame"
|
|
bitfld.long 0x20 0. " ALIGN ,Alignment of sample within a frame" "Left,Right"
|
|
line.long 0x24 "CONFIG.FORMAT,Frame Format"
|
|
bitfld.long 0x24 0. " FORMAT ,Frame format" "I2S,Aligned"
|
|
line.long 0x28 "CONFIG.CHANNELS,Enable Channels"
|
|
bitfld.long 0x28 0.--1. " CHANNELS ,Enable channels" "Stereo,Left,Right,?..."
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "RXD.PTR,Receive Buffer RAM Start Address"
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "TXD.PTR,Transmit Buffer RAM Start Address"
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "RXTXD.MAXCNT,Size Of RXD And TXD Buffers"
|
|
hexmask.long.word 0x00 0.--13. 1. " MAXCNT ,Size of RXD and TXD buffers"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40025000+0x560))&0x100)==0x00)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.MCK,Pin Select For MCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.MCK,Pin Select For MCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40025000+0x564))&0x100)==0x00)
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.SCK,Pin Select For SCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.SCK,Pin Select For SCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40025000+0x568))&0x100)==0x00)
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.LRCK,Pin Select For LRCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.LRCK,Pin Select For LRCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40025000+0x56C))&0x100)==0x00)
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.SDIN,Pin Select For SDIN Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.SDIN,Pin Select For SDIN Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40025000+0x570))&0x100)==0x00)
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "PSEL.SDOUT,Pin Select For SDOUT Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "PSEL.SDOUT,Pin Select For SDOUT Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 8. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
else
|
|
group.long 0x560++0x13
|
|
line.long 0x00 "PSEL.MCK,Pin Select For MCK Signal"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSEL.SCK,Pin Select For SCK Signal"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "PSEL.LRCK,Pin Select For LRCK Signal"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0C "PSEL.SDIN,Pin Select For SDIN Signal"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "PSEL.SDOUT,Pin Select For SDOUT Signal"
|
|
bitfld.long 0x10 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x10 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Memory Watch Unit (MWU)"
|
|
base ad:0x40020000
|
|
width 24.
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "EVENTS_REGION[0].WA,Write Access To Region 0 Detected"
|
|
line.long 0x04 "EVENTS_REGION[0].RA,Read Access To Region 0 Detected"
|
|
group.long 0x108++0x07
|
|
line.long 0x00 "EVENTS_REGION[1].WA,Write Access To Region 1 Detected"
|
|
line.long 0x04 "EVENTS_REGION[1].RA,Read Access To Region 1 Detected"
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "EVENTS_REGION[2].WA,Write Access To Region 2 Detected"
|
|
line.long 0x04 "EVENTS_REGION[2].RA,Read Access To Region 2 Detected"
|
|
group.long 0x118++0x07
|
|
line.long 0x00 "EVENTS_REGION[3].WA,Write Access To Region 3 Detected"
|
|
line.long 0x04 "EVENTS_REGION[3].RA,Read Access To Region 3 Detected"
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "EVENTS_PREGION[0].WA,Write Access To Peripheral Region 0 Detected"
|
|
line.long 0x04 "EVENTS_PREGION[0].RA,Read Access To Peripheral Region 0 Detected"
|
|
group.long 0x168++0x07
|
|
line.long 0x00 "EVENTS_PREGION[1].WA,Write Access To Peripheral Region 1 Detected"
|
|
line.long 0x04 "EVENTS_PREGION[1].RA,Read Access To Peripheral Region 1 Detected"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable interrupt"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PREGION1RA ,Enable or disable interrupt for PREGION[1].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PREGION1WA ,Enable or disable interrupt for PREGION[1].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PREGION0RA ,Enable or disable interrupt for PREGION[0].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PREGION0WA ,Enable or disable interrupt for PREGION[0].WA event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REGION3RA ,Enable or disable interrupt for REGION[3].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " REGION3WA ,Enable or disable interrupt for REGION[3].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " REGION2RA ,Enable or disable interrupt for REGION[2].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " REGION2WA ,Enable or disable interrupt for REGION[2].WA event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " REGION1RA ,Enable or disable interrupt for REGION[1].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " REGION1WA ,Enable or disable interrupt for REGION[1].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " REGION0RA ,Enable or disable interrupt for REGION[0].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " REGION0WA ,Enable or disable interrupt for REGION[0].WA event" "Disabled,Enabled"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "NMIEN,Enable Or Disable Non-Maskable Interrupt"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PREGION1RA ,Enable or disable non-maskable interrupt for PREGION[1].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PREGION1WA ,Enable or disable non-maskable interrupt for PREGION[1].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PREGION0RA ,Enable or disable non-maskable interrupt for PREGION[0].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PREGION0WA ,Enable or disable non-maskable interrupt for PREGION[0].WA event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REGION3RA ,Enable or disable non-maskable interrupt for REGION[3].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " REGION3WA ,Enable or disable non-maskable interrupt for REGION[3].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " REGION2RA ,Enable or disable non-maskable interrupt for REGION[2].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " REGION2WA ,Enable or disable non-maskable interrupt for REGION[2].WA event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " REGION1RA ,Enable or disable non-maskable interrupt for REGION[1].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " REGION1WA ,Enable or disable non-maskable interrupt for REGION[1].WA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " REGION0RA ,Enable or disable non-maskable interrupt for REGION[0].RA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " REGION0WA ,Enable or disable non-maskable interrupt for REGION[0].WA event" "Disabled,Enabled"
|
|
group.long 0x400++0x07
|
|
line.long 0x00 "PERREGION[0].SUBSTATWA,Source Of Event/Interrupt In Region 0"
|
|
eventfld.long 0x00 31. " SR31 ,Write access for subregion 31 in region 0" "No access,Access"
|
|
eventfld.long 0x00 30. " SR30 ,Write access for subregion 30 in region 0" "No access,Access"
|
|
eventfld.long 0x00 29. " SR29 ,Write access for subregion 29 in region 0" "No access,Access"
|
|
eventfld.long 0x00 28. " SR28 ,Write access for subregion 28 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 27. " SR27 ,Write access for subregion 27 in region 0" "No access,Access"
|
|
eventfld.long 0x00 26. " SR26 ,Write access for subregion 26 in region 0" "No access,Access"
|
|
eventfld.long 0x00 25. " SR25 ,Write access for subregion 25 in region 0" "No access,Access"
|
|
eventfld.long 0x00 24. " SR24 ,Write access for Subregion 24 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 23. " SR23 ,Write access for subregion 23 in region 0" "No access,Access"
|
|
eventfld.long 0x00 22. " SR22 ,Write access for subregion 22 in region 0" "No access,Access"
|
|
eventfld.long 0x00 21. " SR21 ,Write access for subregion 21 in region 0" "No access,Access"
|
|
eventfld.long 0x00 20. " SR20 ,Write access for subregion 20 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 19. " SR19 ,Write access for subregion 19 in region 0" "No access,Access"
|
|
eventfld.long 0x00 18. " SR18 ,Write access for subregion 18 in region 0" "No access,Access"
|
|
eventfld.long 0x00 17. " SR17 ,Write access for subregion 17 in region 0" "No access,Access"
|
|
eventfld.long 0x00 16. " SR16 ,Write access for subregion 16 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 15. " SR15 ,Write access for subregion 15 in region 0" "No access,Access"
|
|
eventfld.long 0x00 14. " SR14 ,Write access for subregion 14 in region 0" "No access,Access"
|
|
eventfld.long 0x00 13. " SR13 ,Write access for subregion 13 in region 0" "No access,Access"
|
|
eventfld.long 0x00 12. " SR12 ,Write access for subregion 12 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 11. " SR12 ,Write access for subregion 11 in region 0" "No access,Access"
|
|
eventfld.long 0x00 10. " SR11 ,Write access for subregion 10 in region 0" "No access,Access"
|
|
eventfld.long 0x00 9. " SR9 ,Write access for subregion 9 in region 0" "No access,Access"
|
|
eventfld.long 0x00 8. " SR8 ,Write access for subregion 8 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 7. " SR7 ,Write access for subregion 7 in region 0" "No access,Access"
|
|
eventfld.long 0x00 6. " SR6 ,Write access for subregion 6 in region 0" "No access,Access"
|
|
eventfld.long 0x00 5. " SR5 ,Write access for subregion 5 in region 0" "No access,Access"
|
|
eventfld.long 0x00 4. " SR4 ,Write access for subregion 4 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 3. " SR3 ,Write access for subregion 3 in region 0" "No access,Access"
|
|
eventfld.long 0x00 2. " SR2 ,Write access for subregion 2 in region 0" "No access,Access"
|
|
eventfld.long 0x00 1. " SR1 ,Write access for subregion 1 in region 0" "No access,Access"
|
|
eventfld.long 0x00 0. " SR0 ,Write access for subregion 0 in region 0" "No access,Access"
|
|
line.long 0x04 "PERREGION[0].SUBSTATWA,Source Of Event/Interrupt In Region 0"
|
|
eventfld.long 0x04 31. " SR31 ,Read access for subregion 31 in region 0" "No access,Access"
|
|
eventfld.long 0x04 30. " SR30 ,Read access for subregion 30 in region 0" "No access,Access"
|
|
eventfld.long 0x04 29. " SR29 ,Read access for subregion 29 in region 0" "No access,Access"
|
|
eventfld.long 0x04 28. " SR28 ,Read access for subregion 28 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 27. " SR27 ,Read access for subregion 27 in region 0" "No access,Access"
|
|
eventfld.long 0x04 26. " SR26 ,Read access for subregion 26 in region 0" "No access,Access"
|
|
eventfld.long 0x04 25. " SR25 ,Read access for subregion 25 in region 0" "No access,Access"
|
|
eventfld.long 0x04 24. " SR24 ,Read access for subregion 24 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 23. " SR23 ,Read access for subregion 23 in region 0" "No access,Access"
|
|
eventfld.long 0x04 22. " SR22 ,Read access for subregion 22 in region 0" "No access,Access"
|
|
eventfld.long 0x04 21. " SR21 ,Read access for subregion 21 in region 0" "No access,Access"
|
|
eventfld.long 0x04 20. " SR20 ,Read access for subregion 20 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 19. " SR19 ,Read access for subregion 19 in region 0" "No access,Access"
|
|
eventfld.long 0x04 18. " SR18 ,Read access for subregion 18 in region 0" "No access,Access"
|
|
eventfld.long 0x04 17. " SR17 ,Read access for subregion 17 in region 0" "No access,Access"
|
|
eventfld.long 0x04 16. " SR16 ,Read access for subregion 16 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 15. " SR15 ,Read access for subregion 15 in region 0" "No access,Access"
|
|
eventfld.long 0x04 14. " SR14 ,Read access for subregion 14 in region 0" "No access,Access"
|
|
eventfld.long 0x04 13. " SR13 ,Read access for subregion 13 in region 0" "No access,Access"
|
|
eventfld.long 0x04 12. " SR12 ,Read access for subregion 12 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 11. " SR12 ,Read access for subregion 11 in region 0" "No access,Access"
|
|
eventfld.long 0x04 10. " SR11 ,Read access for subregion 10 in region 0" "No access,Access"
|
|
eventfld.long 0x04 9. " SR9 ,Read access for subregion 9 in region 0" "No access,Access"
|
|
eventfld.long 0x04 8. " SR8 ,Read access for subregion 8 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SR7 ,Read access for subregion 7 in region 0" "No access,Access"
|
|
eventfld.long 0x04 6. " SR6 ,Read access for subregion 6 in region 0" "No access,Access"
|
|
eventfld.long 0x04 5. " SR5 ,Read access for subregion 5 in region 0" "No access,Access"
|
|
eventfld.long 0x04 4. " SR4 ,Read access for subregion 4 in region 0" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 3. " SR3 ,Read access for subregion 3 in region 0" "No access,Access"
|
|
eventfld.long 0x04 2. " SR2 ,Read access for subregion 2 in region 0" "No access,Access"
|
|
eventfld.long 0x04 1. " SR1 ,Read access for subregion 1 in region 0" "No access,Access"
|
|
eventfld.long 0x04 0. " SR0 ,Read access for subregion 0 in region 0" "No access,Access"
|
|
group.long 0x408++0x07
|
|
line.long 0x00 "PERREGION[1].SUBSTATWA,Source Of Event/Interrupt In Region 1"
|
|
eventfld.long 0x00 31. " SR31 ,Write access for subregion 31 in region 1" "No access,Access"
|
|
eventfld.long 0x00 30. " SR30 ,Write access for subregion 30 in region 1" "No access,Access"
|
|
eventfld.long 0x00 29. " SR29 ,Write access for subregion 29 in region 1" "No access,Access"
|
|
eventfld.long 0x00 28. " SR28 ,Write access for subregion 28 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 27. " SR27 ,Write access for subregion 27 in region 1" "No access,Access"
|
|
eventfld.long 0x00 26. " SR26 ,Write access for subregion 26 in region 1" "No access,Access"
|
|
eventfld.long 0x00 25. " SR25 ,Write access for subregion 25 in region 1" "No access,Access"
|
|
eventfld.long 0x00 24. " SR24 ,Write access for Subregion 24 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 23. " SR23 ,Write access for subregion 23 in region 1" "No access,Access"
|
|
eventfld.long 0x00 22. " SR22 ,Write access for subregion 22 in region 1" "No access,Access"
|
|
eventfld.long 0x00 21. " SR21 ,Write access for subregion 21 in region 1" "No access,Access"
|
|
eventfld.long 0x00 20. " SR20 ,Write access for subregion 20 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 19. " SR19 ,Write access for subregion 19 in region 1" "No access,Access"
|
|
eventfld.long 0x00 18. " SR18 ,Write access for subregion 18 in region 1" "No access,Access"
|
|
eventfld.long 0x00 17. " SR17 ,Write access for subregion 17 in region 1" "No access,Access"
|
|
eventfld.long 0x00 16. " SR16 ,Write access for subregion 16 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 15. " SR15 ,Write access for subregion 15 in region 1" "No access,Access"
|
|
eventfld.long 0x00 14. " SR14 ,Write access for subregion 14 in region 1" "No access,Access"
|
|
eventfld.long 0x00 13. " SR13 ,Write access for subregion 13 in region 1" "No access,Access"
|
|
eventfld.long 0x00 12. " SR12 ,Write access for subregion 12 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 11. " SR12 ,Write access for subregion 11 in region 1" "No access,Access"
|
|
eventfld.long 0x00 10. " SR11 ,Write access for subregion 10 in region 1" "No access,Access"
|
|
eventfld.long 0x00 9. " SR9 ,Write access for subregion 9 in region 1" "No access,Access"
|
|
eventfld.long 0x00 8. " SR8 ,Write access for subregion 8 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 7. " SR7 ,Write access for subregion 7 in region 1" "No access,Access"
|
|
eventfld.long 0x00 6. " SR6 ,Write access for subregion 6 in region 1" "No access,Access"
|
|
eventfld.long 0x00 5. " SR5 ,Write access for subregion 5 in region 1" "No access,Access"
|
|
eventfld.long 0x00 4. " SR4 ,Write access for subregion 4 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 3. " SR3 ,Write access for subregion 3 in region 1" "No access,Access"
|
|
eventfld.long 0x00 2. " SR2 ,Write access for subregion 2 in region 1" "No access,Access"
|
|
eventfld.long 0x00 1. " SR1 ,Write access for subregion 1 in region 1" "No access,Access"
|
|
eventfld.long 0x00 0. " SR0 ,Write access for subregion 0 in region 1" "No access,Access"
|
|
line.long 0x04 "PERREGION[1].SUBSTATWA,Source Of Event/Interrupt In Region 1"
|
|
eventfld.long 0x04 31. " SR31 ,Read access for subregion 31 in region 1" "No access,Access"
|
|
eventfld.long 0x04 30. " SR30 ,Read access for subregion 30 in region 1" "No access,Access"
|
|
eventfld.long 0x04 29. " SR29 ,Read access for subregion 29 in region 1" "No access,Access"
|
|
eventfld.long 0x04 28. " SR28 ,Read access for subregion 28 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 27. " SR27 ,Read access for subregion 27 in region 1" "No access,Access"
|
|
eventfld.long 0x04 26. " SR26 ,Read access for subregion 26 in region 1" "No access,Access"
|
|
eventfld.long 0x04 25. " SR25 ,Read access for subregion 25 in region 1" "No access,Access"
|
|
eventfld.long 0x04 24. " SR24 ,Read access for subregion 24 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 23. " SR23 ,Read access for subregion 23 in region 1" "No access,Access"
|
|
eventfld.long 0x04 22. " SR22 ,Read access for subregion 22 in region 1" "No access,Access"
|
|
eventfld.long 0x04 21. " SR21 ,Read access for subregion 21 in region 1" "No access,Access"
|
|
eventfld.long 0x04 20. " SR20 ,Read access for subregion 20 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 19. " SR19 ,Read access for subregion 19 in region 1" "No access,Access"
|
|
eventfld.long 0x04 18. " SR18 ,Read access for subregion 18 in region 1" "No access,Access"
|
|
eventfld.long 0x04 17. " SR17 ,Read access for subregion 17 in region 1" "No access,Access"
|
|
eventfld.long 0x04 16. " SR16 ,Read access for subregion 16 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 15. " SR15 ,Read access for subregion 15 in region 1" "No access,Access"
|
|
eventfld.long 0x04 14. " SR14 ,Read access for subregion 14 in region 1" "No access,Access"
|
|
eventfld.long 0x04 13. " SR13 ,Read access for subregion 13 in region 1" "No access,Access"
|
|
eventfld.long 0x04 12. " SR12 ,Read access for subregion 12 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 11. " SR12 ,Read access for subregion 11 in region 1" "No access,Access"
|
|
eventfld.long 0x04 10. " SR11 ,Read access for subregion 10 in region 1" "No access,Access"
|
|
eventfld.long 0x04 9. " SR9 ,Read access for subregion 9 in region 1" "No access,Access"
|
|
eventfld.long 0x04 8. " SR8 ,Read access for subregion 8 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SR7 ,Read access for subregion 7 in region 1" "No access,Access"
|
|
eventfld.long 0x04 6. " SR6 ,Read access for subregion 6 in region 1" "No access,Access"
|
|
eventfld.long 0x04 5. " SR5 ,Read access for subregion 5 in region 1" "No access,Access"
|
|
eventfld.long 0x04 4. " SR4 ,Read access for subregion 4 in region 1" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x04 3. " SR3 ,Read access for subregion 3 in region 1" "No access,Access"
|
|
eventfld.long 0x04 2. " SR2 ,Read access for subregion 2 in region 1" "No access,Access"
|
|
eventfld.long 0x04 1. " SR1 ,Read access for subregion 1 in region 1" "No access,Access"
|
|
eventfld.long 0x04 0. " SR0 ,Read access for subregion 0 in region 1" "No access,Access"
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "REGIONEN,Enable Or Disable Regions Watch"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PREGION1RA ,Enable or disable read access watch in PREGION[1]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PREGION1WA ,Enable or disable write access watch in PREGION[1]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PREGION0RA ,Enable or disable read access watch in PREGION[0]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PREGION0WA ,Enable or disable write access watch in PREGION[0]" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REGION3RA ,Enable or disable read access watch in REGION[3]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " REGION3WA ,Enable or disable write access watch in REGION[3]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " REGION2RA ,Enable or disable read access watch in REGION[2]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " REGION2WA ,Enable or disable write access watch in REGION[2]" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " REGION1RA ,Enable or disable read access watch in REGION[1]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " REGION1WA ,Enable or disable write access watch in REGION[1]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " REGION0RA ,Enable or disable read access watch in REGION[0]" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " REGION0WA ,Enable or disable write access watch in REGION[0]" "Disabled,Enabled"
|
|
group.long 0x600++0x07
|
|
line.long 0x00 "REGION[0].START,Start Address For Region 0"
|
|
line.long 0x04 "REGION[0].END,End Address Of Region 0"
|
|
group.long 0x610++0x07
|
|
line.long 0x00 "REGION[1].START,Start Address For Region 1"
|
|
line.long 0x04 "REGION[1].END,End Address Of Region 1"
|
|
group.long 0x620++0x07
|
|
line.long 0x00 "REGION[2].START,Start Address For Region 2"
|
|
line.long 0x04 "REGION[2].END,End Address Of Region 2"
|
|
group.long 0x630++0x07
|
|
line.long 0x00 "REGION[3].START,Start Address For Region 3"
|
|
line.long 0x04 "REGION[3].END,End Address Of Region 3"
|
|
hgroup.long 0x6C0++0x07
|
|
hide.long 0x00 "PREGION[0].START,Reserved For Future Use"
|
|
hide.long 0x04 "PREGION[0].END,Reserved For Future Use"
|
|
group.long (0x6C0+0x08)++0x03
|
|
line.long 0x00 "PREGION[0].SUBS,Subregions Of Region 0"
|
|
bitfld.long 0x00 31. " SR31 ,Include or exclude subregion 31 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 30. " SR30 ,Include or exclude subregion 30 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 29. " SR29 ,Include or exclude subregion 29 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 28. " SR28 ,Include or exclude subregion 28 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SR27 ,Include or exclude subregion 27 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 26. " SR26 ,Include or exclude subregion 26 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 25. " SR25 ,Include or exclude subregion 25 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 24. " SR24 ,Include or exclude subregion 24 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SR23 ,Include or exclude subregion 23 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 22. " SR22 ,Include or exclude subregion 22 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 21. " SR21 ,Include or exclude subregion 21 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 20. " SR20 ,Include or exclude subregion 20 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SR19 ,Include or exclude subregion 19 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 18. " SR18 ,Include or exclude subregion 18 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 17. " SR17 ,Include or exclude subregion 17 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 16. " SR16 ,Include or exclude subregion 16 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SR15 ,Include or exclude subregion 15 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 14. " SR14 ,Include or exclude subregion 14 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 13. " SR13 ,Include or exclude subregion 13 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 12. " SR12 ,Include or exclude subregion 12 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SR12 ,Include or exclude subregion 11 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 10. " SR11 ,Include or exclude subregion 10 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 9. " SR9 ,Include or exclude subregion 9 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 8. " SR8 ,Include or exclude subregion 8 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SR7 ,Include or exclude subregion 7 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 6. " SR6 ,Include or exclude subregion 6 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 5. " SR5 ,Include or exclude subregion 5 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 4. " SR4 ,Include or exclude subregion 4 in region 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SR3 ,Include or exclude subregion 3 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 2. " SR2 ,Include or exclude subregion 2 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 1. " SR1 ,Include or exclude subregion 1 in region 0" "Excluded,Included"
|
|
bitfld.long 0x00 0. " SR0 ,Include or exclude subregion 0 in region 0" "Excluded,Included"
|
|
hgroup.long 0x6D0++0x07
|
|
hide.long 0x00 "PREGION[1].START,Reserved For Future Use"
|
|
hide.long 0x04 "PREGION[1].END,Reserved For Future Use"
|
|
group.long (0x6D0+0x08)++0x03
|
|
line.long 0x00 "PREGION[1].SUBS,Subregions Of Region 1"
|
|
bitfld.long 0x00 31. " SR31 ,Include or exclude subregion 31 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 30. " SR30 ,Include or exclude subregion 30 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 29. " SR29 ,Include or exclude subregion 29 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 28. " SR28 ,Include or exclude subregion 28 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SR27 ,Include or exclude subregion 27 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 26. " SR26 ,Include or exclude subregion 26 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 25. " SR25 ,Include or exclude subregion 25 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 24. " SR24 ,Include or exclude subregion 24 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SR23 ,Include or exclude subregion 23 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 22. " SR22 ,Include or exclude subregion 22 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 21. " SR21 ,Include or exclude subregion 21 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 20. " SR20 ,Include or exclude subregion 20 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SR19 ,Include or exclude subregion 19 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 18. " SR18 ,Include or exclude subregion 18 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 17. " SR17 ,Include or exclude subregion 17 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 16. " SR16 ,Include or exclude subregion 16 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SR15 ,Include or exclude subregion 15 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 14. " SR14 ,Include or exclude subregion 14 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 13. " SR13 ,Include or exclude subregion 13 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 12. " SR12 ,Include or exclude subregion 12 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SR12 ,Include or exclude subregion 11 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 10. " SR11 ,Include or exclude subregion 10 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 9. " SR9 ,Include or exclude subregion 9 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 8. " SR8 ,Include or exclude subregion 8 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SR7 ,Include or exclude subregion 7 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 6. " SR6 ,Include or exclude subregion 6 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 5. " SR5 ,Include or exclude subregion 5 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 4. " SR4 ,Include or exclude subregion 4 in region 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SR3 ,Include or exclude subregion 3 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 2. " SR2 ,Include or exclude subregion 2 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 1. " SR1 ,Include or exclude subregion 1 in region 1" "Excluded,Included"
|
|
bitfld.long 0x00 0. " SR0 ,Include or exclude subregion 0 in region 1" "Excluded,Included"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.open "Event Generator Unit (EGU)"
|
|
tree "EGU 0"
|
|
base ad:0x40014000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EGU 1"
|
|
base ad:0x40015000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
sif cpuis("NRF52840QI")
|
|
tree "EGU 2"
|
|
base ad:0x40016000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EGU 3"
|
|
base ad:0x40017000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EGU 4"
|
|
base ad:0x40018000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EGU 5"
|
|
base ad:0x40019000
|
|
width 22.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[0],Trigger 0 For Triggering The Corresponding TRIGGERED[0] Event"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[1],Trigger 1 For Triggering The Corresponding TRIGGERED[1] Event"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[2],Trigger 2 For Triggering The Corresponding TRIGGERED[2] Event"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[3],Trigger 3 For Triggering The Corresponding TRIGGERED[3] Event"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[4],Trigger 4 For Triggering The Corresponding TRIGGERED[4] Event"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[5],Trigger 5 For Triggering The Corresponding TRIGGERED[5] Event"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[6],Trigger 6 For Triggering The Corresponding TRIGGERED[6] Event"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[7],Trigger 7 For Triggering The Corresponding TRIGGERED[7] Event"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[8],Trigger 8 For Triggering The Corresponding TRIGGERED[8] Event"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[9],Trigger 9 For Triggering The Corresponding TRIGGERED[9] Event"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[10],Trigger 10 For Triggering The Corresponding TRIGGERED[10] Event"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[11],Trigger 11 For Triggering The Corresponding TRIGGERED[11] Event"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[12],Trigger 12 For Triggering The Corresponding TRIGGERED[12] Event"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[13],Trigger 13 For Triggering The Corresponding TRIGGERED[13] Event"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[14],Trigger 14 For Triggering The Corresponding TRIGGERED[14] Event"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TASKS_TRIGGER[15],Trigger 15 For Triggering The Corresponding TRIGGERED[15] Event"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[0],Event Number 0 Generated By Triggering The Corresponding TRIGGER[0] Task"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[1],Event Number 1 Generated By Triggering The Corresponding TRIGGER[1] Task"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[2],Event Number 2 Generated By Triggering The Corresponding TRIGGER[2] Task"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[3],Event Number 3 Generated By Triggering The Corresponding TRIGGER[3] Task"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[4],Event Number 4 Generated By Triggering The Corresponding TRIGGER[4] Task"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[5],Event Number 5 Generated By Triggering The Corresponding TRIGGER[5] Task"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[6],Event Number 6 Generated By Triggering The Corresponding TRIGGER[6] Task"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[7],Event Number 7 Generated By Triggering The Corresponding TRIGGER[7] Task"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[8],Event Number 8 Generated By Triggering The Corresponding TRIGGER[8] Task"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[9],Event Number 9 Generated By Triggering The Corresponding TRIGGER[9] Task"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[10],Event Number 10 Generated By Triggering The Corresponding TRIGGER[10] Task"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[11],Event Number 11 Generated By Triggering The Corresponding TRIGGER[11] Task"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[12],Event Number 12 Generated By Triggering The Corresponding TRIGGER[12] Task"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[13],Event Number 13 Generated By Triggering The Corresponding TRIGGER[13] Task"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[14],Event Number 14 Generated By Triggering The Corresponding TRIGGER[14] Task"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "EVENTS_TRIGGERED[15],Event Number 15 Generated By Triggering The Corresponding TRIGGER[15] Task"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "TRIGGERED15 ,Enable or disable interrupt for TRIGGERED[15] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TRIGGERED14 ,Enable or disable interrupt for TRIGGERED[14] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TRIGGERED13 ,Enable or disable interrupt for TRIGGERED[13] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TRIGGERED12 ,Enable or disable interrupt for TRIGGERED[12] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TRIGGERED11 ,Enable or disable interrupt for TRIGGERED[11] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TRIGGERED10 ,Enable or disable interrupt for TRIGGERED[10] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TRIGGERED9 ,Enable or disable interrupt for TRIGGERED[9] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TRIGGERED8 ,Enable or disable interrupt for TRIGGERED[8] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TRIGGERED7 ,Enable or disable interrupt for TRIGGERED[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TRIGGERED6 ,Enable or disable interrupt for TRIGGERED[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TRIGGERED5 ,Enable or disable interrupt for TRIGGERED[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TRIGGERED4 ,Enable or disable interrupt for TRIGGERED[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TRIGGERED3 ,Enable or disable interrupt for TRIGGERED[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TRIGGERED2 ,Enable or disable interrupt for TRIGGERED[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TRIGGERED1 ,Enable or disable interrupt for TRIGGERED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TRIGGERED0 ,Enable or disable interrupt for TRIGGERED[0] event" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "Pulse Width Modulation (PWM)"
|
|
tree "PWM 0"
|
|
base ad:0x4001C000
|
|
width 19.
|
|
group.long 0x04++0x0F "TASKS"
|
|
line.long 0x00 "STOP,Stops PWM Pulse Generation On All Channels At The End Of Current PWM Period"
|
|
line.long 0x04 "SEQSTART[0],Loads The First PWM Value On All Enabled Channels From Sequence 0"
|
|
line.long 0x08 "SEQSTART[1],Loads The First PWM Value On All Enabled Channels From Sequence 1"
|
|
line.long 0x0C "NEXTSTEP,Steps By One Value In The Current Sequence On All Enabled Channels"
|
|
group.long 0x104++0x1B "EVENTS"
|
|
line.long 0x00 "STOPPED,Response To STOP Task Emitted When PWM Pulses Are No Longer Generated"
|
|
line.long 0x04 "SEQSTARTED[0],First PWM Period Started On Sequence 0"
|
|
line.long 0x08 "SEQSTARTED[1],First PWM Period Started On Sequence 1"
|
|
line.long 0x0C "SEQEND[0],Emitted At End Of Every Sequence 0"
|
|
line.long 0x10 "SEQEND[1],Emitted At End Of Every Sequence 1"
|
|
line.long 0x14 "PWMPERIODEND,Emitted At The End Of Each PWM Period"
|
|
line.long 0x18 "LOOPSDONE,Concatenated Sequences Have Been Played The Amount Of Times Defined In LOOP.CNT"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " LOOPSDONE_STOP ,Shortcut between LOOPSDONE event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " LOOPSDONE_SEQSTART1 ,Shortcut between LOOPSDONE event and SEQSTART1 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LOOPSDONE_SEQSTART0 ,Shortcut between LOOPSDONE event and SEQSTART0 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SEQEND1_STOP ,Shortcut between SEQEND1 event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SEQEND0_STOP ,Shortcut between SEQEND0 event and STOP task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " LOOPSDONE ,Enable or disable interrupt for LOOPSDONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PWMPERIODEND ,Enable or disable interrupt for PWMPERIODEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SEQEND1 ,Enable or disable interrupt for SEQEND[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SEQEND0 ,Enable or disable interrupt for SEQEND[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SEQSTARTED1 ,Enable or disable interrupt for SEQSTARTED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SEQSTARTED0 ,Enable or disable interrupt for SEQSTARTED[0] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
group.long 0x500++0x17
|
|
line.long 0x00 "ENABLE,PWM Module Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable or disable PWM module" "Disabled,Enabled"
|
|
line.long 0x04 "MODE,Selects Operating Mode Of The Wave Counter"
|
|
bitfld.long 0x04 0. " UPDOWN ,Selects up or up and down as wave counter mode" "Up,Up and down"
|
|
line.long 0x08 "COUNTERTOP,Value Up To Which The Pulse Generator Counter Counts"
|
|
hexmask.long.word 0x08 0.--14. 1. " COUNTERTOP ,Value up to which the pulse generator counter counts"
|
|
line.long 0x0C "PRESCALER,Configuration For PWM_CLK"
|
|
bitfld.long 0x0C 0.--2. " PRESCALER ,Pre-scaler of PWM_CLK" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x10 "DECODER,Configuration Of The Decoder"
|
|
bitfld.long 0x10 8. " MODE ,Selects source for advancing the active sequence" "RefreshCount,NextStep"
|
|
bitfld.long 0x10 0.--2. " LOAD ,How a sequence is read from RAM and spread to the compare register" "Common,Grouped,Individual,WaveForm,?..."
|
|
line.long 0x14 "LOOP,Amount Of Playback Of a Loop"
|
|
hexmask.long.word 0x14 0.--15. 1. " LOOP ,Amount of playback of a loop"
|
|
group.long 0x520++0x0F
|
|
line.long 0x00 "SEQ[0].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[0].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[0].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[0].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
group.long 0x540++0x0F
|
|
line.long 0x00 "SEQ[1].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[1].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[1].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[1].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4001C000+0x560))&0x20)==0x00)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4001C000+0x564))&0x20)==0x00)
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4001C000+0x568))&0x20)==0x00)
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4001C000+0x56C))&0x20)==0x00)
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif cpuis("NRF52840QI")
|
|
tree "PWM 1"
|
|
base ad:0x40021000
|
|
width 19.
|
|
group.long 0x04++0x0F "TASKS"
|
|
line.long 0x00 "STOP,Stops PWM Pulse Generation On All Channels At The End Of Current PWM Period"
|
|
line.long 0x04 "SEQSTART[0],Loads The First PWM Value On All Enabled Channels From Sequence 0"
|
|
line.long 0x08 "SEQSTART[1],Loads The First PWM Value On All Enabled Channels From Sequence 1"
|
|
line.long 0x0C "NEXTSTEP,Steps By One Value In The Current Sequence On All Enabled Channels"
|
|
group.long 0x104++0x1B "EVENTS"
|
|
line.long 0x00 "STOPPED,Response To STOP Task Emitted When PWM Pulses Are No Longer Generated"
|
|
line.long 0x04 "SEQSTARTED[0],First PWM Period Started On Sequence 0"
|
|
line.long 0x08 "SEQSTARTED[1],First PWM Period Started On Sequence 1"
|
|
line.long 0x0C "SEQEND[0],Emitted At End Of Every Sequence 0"
|
|
line.long 0x10 "SEQEND[1],Emitted At End Of Every Sequence 1"
|
|
line.long 0x14 "PWMPERIODEND,Emitted At The End Of Each PWM Period"
|
|
line.long 0x18 "LOOPSDONE,Concatenated Sequences Have Been Played The Amount Of Times Defined In LOOP.CNT"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " LOOPSDONE_STOP ,Shortcut between LOOPSDONE event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " LOOPSDONE_SEQSTART1 ,Shortcut between LOOPSDONE event and SEQSTART1 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LOOPSDONE_SEQSTART0 ,Shortcut between LOOPSDONE event and SEQSTART0 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SEQEND1_STOP ,Shortcut between SEQEND1 event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SEQEND0_STOP ,Shortcut between SEQEND0 event and STOP task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " LOOPSDONE ,Enable or disable interrupt for LOOPSDONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PWMPERIODEND ,Enable or disable interrupt for PWMPERIODEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SEQEND1 ,Enable or disable interrupt for SEQEND[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SEQEND0 ,Enable or disable interrupt for SEQEND[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SEQSTARTED1 ,Enable or disable interrupt for SEQSTARTED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SEQSTARTED0 ,Enable or disable interrupt for SEQSTARTED[0] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
group.long 0x500++0x17
|
|
line.long 0x00 "ENABLE,PWM Module Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable or disable PWM module" "Disabled,Enabled"
|
|
line.long 0x04 "MODE,Selects Operating Mode Of The Wave Counter"
|
|
bitfld.long 0x04 0. " UPDOWN ,Selects up or up and down as wave counter mode" "Up,Up and down"
|
|
line.long 0x08 "COUNTERTOP,Value Up To Which The Pulse Generator Counter Counts"
|
|
hexmask.long.word 0x08 0.--14. 1. " COUNTERTOP ,Value up to which the pulse generator counter counts"
|
|
line.long 0x0C "PRESCALER,Configuration For PWM_CLK"
|
|
bitfld.long 0x0C 0.--2. " PRESCALER ,Pre-scaler of PWM_CLK" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x10 "DECODER,Configuration Of The Decoder"
|
|
bitfld.long 0x10 8. " MODE ,Selects source for advancing the active sequence" "RefreshCount,NextStep"
|
|
bitfld.long 0x10 0.--2. " LOAD ,How a sequence is read from RAM and spread to the compare register" "Common,Grouped,Individual,WaveForm,?..."
|
|
line.long 0x14 "LOOP,Amount Of Playback Of a Loop"
|
|
hexmask.long.word 0x14 0.--15. 1. " LOOP ,Amount of playback of a loop"
|
|
group.long 0x520++0x0F
|
|
line.long 0x00 "SEQ[0].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[0].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[0].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[0].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
group.long 0x540++0x0F
|
|
line.long 0x00 "SEQ[1].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[1].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[1].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[1].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40021000+0x560))&0x20)==0x00)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40021000+0x564))&0x20)==0x00)
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40021000+0x568))&0x20)==0x00)
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40021000+0x56C))&0x20)==0x00)
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PWM 2"
|
|
base ad:0x40022000
|
|
width 19.
|
|
group.long 0x04++0x0F "TASKS"
|
|
line.long 0x00 "STOP,Stops PWM Pulse Generation On All Channels At The End Of Current PWM Period"
|
|
line.long 0x04 "SEQSTART[0],Loads The First PWM Value On All Enabled Channels From Sequence 0"
|
|
line.long 0x08 "SEQSTART[1],Loads The First PWM Value On All Enabled Channels From Sequence 1"
|
|
line.long 0x0C "NEXTSTEP,Steps By One Value In The Current Sequence On All Enabled Channels"
|
|
group.long 0x104++0x1B "EVENTS"
|
|
line.long 0x00 "STOPPED,Response To STOP Task Emitted When PWM Pulses Are No Longer Generated"
|
|
line.long 0x04 "SEQSTARTED[0],First PWM Period Started On Sequence 0"
|
|
line.long 0x08 "SEQSTARTED[1],First PWM Period Started On Sequence 1"
|
|
line.long 0x0C "SEQEND[0],Emitted At End Of Every Sequence 0"
|
|
line.long 0x10 "SEQEND[1],Emitted At End Of Every Sequence 1"
|
|
line.long 0x14 "PWMPERIODEND,Emitted At The End Of Each PWM Period"
|
|
line.long 0x18 "LOOPSDONE,Concatenated Sequences Have Been Played The Amount Of Times Defined In LOOP.CNT"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " LOOPSDONE_STOP ,Shortcut between LOOPSDONE event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " LOOPSDONE_SEQSTART1 ,Shortcut between LOOPSDONE event and SEQSTART1 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LOOPSDONE_SEQSTART0 ,Shortcut between LOOPSDONE event and SEQSTART0 task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SEQEND1_STOP ,Shortcut between SEQEND1 event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SEQEND0_STOP ,Shortcut between SEQEND0 event and STOP task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " LOOPSDONE ,Enable or disable interrupt for LOOPSDONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PWMPERIODEND ,Enable or disable interrupt for PWMPERIODEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SEQEND1 ,Enable or disable interrupt for SEQEND[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SEQEND0 ,Enable or disable interrupt for SEQEND[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SEQSTARTED1 ,Enable or disable interrupt for SEQSTARTED[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SEQSTARTED0 ,Enable or disable interrupt for SEQSTARTED[0] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED ,Enable or disable interrupt for STOPPED event" "Disabled,Enabled"
|
|
group.long 0x500++0x17
|
|
line.long 0x00 "ENABLE,PWM Module Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable or disable PWM module" "Disabled,Enabled"
|
|
line.long 0x04 "MODE,Selects Operating Mode Of The Wave Counter"
|
|
bitfld.long 0x04 0. " UPDOWN ,Selects up or up and down as wave counter mode" "Up,Up and down"
|
|
line.long 0x08 "COUNTERTOP,Value Up To Which The Pulse Generator Counter Counts"
|
|
hexmask.long.word 0x08 0.--14. 1. " COUNTERTOP ,Value up to which the pulse generator counter counts"
|
|
line.long 0x0C "PRESCALER,Configuration For PWM_CLK"
|
|
bitfld.long 0x0C 0.--2. " PRESCALER ,Pre-scaler of PWM_CLK" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x10 "DECODER,Configuration Of The Decoder"
|
|
bitfld.long 0x10 8. " MODE ,Selects source for advancing the active sequence" "RefreshCount,NextStep"
|
|
bitfld.long 0x10 0.--2. " LOAD ,How a sequence is read from RAM and spread to the compare register" "Common,Grouped,Individual,WaveForm,?..."
|
|
line.long 0x14 "LOOP,Amount Of Playback Of a Loop"
|
|
hexmask.long.word 0x14 0.--15. 1. " LOOP ,Amount of playback of a loop"
|
|
group.long 0x520++0x0F
|
|
line.long 0x00 "SEQ[0].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[0].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[0].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[0].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
group.long 0x540++0x0F
|
|
line.long 0x00 "SEQ[1].PTR,Beginning Address In Data RAM Of Sequence A"
|
|
line.long 0x04 "SEQ[1].CNT,Amount Of Values Duty Cycles In Sequence A"
|
|
hexmask.long.word 0x04 0.--14. 1. " CNT ,Amount of values (duty cycles) in sequence A"
|
|
line.long 0x08 "SEQ[1].REFRESH,Amount Of Additional PWM Periods Between Samples Loaded To Compare Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Amount of additional PWM periods between samples loaded to compare register"
|
|
line.long 0x0C "SEQ[1].ENDDELAY,Time Added After The Sequence"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CNT ,Time added after the sequence in PWM periods"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40022000+0x560))&0x20)==0x00)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "PSEL.OUT[0],Output Pin Select For PWM Channel 0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40022000+0x564))&0x20)==0x00)
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "PSEL.OUT[1],Output Pin Select For PWM Channel 1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40022000+0x568))&0x20)==0x00)
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "PSEL.OUT[2],Output Pin Select For PWM Channel 2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40022000+0x56C))&0x20)==0x00)
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "PSEL.OUT[3],Output Pin Select For PWM Channel 3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif cpuis("NRF52840QI")
|
|
tree "Access control lists (ACL)"
|
|
base ad:0x4001E000
|
|
width 11.
|
|
group.long 0x800++0x0B
|
|
line.long 0x00 "ACL0_ADDR,Start Address Of Region 0 To Protect"
|
|
line.long 0x04 "ACL0_SIZE,Size Of Flash Region 0 In bytes"
|
|
line.long 0x08 "ACL0_PERM,Access Permissions For Region 0"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 0" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 0" "Enabled,Disabled"
|
|
group.long 0x810++0x0B
|
|
line.long 0x00 "ACL1_ADDR,Start Address Of Region 1 To Protect"
|
|
line.long 0x04 "ACL1_SIZE,Size Of Flash Region 1 In bytes"
|
|
line.long 0x08 "ACL1_PERM,Access Permissions For Region 1"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 1" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 1" "Enabled,Disabled"
|
|
group.long 0x820++0x0B
|
|
line.long 0x00 "ACL2_ADDR,Start Address Of Region 2 To Protect"
|
|
line.long 0x04 "ACL2_SIZE,Size Of Flash Region 2 In bytes"
|
|
line.long 0x08 "ACL2_PERM,Access Permissions For Region 2"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 2" "Enabled,Disabled"
|
|
group.long 0x830++0x0B
|
|
line.long 0x00 "ACL3_ADDR,Start Address Of Region 3 To Protect"
|
|
line.long 0x04 "ACL3_SIZE,Size Of Flash Region 3 In bytes"
|
|
line.long 0x08 "ACL3_PERM,Access Permissions For Region 3"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 3" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 3" "Enabled,Disabled"
|
|
group.long 0x840++0x0B
|
|
line.long 0x00 "ACL4_ADDR,Start Address Of Region 4 To Protect"
|
|
line.long 0x04 "ACL4_SIZE,Size Of Flash Region 4 In bytes"
|
|
line.long 0x08 "ACL4_PERM,Access Permissions For Region 4"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 4" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 4" "Enabled,Disabled"
|
|
group.long 0x850++0x0B
|
|
line.long 0x00 "ACL5_ADDR,Start Address Of Region 5 To Protect"
|
|
line.long 0x04 "ACL5_SIZE,Size Of Flash Region 5 In bytes"
|
|
line.long 0x08 "ACL5_PERM,Access Permissions For Region 5"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 5" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 5" "Enabled,Disabled"
|
|
group.long 0x860++0x0B
|
|
line.long 0x00 "ACL6_ADDR,Start Address Of Region 6 To Protect"
|
|
line.long 0x04 "ACL6_SIZE,Size Of Flash Region 6 In bytes"
|
|
line.long 0x08 "ACL6_PERM,Access Permissions For Region 6"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 6" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 6" "Enabled,Disabled"
|
|
group.long 0x870++0x0B
|
|
line.long 0x00 "ACL7_ADDR,Start Address Of Region 7 To Protect"
|
|
line.long 0x04 "ACL7_SIZE,Size Of Flash Region 7 In bytes"
|
|
line.long 0x08 "ACL7_PERM,Access Permissions For Region 7"
|
|
bitfld.long 0x08 2. " READ ,Configure read permissions for region 7" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " WRITE ,Configure write and erase permissions for region 7" "Enabled,Disabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Universal serial bus device (USBD)"
|
|
base ad:0x40027000
|
|
width 21.
|
|
group.long 0x04++0x5F "TASKS"
|
|
line.long 0x00 "STARTEPIN[0],Enables Endpoint IN 0 To Respond To Traffic From Host"
|
|
line.long 0x04 "STARTEPIN[1],Enables Endpoint IN 1 To Respond To Traffic From Host"
|
|
line.long 0x08 "STARTEPIN[2],Enables Endpoint IN 2 To Respond To Traffic From Host"
|
|
line.long 0x0C "STARTEPIN[3],Enables Endpoint IN 3 To Respond To Traffic From Host"
|
|
line.long 0x10 "STARTEPIN[4],Enables Endpoint IN 4 To Respond To Traffic From Host"
|
|
line.long 0x14 "STARTEPIN[5],Enables Endpoint IN 5 To Respond To Traffic From Host"
|
|
line.long 0x18 "STARTEPIN[6],Enables Endpoint IN 6 To Respond To Traffic From Host"
|
|
line.long 0x1C "STARTEPIN[7],Enables Endpoint IN 7 To Respond To Traffic From Host"
|
|
line.long 0x24 "STARTISION,Enables Sending Data On Iso Endpoint"
|
|
line.long 0x28 "STARTEPOUT[0],Enables Endpoint 0 To Respond To Traffic From Host"
|
|
line.long 0x2C "STARTEPOUT[1],Enables Endpoint 1 To Respond To Traffic From Host"
|
|
line.long 0x30 "STARTEPOUT[2],Enables Endpoint 2 To Respond To Traffic From Host"
|
|
line.long 0x34 "STARTEPOUT[3],Enables Endpoint 3 To Respond To Traffic From Host"
|
|
line.long 0x38 "STARTEPOUT[4],Enables Endpoint 4 To Respond To Traffic From Host"
|
|
line.long 0x3C "STARTEPOUT[5],Enables Endpoint 5 To Respond To Traffic From Host"
|
|
line.long 0x40 "STARTEPOUT[6],Enables Endpoint 6 To Respond To Traffic From Host"
|
|
line.long 0x44 "STARTEPOUT[7],Enables Endpoint 7 To Respond To Traffic From Host"
|
|
line.long 0x48 "STARTISOOUT,Enables Receiving Of Data On Iso Endpoint"
|
|
line.long 0x4C "EP0RCVOUT,Allows OUT Data Stage On Control Endpoint 0"
|
|
line.long 0x50 "EP0STATUS,Allows Status Stage On Control Endpoint 0"
|
|
line.long 0x54 "EP0STALL,STALLs Data And Status Stage On Control Endpoint 0"
|
|
line.long 0x58 "DPDMDRIVE,Forces D+ And D- Lines To The State Defined In The DPDMVALUE Register"
|
|
line.long 0x5C "DPDMNODRIVE,Stops Forcing D+ And D- Lines To Any State (USB Engine Takes Control)"
|
|
group.long 0x100++0x67 "EVENTS"
|
|
line.long 0x00 "USBRESET,Signals That a USB Reset Condition Has Been Detected On The USB Lines"
|
|
line.long 0x04 "STARTED,All Endpoints Reported In The EPSTATUS Register"
|
|
line.long 0x08 "ENDEPIN[0],The Whole EPIN[0] Buffer Has Been Consumed"
|
|
line.long 0x0C "ENDEPIN[1],The Whole EPIN[1] Buffer Has Been Consumed"
|
|
line.long 0x10 "ENDEPIN[2],The Whole EPIN[2] Buffer Has Been Consumed"
|
|
line.long 0x14 "ENDEPIN[3],The Whole EPIN[3] Buffer Has Been Consumed"
|
|
line.long 0x18 "ENDEPIN[4],The Whole EPIN[4] Buffer Has Been Consumed"
|
|
line.long 0x1C "ENDEPIN[5],The Whole EPIN[5] Buffer Has Been Consumed"
|
|
line.long 0x20 "ENDEPIN[6],The Whole EPIN[6] Buffer Has Been Consumed"
|
|
line.long 0x24 "ENDEPIN[7],The Whole EPIN[7] Buffer Has Been Consumed"
|
|
line.long 0x28 "EP0DATADONE,An Acknowledged Data Transfer Has Taken Place On The Control Endpoint"
|
|
line.long 0x2C "ENDISOIN,The Whole ISOIN Buffer Has Been Consumed"
|
|
line.long 0x30 "ENDEPOUT[0],The Whole EPOUT[0] Buffer Has Been Consumed"
|
|
line.long 0x34 "ENDEPOUT[1],The Whole EPOUT[1] Buffer Has Been Consumed"
|
|
line.long 0x38 "ENDEPOUT[2],The Whole EPOUT[2] Buffer Has Been Consumed"
|
|
line.long 0x3C "ENDEPOUT[3],The Whole EPOUT[3] Buffer Has Been Consumed"
|
|
line.long 0x40 "ENDEPOUT[4],The Whole EPOUT[4] Buffer Has Been Consumed"
|
|
line.long 0x44 "ENDEPOUT[5],The Whole EPOUT[5] Buffer Has Been Consumed"
|
|
line.long 0x48 "ENDEPOUT[6],The Whole EPOUT[6] Buffer Has Been Consumed"
|
|
line.long 0x4C "ENDEPOUT[7],The Whole EPOUT[7] Buffer Has Been Consumed"
|
|
line.long 0x50 "ENDISOOUT,The Whole ISOOUT Buffer Has Been Consumed"
|
|
line.long 0x54 "SOF,Signals That a SOF Condition Has Been Detected On The USB Lines"
|
|
line.long 0x58 "USBEVENT,An Event Or An Error Not Covered By Specific Events Has Occurred"
|
|
line.long 0x5C "EP0SETUP,A Valid SETUP Token Has Been Received And Acknowledged On The Control Endpoint"
|
|
line.long 0x60 "EPDATA,A Data Transfer Has Occurred On a Data Endpoint"
|
|
line.long 0x64 "ACCESSFAULT,Access To An Unavailable USB Register Has Been Attempted"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 4. " ENDEPOUT0_EP0RCVOUT ,Shortcut between ENDEPOUT[0] event and EP0RCVOUT task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ENDEPOUT0_EP0STATUS ,Shortcut between ENDEPOUT[0] event and EP0STATUS task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EP0DATADONE_EP0STATUS ,Shortcut between EP0DATADONE event and EP0STATUS task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP0DATADONE_STARTEPOUT0 ,Shortcut between EP0DATADONE event and STARTEPOUT[0] task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EP0DATADONE_STARTEPIN0 ,Shortcut between EP0DATADONE event and STARTEPIN[0] task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " ACCESSFAULT ,Enable or disable interrupt for ACCESSFAULT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " EPDATA ,Enable or disable interrupt for EPDATA event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " EP0SETUP ,Enable or disable interrupt for EP0SETUP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " USBEVENT ,Enable or disable interrupt for USBEVENT event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SOF ,Enable or disable interrupt for SOF event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " ENDISOOUT ,Enable or disable interrupt for ENDISOOUT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " ENDEPOUT7 ,Enable or disable interrupt for ENDEPOUT[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " ENDEPOUT6 ,Enable or disable interrupt for ENDEPOUT[6] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " ENDEPOUT5 ,Enable or disable interrupt for ENDEPOUT[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " ENDEPOUT4 ,Enable or disable interrupt for ENDEPOUT[4] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " ENDEPOUT3 ,Enable or disable interrupt for ENDEPOUT[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " ENDEPOUT2 ,Enable or disable interrupt for ENDEPOUT[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ENDEPOUT1 ,Enable or disable interrupt for ENDEPOUT[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " ENDEPOUT0 ,Enable or disable interrupt for ENDEPOUT[0] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " ENDISOIN ,Enable or disable interrupt for ENDISOIN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " EP0DATADONE ,Enable or disable interrupt for EP0DATADONE event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ENDEPIN7 ,Enable or disable interrupt for ENDEPIN[7] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " ENDEPIN6 ,Enable or disable interrupt for ENDEPIN[6] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ENDEPIN5 ,Enable or disable interrupt for ENDEPIN[5] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ENDEPIN4 ,Enable or disable interrupt for ENDEPIN[4] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " ENDEPIN3 ,Enable or disable interrupt for ENDEPIN[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " ENDEPIN2 ,Enable or disable interrupt for ENDEPIN[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " ENDEPIN1 ,Enable or disable interrupt for ENDEPIN[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ENDEPIN0 ,Enable or disable interrupt for ENDEPIN[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STARTED ,Enable or disable interrupt for STARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " USBRESET ,Enable or disable interrupt for USBRESET event" "Disabled,Enabled"
|
|
group.long 0x400++0x07
|
|
line.long 0x00 "EVENTCAUSE,Details On Event That Caused The USBEVENT Event"
|
|
eventfld.long 0x00 11. " READY ,Wrapper has re-initialized SFRs to the proper values. MAC is ready for normal operation" "Not Detected,Ready"
|
|
eventfld.long 0x00 9. " RESUME ,Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines" "Not Detected,Detected"
|
|
eventfld.long 0x00 8. " SUSPEND ,Signals that the USB lines have been seen idle long enough for the device to enter suspend" "Not Detected,Detected"
|
|
eventfld.long 0x00 0. " ISOOUTCRC ,CRC error was detected on isochronous OUT endpoint 8" "No error,Error"
|
|
line.long 0x04 "BUSSTATE,Provides The Logic State Of The D+ And D- Lines"
|
|
bitfld.long 0x04 1. " DP ,State of the D+ line" "Low,High"
|
|
bitfld.long 0x04 0. " MP ,State of the D- line" "Low,High"
|
|
rgroup.long 0x420++0x1F
|
|
line.long 0x00 "HALTEDEPIN[0],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x00 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x04 "HALTEDEPIN[1],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x04 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x08 "HALTEDEPIN[2],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x08 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x0C "HALTEDEPIN[3],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x0C 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x10 "HALTEDEPIN[4],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x10 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x14 "HALTEDEPIN[5],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x14 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x18 "HALTEDEPIN[6],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x18 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
line.long 0x1C "HALTEDEPIN[7],IN Endpoint Halted Status"
|
|
hexmask.long.word 0x1C 0.--15. 1. " GETSTATUS ,IN endpoint halted status"
|
|
rgroup.long 0x444++0x1F
|
|
line.long 0x00 "HALTEDEPOUT[0],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x00 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x04 "HALTEDEPOUT[1],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x04 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x08 "HALTEDEPOUT[2],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x08 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x0C "HALTEDEPOUT[3],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x0C 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x10 "HALTEDEPOUT[4],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x10 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x14 "HALTEDEPOUT[5],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x14 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x18 "HALTEDEPOUT[6],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x18 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
line.long 0x1C "HALTEDEPOUT[7],OUT Endpoint Halted Status"
|
|
hexmask.long.word 0x1C 0.--15. 1. " GETSTATUS ,OUT endpoint halted status"
|
|
group.long 0x468++0x07
|
|
line.long 0x00 "EPSTATUS,Which Endpoint's EasyDMA Register Have Been Captured"
|
|
eventfld.long 0x00 24. " EPOUT8 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 23. " EPOUT7 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 22. " EPOUT6 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 21. " EPOUT5 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EPOUT4 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 19. " EPOUT3 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 18. " EPOUT2 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 17. " EPOUT1 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
textline " "
|
|
eventfld.long 0x00 16. " EPOUT0 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 8. " EPIN8 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 7. " EPIN7 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 6. " EPIN6 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
textline " "
|
|
eventfld.long 0x00 5. " EPIN5 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 4. " EPIN4 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 3. " EPIN3 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 2. " EPIN2 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
textline " "
|
|
eventfld.long 0x00 1. " EPIN1 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
eventfld.long 0x00 0. " EPIN0 ,Endpoint's EasyDMA registers captured state" "No data,Data"
|
|
line.long 0x04 "EPDATASTATUS,Which Endpoint An Acknowledged Data Transfer Has Occurred"
|
|
eventfld.long 0x04 23. " EPOUT7 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 22. " EPOUT6 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 21. " EPOUT5 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 20. " EPOUT4 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x04 19. " EPOUT3 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 18. " EPOUT2 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 17. " EPOUT1 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
eventfld.long 0x04 16. " EPOUT0 ,Acknowledged data transfer on this OUT endpoint" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x04 7. " EPIN7 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
eventfld.long 0x04 6. " EPIN6 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
eventfld.long 0x04 5. " EPIN5 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
eventfld.long 0x04 4. " EPIN4 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x04 3. " EPIN3 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
eventfld.long 0x04 2. " EPIN2 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
eventfld.long 0x04 1. " EPIN1 ,Acknowledged data transfer on this IN endpoint" "Not done,Done"
|
|
rgroup.long 0x470++0x03
|
|
line.long 0x00 "USBADDR,Device USB Address"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADDR ,Device USB address"
|
|
rgroup.long 0x480++0x1F
|
|
line.long 0x00 "BMREQUESTTYPE,SETUP Data Byte0 bmRequestType"
|
|
bitfld.long 0x00 7. " DIRECTION ,Data transfer direction" "Host to Device,Device to Host"
|
|
bitfld.long 0x00 5.--6. " TYPE ,Data transfer type" "Standard,Class,Vendor,?..."
|
|
bitfld.long 0x00 0.--4. " RECIPIENT ,Data transfer type" "Device,Interface,Endpoint,Other,?..."
|
|
line.long 0x04 "BREQUEST,SETUP Data Byte1 bRequest"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BREQUEST ,SETUP data"
|
|
line.long 0x08 "WVALUEL,SETUP Data Byte2 LSB Of wValue"
|
|
hexmask.long.byte 0x08 0.--7. 1. " WVALUEL ,SETUP data"
|
|
line.long 0x0C "WVALUEH,SETUP Data Byte3 MSB Of wValue"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " WVALUEH ,SETUP data"
|
|
line.long 0x10 "WINDEXL,SETUP Data Byte4 LSB Of wIndex"
|
|
hexmask.long.byte 0x10 0.--7. 1. " WINDEXL ,SETUP data"
|
|
line.long 0x14 "WINDEXH,SETUP Data Byte5 MSB Of wIndex"
|
|
hexmask.long.byte 0x14 0.--7. 1. " WINDEXH ,SETUP data"
|
|
line.long 0x18 "WLENGTHL,SETUP Data Byte6 LSB Of wLength"
|
|
hexmask.long.byte 0x18 0.--7. 1. " WLENGTHL ,SETUP data"
|
|
line.long 0x1C "WLENGTHH,SETUP Data Byte7 MSB Of wLength"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " WLENGTHH ,SETUP data"
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "SIZEEPOUT[0],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "SIZEEPOUT[1],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "SIZEEPOUT[2],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "SIZEEPOUT[3],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "SIZEEPOUT[4],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "SIZEEPOUT[5],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "SIZEEPOUT[6],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "SIZEEPOUT[7],Amount Of Bytes Received Last In The Data Stage Of This OUT Endpoint"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SIZE ,Amount of bytes received last in the data stage of this OUT endpoint"
|
|
rgroup.long 0x4C0++0x03
|
|
line.long 0x00 "SIZEISOOUT,Amount Of Bytes Received Last On This ISO OUT Data Endpoint"
|
|
bitfld.long 0x00 16. " ZERO ,Zero-length data packet received" "Normal,ZeroData"
|
|
hexmask.long.word 0x00 0.--9. 1. " SIZE ,Amount of bytes received last on this ISO OUT data endpoint"
|
|
group.long 0x500++0x17
|
|
line.long 0x00 "ENABLE,Enable USB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable USB" "Disabled,Enabled"
|
|
line.long 0x04 "USBPULLUP,Control Of The USB Pull-Up"
|
|
bitfld.long 0x04 0. " CONNECT ,Control of the USB pull-up on the D+ line" "Disabled,Enabled"
|
|
line.long 0x08 "DPDMVALUE,State At Which The DPDMDRIVE Task Will Force D+ And D-"
|
|
bitfld.long 0x08 0.--4. " STATE ,State at which the DPDMDRIVE task will force D+ and D" ",Resume,J,,K,?..."
|
|
line.long 0x0C "DTOGGLE,Data Toggle Control And Status"
|
|
bitfld.long 0x0C 8.--9. " VALUE ,Data toggle value" "Nop,Data0,Data1,?..."
|
|
bitfld.long 0x0C 7. " IO ,Selects IN or OUT endpoint" "Out,In"
|
|
bitfld.long 0x0C 0.--2. " EP ,Select bulk endpoint number" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EPINEN,Endpoint IN Enable"
|
|
bitfld.long 0x10 8. " ISOIN ,Enable ISO IN endpoint" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " IN7 ,Enable IN endpoint 7" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " IN6 ,Enable IN endpoint 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " IN5 ,Enable IN endpoint 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IN4 ,Enable IN endpoint 4" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " IN3 ,Enable IN endpoint 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " IN2 ,Enable IN endpoint 2" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " IN1 ,Enable IN endpoint 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " IN0 ,Enable IN endpoint 0" "Disabled,Enabled"
|
|
line.long 0x14 "EPOUTEN,Endpoint OUT Enable"
|
|
bitfld.long 0x14 8. " ISOOUT ,Enable ISO OUT endpoint" "Disabled,Enabled"
|
|
bitfld.long 0x14 7. " OUT7 ,Enable OUT endpoint 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " OUT6 ,Enable OUT endpoint 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " OUT5 ,Enable OUT endpoint 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " OUT4 ,Enable OUT endpoint 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " OUT3 ,Enable OUT endpoint 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " OUT2 ,Enable OUT endpoint 2" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " OUT1 ,Enable OUT endpoint 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " OUT0 ,Enable OUT endpoint 0" "Disabled,Enabled"
|
|
wgroup.long 0x518++0x03
|
|
line.long 0x00 "EPSTALL,STALL Endpoints"
|
|
bitfld.long 0x00 8. " STALL ,Stall selected endpoint" "UnStall,Stall"
|
|
bitfld.long 0x00 7. " IO ,Selects IN or OUT endpoint" "Out,In"
|
|
bitfld.long 0x00 0.--2. " EP ,Select endpoint number" "0,1,2,3,4,5,6,7"
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "ISOSPLIT,Controls The Split Of ISO Buffers"
|
|
hexmask.long.word 0x00 0.--15. 1. " ISOSPLIT ,Controls the split of ISO buffers"
|
|
rgroup.long 0x520++0x03
|
|
line.long 0x00 "FRAMECNTR,Returns The Current Value Of The Start Of Frame Counter"
|
|
hexmask.long.word 0x00 0.--10. 1. " FRAMECNTR ,Returns the current value of the start of frame counter"
|
|
group.long 0x52C++0x07
|
|
line.long 0x00 "LOWPOWER,Controls USBD Peripheral Low-Power Mode During USB Suspend"
|
|
bitfld.long 0x00 0. " LOWPOWER ,Controls USBD peripheral low-power mode during USB suspend" "ForceNormal,LowPower"
|
|
line.long 0x04 "ISOINCONFIG,Controls The Response"
|
|
bitfld.long 0x04 0. " RESPONSE ,Controls the response of the ISO IN endpoint to an IN token" "NoResp,ZeroData"
|
|
group.long 0x600++0x07
|
|
line.long 0x00 "EPIN[0]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[0]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[0]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x600+0x08)++0x03
|
|
line.long 0x00 "EPIN[0]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[0]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x614++0x07
|
|
line.long 0x00 "EPIN[1]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[1]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[1]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x614+0x08)++0x03
|
|
line.long 0x00 "EPIN[1]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[1]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x628++0x07
|
|
line.long 0x00 "EPIN[2]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[2]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[2]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x628+0x08)++0x03
|
|
line.long 0x00 "EPIN[2]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[2]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x63C++0x07
|
|
line.long 0x00 "EPIN[3]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[3]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[3]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x63C+0x08)++0x03
|
|
line.long 0x00 "EPIN[3]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[3]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x650++0x07
|
|
line.long 0x00 "EPIN[4]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[4]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[4]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x650+0x08)++0x03
|
|
line.long 0x00 "EPIN[4]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[4]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x664++0x07
|
|
line.long 0x00 "EPIN[5]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[5]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[5]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x664+0x08)++0x03
|
|
line.long 0x00 "EPIN[5]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[5]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x678++0x07
|
|
line.long 0x00 "EPIN[6]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[6]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[6]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x678+0x08)++0x03
|
|
line.long 0x00 "EPIN[6]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[6]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x68C++0x07
|
|
line.long 0x00 "EPIN[7]PTR,Data Pointer"
|
|
line.long 0x04 "EPIN[7]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPIN[7]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x68C+0x08)++0x03
|
|
line.long 0x00 "EPIN[7]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPIN[7]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x6A0++0x07
|
|
line.long 0x00 "ISOINPTR,Data Pointer"
|
|
line.long 0x04 "ISOINMAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.word 0x04 0.--9. 1. " ISOIN_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long 0x6A8++0x03
|
|
line.long 0x00 "ISOINAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.word 0x00 0.--9. 1. " ISOIN_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x700++0x07
|
|
line.long 0x00 "EPOUT[0]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[0]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[0]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x700+0x08)++0x03
|
|
line.long 0x00 "EPOUT[0]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[0]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x714++0x07
|
|
line.long 0x00 "EPOUT[1]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[1]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[1]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x714+0x08)++0x03
|
|
line.long 0x00 "EPOUT[1]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[1]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x728++0x07
|
|
line.long 0x00 "EPOUT[2]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[2]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[2]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x728+0x08)++0x03
|
|
line.long 0x00 "EPOUT[2]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[2]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x73C++0x07
|
|
line.long 0x00 "EPOUT[3]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[3]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[3]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x73C+0x08)++0x03
|
|
line.long 0x00 "EPOUT[3]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[3]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x750++0x07
|
|
line.long 0x00 "EPOUT[4]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[4]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[4]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x750+0x08)++0x03
|
|
line.long 0x00 "EPOUT[4]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[4]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x764++0x07
|
|
line.long 0x00 "EPOUT[5]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[5]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[5]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x764+0x08)++0x03
|
|
line.long 0x00 "EPOUT[5]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[5]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x778++0x07
|
|
line.long 0x00 "EPOUT[6]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[6]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[6]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x778+0x08)++0x03
|
|
line.long 0x00 "EPOUT[6]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[6]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x78C++0x07
|
|
line.long 0x00 "EPOUT[7]PTR,Data Pointer"
|
|
line.long 0x04 "EPOUT[7]MAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EPOUT[7]_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long (0x78C+0x08)++0x03
|
|
line.long 0x00 "EPOUT[7]AMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EPOUT[7]_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x7A0++0x07
|
|
line.long 0x00 "ISOOUTPTR,Data Pointer"
|
|
line.long 0x04 "ISOOUTMAXCNT,Maximum Number Of Bytes To Transfer"
|
|
hexmask.long.word 0x04 0.--9. 1. " ISOOUT_MAXCNT ,Maximum number of bytes to transfer"
|
|
rgroup.long 0x7A8++0x03
|
|
line.long 0x00 "ISOOUTAMOUNT,Number Of Bytes Transferred In The Last Transaction"
|
|
hexmask.long.word 0x00 0.--9. 1. " ISOOUT_AMOUNT ,Number of bytes transferred in the last transaction"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Quad serial peripheral interface (QSPI)"
|
|
base ad:0x40029000
|
|
width 21.
|
|
group.long 0x00++0x13 "TASKS"
|
|
line.long 0x00 "ACTIVATE,Activate QSPI Interface"
|
|
line.long 0x04 "READSTART,Start Transfer From External Flash Memory To Internal RAM"
|
|
line.long 0x08 "WRITESTART,Start Transfer From Internal RAM To External Flash Memory"
|
|
line.long 0x0C "ERASESTART,Start External Flash Memory Erase Operation"
|
|
line.long 0x10 "DEACTIVATE,Deactivate QSPI Interface"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "READY,QSPI Peripheral Is Ready"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY ,Enable or disable interrupt for READY event" "Disabled,Enabled"
|
|
group.long 0x500++0x23
|
|
line.long 0x00 "ENABLE,Enable QSPI Peripheral And Acquire The Pins Selected In PSELn Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable QSPI peripheral and acquire the pins selected in PSELn registers" "Disabled,Enabled"
|
|
line.long 0x04 "READSRC,Flash Memory Source Address"
|
|
line.long 0x08 "READDST,RAM Destination Address"
|
|
line.long 0x0C "READCNT,Read Transfer Length"
|
|
hexmask.long.tbyte 0x0C 0.--20. 1. " CNT ,Read transfer length in number of bytes"
|
|
line.long 0x10 "WRITEDST,Flash Destination Address"
|
|
line.long 0x14 "WRITESRC,RAM Source Address"
|
|
line.long 0x18 "WRITECNT,Write Transfer Length"
|
|
hexmask.long.tbyte 0x18 0.--20. 1. " CNT ,Read transfer length in number of bytes"
|
|
line.long 0x1C "ERASEPTR,Start Address Of Flash Block To Be Erased"
|
|
line.long 0x20 "ERASELEN,Size Of Block To Be Erased"
|
|
bitfld.long 0x20 0.--1. " LEN ,LEN" "4KB,64KB,All,?..."
|
|
if (((per.l(ad:0x40029000+0x524))&0x20)==0x00)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For Serial Clock SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For Serial Clock SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40029000+0x528))&0x20)==0x00)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "PSELCSN,Pin Select For Chip Select Signal CSN"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "PSELCSN,Pin Select For Chip Select Signal CSN"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40029000+0x530))&0x20)==0x00)
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "PSELIO0,Pin Select For Serial Data MOSI/IO0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "PSELIO0,Pin Select For Serial Data MOSI/IO0"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40029000+0x534))&0x20)==0x00)
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "PSELIO1,Pin Select For Serial Data MOSI/IO1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "PSELIO1,Pin Select For Serial Data MOSI/IO1"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40029000+0x538))&0x20)==0x00)
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "PSELIO2,Pin Select For Serial Data MOSI/IO2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "PSELIO2,Pin Select For Serial Data MOSI/IO2"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40029000+0x53C))&0x20)==0x00)
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "PSELIO3,Pin Select For Serial Data MOSI/IO3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "PSELIO3,Pin Select For Serial Data MOSI/IO3"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "XIPOFFSET,Address Offset Into The External Memory For Execute In Place Operation"
|
|
line.long 0x04 "IFCONFIG0,Interface Configuration"
|
|
bitfld.long 0x04 12. " PPSIZE ,Page size for commands PP, PP2O, PP4O and PP4IO" "256,512"
|
|
bitfld.long 0x04 7. " DPMENABLE ,Enable deep power-down mode (DPM) feature" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ADDRMODE ,Addressing mode" "24-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x04 3.--5. " WRITEOC ,Configure number of data lines and opcode used for writing" "PP,PP2O,PP4O,PP4IO,?..."
|
|
bitfld.long 0x04 0.--2. " READOC ,Configure number of data lines and opcode used for reading" "FASTREAD,READ2O,READ2IO,READ4O,READ4IO,?..."
|
|
group.long 0x600++0x07
|
|
line.long 0x00 "IFCONFIG1,Interface Configuration"
|
|
bitfld.long 0x00 28.--31. " SCKFREQ ,SCK frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 25. " SPIMODE ,Select SPI mode" "MODE0,MODE3"
|
|
bitfld.long 0x00 24. " DPMEN ,Enter/exit deep power-down mode (DPM) for external flash memory" "Exit,Enter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDELAY ,Minimum amount of time that the CSN pin must stay high before it can go low again"
|
|
line.long 0x04 "STATUS,Status Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " SREG ,Value of external flash device Status Register"
|
|
bitfld.long 0x04 3. " READY ,Ready status" "Busy,Ready"
|
|
bitfld.long 0x04 2. " DPM ,Deep power-down mode" "Disabled,Enabled"
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "DPMDUR,Set The Duration Required To Enter/Exit Deep Power-Down Mode"
|
|
hexmask.long.word 0x00 16.--31. 1. " ENTER ,Duration needed by external flash to enter DPM"
|
|
hexmask.long.word 0x00 0.--15. 1. " EXIT ,Duration needed by external flash to exit DPM"
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "ADDRCONF,Extended Address Configuration"
|
|
bitfld.long 0x00 27. " WREN ,Send WREN before instruction" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WIPWAIT ,Wait for write complete before sending command" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " MODE ,Extended addressing mode" "Nolnstr,Opcode,OpByte0,All"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " BYTE1 ,Byte 1 following byte 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " BYTE0 ,Byte 0 following opcode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPCODE ,Opcode that enters the 32-bit addressing mode"
|
|
group.long 0x634++0x0F
|
|
line.long 0x00 "CINSTRCONF,Custom Instruction Configuration Register"
|
|
bitfld.long 0x00 17. " LFSTOP ,Stop (finalize) long frame transaction" "?,Stopped"
|
|
bitfld.long 0x00 16. " LFEN ,Enable long frame mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WREN ,Send WREN before instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WIPWAIT ,Wait for write complete before sending command" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " LIO3 ,Level of the IO3 pin" "0,1"
|
|
bitfld.long 0x00 12. " LIO2 ,Level of the IO2 pin" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " LENGTH ,Length of custom instruction in number of bytes" ",1B,2B,3B,4B,5B,6B,7B,8B,9B,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPCODE ,Opcode of Custom instruction"
|
|
line.long 0x04 "CINSTRDAT0,Custom Instruction Data Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " BYTE3 ,Data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " BYTE2 ,Data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " BYTE1 ,Data byte 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BYTE0 ,Data byte 0"
|
|
line.long 0x08 "CINSTRDAT1,Custom Instruction Data Register 1"
|
|
hexmask.long.byte 0x08 24.--31. 1. " BYTE7 ,Data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " BYTE6 ,Data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " BYTE5 ,Data byte 5"
|
|
hexmask.long.byte 0x08 0.--7. 1. " BYTE4 ,Data byte 4"
|
|
line.long 0x0C "IFTIMING,SPI Interface Timing"
|
|
bitfld.long 0x0C 8.--10. " RXDELAY ,Timing related to sampling of the input serial data" "0,1,2,3,4,5,6,7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ARM TrustZone CryptoCell 310 (CRYPTOCELL)"
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base ad:0x5002A000
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width 8.
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group.long 0x500++0x03
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line.long 0x00 "ENABLE,Control Power And Clock For CRYPTOCELL Subsystem"
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bitfld.long 0x00 0. " ENABLE ,Enable or disable the CRYPTOCELL subsystem" "Disabled,Enabled"
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width 0x0B
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tree.end
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endif
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textline ""
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