16303 lines
979 KiB
Plaintext
16303 lines
979 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: MSR1 On-Chip Peripherals
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; @Props: Released
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; @Author: KWI
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; @Changelog: 2021-03-18 KWI
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; @Manufacturer: STM - ST Microelectronics N.V.
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; @Doc: Generated based on sta800.per
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; @Core: Cortex-M7F
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; @Chip: MSR1-CM7
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; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: permsr1.per 17736 2024-04-08 09:26:07Z kwisniewski $
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tree.close "Core Registers (Cortex-M7F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes"
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bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes"
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bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes"
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textline " "
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bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes"
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bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes"
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bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
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textline " "
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bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes"
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bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
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textline ""
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Patch 0,Patch 1,Patch 2,?..."
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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textline " "
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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textline " "
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x13
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line.long 0x00 "HFSR,HardFault Status Register"
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eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
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eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred"
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eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred"
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eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred"
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eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred"
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line.long 0x08 "MMFAR,MemManage Fault Address Register"
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line.long 0x0C "BFAR,BusFault Address Register"
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line.long 0x10 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Triggered Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..."
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..."
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textline " "
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bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
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bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
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bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
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textline " "
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bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
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bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
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bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..."
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification"
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wgroup.long 0xF58++0x1F
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line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU"
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line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)"
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line.long 0x08 "DCISW,Data cache invalidate by set/way"
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line.long 0x0C "DCCMVAU,Data cache by address to PoU"
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line.long 0x10 "DCCMVAC,Data cache clean by address to PoC"
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line.long 0x14 "DCCSW,Data cache clean by set/way"
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line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC"
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line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way"
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group.long 0xF90++0x13
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line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register"
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bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
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bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
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bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x08 "AHBPCR,AHBP control register"
|
|
bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..."
|
|
bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled"
|
|
line.long 0x0C "CACR,L1 Cache Control Register"
|
|
bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes"
|
|
bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled"
|
|
line.long 0x10 "AHBSCR,AHB Slave Control Register"
|
|
bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion"
|
|
bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI"
|
|
group.long 0xFA8++0x03
|
|
line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register"
|
|
bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred"
|
|
group.long 0xFB0++0x03
|
|
line.long 0x00 "IEBR0,Instruction Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB4++0x03
|
|
line.long 0x00 "IEBR1,Instruction Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB8++0x03
|
|
line.long 0x00 "DEBR0,Data Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFBC++0x03
|
|
line.long 0x00 "DEBR1,Data Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM7F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
newline
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
newline
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
newline
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "DMAC_0"
|
|
base ad:0x40000000
|
|
width 20.
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "MIS,DMA_MASK_INT_STATUS - Interrupt Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INT_STATUS ,Mask Int Status"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "IntTCStatus,DMAIntTCStatus - Interrupt TC Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntTCStatus_bit ,Int TC Status"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "IntTCClear,DMAIntTCClear - Interrupt TC clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntTCClear_bit ,Int TC Clear"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "IntErrorStatus,DMAIntTCStatus - Interrupt Error Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntErrorStatus_bit ,Int Error Status"
|
|
wgroup 0x10++0x03
|
|
line.long 0x00 "IntErrClr,DMAIntErrClr - Interrupt Err clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntErrClr_bit ,Int Err Clear"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "RawIntTCStatus,DMAIntTCStatus - Raw Interrupt TC Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RawIntTCStatus_bit ,Rwa Int TC Status"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "RawIntErrorStatus,RawDMAIntTCStatus -Raw Interrupt Error Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RawIntErrorStatus_bit ,Raw Int Error Status"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "En_CH_Status,DMA_En_CH_Status -DMA active ch Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_ECHSR ,DMA ch enable Status"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "SB_REQ_Status,DMA_SB_REQ_Status -DMA single burst req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_SB_REQ ,DMA Bust REQ Status"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "SS_REQ_Status,DMA_SS_REQ_Status-DMA burst req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_SS_REQ ,DMA Single REQ Status"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "LAST_B_REQ_Status,DMA_LAST_B_REQ-DMA last burst Req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_LAST_B_REQ_Status ,DMA Last Bust REQ Status"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "LAST_SB_REQ_Status,DMA_LAST_B_REQ-DMA sigle last burst Req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_LAST_SB_REQ_Status ,DMA single Last Bust REQ Status"
|
|
group 0x100++0x03
|
|
line.long 0x00 "Ch_src_ADD0,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x120++0x03
|
|
line.long 0x00 "Ch_src_ADD1,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x140++0x03
|
|
line.long 0x00 "Ch_src_ADD2,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x160++0x03
|
|
line.long 0x00 "Ch_src_ADD3,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x180++0x03
|
|
line.long 0x00 "Ch_src_ADD4,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1A0++0x03
|
|
line.long 0x00 "Ch_src_ADD5,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1C0++0x03
|
|
line.long 0x00 "Ch_src_ADD6,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1E0++0x03
|
|
line.long 0x00 "Ch_src_ADD7,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x104++0x03
|
|
line.long 0x00 "Ch_des_ADD0,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x124++0x03
|
|
line.long 0x00 "Ch_des_ADD1,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x144++0x03
|
|
line.long 0x00 "Ch_des_ADD2,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x164++0x03
|
|
line.long 0x00 "Ch_des_ADD3,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x184++0x03
|
|
line.long 0x00 "Ch_des_ADD4,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1A4++0x03
|
|
line.long 0x00 "Ch_des_ADD5,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1C4++0x03
|
|
line.long 0x00 "Ch_des_ADD6,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1E4++0x03
|
|
line.long 0x00 "Ch_des_ADD7,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x108++0x03
|
|
line.long 0x00 "C0LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x128++0x03
|
|
line.long 0x00 "C1LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x148++0x03
|
|
line.long 0x00 "C2LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x168++0x03
|
|
line.long 0x00 "C3LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x188++0x03
|
|
line.long 0x00 "C4LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1A8++0x03
|
|
line.long 0x00 "C5LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1C8++0x03
|
|
line.long 0x00 "C6LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1E8++0x03
|
|
line.long 0x00 "C7LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg0,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x12C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg1,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x14C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg2,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x16C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg3,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x18C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg4,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1AC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg5,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1CC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg6,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1EC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg7,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x110++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg0,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x130++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg1,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x150++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg2,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x170++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg3,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x190++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg4,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1B0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg5,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1D0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg6,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1F0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg7,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
rgroup 0xFE0++0x00
|
|
line.byte 0x00 "Peri_ID_reg0,DMA_PERIPH_ID0-DMA Peripheral ID Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " PartNumber0 ,PartNumber0"
|
|
rgroup 0xFE4++0x00
|
|
line.byte 0x00 "Peri_ID_reg1,DMA_PERIPH_ID1-DMA Peripheral ID Registers"
|
|
bitfld.byte 0x00 4.--7. " Designer0 ,Designer0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " PartNumber1 ,PartNumber1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x00
|
|
line.byte 0x00 "Peri_ID_reg2,DMA_PERIPH_ID2-DMA Peripheral ID Registers"
|
|
bitfld.byte 0x00 4.--7. " Revision ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " Designer1 ,Designer1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x00
|
|
line.byte 0x00 "Peri_ID_reg3,DMA_PERIPH_ID0-DMA Peripheral ID Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " Configuration ,Configuration"
|
|
rgroup 0xFF0++0x00
|
|
line.byte 0x00 "PCellID0,DMAPCellID0-DMAPCellID0 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID0 ,DMAPCellID0"
|
|
rgroup 0xFF4++0x00
|
|
line.byte 0x00 "PCellID1,DMAPCellID1-DMAPCellID1 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID1 ,DMAPCellID1"
|
|
rgroup 0xFF8++0x00
|
|
line.byte 0x00 "PCellID2,DMAPCellID2-DMAPCellID2 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID2 ,DMAPCellID2"
|
|
rgroup 0xFFC++0x00
|
|
line.byte 0x00 "PCellID3,DMAPCellID3-DMAPCellID3 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID3 ,DMAPCellID3"
|
|
tree.end
|
|
tree "DMAC_1"
|
|
base ad:0x40100000
|
|
width 20.
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "MIS,DMA_MASK_INT_STATUS - Interrupt Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INT_STATUS ,Mask Int Status"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "IntTCStatus,DMAIntTCStatus - Interrupt TC Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntTCStatus_bit ,Int TC Status"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "IntTCClear,DMAIntTCClear - Interrupt TC clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntTCClear_bit ,Int TC Clear"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "IntErrorStatus,DMAIntTCStatus - Interrupt Error Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntErrorStatus_bit ,Int Error Status"
|
|
wgroup 0x10++0x03
|
|
line.long 0x00 "IntErrClr,DMAIntErrClr - Interrupt Err clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IntErrClr_bit ,Int Err Clear"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "RawIntTCStatus,DMAIntTCStatus - Raw Interrupt TC Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RawIntTCStatus_bit ,Rwa Int TC Status"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "RawIntErrorStatus,RawDMAIntTCStatus -Raw Interrupt Error Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RawIntErrorStatus_bit ,Raw Int Error Status"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "En_CH_Status,DMA_En_CH_Status -DMA active ch Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_ECHSR ,DMA ch enable Status"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "SB_REQ_Status,DMA_SB_REQ_Status -DMA single burst req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_SB_REQ ,DMA Bust REQ Status"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "SS_REQ_Status,DMA_SS_REQ_Status-DMA burst req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_SS_REQ ,DMA Single REQ Status"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "LAST_B_REQ_Status,DMA_LAST_B_REQ-DMA last burst Req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_LAST_B_REQ_Status ,DMA Last Bust REQ Status"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "LAST_SB_REQ_Status,DMA_LAST_B_REQ-DMA sigle last burst Req Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DMA_LAST_SB_REQ_Status ,DMA single Last Bust REQ Status"
|
|
group 0x100++0x03
|
|
line.long 0x00 "Ch_src_ADD0,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x120++0x03
|
|
line.long 0x00 "Ch_src_ADD1,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x140++0x03
|
|
line.long 0x00 "Ch_src_ADD2,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x160++0x03
|
|
line.long 0x00 "Ch_src_ADD3,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x180++0x03
|
|
line.long 0x00 "Ch_src_ADD4,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1A0++0x03
|
|
line.long 0x00 "Ch_src_ADD5,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1C0++0x03
|
|
line.long 0x00 "Ch_src_ADD6,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x1E0++0x03
|
|
line.long 0x00 "Ch_src_ADD7,DMA_CH_SRC_ADD[0..7] - DMA ch source add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " SrcAddrx ,src add status"
|
|
group 0x104++0x03
|
|
line.long 0x00 "Ch_des_ADD0,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x124++0x03
|
|
line.long 0x00 "Ch_des_ADD1,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x144++0x03
|
|
line.long 0x00 "Ch_des_ADD2,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x164++0x03
|
|
line.long 0x00 "Ch_des_ADD3,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x184++0x03
|
|
line.long 0x00 "Ch_des_ADD4,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1A4++0x03
|
|
line.long 0x00 "Ch_des_ADD5,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1C4++0x03
|
|
line.long 0x00 "Ch_des_ADD6,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x1E4++0x03
|
|
line.long 0x00 "Ch_des_ADD7,DMA_CH_DES_ADD[0..7] - DMA ch destination add Registers"
|
|
hexmask.long 0x00 0.--31. 1. " DesAddrx ,src add status"
|
|
group 0x108++0x03
|
|
line.long 0x00 "C0LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x128++0x03
|
|
line.long 0x00 "C1LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x148++0x03
|
|
line.long 0x00 "C2LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x168++0x03
|
|
line.long 0x00 "C3LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x188++0x03
|
|
line.long 0x00 "C4LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1A8++0x03
|
|
line.long 0x00 "C5LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1C8++0x03
|
|
line.long 0x00 "C6LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x1E8++0x03
|
|
line.long 0x00 "C7LLI_Reg,DMA_CxLLI_Reg[0..7] - DMA ch LinkList Item Registers"
|
|
hexmask.long 0x00 2.--31. 1. " Link_List_Item ,Link_List_Item Reg"
|
|
bitfld.long 0x00 0. " LM ,Link List master" "0,1"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg0,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x12C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg1,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x14C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg2,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x16C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg3,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x18C++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg4,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1AC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg5,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1CC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg6,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x1EC++0x03
|
|
line.long 0x00 "Ch_Ctrl_reg7,DMA_Ch_Cntrl_reg[0..7] - DMA Ch control Registers"
|
|
bitfld.long 0x00 31. " INT_en ,Terminal count INT en" "0,1"
|
|
bitfld.long 0x00 28.--30. " Prot ,Protection Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " S_inc ,destination ADDR Increment" "0,1"
|
|
bitfld.long 0x00 26. " S_inc ,source ADDR Increment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "DMaster ,Destination AHB master select" "0,1"
|
|
bitfld.long 0x00 24. " SMaster ,source AHB master select" "0,1"
|
|
bitfld.long 0x00 21.--23. " Dwidth ,Destination transfer width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " Swidth ,source transfer width" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DBsize ,Destination Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DBsize ,source Burst Size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Tx_size ,Transfer Size"
|
|
group 0x110++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg0,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x130++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg1,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x150++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg2,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x170++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg3,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x190++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg4,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1B0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg5,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1D0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg6,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
group 0x1F0++0x03
|
|
line.long 0x00 "Ch_CoNfig_reg7,DMA_Ch_Config_reg[0..7] - DMA Ch config Registers"
|
|
bitfld.long 0x00 18. " HALT ,Halt ch bit" "0,1"
|
|
bitfld.long 0x00 17. " ACTIVE ,Active ch bit" "0,1"
|
|
bitfld.long 0x00 16. " LOCK ,locked transfer Enable bit" "0,1"
|
|
bitfld.long 0x00 15. " ITC ,Terminal count INT mask bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "IE ,INT Enable mask bit" "0,1"
|
|
bitfld.long 0x00 11.--13. " FlowCntrl ,Flow Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--10. " DesPeriph ,DES peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 1.--5. " SrcPeriph ,Src peripheral of TX" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 0. "Ch_En ,Ch Enable bit" "0,1"
|
|
rgroup 0xFE0++0x00
|
|
line.byte 0x00 "Peri_ID_reg0,DMA_PERIPH_ID0-DMA Peripheral ID Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " PartNumber0 ,PartNumber0"
|
|
rgroup 0xFE4++0x00
|
|
line.byte 0x00 "Peri_ID_reg1,DMA_PERIPH_ID1-DMA Peripheral ID Registers"
|
|
bitfld.byte 0x00 4.--7. " Designer0 ,Designer0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " PartNumber1 ,PartNumber1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x00
|
|
line.byte 0x00 "Peri_ID_reg2,DMA_PERIPH_ID2-DMA Peripheral ID Registers"
|
|
bitfld.byte 0x00 4.--7. " Revision ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " Designer1 ,Designer1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x00
|
|
line.byte 0x00 "Peri_ID_reg3,DMA_PERIPH_ID0-DMA Peripheral ID Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " Configuration ,Configuration"
|
|
rgroup 0xFF0++0x00
|
|
line.byte 0x00 "PCellID0,DMAPCellID0-DMAPCellID0 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID0 ,DMAPCellID0"
|
|
rgroup 0xFF4++0x00
|
|
line.byte 0x00 "PCellID1,DMAPCellID1-DMAPCellID1 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID1 ,DMAPCellID1"
|
|
rgroup 0xFF8++0x00
|
|
line.byte 0x00 "PCellID2,DMAPCellID2-DMAPCellID2 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID2 ,DMAPCellID2"
|
|
rgroup 0xFFC++0x00
|
|
line.byte 0x00 "PCellID3,DMAPCellID3-DMAPCellID3 Registers"
|
|
hexmask.byte 0x00 0.--6. 1. " DMAPCellID3 ,DMAPCellID3"
|
|
tree.end
|
|
tree "ETHERNET_0"
|
|
base ad:0x40200000
|
|
width 39.
|
|
group 0x00++0x03
|
|
line.long 0x00 "MAC_CONFIGURATION,"
|
|
bitfld.long 0x00 0. " RE ," "0,1"
|
|
bitfld.long 0x00 1. " TE ," "0,1"
|
|
bitfld.long 0x00 2.--3. " PRELEN ," "0,1,2,3"
|
|
bitfld.long 0x00 4. " DC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " BL ," "0,1,2,3"
|
|
bitfld.long 0x00 8. " DR ," "0,1"
|
|
bitfld.long 0x00 9. " DCRS ," "0,1"
|
|
bitfld.long 0x00 10. " DO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ECRSFD ," "0,1"
|
|
bitfld.long 0x00 12. " LM ," "0,1"
|
|
bitfld.long 0x00 13. " DM ," "0,1"
|
|
bitfld.long 0x00 14. " FES ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PS ," "0,1"
|
|
bitfld.long 0x00 16. " JE ," "0,1"
|
|
bitfld.long 0x00 17. " JD ," "0,1"
|
|
bitfld.long 0x00 18. " BE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WD ," "0,1"
|
|
bitfld.long 0x00 20. " ACS ," "0,1"
|
|
bitfld.long 0x00 21. " CST ," "0,1"
|
|
bitfld.long 0x00 22. " S2KP ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPSLCE ," "0,1"
|
|
bitfld.long 0x00 24.--26. " IPG ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " IPC ," "0,1"
|
|
bitfld.long 0x00 28.--29. " SARC ," "0,1,2,3"
|
|
group 0x04++0x03
|
|
line.long 0x00 "MAC_EXT_CONFIGURATION,"
|
|
hexmask.long.word 0x00 0.--13. 1. " GPSL ,"
|
|
bitfld.long 0x00 16. " DCRCC ," "0,1"
|
|
bitfld.long 0x00 17. " SPEN ," "0,1"
|
|
bitfld.long 0x00 18. " USP ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EIPGEN ," "0,1"
|
|
bitfld.long 0x00 25.--29. " EIPG ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
group 0x08++0x03
|
|
line.long 0x00 "MAC_PACKET_FILTER,"
|
|
bitfld.long 0x00 0. " PR ," "0,1"
|
|
bitfld.long 0x00 1. " HUC ," "0,1"
|
|
bitfld.long 0x00 2. " HMC ," "0,1"
|
|
bitfld.long 0x00 3. " DAIF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PM ," "0,1"
|
|
bitfld.long 0x00 5. " DBF ," "0,1"
|
|
bitfld.long 0x00 6.--7. " PCF ," "0,1,2,3"
|
|
bitfld.long 0x00 8. " SAIF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SAF ," "0,1"
|
|
bitfld.long 0x00 10. " HPF ," "0,1"
|
|
bitfld.long 0x00 16. " VTFE ," "0,1"
|
|
bitfld.long 0x00 20. " IPFE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DNTU ," "0,1"
|
|
bitfld.long 0x00 31. " RA ," "0,1"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "MAC_WATCHDOG_TIMEOUT,"
|
|
bitfld.long 0x00 0.--3. " WTO ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8. " PWE ," "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "MAC_HASH_TABLE_REG0,"
|
|
hexmask.long 0x00 0.--31. 1. " HT31T0 ,"
|
|
group 0x14++0x03
|
|
line.long 0x00 "MAC_HASH_TABLE_REG1,"
|
|
hexmask.long 0x00 0.--31. 1. " HT63T32 ,"
|
|
group 0x50++0x03
|
|
line.long 0x00 "MAC_VLAN_TAG,"
|
|
hexmask.long.word 0x00 0.--15. 1. " VL ,"
|
|
bitfld.long 0x00 16. " ETV ," "0,1"
|
|
bitfld.long 0x00 17. " VTIM ," "0,1"
|
|
bitfld.long 0x00 18. " ESVL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ERSVLM ," "0,1"
|
|
bitfld.long 0x00 20. " DOVLTC ," "0,1"
|
|
bitfld.long 0x00 21.--22. " EVLS ," "0,1,2,3"
|
|
bitfld.long 0x00 24. " EVLRXS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VTHM ," "0,1"
|
|
bitfld.long 0x00 26. " EDVLP ," "0,1"
|
|
bitfld.long 0x00 27. " ERIVLT ," "0,1"
|
|
bitfld.long 0x00 28.--29. " EIVLS ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 31. " EIVLRXS ," "0,1"
|
|
group 0x58++0x03
|
|
line.long 0x00 "MAC_VLAN_HASH_TABLE,"
|
|
hexmask.long.word 0x00 0.--15. 1. " VLHT ,"
|
|
group 0x60++0x03
|
|
line.long 0x00 "MAC_VLAN_INCL,"
|
|
hexmask.long.word 0x00 0.--15. 1. " VLT ,"
|
|
bitfld.long 0x00 16.--17. " VLC ," "0,1,2,3"
|
|
bitfld.long 0x00 18. " VLP ," "0,1"
|
|
bitfld.long 0x00 19. " CSVL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " VLTI ," "0,1"
|
|
hexmask.long.word 0x00 21.--31. 1. " RESRVED ,"
|
|
group 0x64++0x03
|
|
line.long 0x00 "MAC_INNER_VLAN_INCL,"
|
|
hexmask.long.word 0x00 0.--15. 1. " VLT ,"
|
|
bitfld.long 0x00 16.--17. " VLC ," "0,1,2,3"
|
|
bitfld.long 0x00 18. " VLP ," "0,1"
|
|
bitfld.long 0x00 19. " CSVL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " VLTI ," "0,1"
|
|
group 0x70++0x03
|
|
line.long 0x00 "MAC_Q0_TX_FLOW_CTRL,"
|
|
bitfld.long 0x00 0. " FCB_BPA ," "0,1"
|
|
bitfld.long 0x00 1. " TFE ," "0,1"
|
|
bitfld.long 0x00 4.--5. " PLT ," "0,1,2,3"
|
|
bitfld.long 0x00 7. " DZPQ ," "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--31. 1. " PT ,"
|
|
group 0x74++0x03
|
|
line.long 0x00 "MAC_Q1_TX_FLOW_CTRL,"
|
|
bitfld.long 0x00 0. " FCB_BPA ," "0,1"
|
|
bitfld.long 0x00 1. " TFE ," "0,1"
|
|
bitfld.long 0x00 4.--5. " PLT ," "0,1,2,3"
|
|
bitfld.long 0x00 7. " DZPQ ," "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--31. 1. " PT ,"
|
|
group 0x78++0x03
|
|
line.long 0x00 "MAC_Q2_TX_FLOW_CTRL,"
|
|
bitfld.long 0x00 0. " FCB_BPA ," "0,1"
|
|
bitfld.long 0x00 1. " TFE ," "0,1"
|
|
bitfld.long 0x00 4.--5. " PLT ," "0,1,2,3"
|
|
bitfld.long 0x00 7. " DZPQ ," "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--31. 1. " PT ,"
|
|
group 0x90++0x03
|
|
line.long 0x00 "MAC_RX_FLOW_CTRL,"
|
|
bitfld.long 0x00 0. " RFE ," "0,1"
|
|
bitfld.long 0x00 1. " UP ," "0,1"
|
|
bitfld.long 0x00 8. " PFCE ," "0,1"
|
|
group 0x98++0x03
|
|
line.long 0x00 "MAC_TXQ_PRTY_MAP0,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PSTQ0 ,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PSTQ1 ,"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PSTQ2 ,"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PSTQ3 ,"
|
|
group 0xA0++0x03
|
|
line.long 0x00 "MAC_RXQ_CTRL0,"
|
|
bitfld.long 0x00 0.--1. " RXQ0EN ," "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " RXQ1EN ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " RXQ2EN ," "0,1,2,3"
|
|
group 0xA4++0x03
|
|
line.long 0x00 "MAC_RXQ_CTRL1,"
|
|
bitfld.long 0x00 0.--2. " AVCPQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " AVPTPQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. " RESRVED ," "0,1"
|
|
bitfld.long 0x00 8.--10. " DCBCPQ ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " UPQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " MCBCQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20. " MCBCQEN ," "0,1"
|
|
group 0xA8++0x03
|
|
line.long 0x00 "MAC_RXQ_CTRL2,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PSRQ0 ,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PSRQ1 ,"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PSRQ2 ,"
|
|
rgroup 0xB0++0x03
|
|
line.long 0x00 "MAC_INTERRUPT_STATUS,"
|
|
bitfld.long 0x00 0. " RGSMIIIS ," "0,1"
|
|
bitfld.long 0x00 1. " RESERVED_PCSLCHGIS ," "0,1"
|
|
bitfld.long 0x00 2. " RESERVED_PCSANICS ," "0,1"
|
|
bitfld.long 0x00 3. " PHYIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PMTIS ," "0,1"
|
|
bitfld.long 0x00 5. " LPIIS ," "0,1"
|
|
bitfld.long 0x00 8. " RESERVED_MMCIS ," "0,1"
|
|
bitfld.long 0x00 9. " RESERVED_MMCRXIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RESERVED_MMCTXIS ," "0,1"
|
|
bitfld.long 0x00 11. " RESERVED_MMCRXIPIS ," "0,1"
|
|
bitfld.long 0x00 12. " TSIS ," "0,1"
|
|
bitfld.long 0x00 13. " TXSTSIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RXSTSIS ," "0,1"
|
|
bitfld.long 0x00 15. " RESERVED_GPIIS ," "0,1"
|
|
group 0xB4++0x03
|
|
line.long 0x00 "MAC_INTERRUPT_ENABLE,"
|
|
bitfld.long 0x00 0. " RGSMIIIE ," "0,1"
|
|
bitfld.long 0x00 3. " PHYIE ," "0,1"
|
|
bitfld.long 0x00 4. " PMTIE ," "0,1"
|
|
bitfld.long 0x00 5. " LPIIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TSIE ," "0,1"
|
|
bitfld.long 0x00 13. " TXSTSIE ," "0,1"
|
|
bitfld.long 0x00 14. " RXSTSIE ," "0,1"
|
|
rgroup 0xB8++0x03
|
|
line.long 0x00 "MAC_RX_TX_STATUS,"
|
|
bitfld.long 0x00 0. " TJT ," "0,1"
|
|
bitfld.long 0x00 1. " NCARR ," "0,1"
|
|
bitfld.long 0x00 2. " LCARR ," "0,1"
|
|
bitfld.long 0x00 3. " EXDEF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCOL ," "0,1"
|
|
bitfld.long 0x00 5. " EXCOL ," "0,1"
|
|
bitfld.long 0x00 8. " RWT ," "0,1"
|
|
group 0xC0++0x03
|
|
line.long 0x00 "MAC_PMT_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " PWRDWN ," "0,1"
|
|
bitfld.long 0x00 1. " MGKPKTEN ," "0,1"
|
|
bitfld.long 0x00 2. " RWKPKTEN ," "0,1"
|
|
bitfld.long 0x00 5. " MGKPRCVD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RWKPRCVD ," "0,1"
|
|
bitfld.long 0x00 9. " GLBLUCAST ," "0,1"
|
|
bitfld.long 0x00 10. " RWKPFE ," "0,1"
|
|
bitfld.long 0x00 24.--28. " RWKPTR ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 31. " RWKFILTRST ," "0,1"
|
|
group 0xC4++0x03
|
|
line.long 0x00 "MAC_RWK_PACKET_FILTER,"
|
|
hexmask.long 0x00 0.--31. 1. " WKUPFRMFTR ,"
|
|
group 0xD0++0x03
|
|
line.long 0x00 "MAC_LPI_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " TLPIEN ," "0,1"
|
|
bitfld.long 0x00 1. " TLPIEX ," "0,1"
|
|
bitfld.long 0x00 2. " RLPIEN ," "0,1"
|
|
bitfld.long 0x00 3. " RLPIEX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TLPIST ," "0,1"
|
|
bitfld.long 0x00 9. " RLPIST ," "0,1"
|
|
bitfld.long 0x00 16. " LPIEN ," "0,1"
|
|
bitfld.long 0x00 17. " PLS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LPITXA ," "0,1"
|
|
bitfld.long 0x00 20. " LPITE ," "0,1"
|
|
bitfld.long 0x00 21. " LPITCSE ," "0,1"
|
|
group 0xD4++0x03
|
|
line.long 0x00 "MAC_LPI_TIMERS_CONTROL,"
|
|
hexmask.long.word 0x00 0.--15. 1. " TWT ,"
|
|
hexmask.long.word 0x00 16.--25. 1. " LST ,"
|
|
group 0xD8++0x03
|
|
line.long 0x00 "MAC_LPI_ENTRY_TIMER,"
|
|
hexmask.long.tbyte 0x00 3.--19. 1. " LPIET ,"
|
|
group 0xDC++0x03
|
|
line.long 0x00 "MAC_1US_TIC_COUNTER,"
|
|
hexmask.long.word 0x00 0.--11. 1. " TIC_1US_CNTR ,"
|
|
group 0xF8++0x03
|
|
line.long 0x00 "MAC_PHYIF_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " TC ," "0,1"
|
|
bitfld.long 0x00 1. " LUD ," "0,1"
|
|
bitfld.long 0x00 2. " RESERVED_SFTERR ," "0,1"
|
|
bitfld.long 0x00 4. " RESERVED_SMIDRXS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LNKMOD ," "0,1"
|
|
bitfld.long 0x00 17.--18. " LNKSPEED ," "0,1,2,3"
|
|
bitfld.long 0x00 19. " LNKSTS ," "0,1"
|
|
bitfld.long 0x00 20. " JABTO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FALSCARDET ," "0,1"
|
|
rgroup 0x110++0x03
|
|
line.long 0x00 "MAC_VERSION,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SNPSVER ,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " USERVER ,"
|
|
rgroup 0x114++0x03
|
|
line.long 0x00 "MAC_DEBUG,"
|
|
bitfld.long 0x00 0. " RPESTS ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RFCFCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 16. " TPESTS ," "0,1"
|
|
bitfld.long 0x00 17.--18. " TFCSTS ," "0,1,2,3"
|
|
rgroup 0x11C++0x03
|
|
line.long 0x00 "MAC_HW_FEATURE0,"
|
|
bitfld.long 0x00 0. " MIISEL ," "0,1"
|
|
bitfld.long 0x00 1. " GMIISEL ," "0,1"
|
|
bitfld.long 0x00 2. " HDSEL ," "0,1"
|
|
bitfld.long 0x00 3. " PCSSEL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VLHASH ," "0,1"
|
|
bitfld.long 0x00 5. " SMASEL ," "0,1"
|
|
bitfld.long 0x00 6. " RWKSEL ," "0,1"
|
|
bitfld.long 0x00 7. " MGKSEL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MMCSEL ," "0,1"
|
|
bitfld.long 0x00 9. " ARPOFFSEL ," "0,1"
|
|
bitfld.long 0x00 12. " TSSEL ," "0,1"
|
|
bitfld.long 0x00 13. " EEESEL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXCOESEL ," "0,1"
|
|
bitfld.long 0x00 16. " RXCOESEL ," "0,1"
|
|
bitfld.long 0x00 18.--22. " ADDMACADRSEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 23. " MACADR32SEL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " MACADR64SEL ," "0,1"
|
|
bitfld.long 0x00 25.--26. " TSSTSSEL ," "0,1,2,3"
|
|
bitfld.long 0x00 27. " SAVLANINS ," "0,1"
|
|
bitfld.long 0x00 28.--30. " ACTPHYSEL ," "0,1,2,3,4,5,6,7"
|
|
rgroup 0x120++0x03
|
|
line.long 0x00 "MAC_HW_FEATURE1,"
|
|
bitfld.long 0x00 0.--4. " RXFIFOSIZE ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 5. " SPRAM ," "0,1"
|
|
bitfld.long 0x00 6.--10. " TXFIFOSIZE ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 12. " OSTEN ," "0,1"
|
|
bitfld.long 0x00 13. " PTOEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ADVTHWORD ," "0,1"
|
|
bitfld.long 0x00 15.--16. " ADDR64 ," "0,1,2,3"
|
|
bitfld.long 0x00 17. " DCBEN ," "0,1"
|
|
bitfld.long 0x00 18. " SPHEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TSOEN ," "0,1"
|
|
bitfld.long 0x00 20. " DBGMEMA ," "0,1"
|
|
bitfld.long 0x00 21. " AVSEL ," "0,1"
|
|
bitfld.long 0x00 24. " LPMODEEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HASHTBLSZ ," "0,1"
|
|
bitfld.long 0x00 27.--30. " L3L4FNUM ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0x124++0x03
|
|
line.long 0x00 "MAC_HW_FEATURE2,"
|
|
bitfld.long 0x00 0.--3. " RXQCNT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " TXQCNT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " RXCHCNT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 18.--21. " TXCHCNT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " PPSOUTNUM ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 28.--30. " AUXSNAPNUM ," "0,1,2,3,4,5,6,7"
|
|
group 0x200++0x03
|
|
line.long 0x00 "MAC_MDIO_ADDRESS,"
|
|
bitfld.long 0x00 0. " GB ," "0,1"
|
|
bitfld.long 0x00 1. " C45E ," "0,1"
|
|
bitfld.long 0x00 2. " GOC_0 ," "0,1"
|
|
bitfld.long 0x00 3. " GOC_1 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SKAP ," "0,1"
|
|
bitfld.long 0x00 8.--11. " CR ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " NTC ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. " RDA ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 21.--25. " PA ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 26. " BTB ," "0,1"
|
|
bitfld.long 0x00 27. " PSE ," "0,1"
|
|
group 0x204++0x03
|
|
line.long 0x00 "MAC_MDIO_DATA,"
|
|
hexmask.long.word 0x00 0.--15. 1. " GD ,"
|
|
hexmask.long.word 0x00 16.--31. 1. " RA ,"
|
|
group 0x300++0x03
|
|
line.long 0x00 "MAC_ADDRESS0_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
bitfld.long 0x00 16. " RESERVED_DCS ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x304++0x03
|
|
line.long 0x00 "MAC_ADDRESS0_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x308++0x03
|
|
line.long 0x00 "MAC_ADDRESS1_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x30C++0x03
|
|
line.long 0x00 "MAC_ADDRESS1_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x310++0x03
|
|
line.long 0x00 "MAC_ADDRESS2_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x314++0x03
|
|
line.long 0x00 "MAC_ADDRESS2_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x318++0x03
|
|
line.long 0x00 "MAC_ADDRESS3_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x31C++0x03
|
|
line.long 0x00 "MAC_ADDRESS3_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x320++0x03
|
|
line.long 0x00 "MAC_ADDRESS4_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x324++0x03
|
|
line.long 0x00 "MAC_ADDRESS4_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x328++0x03
|
|
line.long 0x00 "MAC_ADDRESS5_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x32C++0x03
|
|
line.long 0x00 "MAC_ADDRESS5_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x330++0x03
|
|
line.long 0x00 "MAC_ADDRESS6_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x334++0x03
|
|
line.long 0x00 "MAC_ADDRESS6_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x338++0x03
|
|
line.long 0x00 "MAC_ADDRESS7_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x33C++0x03
|
|
line.long 0x00 "MAC_ADDRESS7_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x340++0x03
|
|
line.long 0x00 "MAC_ADDRESS8_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x344++0x03
|
|
line.long 0x00 "MAC_ADDRESS8_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x348++0x03
|
|
line.long 0x00 "MAC_ADDRESS9_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x34C++0x03
|
|
line.long 0x00 "MAC_ADDRESS9_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x350++0x03
|
|
line.long 0x00 "MAC_ADDRESS10_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x354++0x03
|
|
line.long 0x00 "MAC_ADDRESS10_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x358++0x03
|
|
line.long 0x00 "MAC_ADDRESS11_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x35C++0x03
|
|
line.long 0x00 "MAC_ADDRESS11_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x360++0x03
|
|
line.long 0x00 "MAC_ADDRESS12_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x364++0x03
|
|
line.long 0x00 "MAC_ADDRESS12_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x368++0x03
|
|
line.long 0x00 "MAC_ADDRESS13_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x36C++0x03
|
|
line.long 0x00 "MAC_ADDRESS13_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x370++0x03
|
|
line.long 0x00 "MAC_ADDRESS14_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x374++0x03
|
|
line.long 0x00 "MAC_ADDRESS14_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x378++0x03
|
|
line.long 0x00 "MAC_ADDRESS15_HIGH,"
|
|
hexmask.long.word 0x00 0.--15. 1. " ADDRHI ,"
|
|
hexmask.long.byte 0x00 24.--29. 1. " MBC ,"
|
|
bitfld.long 0x00 30. " SA ," "0,1"
|
|
bitfld.long 0x00 31. " AE ," "0,1"
|
|
group 0x37C++0x03
|
|
line.long 0x00 "MAC_ADDRESS15_LOW,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRLO ,"
|
|
group 0x900++0x03
|
|
line.long 0x00 "MAC_L3_L4_CONTROL0,"
|
|
bitfld.long 0x00 0. " L3PEN0 ," "0,1"
|
|
bitfld.long 0x00 2. " L3SAM0 ," "0,1"
|
|
bitfld.long 0x00 3. " L3SAIM0 ," "0,1"
|
|
bitfld.long 0x00 4. " L3DAM0 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " L3DAIM0 ," "0,1"
|
|
bitfld.long 0x00 6.--10. " L3HSBM0 ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 11.--15. " L3HDBM0 ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 16. " L4PEN0 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " L4SPM0 ," "0,1"
|
|
bitfld.long 0x00 19. " L4SPIM0 ," "0,1"
|
|
bitfld.long 0x00 20. " L4DPM0 ," "0,1"
|
|
bitfld.long 0x00 21. " L4DPIM0 ," "0,1"
|
|
group 0x904++0x03
|
|
line.long 0x00 "MAC_LAYER4_ADDRESS0,"
|
|
hexmask.long.word 0x00 0.--15. 1. " L4SP0 ,"
|
|
hexmask.long.word 0x00 16.--31. 1. " L4DP0 ,"
|
|
group 0x910++0x03
|
|
line.long 0x00 "MAC_LAYER3_ADDR0_REG0,"
|
|
hexmask.long 0x00 0.--31. 1. " L3A00 ,"
|
|
group 0x914++0x03
|
|
line.long 0x00 "MAC_LAYER3_ADDR1_REG0,"
|
|
hexmask.long 0x00 0.--31. 1. " L3A10 ,"
|
|
group 0x918++0x03
|
|
line.long 0x00 "MAC_LAYER3_ADDR2_REG0,"
|
|
hexmask.long 0x00 0.--31. 1. " L3A20 ,"
|
|
group 0x91C++0x03
|
|
line.long 0x00 "MAC_LAYER3_ADDR3_REG0,"
|
|
hexmask.long 0x00 0.--31. 1. " L3A30 ,"
|
|
group 0xB00++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_CONTROL,"
|
|
bitfld.long 0x00 0. " TSENA ," "0,1"
|
|
bitfld.long 0x00 1. " TSCFUPDT ," "0,1"
|
|
bitfld.long 0x00 2. " TSINIT ," "0,1"
|
|
bitfld.long 0x00 3. " TSUPDT ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TSTRIG ," "0,1"
|
|
bitfld.long 0x00 5. " TSADDREG ," "0,1"
|
|
bitfld.long 0x00 8. " TSENALL ," "0,1"
|
|
bitfld.long 0x00 9. " TSCTRLSSR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TSVER2ENA ," "0,1"
|
|
bitfld.long 0x00 11. " TSIPENA ," "0,1"
|
|
bitfld.long 0x00 12. " TSIPV6ENA ," "0,1"
|
|
bitfld.long 0x00 13. " TSIPV4ENA ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TSEVNTENA ," "0,1"
|
|
bitfld.long 0x00 15. " TSMSTRENA ," "0,1"
|
|
bitfld.long 0x00 16.--17. " SNAPTYPSEL ," "0,1,2,3"
|
|
bitfld.long 0x00 18. " TSENMACADDR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RESERVED_ESTI ," "0,1"
|
|
bitfld.long 0x00 24. " TXTSSTSM ," "0,1"
|
|
bitfld.long 0x00 28. " AV8021ASMEN ," "0,1"
|
|
group 0xB04++0x03
|
|
line.long 0x00 "MAC_SUB_SECOND_INCREMENT,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SNSINC ,"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SSINC ,"
|
|
rgroup 0xB08++0x03
|
|
line.long 0x00 "MAC_SYSTEM_TIME_SECONDS,"
|
|
hexmask.long 0x00 0.--31. 1. " TSS ,"
|
|
rgroup 0xB0C++0x03
|
|
line.long 0x00 "MAC_SYSTEM_TIME_NANOSECONDS,"
|
|
hexmask.long 0x00 0.--30. 1. " TSSS ,"
|
|
group 0xB10++0x03
|
|
line.long 0x00 "MAC_SYSTEM_TIME_SECONDS_UPDATE,"
|
|
hexmask.long 0x00 0.--31. 1. " TSS ,"
|
|
group 0xB14++0x03
|
|
line.long 0x00 "MAC_SYSTEM_TIME_NANOSECONDS_UPDATE,"
|
|
hexmask.long 0x00 0.--30. 1. " TSSS ,"
|
|
bitfld.long 0x00 31. " ADDSUB ," "0,1"
|
|
group 0xB18++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_ADDEND,"
|
|
hexmask.long 0x00 0.--31. 1. " TSAR ,"
|
|
group 0xB1C++0x03
|
|
line.long 0x00 "MAC_SYSTEM_TIME_HIGHER_WORD_SECONDS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " TSHWR ,"
|
|
rgroup 0xB20++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_STATUS,"
|
|
bitfld.long 0x00 0. " TSSOVF ," "0,1"
|
|
bitfld.long 0x00 1. " TSTARGT0 ," "0,1"
|
|
bitfld.long 0x00 2. " AUXTSTRIG ," "0,1"
|
|
bitfld.long 0x00 3. " TSTRGTERR0 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TSTARGT1 ," "0,1"
|
|
bitfld.long 0x00 5. " TSTRGTERR1 ," "0,1"
|
|
bitfld.long 0x00 6. " TSTARGT2 ," "0,1"
|
|
bitfld.long 0x00 7. " TSTRGTERR2 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TSTARGT3 ," "0,1"
|
|
bitfld.long 0x00 9. " TSTRGTERR3 ," "0,1"
|
|
bitfld.long 0x00 15. " TXTSSIS ," "0,1"
|
|
bitfld.long 0x00 16.--19. " ATSSTN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ATSSTM ," "0,1"
|
|
bitfld.long 0x00 25.--29. " ATSNS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
rgroup 0xB30++0x03
|
|
line.long 0x00 "MAC_TXTIMESTAMP_STATUS_NANOSECONDS,"
|
|
hexmask.long 0x00 0.--30. 1. " TXTSSTSLO ,"
|
|
bitfld.long 0x00 31. " TXTSSTSMIS ," "0,1"
|
|
rgroup 0xB34++0x03
|
|
line.long 0x00 "MAC_TXTIMESTAMP_STATUS_SECONDS,"
|
|
hexmask.long 0x00 0.--31. 1. " TXTSSTSHI ,"
|
|
group 0xB40++0x03
|
|
line.long 0x00 "MAC_AUXILIARY_CONTROL,"
|
|
bitfld.long 0x00 0. " ATSFC ," "0,1"
|
|
bitfld.long 0x00 4. " ATSEN0 ," "0,1"
|
|
bitfld.long 0x00 5. " ATSEN1 ," "0,1"
|
|
rgroup 0xB48++0x03
|
|
line.long 0x00 "MAC_AUXILIARY_TIMESTAMP_NANOSECONDS,"
|
|
hexmask.long 0x00 0.--30. 1. " AUXTSLO ,"
|
|
rgroup 0xB4C++0x03
|
|
line.long 0x00 "MAC_AUXILIARY_TIMESTAMP_SECONDS,"
|
|
hexmask.long 0x00 0.--31. 1. " AUXTSHI ,"
|
|
group 0xB50++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_INGRESS_ASYM_CORR,"
|
|
hexmask.long 0x00 0.--31. 1. " OSTIAC ,"
|
|
group 0xB54++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_EGRESS_ASYM_CORR,"
|
|
hexmask.long 0x00 0.--31. 1. " OSTEAC ,"
|
|
group 0xB58++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_INGRESS_CORR_NANOSECOND,"
|
|
hexmask.long 0x00 0.--31. 1. " TSIC ,"
|
|
group 0xB5C++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_EGRESS_CORR_NANOSECOND,"
|
|
hexmask.long 0x00 0.--31. 1. " TSEC ,"
|
|
group 0xB60++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_INGRESS_CORR_SUBNANOSEC,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TSICSNS ,"
|
|
group 0xB64++0x03
|
|
line.long 0x00 "MAC_TIMESTAMP_EGRESS_CORR_SUBNANOSEC,"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TSECSNS ,"
|
|
group 0xB70++0x03
|
|
line.long 0x00 "MAC_PPS_CONTROL,"
|
|
bitfld.long 0x00 0.--3. " PPSCTRL_PPSCMD ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " PPSEN0 ," "0,1"
|
|
bitfld.long 0x00 5.--6. " TRGTMODSEL0 ," "0,1,2,3"
|
|
group 0xB80++0x03
|
|
line.long 0x00 "MAC_PPS0_TARGET_TIME_SECONDS,"
|
|
hexmask.long 0x00 0.--31. 1. " TSTRH0 ,"
|
|
group 0xB84++0x03
|
|
line.long 0x00 "MAC_PPS0_TARGET_TIME_NANOSECONDS,"
|
|
hexmask.long 0x00 0.--30. 1. " TTSL0 ,"
|
|
bitfld.long 0x00 31. " TRGTBUSY0 ," "0,1"
|
|
group 0xB88++0x03
|
|
line.long 0x00 "MAC_PPS0_INTERVAL,"
|
|
hexmask.long 0x00 0.--31. 1. " PPSINT0 ,"
|
|
group 0xB8C++0x03
|
|
line.long 0x00 "MAC_PPS0_WIDTH,"
|
|
hexmask.long 0x00 0.--31. 1. " PPSWIDTH0 ,"
|
|
group 0xBC0++0x03
|
|
line.long 0x00 "MAC_PTO_CONTROL,"
|
|
bitfld.long 0x00 0. " PTOEN ," "0,1"
|
|
bitfld.long 0x00 1. " ASYNCEN ," "0,1"
|
|
bitfld.long 0x00 2. " APDREQEN ," "0,1"
|
|
bitfld.long 0x00 4. " ASYNCTRIG ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " APDREQTRIG ," "0,1"
|
|
bitfld.long 0x00 6. " DRRDIS ," "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DN ,"
|
|
group 0xBC4++0x03
|
|
line.long 0x00 "MAC_SOURCE_PORT_IDENTITY0,"
|
|
hexmask.long 0x00 0.--31. 1. " SPI0 ,"
|
|
group 0xBC8++0x03
|
|
line.long 0x00 "MAC_SOURCE_PORT_IDENTITY1,"
|
|
hexmask.long 0x00 0.--31. 1. " SPI1 ,"
|
|
group 0xBCC++0x03
|
|
line.long 0x00 "MAC_SOURCE_PORT_IDENTITY2,"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPI2 ,"
|
|
group 0xBD0++0x03
|
|
line.long 0x00 "MAC_LOG_MESSAGE_INTERVAL,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LSI ,"
|
|
bitfld.long 0x00 8.--10. " DRSYNCR ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " LMPDRI ,"
|
|
group 0x700++0x03
|
|
line.long 0x00 "MMC_CONTROL,"
|
|
bitfld.long 0x00 0. " CNTRST ," "0,1"
|
|
bitfld.long 0x00 1. " CNTSTOPRO ," "0,1"
|
|
bitfld.long 0x00 2. " RSTONRD ," "0,1"
|
|
bitfld.long 0x00 3. " CNTFREEZ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CNTPRST ," "0,1"
|
|
bitfld.long 0x00 5. " CNTPRSTLVL ," "0,1"
|
|
bitfld.long 0x00 8. " UCDBC ," "0,1"
|
|
rgroup 0x704++0x03
|
|
line.long 0x00 "MMC_RX_INTERRUPT,"
|
|
bitfld.long 0x00 0. " RXGBPKTIS ," "0,1"
|
|
bitfld.long 0x00 5. " RXCRCERPIS ," "0,1"
|
|
bitfld.long 0x00 6. " RXALGNERPIS ," "0,1"
|
|
bitfld.long 0x00 7. " RXRUNTPIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXJABERPIS ," "0,1"
|
|
bitfld.long 0x00 9. " RXUSIZEGPIS ," "0,1"
|
|
bitfld.long 0x00 10. " RXOSIZEGPIS ," "0,1"
|
|
bitfld.long 0x00 18. " RXLENERPIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RXORANGEPIS ," "0,1"
|
|
bitfld.long 0x00 20. " RXPAUSPIS ," "0,1"
|
|
bitfld.long 0x00 21. " RXFOVPIS ," "0,1"
|
|
bitfld.long 0x00 22. " RXVLANGBPIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXWDOGPIS ," "0,1"
|
|
bitfld.long 0x00 24. " RXRCVERRPIS ," "0,1"
|
|
bitfld.long 0x00 25. " RXCTRLPIS ," "0,1"
|
|
rgroup 0x708++0x03
|
|
line.long 0x00 "MMC_TX_INTERRUPT,"
|
|
bitfld.long 0x00 1. " TXGBPKTIS ," "0,1"
|
|
bitfld.long 0x00 13. " TXUFLOWERPIS ," "0,1"
|
|
bitfld.long 0x00 21. " TXGPKTIS ," "0,1"
|
|
bitfld.long 0x00 25. " TXOSIZEGPIS ," "0,1"
|
|
group 0x70C++0x03
|
|
line.long 0x00 "MMC_RX_INTERRUPT_MASK,"
|
|
bitfld.long 0x00 0. " RXGBPKTIM ," "0,1"
|
|
bitfld.long 0x00 5. " RXCRCERPIM ," "0,1"
|
|
bitfld.long 0x00 6. " RXALGNERPIM ," "0,1"
|
|
bitfld.long 0x00 7. " RXRUNTPIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXJABERPIM ," "0,1"
|
|
bitfld.long 0x00 9. " RXUSIZEGPIM ," "0,1"
|
|
bitfld.long 0x00 10. " RXOSIZEGPIM ," "0,1"
|
|
bitfld.long 0x00 18. " RXLENERPIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RXORANGEPIM ," "0,1"
|
|
bitfld.long 0x00 20. " RXPAUSPIM ," "0,1"
|
|
bitfld.long 0x00 21. " RXFOVPIM ," "0,1"
|
|
bitfld.long 0x00 22. " RXVLANGBPIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RXWDOGPIM ," "0,1"
|
|
bitfld.long 0x00 24. " RXRCVERRPIM ," "0,1"
|
|
bitfld.long 0x00 25. " RXCTRLPIM ," "0,1"
|
|
group 0x710++0x03
|
|
line.long 0x00 "MMC_TX_INTERRUPT_MASK,"
|
|
bitfld.long 0x00 1. " TXGBPKTIM ," "0,1"
|
|
bitfld.long 0x00 13. " TXUFLOWERPIM ," "0,1"
|
|
bitfld.long 0x00 21. " TXGPKTIM ," "0,1"
|
|
bitfld.long 0x00 25. " TXOSIZEGPIM ," "0,1"
|
|
rgroup 0x718++0x03
|
|
line.long 0x00 "TX_PACKET_COUNT_GOOD_BAD,"
|
|
hexmask.long 0x00 0.--31. 1. " TXPKTGB ,"
|
|
rgroup 0x748++0x03
|
|
line.long 0x00 "TX_UNDERFLOW_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXUNDRFLW ,"
|
|
rgroup 0x768++0x03
|
|
line.long 0x00 "TX_PACKET_COUNT_GOOD,"
|
|
hexmask.long 0x00 0.--31. 1. " TXPKTG ,"
|
|
rgroup 0x778++0x03
|
|
line.long 0x00 "TX_OSIZE_PACKETS_GOOD,"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXOSIZG ,"
|
|
rgroup 0x780++0x03
|
|
line.long 0x00 "RX_PACKETS_COUNT_GOOD_BAD,"
|
|
hexmask.long 0x00 0.--31. 1. " RXPKTGB ,"
|
|
rgroup 0x794++0x03
|
|
line.long 0x00 "RX_CRC_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXCRCERR ,"
|
|
rgroup 0x798++0x03
|
|
line.long 0x00 "RX_ALIGNMENT_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXALGNERR ,"
|
|
rgroup 0x79C++0x03
|
|
line.long 0x00 "RX_RUNT_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXRUNTERR ,"
|
|
rgroup 0x7A0++0x03
|
|
line.long 0x00 "RX_JABBER_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXJABERR ,"
|
|
rgroup 0x7A4++0x03
|
|
line.long 0x00 "RX_UNDERSIZE_PACKETS_GOOD,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXUNDERSZG ,"
|
|
rgroup 0x7A8++0x03
|
|
line.long 0x00 "RX_OVERSIZE_PACKETS_GOOD,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXOVERSZG ,"
|
|
rgroup 0x7C8++0x03
|
|
line.long 0x00 "RX_LENGTH_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXLENERR ,"
|
|
rgroup 0x7CC++0x03
|
|
line.long 0x00 "RX_OUT_OF_RANGE_TYPE_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXOUTOFRNG ,"
|
|
rgroup 0x7D0++0x03
|
|
line.long 0x00 "RX_PAUSE_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXPAUSEPKT ,"
|
|
rgroup 0x7D4++0x03
|
|
line.long 0x00 "RX_FIFO_OVERFLOW_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXFIFOOVFL ,"
|
|
rgroup 0x7D8++0x03
|
|
line.long 0x00 "RX_VLAN_PACKETS_GOOD_BAD,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXVLANPKTGB ,"
|
|
rgroup 0x7DC++0x03
|
|
line.long 0x00 "RX_WATCHDOG_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXWDGERR ,"
|
|
rgroup 0x7E0++0x03
|
|
line.long 0x00 "RX_RECEIVE_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXRCVERR ,"
|
|
rgroup 0x7E4++0x03
|
|
line.long 0x00 "RX_CONTROL_PACKETS_GOOD,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXCTRLG ,"
|
|
group 0x800++0x03
|
|
line.long 0x00 "MMC_IPC_RX_INTERRUPT_MASK,"
|
|
bitfld.long 0x00 0. " RXIPV4GPIM ," "0,1"
|
|
bitfld.long 0x00 1. " RXIPV4HERPIM ," "0,1"
|
|
bitfld.long 0x00 2. " RXIPV4NOPAYPIM ," "0,1"
|
|
bitfld.long 0x00 3. " RXIPV4FRAGPIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXIPV6GPIM ," "0,1"
|
|
bitfld.long 0x00 7. " RXIPV6NOPAYPIM ," "0,1"
|
|
rgroup 0x808++0x03
|
|
line.long 0x00 "MMC_IPC_RX_INTERRUPT,"
|
|
bitfld.long 0x00 0. " RXIPV4GPIS ," "0,1"
|
|
bitfld.long 0x00 1. " RXIPV4HERPIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXIPV4NOPAYPIS ," "0,1"
|
|
bitfld.long 0x00 3. " RXIPV4FRAGPIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXIPV6GPIS ," "0,1"
|
|
bitfld.long 0x00 7. " RXIPV6NOPAYPIS ," "0,1"
|
|
rgroup 0x810++0x03
|
|
line.long 0x00 "RXIPV4_GOOD_PACKETS,"
|
|
hexmask.long 0x00 0.--31. 1. " RXIPV4GDPKT ,"
|
|
rgroup 0x814++0x03
|
|
line.long 0x00 "RXIPV4_HEADER_ERROR_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXIPV4HDRERRPKT ,"
|
|
rgroup 0x818++0x03
|
|
line.long 0x00 "RXIPV4_NO_PAYLOAD_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXIPV4NOPAYPKT ,"
|
|
rgroup 0x81C++0x03
|
|
line.long 0x00 "RXIPV4_FRAGMENTED_PACKETS,"
|
|
hexmask.long 0x00 0.--31. 1. " RXIPV4FRAGPKT ,"
|
|
rgroup 0x824++0x03
|
|
line.long 0x00 "RXIPV6_GOOD_PACKETS,"
|
|
hexmask.long 0x00 0.--31. 1. " RXIPV6GDPKT ,"
|
|
rgroup 0x82C++0x03
|
|
line.long 0x00 "RXIPV6_NO_PAYLOAD_PACKETS,"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXIPV6NOPAYPKT ,"
|
|
group 0xC00++0x03
|
|
line.long 0x00 "MTL_OPERATION_MODE,"
|
|
bitfld.long 0x00 1. " DTXSTS ," "0,1"
|
|
bitfld.long 0x00 2. " RAA ," "0,1"
|
|
bitfld.long 0x00 5.--6. " SCHALG ," "0,1,2,3"
|
|
bitfld.long 0x00 8. " CNTPRST ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CNTCLR ," "0,1"
|
|
group 0xC08++0x03
|
|
line.long 0x00 "MTL_DBG_CTL,The FIFO Debug Access Control and Status register controls the operation mode of FIFO debug access."
|
|
bitfld.long 0x00 0. " FDBGEN ,FIFO Debug Access Enable When this bit is set, it indicates that the debug mode access to the FIFO is enabled. When this bit is reset, it indicates that the FIFO can be accessed only through a master interface." "0,1"
|
|
bitfld.long 0x00 1. " DBGMOD ,Debug Mode Access to FIFO When this bit is set, it indicates that the current access to the FIFO is read, write, and debug access." "0,1"
|
|
bitfld.long 0x00 2.--3. " BYTEEN ,Byte Enables. Indicates the number of data bytes valid in the data register during Write operation. - 00: Byte 0 valid - 01: Byte 0 and Byte 1 are valid - 10: Byte 0, Byte 1, and Byte 2 are valid - 11: All four bytes are valid" "0,1,2,3"
|
|
bitfld.long 0x00 4. " Reserved_4 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " PKTSTATE ,Encoded Packet State. Tx FIFO: - 00: Packet Data - 01: Control Word - 10: SOP Data - 11: EOP Data Rx FIFO: - 00: Packet Data - 01: Normal Status - 10: Last Status - 11: EOP" "0,1,2,3"
|
|
bitfld.long 0x00 7. " Reserved_7 ," "0,1"
|
|
bitfld.long 0x00 8. " RSTALL ,Reset All Pointers When this bit is set, the pointers of all FIFOs are reset when FIFO Debug Access is enabled. Access restriction applies. Self-cleared. Setting 0 clears. Setting 1 sets." "0,1"
|
|
bitfld.long 0x00 9. " RSTSEL ,Reset Pointers of Selected FIFO When this bit is set, the pointers of the currently-selected FIFO are reset when FIFO Debug Access is enabled. Access restriction applies. Self-cleared. Setting 0 clears. Setting 1 sets." "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FIFORDEN ,FIFO Read Enable When this bit is set, it enables the Read operation on selected FIFO when FIFO Debug Access is enabled. Access restriction applies. Self-cleared. Setting 0 clears. Setting 1 sets." "0,1"
|
|
bitfld.long 0x00 11. " FIFOWREN ,FIFO Write Enable When this bit is set, it enables the Write operation on selected FIFO when FIFO Debug Access is enabled. Access restriction applies. Self-cleared. Setting 0 clears. Setting 1 sets." "0,1"
|
|
bitfld.long 0x00 12.--13. " FIFOSEL ,FIFO Selected for Access This field indicates the FIFO selected for debug access: - 00: Tx FIFO - 01: Tx Status FIFO (only read access when SLVMOD is set) - 10: TSO FIFO (cannot be accessed when SLVMOD is set) - 11: Rx FIFO" "0,1,2,3"
|
|
bitfld.long 0x00 14. " PKTIE ,Receive Packet Available Interrupt Status Enable When this bit is set, an interrupt is generated when EOP of received packet is written to the Rx FIFO." "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STSIE ,Transmit Status Available Interrupt Status Enable When this bit is set, an interrupt is generated when Transmit status is available in slave mode." "0,1"
|
|
hexmask.long.word 0x00 16.--31. 1. " Reserved_31_16 ,"
|
|
group 0xC0C++0x03
|
|
line.long 0x00 "MTL_DBG_STS,The FIFO Debug Status register contains the status of FIFO debug access."
|
|
bitfld.long 0x00 0. " FIFOBUSY ,FIFO Busy When set, this bit indicates that a FIFO operation is in progress in the MAC and content of the following fields is not valid: - All other fields of this register - All fields of the MTL_FIFO_Debug_Data register" "0,1"
|
|
bitfld.long 0x00 1.--2. " PKTSTATE ,Encoded Packet State. Tx FIFO: - 00: Packet Data - 01: Control Word - 10: SOP Data - 11: EOP Data Rx FIFO: - 00: Packet Data - 01: Normal Status - 10: Last Status - 11: EOP" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. " BYTEEN ,Byte Enables - 00: Byte 0 valid - 01: Byte 0 and Byte 1 are valid - 10: Byte 0, Byte 1, and Byte 2 are valid - 11: All four bytes are valid" "0,1,2,3"
|
|
bitfld.long 0x00 5.--7. " Reserved_7_5 ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PKTI ,Receive Packet Available Interrupt Status When set, this bit indicates that MAC layer has written the EOP of received packet to the Rx FIFO. This bit is reset when 1 is written to this bit." "0,1"
|
|
bitfld.long 0x00 9. " STSI ,Transmit Status Available Interrupt Status When set, this bit indicates that the Slave mode Tx packet is transmitted, and the status is available in Tx Status FIFO. This bit is reset when 1 is written to this bit." "0,1"
|
|
bitfld.long 0x00 10.--14. " Reserved_14_10 ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
hexmask.long.tbyte 0x00 15.--31. 1. " LOCR ,Remaining Locations in the FIFO"
|
|
group 0xC10++0x03
|
|
line.long 0x00 "MTL_FIFO_Debug_Data,The FIFO Debug Data register contains the data to be written to or read from the FIFOs."
|
|
hexmask.long 0x00 0.--31. 1. " FDBGDATA ,FIFO Debug Data"
|
|
rgroup 0xC20++0x03
|
|
line.long 0x00 "MTL_INTERRUPT_STATUS,"
|
|
bitfld.long 0x00 0. " Q0IS ," "0,1"
|
|
bitfld.long 0x00 1. " Q1IS ," "0,1"
|
|
bitfld.long 0x00 2. " Q2IS ," "0,1"
|
|
bitfld.long 0x00 3. " Q3IS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Q4IS ," "0,1"
|
|
bitfld.long 0x00 5. " Q5IS ," "0,1"
|
|
bitfld.long 0x00 6. " Q6IS ," "0,1"
|
|
bitfld.long 0x00 7. " Q7IS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MACIS ," "0,1"
|
|
bitfld.long 0x00 17. " DBGIS ," "0,1"
|
|
group 0xD00++0x03
|
|
line.long 0x00 "MTL_TXQ0_OPERATION_MODE,"
|
|
bitfld.long 0x00 0. " FTQ ," "0,1"
|
|
bitfld.long 0x00 1. " TSF ," "0,1"
|
|
bitfld.long 0x00 2.--3. " TXQEN ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " TTC ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--21. 1. " TQS ,"
|
|
rgroup 0xD04++0x03
|
|
line.long 0x00 "MTL_TXQ0_UNDERFLOW,"
|
|
hexmask.long.word 0x00 0.--10. 1. " UFFRMCNT ,"
|
|
bitfld.long 0x00 11. " UFCNTOVF ," "0,1"
|
|
rgroup 0xD08++0x03
|
|
line.long 0x00 "MTL_TXQ0_DEBUG,"
|
|
bitfld.long 0x00 0. " TXQPAUSED ," "0,1"
|
|
bitfld.long 0x00 1.--2. " TRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " TWCSTS ," "0,1"
|
|
bitfld.long 0x00 4. " TXQSTS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXSTSFSTS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " PTXQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " STXSTSF ," "0,1,2,3,4,5,6,7"
|
|
rgroup 0xD14++0x03
|
|
line.long 0x00 "MTL_TXQ0_ETS_STATUS,"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ABS ,"
|
|
group 0xD18++0x03
|
|
line.long 0x00 "MTL_TXQ0_QUANTUM_WEIGHT,"
|
|
hexmask.long.tbyte 0x00 0.--20. 1. " ISCQW ,"
|
|
group 0xD2C++0x03
|
|
line.long 0x00 "MTL_Q0_INTERRUPT_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " TXUNFIS ," "0,1"
|
|
bitfld.long 0x00 1. " ABPSIS ," "0,1"
|
|
bitfld.long 0x00 8. " TXUIE ," "0,1"
|
|
bitfld.long 0x00 9. " ABPSIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXOVFIS ," "0,1"
|
|
bitfld.long 0x00 24. " RXOIE ," "0,1"
|
|
group 0xD30++0x03
|
|
line.long 0x00 "MTL_RXQ0_OPERATION_MODE,"
|
|
bitfld.long 0x00 0.--1. " RTC ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " FUP ," "0,1"
|
|
bitfld.long 0x00 4. " FEP ," "0,1"
|
|
bitfld.long 0x00 5. " RSF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DIS_TCP_EF ," "0,1"
|
|
bitfld.long 0x00 7. " EHFC ," "0,1"
|
|
hexmask.long.byte 0x00 8.--13. 1. " RFA ,"
|
|
hexmask.long.byte 0x00 14.--19. 1. " RFD ,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 20.--26. 1. " RQS ,"
|
|
rgroup 0xD34++0x03
|
|
line.long 0x00 "MTL_RXQ0_MISSED_PACKET_OVERFLOW_CNT,"
|
|
hexmask.long.word 0x00 0.--10. 1. " OVFPKTCNT ,"
|
|
bitfld.long 0x00 11. " OVFCNTOVF ," "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MISPKTCNT ,"
|
|
bitfld.long 0x00 27. " MISCNTOVF ," "0,1"
|
|
rgroup 0xD38++0x03
|
|
line.long 0x00 "MTL_RXQ0_DEBUG,"
|
|
bitfld.long 0x00 0. " RWCSTS ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " RXQSTS ," "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--29. 1. " PRXQ ,"
|
|
group 0xD3C++0x03
|
|
line.long 0x00 "MTL_RXQ0_CONTROL,"
|
|
bitfld.long 0x00 0.--2. " RXQ_WEGT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " RXQ_FRM_ARBIT ," "0,1"
|
|
group 0xD40++0x03
|
|
line.long 0x00 "MTL_TXQ1_OPERATION_MODE,"
|
|
bitfld.long 0x00 0. " FTQ ," "0,1"
|
|
bitfld.long 0x00 1. " TSF ," "0,1"
|
|
bitfld.long 0x00 2.--3. " TXQEN ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " TTC ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--21. 1. " TQS ,"
|
|
rgroup 0xD44++0x03
|
|
line.long 0x00 "MTL_TXQ1_UNDERFLOW,"
|
|
hexmask.long.word 0x00 0.--10. 1. " UFFRMCNT ,"
|
|
bitfld.long 0x00 11. " UFCNTOVF ," "0,1"
|
|
rgroup 0xD48++0x03
|
|
line.long 0x00 "MTL_TXQ1_DEBUG,"
|
|
bitfld.long 0x00 0. " TXQPAUSED ," "0,1"
|
|
bitfld.long 0x00 1.--2. " TRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " TWCSTS ," "0,1"
|
|
bitfld.long 0x00 4. " TXQSTS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXSTSFSTS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " PTXQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " STXSTSF ," "0,1,2,3,4,5,6,7"
|
|
group 0xD50++0x03
|
|
line.long 0x00 "MTL_TXQ1_ETS_CONTROL,"
|
|
bitfld.long 0x00 2. " AVALG ," "0,1"
|
|
bitfld.long 0x00 3. " CC ," "0,1"
|
|
bitfld.long 0x00 4.--6. " SLC ," "0,1,2,3,4,5,6,7"
|
|
rgroup 0xD54++0x03
|
|
line.long 0x00 "MTL_TXQ1_ETS_STATUS,"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ABS ,"
|
|
group 0xD58++0x03
|
|
line.long 0x00 "MTL_TXQ1_QUANTUM_WEIGHT,"
|
|
hexmask.long.tbyte 0x00 0.--20. 1. " ISCQW ,"
|
|
group 0xD5C++0x03
|
|
line.long 0x00 "MTL_TXQ1_SENDSLOPECREDIT,"
|
|
hexmask.long.word 0x00 0.--13. 1. " SSC ,"
|
|
group 0xD60++0x03
|
|
line.long 0x00 "MTL_TXQ1_HICREDIT,"
|
|
hexmask.long 0x00 0.--28. 1. " HC ,"
|
|
group 0xD64++0x03
|
|
line.long 0x00 "MTL_TXQ1_LOCREDIT,"
|
|
hexmask.long 0x00 0.--28. 1. " LC ,"
|
|
group 0xD6C++0x03
|
|
line.long 0x00 "MTL_Q1_INTERRUPT_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " TXUNFIS ," "0,1"
|
|
bitfld.long 0x00 1. " ABPSIS ," "0,1"
|
|
bitfld.long 0x00 8. " TXUIE ," "0,1"
|
|
bitfld.long 0x00 9. " ABPSIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXOVFIS ," "0,1"
|
|
bitfld.long 0x00 24. " RXOIE ," "0,1"
|
|
group 0xD70++0x03
|
|
line.long 0x00 "MTL_RXQ1_OPERATION_MODE,"
|
|
bitfld.long 0x00 0.--1. " RTC ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " FUP ," "0,1"
|
|
bitfld.long 0x00 4. " FEP ," "0,1"
|
|
bitfld.long 0x00 5. " RSF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DIS_TCP_EF ," "0,1"
|
|
bitfld.long 0x00 7. " EHFC ," "0,1"
|
|
hexmask.long.byte 0x00 8.--13. 1. " RFA ,"
|
|
hexmask.long.byte 0x00 14.--19. 1. " RFD ,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 20.--26. 1. " RQS ,"
|
|
rgroup 0xD74++0x03
|
|
line.long 0x00 "MTL_RXQ1_MISSED_PACKET_OVERFLOW_CNT,"
|
|
hexmask.long.word 0x00 0.--10. 1. " OVFPKTCNT ,"
|
|
bitfld.long 0x00 11. " OVFCNTOVF ," "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MISPKTCNT ,"
|
|
bitfld.long 0x00 27. " MISCNTOVF ," "0,1"
|
|
rgroup 0xD78++0x03
|
|
line.long 0x00 "MTL_RXQ1_DEBUG,"
|
|
bitfld.long 0x00 0. " RWCSTS ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " RXQSTS ," "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--29. 1. " PRXQ ,"
|
|
group 0xD7C++0x03
|
|
line.long 0x00 "MTL_RXQ1_CONTROL,"
|
|
bitfld.long 0x00 0.--2. " RXQ_WEGT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " RXQ_FRM_ARBIT ," "0,1"
|
|
group 0xD80++0x03
|
|
line.long 0x00 "MTL_TXQ2_OPERATION_MODE,"
|
|
bitfld.long 0x00 0. " FTQ ," "0,1"
|
|
bitfld.long 0x00 1. " TSF ," "0,1"
|
|
bitfld.long 0x00 2.--3. " TXQEN ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " TTC ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--21. 1. " TQS ,"
|
|
rgroup 0xD84++0x03
|
|
line.long 0x00 "MTL_TXQ2_UNDERFLOW,"
|
|
hexmask.long.word 0x00 0.--10. 1. " UFFRMCNT ,"
|
|
bitfld.long 0x00 11. " UFCNTOVF ," "0,1"
|
|
rgroup 0xD88++0x03
|
|
line.long 0x00 "MTL_TXQ2_DEBUG,"
|
|
bitfld.long 0x00 0. " TXQPAUSED ," "0,1"
|
|
bitfld.long 0x00 1.--2. " TRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " TWCSTS ," "0,1"
|
|
bitfld.long 0x00 4. " TXQSTS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXSTSFSTS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " PTXQ ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " STXSTSF ," "0,1,2,3,4,5,6,7"
|
|
group 0xD90++0x03
|
|
line.long 0x00 "MTL_TXQ2_ETS_CONTROL,"
|
|
bitfld.long 0x00 2. " AVALG ," "0,1"
|
|
bitfld.long 0x00 3. " CC ," "0,1"
|
|
bitfld.long 0x00 4.--6. " SLC ," "0,1,2,3,4,5,6,7"
|
|
rgroup 0xD94++0x03
|
|
line.long 0x00 "MTL_TXQ2_ETS_STATUS,"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ABS ,"
|
|
group 0xD98++0x03
|
|
line.long 0x00 "MTL_TXQ2_QUANTUM_WEIGHT,"
|
|
hexmask.long.tbyte 0x00 0.--20. 1. " ISCQW ,"
|
|
group 0xD9C++0x03
|
|
line.long 0x00 "MTL_TXQ2_SENDSLOPECREDIT,"
|
|
hexmask.long.word 0x00 0.--13. 1. " SSC ,"
|
|
group 0xDA0++0x03
|
|
line.long 0x00 "MTL_TXQ2_HICREDIT,"
|
|
hexmask.long 0x00 0.--28. 1. " HC ,"
|
|
group 0xDA4++0x03
|
|
line.long 0x00 "MTL_TXQ2_LOCREDIT,"
|
|
hexmask.long 0x00 0.--28. 1. " LC ,"
|
|
group 0xDAC++0x03
|
|
line.long 0x00 "MTL_Q2_INTERRUPT_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " TXUNFIS ," "0,1"
|
|
bitfld.long 0x00 1. " ABPSIS ," "0,1"
|
|
bitfld.long 0x00 8. " TXUIE ," "0,1"
|
|
bitfld.long 0x00 9. " ABPSIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXOVFIS ," "0,1"
|
|
bitfld.long 0x00 24. " RXOIE ," "0,1"
|
|
group 0xDB0++0x03
|
|
line.long 0x00 "MTL_RXQ2_OPERATION_MODE,"
|
|
bitfld.long 0x00 0.--1. " RTC ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " FUP ," "0,1"
|
|
bitfld.long 0x00 4. " FEP ," "0,1"
|
|
bitfld.long 0x00 5. " RSF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DIS_TCP_EF ," "0,1"
|
|
bitfld.long 0x00 7. " EHFC ," "0,1"
|
|
hexmask.long.byte 0x00 8.--13. 1. " RFA ,"
|
|
hexmask.long.byte 0x00 14.--19. 1. " RFD ,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 20.--26. 1. " RQS ,"
|
|
rgroup 0xDB4++0x03
|
|
line.long 0x00 "MTL_RXQ2_MISSED_PACKET_OVERFLOW_CNT,"
|
|
hexmask.long.word 0x00 0.--10. 1. " OVFPKTCNT ,"
|
|
bitfld.long 0x00 11. " OVFCNTOVF ," "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MISPKTCNT ,"
|
|
bitfld.long 0x00 27. " MISCNTOVF ," "0,1"
|
|
rgroup 0xDB8++0x03
|
|
line.long 0x00 "MTL_RXQ2_DEBUG,"
|
|
bitfld.long 0x00 0. " RWCSTS ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RRCSTS ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " RXQSTS ," "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--29. 1. " PRXQ ,"
|
|
group 0xDBC++0x03
|
|
line.long 0x00 "MTL_RXQ2_CONTROL,"
|
|
bitfld.long 0x00 0.--2. " RXQ_WEGT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " RXQ_FRM_ARBIT ," "0,1"
|
|
group 0x1000++0x03
|
|
line.long 0x00 "DMA_MODE,"
|
|
bitfld.long 0x00 0. " SWR ," "0,1"
|
|
bitfld.long 0x00 1. " DA ," "0,1"
|
|
bitfld.long 0x00 2.--4. " TAA ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. " TXPR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " PR ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " INTM ," "0,1,2,3"
|
|
group 0x1004++0x03
|
|
line.long 0x00 "DMA_SYSBUS_MODE,"
|
|
bitfld.long 0x00 0. " FB ," "0,1"
|
|
bitfld.long 0x00 1. " BLEN4 ," "0,1"
|
|
bitfld.long 0x00 2. " BLEN8 ," "0,1"
|
|
bitfld.long 0x00 3. " BLEN16 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BLEN32 ," "0,1"
|
|
bitfld.long 0x00 5. " BLEN64 ," "0,1"
|
|
bitfld.long 0x00 6. " BLEN128 ," "0,1"
|
|
bitfld.long 0x00 7. " BLEN256 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EAME ," "0,1"
|
|
bitfld.long 0x00 12. " AAL ," "0,1"
|
|
bitfld.long 0x00 13. " ONEKBBE ," "0,1"
|
|
bitfld.long 0x00 14. " MB ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RB ," "0,1"
|
|
bitfld.long 0x00 16.--18. " RD_OSR_LMT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " WR_OSR_LMT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 30. " LPI_XIT_PKT ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 31. " EN_LPI ," "0,1"
|
|
rgroup 0x1008++0x03
|
|
line.long 0x00 "DMA_INTERRUPT_STATUS,"
|
|
bitfld.long 0x00 0. " DC0IS ," "0,1"
|
|
bitfld.long 0x00 1. " DC1IS ," "0,1"
|
|
bitfld.long 0x00 2. " DC2IS ," "0,1"
|
|
bitfld.long 0x00 3. " DC3IS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DC4IS ," "0,1"
|
|
bitfld.long 0x00 5. " DC5IS ," "0,1"
|
|
bitfld.long 0x00 6. " DC6IS ," "0,1"
|
|
bitfld.long 0x00 7. " DC7IS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MTLIS ," "0,1"
|
|
bitfld.long 0x00 17. " MACIS ," "0,1"
|
|
rgroup 0x100C++0x03
|
|
line.long 0x00 "DMA_DEBUG_STATUS0,"
|
|
bitfld.long 0x00 0. " AXWHSTS ," "0,1"
|
|
bitfld.long 0x00 1. " AXRHSTS ," "0,1"
|
|
bitfld.long 0x00 8.--11. " RPS0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " TPS0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RPS1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " TPS1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " RPS2 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 28.--31. " TPS2 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CONTROL,"
|
|
hexmask.long.word 0x00 0.--13. 1. " MSS ,"
|
|
bitfld.long 0x00 16. " PBLX8 ," "0,1"
|
|
bitfld.long 0x00 18.--20. " DSL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24. " SPH ," "0,1"
|
|
group 0x1104++0x03
|
|
line.long 0x00 "DMA_CH0_TX_CONTROL,"
|
|
bitfld.long 0x00 0. " ST ," "0,1"
|
|
bitfld.long 0x00 1.--3. " RESERVED_TCW ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. " OSF ," "0,1"
|
|
bitfld.long 0x00 12. " RESERVED_TSE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IPBL ," "0,1"
|
|
hexmask.long.byte 0x00 16.--21. 1. " TXPBL ,"
|
|
group 0x1108++0x03
|
|
line.long 0x00 "DMA_CH0_RX_CONTROL,"
|
|
bitfld.long 0x00 0. " SR ," "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " RBSZ ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " RXPBL ,"
|
|
bitfld.long 0x00 31. " RPF ," "0,1"
|
|
group 0x1114++0x03
|
|
line.long 0x00 "DMA_CH0_TXDESC_LIST_ADDRESS,"
|
|
hexmask.long 0x00 3.--31. 1. " TDESLA ,"
|
|
group 0x111C++0x03
|
|
line.long 0x00 "DMA_CH0_RXDESC_LIST_ADDRESS,"
|
|
hexmask.long 0x00 3.--31. 1. " RDESLA ,"
|
|
group 0x1120++0x03
|
|
line.long 0x00 "DMA_CH0_TXDESC_TAIL_POINTER,"
|
|
hexmask.long 0x00 3.--31. 1. " TDTP ,"
|
|
group 0x1128++0x03
|
|
line.long 0x00 "DMA_CH0_RXDESC_TAIL_POINTER,"
|
|
hexmask.long 0x00 3.--31. 1. " RDTP ,"
|
|
group 0x112C++0x03
|
|
line.long 0x00 "DMA_CH0_TXDESC_RING_LENGTH,"
|
|
hexmask.long.word 0x00 0.--9. 1. " TDRL ,"
|
|
group 0x1130++0x03
|
|
line.long 0x00 "DMA_CH0_RXDESC_RING_LENGTH,"
|
|
hexmask.long.word 0x00 0.--9. 1. " RDRL ,"
|
|
group 0x1134++0x03
|
|
line.long 0x00 "DMA_CH0_INTERRUPT_ENABLE,"
|
|
bitfld.long 0x00 0. " TIE ," "0,1"
|
|
bitfld.long 0x00 1. " TXSE ," "0,1"
|
|
bitfld.long 0x00 2. " TBUE ," "0,1"
|
|
bitfld.long 0x00 6. " RIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBUE ," "0,1"
|
|
bitfld.long 0x00 8. " RSE ," "0,1"
|
|
bitfld.long 0x00 9. " RWTE ," "0,1"
|
|
bitfld.long 0x00 10. " ETIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERIE ," "0,1"
|
|
bitfld.long 0x00 12. " FBEE ," "0,1"
|
|
bitfld.long 0x00 13. " CDEE ," "0,1"
|
|
bitfld.long 0x00 14. " AIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIE ," "0,1"
|
|
group 0x1138++0x03
|
|
line.long 0x00 "DMA_CH0_RX_INTERRUPT_WATCHDOG_TIMER,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RWT ,"
|
|
group 0x113C++0x03
|
|
line.long 0x00 "DMA_CH0_SLOT_FUNCTION_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " ESC ," "0,1"
|
|
bitfld.long 0x00 1. " ASC ," "0,1"
|
|
bitfld.long 0x00 16.--19. " RSN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0x1144++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_TXDESC,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTDESAPTR ,"
|
|
rgroup 0x114C++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_RXDESC,"
|
|
hexmask.long 0x00 0.--31. 1. " CURRDESAPTR ,"
|
|
rgroup 0x1150++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_TXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURTBUFAPTRH ,"
|
|
rgroup 0x1154++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_TXBUFFER,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTBUFAPTR ,"
|
|
rgroup 0x1158++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_RXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURRBUFAPTRH ,"
|
|
rgroup 0x115C++0x03
|
|
line.long 0x00 "DMA_CH0_CURRENT_APP_RXBUFFER,"
|
|
hexmask.long 0x00 0.--31. 1. " CURRBUFAPTR ,"
|
|
group 0x1160++0x03
|
|
line.long 0x00 "DMA_CH0_STATUS,"
|
|
bitfld.long 0x00 0. " TI ," "0,1"
|
|
bitfld.long 0x00 1. " TPS ," "0,1"
|
|
bitfld.long 0x00 2. " TBU ," "0,1"
|
|
bitfld.long 0x00 6. " RI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBU ," "0,1"
|
|
bitfld.long 0x00 8. " RPS ," "0,1"
|
|
bitfld.long 0x00 9. " RWT ," "0,1"
|
|
bitfld.long 0x00 10. " ETI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERI ," "0,1"
|
|
bitfld.long 0x00 12. " FBE ," "0,1"
|
|
bitfld.long 0x00 13. " CDE ," "0,1"
|
|
bitfld.long 0x00 14. " AIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " TEB ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " REB ," "0,1,2,3,4,5,6,7"
|
|
rgroup 0x116C++0x03
|
|
line.long 0x00 "DMA_CH0_MISS_FRAME_CNT,"
|
|
hexmask.long.word 0x00 0.--10. 1. " MFC ,"
|
|
bitfld.long 0x00 15. " MFCO ," "0,1"
|
|
group 0x1180++0x03
|
|
line.long 0x00 "DMA_CH1_CONTROL,"
|
|
hexmask.long.word 0x00 0.--13. 1. " MSS ,"
|
|
bitfld.long 0x00 16. " PBLX8 ," "0,1"
|
|
bitfld.long 0x00 18.--20. " DSL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24. " SPH ," "0,1"
|
|
group 0x1184++0x03
|
|
line.long 0x00 "DMA_CH1_TX_CONTROL,"
|
|
bitfld.long 0x00 0. " ST ," "0,1"
|
|
bitfld.long 0x00 1.--3. " TCW ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. " OSF ," "0,1"
|
|
bitfld.long 0x00 12. " TSE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IPBL ," "0,1"
|
|
hexmask.long.byte 0x00 16.--21. 1. " TXPBL ,"
|
|
group 0x1194++0x03
|
|
line.long 0x00 "DMA_CH1_TXDESC_LIST_ADDRESS,"
|
|
hexmask.long 0x00 3.--31. 1. " TDESLA ,"
|
|
group 0x11A0++0x03
|
|
line.long 0x00 "DMA_CH1_TXDESC_TAIL_POINTER,"
|
|
hexmask.long 0x00 3.--31. 1. " TDTP ,"
|
|
group 0x11AC++0x03
|
|
line.long 0x00 "DMA_CH1_TXDESC_RING_LENGTH,"
|
|
hexmask.long.word 0x00 0.--9. 1. " TDRL ,"
|
|
group 0x11B4++0x03
|
|
line.long 0x00 "DMA_CH1_INTERRUPT_ENABLE,"
|
|
bitfld.long 0x00 0. " TIE ," "0,1"
|
|
bitfld.long 0x00 1. " TXSE ," "0,1"
|
|
bitfld.long 0x00 2. " TBUE ," "0,1"
|
|
bitfld.long 0x00 6. " RIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBUE ," "0,1"
|
|
bitfld.long 0x00 8. " RSE ," "0,1"
|
|
bitfld.long 0x00 9. " RWTE ," "0,1"
|
|
bitfld.long 0x00 10. " ETIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERIE ," "0,1"
|
|
bitfld.long 0x00 12. " FBEE ," "0,1"
|
|
bitfld.long 0x00 13. " CDEE ," "0,1"
|
|
bitfld.long 0x00 14. " AIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIE ," "0,1"
|
|
group 0x11BC++0x03
|
|
line.long 0x00 "DMA_CH1_SLOT_FUNCTION_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " ESC ," "0,1"
|
|
bitfld.long 0x00 1. " ASC ," "0,1"
|
|
bitfld.long 0x00 16.--19. " RSN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0x11C4++0x03
|
|
line.long 0x00 "DMA_CH1_CURRENT_APP_TXDESC,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTDESAPTR ,"
|
|
rgroup 0x11D0++0x03
|
|
line.long 0x00 "DMA_CH1_CURRENT_APP_TXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURTBUFAPTRH ,"
|
|
rgroup 0x11D4++0x03
|
|
line.long 0x00 "DMA_CH1_CURRENT_APP_TXBUFFER,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTBUFAPTR ,"
|
|
rgroup 0x11D8++0x03
|
|
line.long 0x00 "DMA_CH1_CURRENT_APP_RXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURRBUFAPTRH ,"
|
|
group 0x11E0++0x03
|
|
line.long 0x00 "DMA_CH1_STATUS,"
|
|
bitfld.long 0x00 0. " TI ," "0,1"
|
|
bitfld.long 0x00 1. " TPS ," "0,1"
|
|
bitfld.long 0x00 2. " TBU ," "0,1"
|
|
bitfld.long 0x00 6. " RI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBU ," "0,1"
|
|
bitfld.long 0x00 8. " RPS ," "0,1"
|
|
bitfld.long 0x00 9. " RWT ," "0,1"
|
|
bitfld.long 0x00 10. " ETI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERI ," "0,1"
|
|
bitfld.long 0x00 12. " FBE ," "0,1"
|
|
bitfld.long 0x00 13. " CDE ," "0,1"
|
|
bitfld.long 0x00 14. " AIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " TEB ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " REB ," "0,1,2,3,4,5,6,7"
|
|
group 0x1200++0x03
|
|
line.long 0x00 "DMA_CH2_CONTROL,"
|
|
hexmask.long.word 0x00 0.--13. 1. " MSS ,"
|
|
bitfld.long 0x00 16. " PBLX8 ," "0,1"
|
|
bitfld.long 0x00 18.--20. " DSL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24. " SPH ," "0,1"
|
|
group 0x1204++0x03
|
|
line.long 0x00 "DMA_CH2_TX_CONTROL,"
|
|
bitfld.long 0x00 0. " ST ," "0,1"
|
|
bitfld.long 0x00 1.--3. " TCW ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. " OSF ," "0,1"
|
|
bitfld.long 0x00 12. " TSE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IPBL ," "0,1"
|
|
hexmask.long.byte 0x00 16.--21. 1. " TXPBL ,"
|
|
group 0x1214++0x03
|
|
line.long 0x00 "DMA_CH2_TXDESC_LIST_ADDRESS,"
|
|
hexmask.long 0x00 3.--31. 1. " TDESLA ,"
|
|
group 0x1220++0x03
|
|
line.long 0x00 "DMA_CH2_TXDESC_TAIL_POINTER,"
|
|
hexmask.long 0x00 3.--31. 1. " TDTP ,"
|
|
group 0x122C++0x03
|
|
line.long 0x00 "DMA_CH2_TXDESC_RING_LENGTH,"
|
|
hexmask.long.word 0x00 0.--9. 1. " TDRL ,"
|
|
group 0x1234++0x03
|
|
line.long 0x00 "DMA_CH2_INTERRUPT_ENABLE,"
|
|
bitfld.long 0x00 0. " TIE ," "0,1"
|
|
bitfld.long 0x00 1. " TXSE ," "0,1"
|
|
bitfld.long 0x00 2. " TBUE ," "0,1"
|
|
bitfld.long 0x00 6. " RIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBUE ," "0,1"
|
|
bitfld.long 0x00 8. " RSE ," "0,1"
|
|
bitfld.long 0x00 9. " RWTE ," "0,1"
|
|
bitfld.long 0x00 10. " ETIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERIE ," "0,1"
|
|
bitfld.long 0x00 12. " FBEE ," "0,1"
|
|
bitfld.long 0x00 13. " CDEE ," "0,1"
|
|
bitfld.long 0x00 14. " AIE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIE ," "0,1"
|
|
group 0x123C++0x03
|
|
line.long 0x00 "DMA_CH2_SLOT_FUNCTION_CONTROL_STATUS,"
|
|
bitfld.long 0x00 0. " ESC ," "0,1"
|
|
bitfld.long 0x00 1. " ASC ," "0,1"
|
|
bitfld.long 0x00 16.--19. " RSN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0x1244++0x03
|
|
line.long 0x00 "DMA_CH2_CURRENT_APP_TXDESC,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTDESAPTR ,"
|
|
rgroup 0x1250++0x03
|
|
line.long 0x00 "DMA_CH2_CURRENT_APP_TXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURTBUFAPTRH ,"
|
|
rgroup 0x1254++0x03
|
|
line.long 0x00 "DMA_CH2_CURRENT_APP_TXBUFFER,"
|
|
hexmask.long 0x00 0.--31. 1. " CURTBUFAPTR ,"
|
|
rgroup 0x1258++0x03
|
|
line.long 0x00 "DMA_CH2_CURRENT_APP_RXBUFFER_H,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CURRBUFAPTRH ,"
|
|
group 0x1260++0x03
|
|
line.long 0x00 "DMA_CH2_STATUS,"
|
|
bitfld.long 0x00 0. " TI ," "0,1"
|
|
bitfld.long 0x00 1. " TPS ," "0,1"
|
|
bitfld.long 0x00 2. " TBU ," "0,1"
|
|
bitfld.long 0x00 6. " RI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RBU ," "0,1"
|
|
bitfld.long 0x00 8. " RPS ," "0,1"
|
|
bitfld.long 0x00 9. " RWT ," "0,1"
|
|
bitfld.long 0x00 10. " ETI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ERI ," "0,1"
|
|
bitfld.long 0x00 12. " FBE ," "0,1"
|
|
bitfld.long 0x00 13. " CDE ," "0,1"
|
|
bitfld.long 0x00 14. " AIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NIS ," "0,1"
|
|
bitfld.long 0x00 16.--18. " TEB ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " REB ," "0,1,2,3,4,5,6,7"
|
|
group 0x1264++0x03
|
|
line.long 0x00 "TDES0_NORMAL_DESCRIPTOR,"
|
|
hexmask.long 0x00 0.--31. 1. " BUF1AP ,"
|
|
group 0x1268++0x03
|
|
line.long 0x00 "TDES1_NORMAL_DESCRIPTOR,"
|
|
hexmask.long 0x00 0.--31. 1. " BUF2AP ,"
|
|
group 0x126C++0x03
|
|
line.long 0x00 "TDES2_NORMAL_DESCRIPTOR,"
|
|
hexmask.long.word 0x00 0.--13. 1. " HL_B1L ,"
|
|
bitfld.long 0x00 14.--15. " VTIR ," "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--29. 1. " B2L ,"
|
|
bitfld.long 0x00 30. " TTSE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 31. " IOC_TX ," "0,1"
|
|
group 0x1270++0x03
|
|
line.long 0x00 "TDES3_NORMAL_DESCRIPTOR,"
|
|
hexmask.long.word 0x00 0.--14. 1. " FL_TPL ,"
|
|
bitfld.long 0x00 15. " TPL ," "0,1"
|
|
bitfld.long 0x00 16.--17. " CIC_TPL ," "0,1,2,3"
|
|
bitfld.long 0x00 18. " TSE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19.--22. " SLOTNUM_THL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23.--25. " SAIC ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " CPC ," "0,1,2,3"
|
|
bitfld.long 0x00 28. " LD_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FD_TX ," "0,1"
|
|
bitfld.long 0x00 30. " CTXT_TX ," "0,1"
|
|
bitfld.long 0x00 31. " OWN_TX ," "0,1"
|
|
group 0x1274++0x03
|
|
line.long 0x00 "RDES0_NORMAL_DESCRIPTOR_R,"
|
|
hexmask.long 0x00 0.--31. 1. " BUF1AP ,"
|
|
group 0x1278++0x03
|
|
line.long 0x00 "RDES1_NORMAL_DESCRIPTOR_R,"
|
|
hexmask.long 0x00 0.--31. 1. " RESERVED_BUF1AP ,"
|
|
group 0x127C++0x03
|
|
line.long 0x00 "RDES2_NORMAL_DESCRIPTOR_R,"
|
|
hexmask.long 0x00 0.--31. 1. " BUF2AP ,"
|
|
group 0x1280++0x03
|
|
line.long 0x00 "RDES3_NORMAL_DESCRIPTOR_R,"
|
|
bitfld.long 0x00 24. " BUF1V ," "0,1"
|
|
bitfld.long 0x00 25. " BUF2V ," "0,1"
|
|
bitfld.long 0x00 30. " IOC_RX ," "0,1"
|
|
bitfld.long 0x00 31. " OWN_RX ," "0,1"
|
|
group 0x1284++0x03
|
|
line.long 0x00 "RDES0_NORMAL_DESCRIPTOR_W,"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVT ,"
|
|
hexmask.long.word 0x00 16.--31. 1. " IVT ,"
|
|
group 0x1288++0x03
|
|
line.long 0x00 "RDES1_NORMAL_DESCRIPTOR_W,"
|
|
bitfld.long 0x00 0.--2. " PT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " TPHE ," "0,1"
|
|
bitfld.long 0x00 4. " TPV4 ," "0,1"
|
|
bitfld.long 0x00 5. " IPV6 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IPCB ," "0,1"
|
|
bitfld.long 0x00 7. " IPCE ," "0,1"
|
|
bitfld.long 0x00 8.--11. " PMT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12. " PFT ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PV ," "0,1"
|
|
bitfld.long 0x00 14. " TSA ," "0,1"
|
|
bitfld.long 0x00 15. " TD ," "0,1"
|
|
hexmask.long.word 0x00 16.--31. 1. " OPC ,"
|
|
group 0x128C++0x03
|
|
line.long 0x00 "RDES2_NORMAL_DESCRIPTOR_W,"
|
|
hexmask.long.word 0x00 0.--9. 1. " HL ,"
|
|
bitfld.long 0x00 10. " ARPNR ," "0,1"
|
|
bitfld.long 0x00 15. " VF ," "0,1"
|
|
bitfld.long 0x00 16. " SAF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DAF ," "0,1"
|
|
bitfld.long 0x00 18. " HF ," "0,1"
|
|
hexmask.long.byte 0x00 19.--26. 1. " MADRM ,"
|
|
bitfld.long 0x00 27. " L3FM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " L4FM ," "0,1"
|
|
bitfld.long 0x00 29.--31. " L3L4FM ," "0,1,2,3,4,5,6,7"
|
|
group 0x1290++0x03
|
|
line.long 0x00 "RDES3_NORMAL_DESCRIPTOR_W,"
|
|
hexmask.long.word 0x00 0.--14. 1. " PL ,"
|
|
bitfld.long 0x00 15. " ES ," "0,1"
|
|
bitfld.long 0x00 16.--18. " LT ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19. " DE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RDES3_RE ," "0,1"
|
|
bitfld.long 0x00 21. " OE ," "0,1"
|
|
bitfld.long 0x00 22. " RWT ," "0,1"
|
|
bitfld.long 0x00 23. " GP ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CE ," "0,1"
|
|
bitfld.long 0x00 25. " RS0V ," "0,1"
|
|
bitfld.long 0x00 26. " RS1V ," "0,1"
|
|
bitfld.long 0x00 27. " RS2V ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " LD_RX ," "0,1"
|
|
bitfld.long 0x00 29. " FD_RX ," "0,1"
|
|
bitfld.long 0x00 30. " CTXT_RX ," "0,1"
|
|
bitfld.long 0x00 31. " OWN_W ," "0,1"
|
|
tree.end
|
|
tree "HSI2C_0"
|
|
base ad:0x40300000
|
|
width 16.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR,I2C control register"
|
|
bitfld.long 0x00 15. " FS ," "0,1"
|
|
bitfld.long 0x00 13.--14. " FON ," "0,1,2,3"
|
|
bitfld.long 0x00 12.--14. " LM ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. " DMA_SLE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. "DMA_RX_EN ," "0,1"
|
|
bitfld.long 0x00 9. " DMA_TX_EN ," "0,1"
|
|
bitfld.long 0x00 8. " FRX ," "0,1"
|
|
bitfld.long 0x00 7. " FTX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "SGCM ," "0,1"
|
|
bitfld.long 0x00 4.--5. " SM ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " SAM ," "0,1"
|
|
bitfld.long 0x00 1.--2. " OM ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0. "PE ," "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "SCR,I2C slave control register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,"
|
|
bitfld.long 0x00 7.--9. " ESA10 ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA7 ,"
|
|
group 0x08++0x03
|
|
line.long 0x00 "HSMCR,I2C high-speed master code register"
|
|
bitfld.long 0x00 0.--2. " MC ," "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "MCR,I2C master control register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,"
|
|
bitfld.long 0x00 14. " P ," "0,1"
|
|
bitfld.long 0x00 12.--13. " AM ," "0,1,2,3"
|
|
bitfld.long 0x00 11. " SB ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. "EA10 ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. " A7 ,"
|
|
bitfld.long 0x00 0. " OP ," "0,1"
|
|
wgroup 0x10++0x03
|
|
line.long 0x00 "TFR_WONLY,I2C transmit FIFO register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA ,"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "SR,I2C status register"
|
|
hexmask.long.word 0x00 9.--19. 1. " LENGTH ,"
|
|
bitfld.long 0x00 7.--8. " TYPE ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " CAUSE ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2.--3. " STATUS ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. "OP ," "0,1,2,3"
|
|
wgroup 0x18++0x03
|
|
line.long 0x00 "RFR_WONLY,I2C receive FIFO register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RDATA ,"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "TFTR,I2C transmit FIFO threshold register"
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_TX ,"
|
|
group 0x20++0x03
|
|
line.long 0x00 "RFTR,I2C receive FIFO threshold register"
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_RX ,"
|
|
group 0x24++0x03
|
|
line.long 0x00 "DMAR,I2C DMA register"
|
|
bitfld.long 0x00 11. " BURST_TX ," "0,1"
|
|
bitfld.long 0x00 8.--10. " DBSIZE_TX ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " BURST_RX ," "0,1"
|
|
bitfld.long 0x00 0.--2. " SBSIZE_RX ," "0,1,2,3,4,5,6,7"
|
|
group 0x28++0x03
|
|
line.long 0x00 "BRCR,I2C Baud-rate counter register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BRCNT1 ,"
|
|
hexmask.long.word 0x00 0.--15. 1. " BRCNT2 ,"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "IMSCR,I2C interrupt mask set/clear register"
|
|
bitfld.long 0x00 28. " MTDWSM ," "0,1"
|
|
bitfld.long 0x00 25. " BERRM ," "0,1"
|
|
bitfld.long 0x00 24. " MALM ," "0,1"
|
|
bitfld.long 0x00 20. " STDM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDM ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRM ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEM ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "RXFFM ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNFM ," "0,1"
|
|
bitfld.long 0x00 4. " RXFEM ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVRM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFFM ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNEM ," "0,1"
|
|
bitfld.long 0x00 0. " TXFEM ," "0,1"
|
|
rgroup 0x30++0x03
|
|
line.long 0x00 "RISR,I2C raw interrupt status register"
|
|
bitfld.long 0x00 28. " MTDWS ," "0,1"
|
|
bitfld.long 0x00 25. " BERR ," "0,1"
|
|
bitfld.long 0x00 24. " MAL ," "0,1"
|
|
bitfld.long 0x00 20. " STD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTD ," "0,1"
|
|
bitfld.long 0x00 18. " WTSR ," "0,1"
|
|
bitfld.long 0x00 17. " RFSE ," "0,1"
|
|
bitfld.long 0x00 16. " RFSR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "RXFF ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNF ," "0,1"
|
|
bitfld.long 0x00 4. " RXFE ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFF ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNE ," "0,1"
|
|
bitfld.long 0x00 0. " TXFE ," "0,1"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "MISR,I2C masked interrupt status register"
|
|
bitfld.long 0x00 28. " MTDWSIS ," "0,1"
|
|
bitfld.long 0x00 25. " BERRMIS ," "0,1"
|
|
bitfld.long 0x00 24. " MALMIS ," "0,1"
|
|
bitfld.long 0x00 20. " STDMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDMIS ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRMIS ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEMIS ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "RXFFMIS ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNFMIS ," "0,1"
|
|
bitfld.long 0x00 4. " RXFEMIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVRMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFFMIS ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNEMIS ," "0,1"
|
|
bitfld.long 0x00 0. " TXFEMIS ," "0,1"
|
|
wgroup 0x38++0x03
|
|
line.long 0x00 "ICR,I2C interrupt clear register"
|
|
bitfld.long 0x00 28. " MTDWSIC ," "0,1"
|
|
bitfld.long 0x00 25. " BERRIC ," "0,1"
|
|
bitfld.long 0x00 24. " MALIC ," "0,1"
|
|
bitfld.long 0x00 20. " STDIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDIC ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRIC ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEIC ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. "TXFOVRIC ," "0,1"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "ITCR,I2C integration test control register"
|
|
bitfld.long 0x00 1. " FIFOTEST ," "0,1"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
group 0x40++0x03
|
|
line.long 0x00 "ITIP,I2C integration test input register"
|
|
hexmask.long.word 0x00 16.--25. 1. " HWSADDR ,"
|
|
bitfld.long 0x00 15. " TSTNOIVCLK ," "0,1"
|
|
bitfld.long 0x00 7. " DMATCTX ," "0,1"
|
|
bitfld.long 0x00 6. " DMACLRTX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. "DMATCRX ," "0,1"
|
|
bitfld.long 0x00 4. " DMACLRRX ," "0,1"
|
|
bitfld.long 0x00 1. " SCLIN ," "0,1"
|
|
bitfld.long 0x00 0. " SDAIN ," "0,1"
|
|
group 0x44++0x03
|
|
line.long 0x00 "ITOP,I2C integration test output register"
|
|
bitfld.long 0x00 15. " INTGBL ," "0,1"
|
|
bitfld.long 0x00 6. " DMABREQTX ," "0,1"
|
|
bitfld.long 0x00 5. " DMASREQRX ," "0,1"
|
|
bitfld.long 0x00 4. " DMABREQRX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "ENCSPUHS ," "0,1"
|
|
bitfld.long 0x00 1. " SCLOUT ," "0,1"
|
|
bitfld.long 0x00 0. " SDAOUT ," "0,1"
|
|
group 0x48++0x03
|
|
line.long 0x00 "TDR,I2C Data Control Register"
|
|
hexmask.long 0x00 0.--31. 1. " TESTDATA ,"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "THDDAT,I2C hold time data"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDDAT ,"
|
|
group 0x50++0x03
|
|
line.long 0x00 "THDSTA_FST_STD,I2C hold time start condition F/S"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_THDSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDSTA_STD ,"
|
|
group 0x54++0x03
|
|
line.long 0x00 "THDSTA_FMP_HS,I2C hold time start condition FMP/HS"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_THDSTA_HS ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDSTA_FMP ,"
|
|
group 0x58++0x03
|
|
line.long 0x00 "TSUSTA_FST_STD,I2C setup time start condition F/S"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_TSUSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_TSUSTA_STD ,"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "TSUSTA_FMP_HS,I2C setup time start condition FMP/HS"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_TSUSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_TSUSTA_STD ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PERIPHID0,I2C peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Partnumber0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PERIPHID1,I2C peripheral identification register 1"
|
|
bitfld.long 0x00 4.--7. " Designer0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Partnumber1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PERIPHID2,I2C peripheral identification register 2"
|
|
bitfld.long 0x00 4.--7. " Revision ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Designer1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PERIPHID3,I2C peripheral identification register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCELLID0,I2C PCell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCELLID1,I2C PCell Identification Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCELLID2,I2C PCell identification register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCELLID3,I2C PCell identification register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID3 ,"
|
|
tree.end
|
|
tree "HSI2C_1"
|
|
base ad:0x40400000
|
|
width 16.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR,I2C control register"
|
|
bitfld.long 0x00 15. " FS ," "0,1"
|
|
bitfld.long 0x00 13.--14. " FON ," "0,1,2,3"
|
|
bitfld.long 0x00 12.--14. " LM ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. " DMA_SLE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. "DMA_RX_EN ," "0,1"
|
|
bitfld.long 0x00 9. " DMA_TX_EN ," "0,1"
|
|
bitfld.long 0x00 8. " FRX ," "0,1"
|
|
bitfld.long 0x00 7. " FTX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "SGCM ," "0,1"
|
|
bitfld.long 0x00 4.--5. " SM ," "0,1,2,3"
|
|
bitfld.long 0x00 3. " SAM ," "0,1"
|
|
bitfld.long 0x00 1.--2. " OM ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0. "PE ," "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "SCR,I2C slave control register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,"
|
|
bitfld.long 0x00 7.--9. " ESA10 ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA7 ,"
|
|
group 0x08++0x03
|
|
line.long 0x00 "HSMCR,I2C high-speed master code register"
|
|
bitfld.long 0x00 0.--2. " MC ," "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "MCR,I2C master control register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,"
|
|
bitfld.long 0x00 14. " P ," "0,1"
|
|
bitfld.long 0x00 12.--13. " AM ," "0,1,2,3"
|
|
bitfld.long 0x00 11. " SB ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. "EA10 ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. " A7 ,"
|
|
bitfld.long 0x00 0. " OP ," "0,1"
|
|
wgroup 0x10++0x03
|
|
line.long 0x00 "TFR_WONLY,I2C transmit FIFO register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA ,"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "SR,I2C status register"
|
|
hexmask.long.word 0x00 9.--19. 1. " LENGTH ,"
|
|
bitfld.long 0x00 7.--8. " TYPE ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " CAUSE ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2.--3. " STATUS ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. "OP ," "0,1,2,3"
|
|
wgroup 0x18++0x03
|
|
line.long 0x00 "RFR_WONLY,I2C receive FIFO register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RDATA ,"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "TFTR,I2C transmit FIFO threshold register"
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_TX ,"
|
|
group 0x20++0x03
|
|
line.long 0x00 "RFTR,I2C receive FIFO threshold register"
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_RX ,"
|
|
group 0x24++0x03
|
|
line.long 0x00 "DMAR,I2C DMA register"
|
|
bitfld.long 0x00 11. " BURST_TX ," "0,1"
|
|
bitfld.long 0x00 8.--10. " DBSIZE_TX ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " BURST_RX ," "0,1"
|
|
bitfld.long 0x00 0.--2. " SBSIZE_RX ," "0,1,2,3,4,5,6,7"
|
|
group 0x28++0x03
|
|
line.long 0x00 "BRCR,I2C Baud-rate counter register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BRCNT1 ,"
|
|
hexmask.long.word 0x00 0.--15. 1. " BRCNT2 ,"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "IMSCR,I2C interrupt mask set/clear register"
|
|
bitfld.long 0x00 28. " MTDWSM ," "0,1"
|
|
bitfld.long 0x00 25. " BERRM ," "0,1"
|
|
bitfld.long 0x00 24. " MALM ," "0,1"
|
|
bitfld.long 0x00 20. " STDM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDM ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRM ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEM ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "RXFFM ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNFM ," "0,1"
|
|
bitfld.long 0x00 4. " RXFEM ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVRM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFFM ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNEM ," "0,1"
|
|
bitfld.long 0x00 0. " TXFEM ," "0,1"
|
|
rgroup 0x30++0x03
|
|
line.long 0x00 "RISR,I2C raw interrupt status register"
|
|
bitfld.long 0x00 28. " MTDWS ," "0,1"
|
|
bitfld.long 0x00 25. " BERR ," "0,1"
|
|
bitfld.long 0x00 24. " MAL ," "0,1"
|
|
bitfld.long 0x00 20. " STD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTD ," "0,1"
|
|
bitfld.long 0x00 18. " WTSR ," "0,1"
|
|
bitfld.long 0x00 17. " RFSE ," "0,1"
|
|
bitfld.long 0x00 16. " RFSR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "RXFF ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNF ," "0,1"
|
|
bitfld.long 0x00 4. " RXFE ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFF ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNE ," "0,1"
|
|
bitfld.long 0x00 0. " TXFE ," "0,1"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "MISR,I2C masked interrupt status register"
|
|
bitfld.long 0x00 28. " MTDWSIS ," "0,1"
|
|
bitfld.long 0x00 25. " BERRMIS ," "0,1"
|
|
bitfld.long 0x00 24. " MALMIS ," "0,1"
|
|
bitfld.long 0x00 20. " STDMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDMIS ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRMIS ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEMIS ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "RXFFMIS ," "0,1"
|
|
bitfld.long 0x00 5. " RXFNFMIS ," "0,1"
|
|
bitfld.long 0x00 4. " RXFEMIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXFOVRMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "TXFFMIS ," "0,1"
|
|
bitfld.long 0x00 1. " TXFNEMIS ," "0,1"
|
|
bitfld.long 0x00 0. " TXFEMIS ," "0,1"
|
|
wgroup 0x38++0x03
|
|
line.long 0x00 "ICR,I2C interrupt clear register"
|
|
bitfld.long 0x00 28. " MTDWSIC ," "0,1"
|
|
bitfld.long 0x00 25. " BERRIC ," "0,1"
|
|
bitfld.long 0x00 24. " MALIC ," "0,1"
|
|
bitfld.long 0x00 20. " STDIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. "MTDIC ," "0,1"
|
|
bitfld.long 0x00 18. " WTSRIC ," "0,1"
|
|
bitfld.long 0x00 17. " RFSEIC ," "0,1"
|
|
bitfld.long 0x00 16. " RFSRIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. "TXFOVRIC ," "0,1"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "ITCR,I2C integration test control register"
|
|
bitfld.long 0x00 1. " FIFOTEST ," "0,1"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
group 0x40++0x03
|
|
line.long 0x00 "ITIP,I2C integration test input register"
|
|
hexmask.long.word 0x00 16.--25. 1. " HWSADDR ,"
|
|
bitfld.long 0x00 15. " TSTNOIVCLK ," "0,1"
|
|
bitfld.long 0x00 7. " DMATCTX ," "0,1"
|
|
bitfld.long 0x00 6. " DMACLRTX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. "DMATCRX ," "0,1"
|
|
bitfld.long 0x00 4. " DMACLRRX ," "0,1"
|
|
bitfld.long 0x00 1. " SCLIN ," "0,1"
|
|
bitfld.long 0x00 0. " SDAIN ," "0,1"
|
|
group 0x44++0x03
|
|
line.long 0x00 "ITOP,I2C integration test output register"
|
|
bitfld.long 0x00 15. " INTGBL ," "0,1"
|
|
bitfld.long 0x00 6. " DMABREQTX ," "0,1"
|
|
bitfld.long 0x00 5. " DMASREQRX ," "0,1"
|
|
bitfld.long 0x00 4. " DMABREQRX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "ENCSPUHS ," "0,1"
|
|
bitfld.long 0x00 1. " SCLOUT ," "0,1"
|
|
bitfld.long 0x00 0. " SDAOUT ," "0,1"
|
|
group 0x48++0x03
|
|
line.long 0x00 "TDR,I2C Data Control Register"
|
|
hexmask.long 0x00 0.--31. 1. " TESTDATA ,"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "THDDAT,I2C hold time data"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDDAT ,"
|
|
group 0x50++0x03
|
|
line.long 0x00 "THDSTA_FST_STD,I2C hold time start condition F/S"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_THDSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDSTA_STD ,"
|
|
group 0x54++0x03
|
|
line.long 0x00 "THDSTA_FMP_HS,I2C hold time start condition FMP/HS"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_THDSTA_HS ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDSTA_FMP ,"
|
|
group 0x58++0x03
|
|
line.long 0x00 "TSUSTA_FST_STD,I2C setup time start condition F/S"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_TSUSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_TSUSTA_STD ,"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "TSUSTA_FMP_HS,I2C setup time start condition FMP/HS"
|
|
hexmask.long.word 0x00 16.--24. 1. " I2C_TSUSTA_FST ,"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_TSUSTA_STD ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PERIPHID0,I2C peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Partnumber0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PERIPHID1,I2C peripheral identification register 1"
|
|
bitfld.long 0x00 4.--7. " Designer0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Partnumber1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PERIPHID2,I2C peripheral identification register 2"
|
|
bitfld.long 0x00 4.--7. " Revision ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Designer1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PERIPHID3,I2C peripheral identification register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCELLID0,I2C PCell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCELLID1,I2C PCell Identification Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCELLID2,I2C PCell identification register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCELLID3,I2C PCell identification register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " I2CPCellID3 ,"
|
|
tree.end
|
|
tree "SSP_0"
|
|
base ad:0x40500000
|
|
width 11.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR0,CR0 - SSP Control Register0"
|
|
bitfld.long 0x00 0.--4. " DSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 5. " HALFDUP ," "0,1"
|
|
bitfld.long 0x00 6. " SPO ," "0,1"
|
|
bitfld.long 0x00 7. " SPH ," "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCR ,"
|
|
bitfld.long 0x00 16.--20. " CSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 21.--22. " FRF ," "0,1,2,3"
|
|
group 0x04++0x03
|
|
line.long 0x00 "CR1,CR1 - SSP Control Register1"
|
|
bitfld.long 0x00 0. " LBM ," "0,1"
|
|
bitfld.long 0x00 1. " SSE ," "0,1"
|
|
bitfld.long 0x00 2. " MS ," "0,1"
|
|
bitfld.long 0x00 3. " SOD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RENDN ," "0,1"
|
|
bitfld.long 0x00 5. " TENDN ," "0,1"
|
|
bitfld.long 0x00 6. " MWAIT ," "0,1"
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. "TXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "DR_WONLY,Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data Value"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "SR,SR - Status Register"
|
|
bitfld.long 0x00 0. " TFE ," "0,1"
|
|
bitfld.long 0x00 1. " TNF ," "0,1"
|
|
bitfld.long 0x00 2. " RNE ," "0,1"
|
|
bitfld.long 0x00 3. " RFF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "BSY ," "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "CPSR,CPSR SSP Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,clock prescale divisor value"
|
|
group 0x14++0x03
|
|
line.long 0x00 "IMSC,Interrupt set/clear mask register"
|
|
bitfld.long 0x00 0. " RORIM ," "0,1"
|
|
bitfld.long 0x00 1. " RTIM ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "RIS,RIS Register"
|
|
bitfld.long 0x00 0. " RORRIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTRIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "MIS,MIS Register"
|
|
bitfld.long 0x00 0. " RORMIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTMIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXMIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXMIS ," "0,1"
|
|
wgroup 0x20++0x03
|
|
line.long 0x00 "ICR,ICR Register"
|
|
bitfld.long 0x00 0. " RORIC ," "0,1"
|
|
bitfld.long 0x00 1. " RTIC ," "0,1"
|
|
group 0x24++0x03
|
|
line.long 0x00 "DMACR,DMACR Register"
|
|
bitfld.long 0x00 0. " RXDMAE ," "0,1"
|
|
bitfld.long 0x00 1. " TXDMAE ," "0,1"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,ITCR Register"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
bitfld.long 0x00 1. " TESTFIFO ," "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,ITIP Register"
|
|
bitfld.long 0x00 0. " SSPRXD ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSIN ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKIN ," "0,1"
|
|
bitfld.long 0x00 3. " RXDMAC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXDMAC ," "0,1"
|
|
bitfld.long 0x00 5. " SSPTXDIN ," "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,ITOP Register"
|
|
bitfld.long 0x00 0. " SSPTXDOUT ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSOUT ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKOUT ," "0,1"
|
|
bitfld.long 0x00 3. " SSPOEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "SSPCTLTOEN ," "0,1"
|
|
bitfld.long 0x00 5. " RORINTR ," "0,1"
|
|
bitfld.long 0x00 6. " RTINTR ," "0,1"
|
|
bitfld.long 0x00 7. " RXINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "TXINTR ," "0,1"
|
|
bitfld.long 0x00 9. " INTR ," "0,1"
|
|
bitfld.long 0x00 10. " RXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 11. " RXDMASREQ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "TXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 13. " TXDMASREQ ," "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TDR,Test data regiister"
|
|
hexmask.long 0x00 0.--31. 1. " TEST_DATA ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Peripheral Identification register 0"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PARTNUMBER0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Peripheral Identification register 1"
|
|
bitfld.long 0x00 0.--3. " PARTNUMBER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DESIGNER0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Peripheral Identification register 2"
|
|
bitfld.long 0x00 0.--3. " DESIGNER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Peripheral Identification register 3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CONFIGURATION ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell Identification register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID3 ,"
|
|
tree.end
|
|
tree "SSP_1"
|
|
base ad:0x40600000
|
|
width 11.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR0,CR0 - SSP Control Register0"
|
|
bitfld.long 0x00 0.--4. " DSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 5. " HALFDUP ," "0,1"
|
|
bitfld.long 0x00 6. " SPO ," "0,1"
|
|
bitfld.long 0x00 7. " SPH ," "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCR ,"
|
|
bitfld.long 0x00 16.--20. " CSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 21.--22. " FRF ," "0,1,2,3"
|
|
group 0x04++0x03
|
|
line.long 0x00 "CR1,CR1 - SSP Control Register1"
|
|
bitfld.long 0x00 0. " LBM ," "0,1"
|
|
bitfld.long 0x00 1. " SSE ," "0,1"
|
|
bitfld.long 0x00 2. " MS ," "0,1"
|
|
bitfld.long 0x00 3. " SOD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RENDN ," "0,1"
|
|
bitfld.long 0x00 5. " TENDN ," "0,1"
|
|
bitfld.long 0x00 6. " MWAIT ," "0,1"
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. "TXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "DR_WONLY,Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data Value"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "SR,SR - Status Register"
|
|
bitfld.long 0x00 0. " TFE ," "0,1"
|
|
bitfld.long 0x00 1. " TNF ," "0,1"
|
|
bitfld.long 0x00 2. " RNE ," "0,1"
|
|
bitfld.long 0x00 3. " RFF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "BSY ," "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "CPSR,CPSR SSP Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,clock prescale divisor value"
|
|
group 0x14++0x03
|
|
line.long 0x00 "IMSC,Interrupt set/clear mask register"
|
|
bitfld.long 0x00 0. " RORIM ," "0,1"
|
|
bitfld.long 0x00 1. " RTIM ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "RIS,RIS Register"
|
|
bitfld.long 0x00 0. " RORRIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTRIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "MIS,MIS Register"
|
|
bitfld.long 0x00 0. " RORMIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTMIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXMIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXMIS ," "0,1"
|
|
wgroup 0x20++0x03
|
|
line.long 0x00 "ICR,ICR Register"
|
|
bitfld.long 0x00 0. " RORIC ," "0,1"
|
|
bitfld.long 0x00 1. " RTIC ," "0,1"
|
|
group 0x24++0x03
|
|
line.long 0x00 "DMACR,DMACR Register"
|
|
bitfld.long 0x00 0. " RXDMAE ," "0,1"
|
|
bitfld.long 0x00 1. " TXDMAE ," "0,1"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,ITCR Register"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
bitfld.long 0x00 1. " TESTFIFO ," "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,ITIP Register"
|
|
bitfld.long 0x00 0. " SSPRXD ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSIN ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKIN ," "0,1"
|
|
bitfld.long 0x00 3. " RXDMAC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXDMAC ," "0,1"
|
|
bitfld.long 0x00 5. " SSPTXDIN ," "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,ITOP Register"
|
|
bitfld.long 0x00 0. " SSPTXDOUT ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSOUT ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKOUT ," "0,1"
|
|
bitfld.long 0x00 3. " SSPOEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "SSPCTLTOEN ," "0,1"
|
|
bitfld.long 0x00 5. " RORINTR ," "0,1"
|
|
bitfld.long 0x00 6. " RTINTR ," "0,1"
|
|
bitfld.long 0x00 7. " RXINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "TXINTR ," "0,1"
|
|
bitfld.long 0x00 9. " INTR ," "0,1"
|
|
bitfld.long 0x00 10. " RXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 11. " RXDMASREQ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "TXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 13. " TXDMASREQ ," "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TDR,Test data regiister"
|
|
hexmask.long 0x00 0.--31. 1. " TEST_DATA ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Peripheral Identification register 0"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PARTNUMBER0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Peripheral Identification register 1"
|
|
bitfld.long 0x00 0.--3. " PARTNUMBER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DESIGNER0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Peripheral Identification register 2"
|
|
bitfld.long 0x00 0.--3. " DESIGNER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Peripheral Identification register 3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CONFIGURATION ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell Identification register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID3 ,"
|
|
tree.end
|
|
tree "SSP_2"
|
|
base ad:0x40700000
|
|
width 11.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR0,CR0 - SSP Control Register0"
|
|
bitfld.long 0x00 0.--4. " DSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 5. " HALFDUP ," "0,1"
|
|
bitfld.long 0x00 6. " SPO ," "0,1"
|
|
bitfld.long 0x00 7. " SPH ," "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCR ,"
|
|
bitfld.long 0x00 16.--20. " CSS ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 21.--22. " FRF ," "0,1,2,3"
|
|
group 0x04++0x03
|
|
line.long 0x00 "CR1,CR1 - SSP Control Register1"
|
|
bitfld.long 0x00 0. " LBM ," "0,1"
|
|
bitfld.long 0x00 1. " SSE ," "0,1"
|
|
bitfld.long 0x00 2. " MS ," "0,1"
|
|
bitfld.long 0x00 3. " SOD ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RENDN ," "0,1"
|
|
bitfld.long 0x00 5. " TENDN ," "0,1"
|
|
bitfld.long 0x00 6. " MWAIT ," "0,1"
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. "TXIFLSEL ," "0,1,2,3,4,5,6,7"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "DR_WONLY,Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data Value"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "SR,SR - Status Register"
|
|
bitfld.long 0x00 0. " TFE ," "0,1"
|
|
bitfld.long 0x00 1. " TNF ," "0,1"
|
|
bitfld.long 0x00 2. " RNE ," "0,1"
|
|
bitfld.long 0x00 3. " RFF ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "BSY ," "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "CPSR,CPSR SSP Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,clock prescale divisor value"
|
|
group 0x14++0x03
|
|
line.long 0x00 "IMSC,Interrupt set/clear mask register"
|
|
bitfld.long 0x00 0. " RORIM ," "0,1"
|
|
bitfld.long 0x00 1. " RTIM ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "RIS,RIS Register"
|
|
bitfld.long 0x00 0. " RORRIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTRIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXRIS ," "0,1"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "MIS,MIS Register"
|
|
bitfld.long 0x00 0. " RORMIS ," "0,1"
|
|
bitfld.long 0x00 1. " RTMIS ," "0,1"
|
|
bitfld.long 0x00 2. " RXMIS ," "0,1"
|
|
bitfld.long 0x00 3. " TXMIS ," "0,1"
|
|
wgroup 0x20++0x03
|
|
line.long 0x00 "ICR,ICR Register"
|
|
bitfld.long 0x00 0. " RORIC ," "0,1"
|
|
bitfld.long 0x00 1. " RTIC ," "0,1"
|
|
group 0x24++0x03
|
|
line.long 0x00 "DMACR,DMACR Register"
|
|
bitfld.long 0x00 0. " RXDMAE ," "0,1"
|
|
bitfld.long 0x00 1. " TXDMAE ," "0,1"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,ITCR Register"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
bitfld.long 0x00 1. " TESTFIFO ," "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,ITIP Register"
|
|
bitfld.long 0x00 0. " SSPRXD ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSIN ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKIN ," "0,1"
|
|
bitfld.long 0x00 3. " RXDMAC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXDMAC ," "0,1"
|
|
bitfld.long 0x00 5. " SSPTXDIN ," "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,ITOP Register"
|
|
bitfld.long 0x00 0. " SSPTXDOUT ," "0,1"
|
|
bitfld.long 0x00 1. " SSPFSSOUT ," "0,1"
|
|
bitfld.long 0x00 2. " SSPCLKOUT ," "0,1"
|
|
bitfld.long 0x00 3. " SSPOEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "SSPCTLTOEN ," "0,1"
|
|
bitfld.long 0x00 5. " RORINTR ," "0,1"
|
|
bitfld.long 0x00 6. " RTINTR ," "0,1"
|
|
bitfld.long 0x00 7. " RXINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "TXINTR ," "0,1"
|
|
bitfld.long 0x00 9. " INTR ," "0,1"
|
|
bitfld.long 0x00 10. " RXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 11. " RXDMASREQ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "TXDMABREQ ," "0,1"
|
|
bitfld.long 0x00 13. " TXDMASREQ ," "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TDR,Test data regiister"
|
|
hexmask.long 0x00 0.--31. 1. " TEST_DATA ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Peripheral Identification register 0"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PARTNUMBER0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Peripheral Identification register 1"
|
|
bitfld.long 0x00 0.--3. " PARTNUMBER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DESIGNER0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Peripheral Identification register 2"
|
|
bitfld.long 0x00 0.--3. " DESIGNER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Peripheral Identification register 3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CONFIGURATION ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell Identification register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSPPCELLID3 ,"
|
|
tree.end
|
|
tree "UART_0"
|
|
base ad:0x40800000
|
|
width 17.
|
|
group 0x00++0x03
|
|
line.long 0x00 "DR,UART_DR- UART Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DR_DATA ,Transmit/receive Data"
|
|
bitfld.long 0x00 8. " DR_FE ,Framing Error" "0,1"
|
|
bitfld.long 0x00 9. " DR_PE ,Parity Error" "0,1"
|
|
bitfld.long 0x00 10. " DR_PE ,Break Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. "DR_OE ,Overun Error" "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "RSR_ECR,UART_RSR_ECR - UART receive status or error clear Register"
|
|
bitfld.long 0x00 0. " RSR_ECR_FE ,Framing Error" "0,1"
|
|
bitfld.long 0x00 1. " RSR_ECR_PE ,Parity Error" "0,1"
|
|
bitfld.long 0x00 2. " RSR_ECR_BE ,Break Error" "0,1"
|
|
bitfld.long 0x00 3. " RSR_ECR_OE ,Overrun Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. "RSR_ECR_X ,X" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group 0x08++0x03
|
|
line.long 0x00 "DMAWM,UART_DMAWM - UART water markRegister"
|
|
bitfld.long 0x00 0.--2. " DMAWM_TXDMAWM ,Transmit DMA Watermark" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " DMAWM_RXDMAWM ,Receive DMA Watermark" "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "TIMEOUT,UART_TIMEOUT UART Timeout Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. " TIMEOUT_TIMEOUTPERIOD ,Timeout_period"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "FR,UART_FR - UART Flag Register"
|
|
bitfld.long 0x00 0. " FR_CTS ,Clear to Send" "0,1"
|
|
bitfld.long 0x00 1. " FR_DSR ,Data set Ready" "0,1"
|
|
bitfld.long 0x00 2. " FR_DCD ,Data carrier Detect" "0,1"
|
|
bitfld.long 0x00 3. " FR_BUSY ,Uart Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "FR_RXFE ,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x00 5. " FR_TXFF ,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x00 6. " FR_RXFF ,Receive FIFO full" "0,1"
|
|
bitfld.long 0x00 7. " FR_TXFE ,Transmit FIFO empty" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "FR_RI ,Ring Indicator" "0,1"
|
|
bitfld.long 0x00 9. " FR_DCTS ,Delta clear to send" "0,1"
|
|
bitfld.long 0x00 10. " FR_DDSR ,Delta data set ready" "0,1"
|
|
bitfld.long 0x00 11. " FR_DDCD ,Delta data carrier detect" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "FR_TERI ,Trailing edge ring indicator" "0,1"
|
|
bitfld.long 0x00 13. " FR_RTXDIS ,Remote Transmitter disabled" "0,1"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "LCRH_RX,UART_LCRH_RX - UART Receive line control Register"
|
|
bitfld.long 0x00 0. " LCRH_RX_0 ,X" "0,1"
|
|
bitfld.long 0x00 1. " LCRH_RX_PEN_RX ,RX Parity Enable" "0,1"
|
|
bitfld.long 0x00 2. " LCRH_RX_EPS_RX ,RX Even Parity select" "0,1"
|
|
bitfld.long 0x00 3. " LCRH_RX_STP2_RX ,RX Two stop bits select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "LCRH_RX_FEN_RX ,RX Enable FIFOs" "0,1"
|
|
bitfld.long 0x00 5.--6. " LCRH_RX_WLEN_RX ,RX Word length" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LCRH_RX_SPS_RX ,RX Stick parity select" "0,1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "ILPR,UART_ILPR - UART IrDA low-power Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ILPR_ILPDVSR ,IrDA low-power divisor"
|
|
group 0x24++0x03
|
|
line.long 0x00 "IBRD,UART_IBRD - UART integer baud rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " IBRD_DIVINT ,Baud rate integer"
|
|
group 0x28++0x03
|
|
line.long 0x00 "FBRD,UART_FBRD - UART fractional baud rate Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " FBRD_DIVFRAC ,Baud rate fraction"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "LCRH_TX,UART_LCRH_TX - UART Transmit line control Register"
|
|
bitfld.long 0x00 0. " LCRH_TX_BRX ,TX Send break" "0,1"
|
|
bitfld.long 0x00 1. " LCRH_TX_PEN_TX ,TX Parity Enable" "0,1"
|
|
bitfld.long 0x00 2. " LCRH_TX_EPS_TX ,Even Parity select" "0,1"
|
|
bitfld.long 0x00 3. " LCRH_TX_STP2_TX ,TX two stop bits select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "LCRH_TX_FEN_TX ,TX Enable FIFOs" "0,1"
|
|
bitfld.long 0x00 5.--6. " LCRH_TX_WLEN_TX ,TX Word length" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LCRH_TX_SPS_TX ,TX Stick parity select" "0,1"
|
|
group 0x30++0x03
|
|
line.long 0x00 "CR,UART_CR - UART control Register"
|
|
bitfld.long 0x00 0. " CR_UARTEN ,UART Enable" "0,1"
|
|
bitfld.long 0x00 3. " CR_OVSFACT ,UART oversampling factor" "0,1"
|
|
bitfld.long 0x00 7. " CR_LBE ,Loopback enable" "0,1"
|
|
bitfld.long 0x00 8. " CR_TXE ,Transmit enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. "CR_RXE ,Receive enable" "0,1"
|
|
bitfld.long 0x00 10. " CR_DTR ,Data Transmit ready" "0,1"
|
|
bitfld.long 0x00 11. " CR_RTS ,Request to send" "0,1"
|
|
bitfld.long 0x00 14. " CR_RTSEN ,RTS hardware flow control enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. "CR_CTSEN ,CTS hardware flow control enable" "0,1"
|
|
group 0x34++0x03
|
|
line.long 0x00 "IFLS,UART_IFLS - UART interrupt FIFO level select Register"
|
|
bitfld.long 0x00 0.--2. " IFLS_TXIFLSEL ,Transmit interrupt FIFO level select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " IFLS_RXIFLSEL ,Receive interrupt FIFO level select" "0,1,2,3,4,5,6,7"
|
|
group 0x38++0x03
|
|
line.long 0x00 "IMSC,UART_IMSC - UART interrupt mask set/clear Register"
|
|
bitfld.long 0x00 0. " IMSC_RIMIM ,Ring indicator modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 1. " IMSC_CTSMIM ,Clear to send modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 2. " IMSC_DCDMIM ,Data carrier detect modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 3. " IMSC_DSRMIM ,Data set ready modem interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "IMSC_RXIM ,Receive interrupt mask" "0,1"
|
|
bitfld.long 0x00 5. " IMSC_TXIM ,Transmit interrupt mask" "0,1"
|
|
bitfld.long 0x00 6. " IMSC_RTIM ,Receive timeout interrupt mask" "0,1"
|
|
bitfld.long 0x00 7. " IMSC_FEIM ,Framing error interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "IMSC_PEIM ,Parity error interrupt mask" "0,1"
|
|
bitfld.long 0x00 9. " IMSC_BEIM ,Break error interrupt mask" "0,1"
|
|
bitfld.long 0x00 10. " IMSC_OEIM ,Overrun error interrupt mask" "0,1"
|
|
bitfld.long 0x00 11. " IMSC_XOFFIM ,XOFF interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "IMSC_TXFEIM ,TX FIFO empty interrupt mask" "0,1"
|
|
rgroup 0x3C++0x03
|
|
line.long 0x00 "RIS,UART_RIS - UART raw interrupt Register"
|
|
bitfld.long 0x00 0. " RIS_RIMIS ,Ring indicator modem interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " RIS_CTSMIS ,Clear to send modem interrupt status" "0,1"
|
|
bitfld.long 0x00 2. " RIS_DCDMIS ,Data carrier detect modem interrupt status" "0,1"
|
|
bitfld.long 0x00 3. " RIS_DSRMIS ,Data set ready modem interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RIS_RXRIS ,Receive interrupt status" "0,1"
|
|
bitfld.long 0x00 5. " RIS_TXRIS ,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x00 6. " RIS_RTRIS ,Receive timeout interrupt status" "0,1"
|
|
bitfld.long 0x00 7. " RIS_FERIS ,Framing error interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RIS_PERIS ,Parity error interrupt status" "0,1"
|
|
bitfld.long 0x00 9. " RIS_BERIS ,Break error interrupt status" "0,1"
|
|
bitfld.long 0x00 10. " RIS_OERIS ,Overrun error interrupt status" "0,1"
|
|
bitfld.long 0x00 11. " RIS_XOFFRIS ,XOFF interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "RIS_TXFERIS ,TX FIFO empty interrupt status" "0,1"
|
|
rgroup 0x40++0x03
|
|
line.long 0x00 "MIS,UART_MIS - UART masked interrupt Register"
|
|
bitfld.long 0x00 0. " MIS_RIMMIS ,Ring indicator modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " MIS_CTSMMIS ,Clear to send modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 2. " MIS_DCDMMIS ,Data carrier detect modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 3. " MIS_DSRMMIS ,Data set ready modem masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "MIS_RXMIS ,Receive interrupt status" "0,1"
|
|
bitfld.long 0x00 5. " MIS_TXMIS ,Transmit masked interrupt status" "0,1"
|
|
bitfld.long 0x00 6. " MIS_RTMIS ,Receive timeout masked interrupt status" "0,1"
|
|
bitfld.long 0x00 7. " MIS_FEMIS ,Framing error masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "MIS_PEMIS ,Parity error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 9. " MIS_BEMIS ,Break error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 10. " MIS_OEMIS ,Overrun error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 11. " MIS_XOFFMIS ,XOFF masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "MIS_TXFEMIS ,TX FIFO empty masked interrupt status" "0,1"
|
|
group 0x44++0x03
|
|
line.long 0x00 "ICR,UART_ICR - UART interrupt clear Register"
|
|
bitfld.long 0x00 0. " ICR_RIMIC ,Ring indicator modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 1. " ICR_CTSMIC ,Clear to send modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 2. " ICR_DCDMIC ,Data carrier detect modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 3. " ICR_DSRMIC ,Data set ready modem interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ICR_RXIC ,Receive interrupt clear" "0,1"
|
|
bitfld.long 0x00 5. " ICR_TXIC ,Transmit interrupt clear" "0,1"
|
|
bitfld.long 0x00 6. " ICR_RTIC ,Receive timeout interrupt clear" "0,1"
|
|
bitfld.long 0x00 7. " ICR_FEIC ,Framing error interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "ICR_PEIC ,Parity error interrupt clear" "0,1"
|
|
bitfld.long 0x00 9. " ICR_BEIC ,Break error interrupt clear" "0,1"
|
|
bitfld.long 0x00 10. " ICR_OEIC ,Overrun error interrupt clear" "0,1"
|
|
bitfld.long 0x00 11. " ICR_XOFFIC ,XOFF interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "ICR_TXFEIC ,TX FIFO empty interrupt clear" "0,1"
|
|
group 0x48++0x03
|
|
line.long 0x00 "DMACR,UART_DMACR - UART DMA control Register"
|
|
bitfld.long 0x00 0. " DMACR_RXDMAE ,Receive DMA enable bit" "0,1"
|
|
bitfld.long 0x00 1. " DMACR_TXDMAE ,Transmit DMA enable bit" "0,1"
|
|
bitfld.long 0x00 2. " DMACR_DMAONERR ,DMA on error" "0,1"
|
|
group 0x50++0x03
|
|
line.long 0x00 "XFCR,UART_XFCR - UART XON/XOFF control Register"
|
|
bitfld.long 0x00 0. " XFCR_SFEN ,Software flow control enable" "0,1"
|
|
bitfld.long 0x00 1.--2. " XFCR_SFRMOD ,Software receive flow control mode" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. " XFCR_SFTMOD ,Software transmit flow control mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. " XFCR_XONANY ,Xon-any bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "XFCR_SPECHR ,Special character detection bit" "0,1"
|
|
group 0x54++0x03
|
|
line.long 0x00 "XON1,UART XONn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XONn ,XONn character"
|
|
group 0x58++0x03
|
|
line.long 0x00 "XON2,UART XONn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XONn ,XONn character"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "XOFF1,UART XOFFNn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XOFFn ,XOFFn character"
|
|
group 0x60++0x03
|
|
line.long 0x00 "XOFF2,UART XOFFNn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XOFFn ,XOFFn character"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,UART_ITCR - UART integration test control Register"
|
|
bitfld.long 0x00 0. " ITCR_ITEN ,integration test enable bit" "0,1"
|
|
bitfld.long 0x00 1. " ITCR_TESTFIFO ,FIFO test enable bit" "0,1"
|
|
bitfld.long 0x00 2. " ITCR_SIRTEST ,SIR test enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,UART_ITIP - UART integration test input Register"
|
|
bitfld.long 0x00 0. " ITIP_RXD ,Receive data input value" "0,1"
|
|
bitfld.long 0x00 1. " ITIP_SIRIN ,IrDA input value" "0,1"
|
|
bitfld.long 0x00 2. " ITIP_DSRN ,Data set ready input value" "0,1"
|
|
bitfld.long 0x00 3. " ITIP_CTSN ,Clear to send input value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ITIP_DCDN ,Data carrier detect input value" "0,1"
|
|
bitfld.long 0x00 5. " ITIP_RIN ,Ring indicator input value" "0,1"
|
|
bitfld.long 0x00 6. " ITIP_RXDMAC ,Receive DMA request clear" "0,1"
|
|
bitfld.long 0x00 7. " ITIP_TXDMAC ,Transmit DMA request clear" "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,UART_ITOP - UART integration test output Register"
|
|
bitfld.long 0x00 0. " ITIP_TXD ,UTXDx output x value" "0,1"
|
|
bitfld.long 0x00 1. " ITIP_SIROUTn ,USIROUTxn output x value" "0,1"
|
|
bitfld.long 0x00 2. " ITIP_DTRN ,UDTRNxn output x value" "0,1"
|
|
bitfld.long 0x00 3. " ITIP_RTSN ,URTSxn output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ITIP_OUTAN ,UOUTAxn output x value" "0,1"
|
|
bitfld.long 0x00 5. " ITIP_OUTBN ,UOUTBxn output x value" "0,1"
|
|
bitfld.long 0x00 6. " ITIP_I ,UARTINTR output x value" "0,1"
|
|
bitfld.long 0x00 7. " ITIP_EI ,UARTEINTR output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "ITIP_RTI ,UARTRTINTR output x value" "0,1"
|
|
bitfld.long 0x00 9. " ITIP_TXI ,UARTTXINTR output x value" "0,1"
|
|
bitfld.long 0x00 10. " ITIP_RXI ,UARTRXINTR output x value" "0,1"
|
|
bitfld.long 0x00 11. " ITIP_MSI ,UARTMSINTR output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "ITIP_RXDMABR ,UARTRXDMABREQ output x value" "0,1"
|
|
bitfld.long 0x00 13. " ITIP_RXDMASR ,UARTRXDMASREQ output x value" "0,1"
|
|
bitfld.long 0x00 14. " ITIP_TXDMABR ,UARTTXDMABREQ output x value" "0,1"
|
|
bitfld.long 0x00 15. " ITIP_TXDMASR ,UARTTXDMASREQ output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "ITIP_ABERRI ,UARTABERRINTR output x value" "0,1"
|
|
bitfld.long 0x00 17. " ITIP_ABDONEI ,UARTABDONEINTR output x value" "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TDR,UART_TDR - UART test data Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " TDR_TESTDATA ,FIFO test data"
|
|
group 0x100++0x03
|
|
line.long 0x00 "ABCR,UART_ABCR - UART Autobaud control Register"
|
|
bitfld.long 0x00 0. " ABCR_ACFGEN ,AutoConfig Enable" "0,1"
|
|
bitfld.long 0x00 1. " ABCR_RESTART ,Autobaud restart Enable" "0,1"
|
|
bitfld.long 0x00 2. " ABCR_UPDATEN ,Autobaud update Enable" "0,1"
|
|
rgroup 0x104++0x03
|
|
line.long 0x00 "ABSR,UART_ABCR - UART Autobaud Status Register"
|
|
bitfld.long 0x00 0.--2. " ABSR_BYTE2S ,Byte 2 status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " ABSR_BYTE1S ,Byte 1 status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. " ABSR_VALFMT ,Valid format detected" "0,1"
|
|
bitfld.long 0x00 9.--10. " ABSR_CMDERR ,Bad command sequence detected" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 11. "ABSR_BAUDERR ,Invalid baud rate status bit" "0,1"
|
|
bitfld.long 0x00 12. " ABSR_ACDONE ,Autconfig complete status bit" "0,1"
|
|
rgroup 0x108++0x03
|
|
line.long 0x00 "ABFMT,UART_ABFMT - UART Autobaud format Register"
|
|
bitfld.long 0x00 1. " ABFMT_PEN ,Parity enable" "0,1"
|
|
bitfld.long 0x00 2. " ABFMT_EPS ,Even parity select" "0,1"
|
|
bitfld.long 0x00 3. " ABFMT_STP2 ,Two stop bits select" "0,1"
|
|
bitfld.long 0x00 4. " ABFMT_FEN ,FIFO enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. "ABFMT_WLEN ,Word length" "0,1,2,3"
|
|
rgroup 0x150++0x03
|
|
line.long 0x00 "ABDR,UART_ABDR - UART Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ABDR_AUTOBAUDBDR ,AutoBaud divisor value"
|
|
rgroup 0x154++0x03
|
|
line.long 0x00 "ABDFR,UART_ABDFR - UART Autobaud Divisor fraction Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ABDFR_AUTOBAUDBDFR ,AutoBaud divisor fraction value"
|
|
rgroup 0x158++0x03
|
|
line.long 0x00 "ABMR,UART_ABMR - UART Autobaud measurement Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " ABMR_AUTOBAUDBMR ,AutoBaud measurement value"
|
|
group 0x15C++0x03
|
|
line.long 0x00 "ABIMSC,UART_ABIMSC - UART Autobaud interrupt mask set/clear Register"
|
|
bitfld.long 0x00 0. " ABIMSC_ABERRIM ,AutoBaud error interrupt mask" "0,1"
|
|
bitfld.long 0x00 1. " ABIMSC_ABDONEIM ,AutoBaud done interrupt mask" "0,1"
|
|
group 0x160++0x03
|
|
line.long 0x00 "ABRIS,UART_ABRIS - UART Autobaud raw interrupt Register"
|
|
bitfld.long 0x00 0. " ABRIS_ABERRRIS ,Break error interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " ABRIS_ABDONERIS ,Overrun error interrupt status" "0,1"
|
|
group 0x164++0x03
|
|
line.long 0x00 "ABMIS,UART_ABMIS - UART Autobaud masked interrupt Register"
|
|
bitfld.long 0x00 0. " ABMIS_ABERRMIS ,Autobaud error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " ABMIS_ABDONEMIS ,Autobaud done masked interrupt status" "0,1"
|
|
group 0x168++0x03
|
|
line.long 0x00 "ABICR,UART_ABICR - UART Autobaud interrupt clear Register"
|
|
bitfld.long 0x00 0. " ABICR_ABERRIC ,Autobaud error interrupt clear" "0,1"
|
|
bitfld.long 0x00 1. " ABICR_ABDONEIC ,Autobaud done interrupt clear" "0,1"
|
|
rgroup 0xFD8++0x03
|
|
line.long 0x00 "ID_PRODUCT_H_XY,UART_ID_PRODUCT_H_XY - UART Identification product Register"
|
|
bitfld.long 0x00 0.--3. " ID_PRODUCT_H_XY_Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " ID_PRODUCT_H_XY_X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--9. " ID_PRODUCT_H_XY_H ,Integration number" "0,1,2,3"
|
|
hexmask.long.byte 0x00 10.--17. 1. " ID_PRODUCT_H_XY_PRODUCT_ID ,Revision number"
|
|
rgroup 0xFDC++0x03
|
|
line.long 0x00 "ID_PROVIDER,UART_ID_PROVIDER - UART Identification product Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " PROVIDER_ID ,UART Provider Identification"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PERIPHID0,UART_PERIPHID0 - UART peripheral identification Register0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHID0_PARTNUMBER0 ,UART Part Number0"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PERIPHID1,UART_PERIPHID1 - UART peripheral identification Register1"
|
|
bitfld.long 0x00 0.--3. " PERIPHID1_PARTNUMBER1 ,UART Part Number1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " PERIPHID1_DESIGNER0 ,UART Designer Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PERIPHID2,UART_PERIPHID1 - UART peripheral identification Register2"
|
|
bitfld.long 0x00 0.--3. " PERIPHID2_DESIGNER1 ,UART Designer Number1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " PERIPHID2_REVISION ,UART Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PERIPHID3,UART_PERIPHID0 - UART peripheral identification Register3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHID3_CONFIGURATION ,UART Configuration"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCELLID0,UART_PCELLID0 - UART Pcell identification Register0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID0_UARTXPCELLID0 ,UART Pcell identification"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCELLID1,UART_PCELLID1 - UART Pcell identification Register1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID1_UARTXPCELLID1 ,UART Pcell identification"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCELLID2,UART_PCELLID2 - UART Pcell identification Register2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID2_UARTXPCELLID2 ,UART Pcell identification"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCELLID3,UART_PCELLID3 - UART Pcell identification Register3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID3_UARTXPCELLID3 ,UART Pcell identification"
|
|
tree.end
|
|
tree "UART_1"
|
|
base ad:0x40900000
|
|
width 17.
|
|
group 0x00++0x03
|
|
line.long 0x00 "DR,UART_DR- UART Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DR_DATA ,Transmit/receive Data"
|
|
bitfld.long 0x00 8. " DR_FE ,Framing Error" "0,1"
|
|
bitfld.long 0x00 9. " DR_PE ,Parity Error" "0,1"
|
|
bitfld.long 0x00 10. " DR_PE ,Break Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. "DR_OE ,Overun Error" "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "RSR_ECR,UART_RSR_ECR - UART receive status or error clear Register"
|
|
bitfld.long 0x00 0. " RSR_ECR_FE ,Framing Error" "0,1"
|
|
bitfld.long 0x00 1. " RSR_ECR_PE ,Parity Error" "0,1"
|
|
bitfld.long 0x00 2. " RSR_ECR_BE ,Break Error" "0,1"
|
|
bitfld.long 0x00 3. " RSR_ECR_OE ,Overrun Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. "RSR_ECR_X ,X" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group 0x08++0x03
|
|
line.long 0x00 "DMAWM,UART_DMAWM - UART water markRegister"
|
|
bitfld.long 0x00 0.--2. " DMAWM_TXDMAWM ,Transmit DMA Watermark" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " DMAWM_RXDMAWM ,Receive DMA Watermark" "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "TIMEOUT,UART_TIMEOUT UART Timeout Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. " TIMEOUT_TIMEOUTPERIOD ,Timeout_period"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "FR,UART_FR - UART Flag Register"
|
|
bitfld.long 0x00 0. " FR_CTS ,Clear to Send" "0,1"
|
|
bitfld.long 0x00 1. " FR_DSR ,Data set Ready" "0,1"
|
|
bitfld.long 0x00 2. " FR_DCD ,Data carrier Detect" "0,1"
|
|
bitfld.long 0x00 3. " FR_BUSY ,Uart Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "FR_RXFE ,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x00 5. " FR_TXFF ,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x00 6. " FR_RXFF ,Receive FIFO full" "0,1"
|
|
bitfld.long 0x00 7. " FR_TXFE ,Transmit FIFO empty" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "FR_RI ,Ring Indicator" "0,1"
|
|
bitfld.long 0x00 9. " FR_DCTS ,Delta clear to send" "0,1"
|
|
bitfld.long 0x00 10. " FR_DDSR ,Delta data set ready" "0,1"
|
|
bitfld.long 0x00 11. " FR_DDCD ,Delta data carrier detect" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "FR_TERI ,Trailing edge ring indicator" "0,1"
|
|
bitfld.long 0x00 13. " FR_RTXDIS ,Remote Transmitter disabled" "0,1"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "LCRH_RX,UART_LCRH_RX - UART Receive line control Register"
|
|
bitfld.long 0x00 0. " LCRH_RX_0 ,X" "0,1"
|
|
bitfld.long 0x00 1. " LCRH_RX_PEN_RX ,RX Parity Enable" "0,1"
|
|
bitfld.long 0x00 2. " LCRH_RX_EPS_RX ,RX Even Parity select" "0,1"
|
|
bitfld.long 0x00 3. " LCRH_RX_STP2_RX ,RX Two stop bits select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "LCRH_RX_FEN_RX ,RX Enable FIFOs" "0,1"
|
|
bitfld.long 0x00 5.--6. " LCRH_RX_WLEN_RX ,RX Word length" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LCRH_RX_SPS_RX ,RX Stick parity select" "0,1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "ILPR,UART_ILPR - UART IrDA low-power Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ILPR_ILPDVSR ,IrDA low-power divisor"
|
|
group 0x24++0x03
|
|
line.long 0x00 "IBRD,UART_IBRD - UART integer baud rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " IBRD_DIVINT ,Baud rate integer"
|
|
group 0x28++0x03
|
|
line.long 0x00 "FBRD,UART_FBRD - UART fractional baud rate Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " FBRD_DIVFRAC ,Baud rate fraction"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "LCRH_TX,UART_LCRH_TX - UART Transmit line control Register"
|
|
bitfld.long 0x00 0. " LCRH_TX_BRX ,TX Send break" "0,1"
|
|
bitfld.long 0x00 1. " LCRH_TX_PEN_TX ,TX Parity Enable" "0,1"
|
|
bitfld.long 0x00 2. " LCRH_TX_EPS_TX ,Even Parity select" "0,1"
|
|
bitfld.long 0x00 3. " LCRH_TX_STP2_TX ,TX two stop bits select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "LCRH_TX_FEN_TX ,TX Enable FIFOs" "0,1"
|
|
bitfld.long 0x00 5.--6. " LCRH_TX_WLEN_TX ,TX Word length" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LCRH_TX_SPS_TX ,TX Stick parity select" "0,1"
|
|
group 0x30++0x03
|
|
line.long 0x00 "CR,UART_CR - UART control Register"
|
|
bitfld.long 0x00 0. " CR_UARTEN ,UART Enable" "0,1"
|
|
bitfld.long 0x00 3. " CR_OVSFACT ,UART oversampling factor" "0,1"
|
|
bitfld.long 0x00 7. " CR_LBE ,Loopback enable" "0,1"
|
|
bitfld.long 0x00 8. " CR_TXE ,Transmit enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. "CR_RXE ,Receive enable" "0,1"
|
|
bitfld.long 0x00 10. " CR_DTR ,Data Transmit ready" "0,1"
|
|
bitfld.long 0x00 11. " CR_RTS ,Request to send" "0,1"
|
|
bitfld.long 0x00 14. " CR_RTSEN ,RTS hardware flow control enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. "CR_CTSEN ,CTS hardware flow control enable" "0,1"
|
|
group 0x34++0x03
|
|
line.long 0x00 "IFLS,UART_IFLS - UART interrupt FIFO level select Register"
|
|
bitfld.long 0x00 0.--2. " IFLS_TXIFLSEL ,Transmit interrupt FIFO level select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " IFLS_RXIFLSEL ,Receive interrupt FIFO level select" "0,1,2,3,4,5,6,7"
|
|
group 0x38++0x03
|
|
line.long 0x00 "IMSC,UART_IMSC - UART interrupt mask set/clear Register"
|
|
bitfld.long 0x00 0. " IMSC_RIMIM ,Ring indicator modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 1. " IMSC_CTSMIM ,Clear to send modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 2. " IMSC_DCDMIM ,Data carrier detect modem interrupt mask" "0,1"
|
|
bitfld.long 0x00 3. " IMSC_DSRMIM ,Data set ready modem interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "IMSC_RXIM ,Receive interrupt mask" "0,1"
|
|
bitfld.long 0x00 5. " IMSC_TXIM ,Transmit interrupt mask" "0,1"
|
|
bitfld.long 0x00 6. " IMSC_RTIM ,Receive timeout interrupt mask" "0,1"
|
|
bitfld.long 0x00 7. " IMSC_FEIM ,Framing error interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "IMSC_PEIM ,Parity error interrupt mask" "0,1"
|
|
bitfld.long 0x00 9. " IMSC_BEIM ,Break error interrupt mask" "0,1"
|
|
bitfld.long 0x00 10. " IMSC_OEIM ,Overrun error interrupt mask" "0,1"
|
|
bitfld.long 0x00 11. " IMSC_XOFFIM ,XOFF interrupt mask" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "IMSC_TXFEIM ,TX FIFO empty interrupt mask" "0,1"
|
|
rgroup 0x3C++0x03
|
|
line.long 0x00 "RIS,UART_RIS - UART raw interrupt Register"
|
|
bitfld.long 0x00 0. " RIS_RIMIS ,Ring indicator modem interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " RIS_CTSMIS ,Clear to send modem interrupt status" "0,1"
|
|
bitfld.long 0x00 2. " RIS_DCDMIS ,Data carrier detect modem interrupt status" "0,1"
|
|
bitfld.long 0x00 3. " RIS_DSRMIS ,Data set ready modem interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RIS_RXRIS ,Receive interrupt status" "0,1"
|
|
bitfld.long 0x00 5. " RIS_TXRIS ,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x00 6. " RIS_RTRIS ,Receive timeout interrupt status" "0,1"
|
|
bitfld.long 0x00 7. " RIS_FERIS ,Framing error interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RIS_PERIS ,Parity error interrupt status" "0,1"
|
|
bitfld.long 0x00 9. " RIS_BERIS ,Break error interrupt status" "0,1"
|
|
bitfld.long 0x00 10. " RIS_OERIS ,Overrun error interrupt status" "0,1"
|
|
bitfld.long 0x00 11. " RIS_XOFFRIS ,XOFF interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "RIS_TXFERIS ,TX FIFO empty interrupt status" "0,1"
|
|
rgroup 0x40++0x03
|
|
line.long 0x00 "MIS,UART_MIS - UART masked interrupt Register"
|
|
bitfld.long 0x00 0. " MIS_RIMMIS ,Ring indicator modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " MIS_CTSMMIS ,Clear to send modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 2. " MIS_DCDMMIS ,Data carrier detect modem masked interrupt status" "0,1"
|
|
bitfld.long 0x00 3. " MIS_DSRMMIS ,Data set ready modem masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "MIS_RXMIS ,Receive interrupt status" "0,1"
|
|
bitfld.long 0x00 5. " MIS_TXMIS ,Transmit masked interrupt status" "0,1"
|
|
bitfld.long 0x00 6. " MIS_RTMIS ,Receive timeout masked interrupt status" "0,1"
|
|
bitfld.long 0x00 7. " MIS_FEMIS ,Framing error masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "MIS_PEMIS ,Parity error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 9. " MIS_BEMIS ,Break error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 10. " MIS_OEMIS ,Overrun error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 11. " MIS_XOFFMIS ,XOFF masked interrupt status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "MIS_TXFEMIS ,TX FIFO empty masked interrupt status" "0,1"
|
|
group 0x44++0x03
|
|
line.long 0x00 "ICR,UART_ICR - UART interrupt clear Register"
|
|
bitfld.long 0x00 0. " ICR_RIMIC ,Ring indicator modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 1. " ICR_CTSMIC ,Clear to send modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 2. " ICR_DCDMIC ,Data carrier detect modem interrupt clear" "0,1"
|
|
bitfld.long 0x00 3. " ICR_DSRMIC ,Data set ready modem interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ICR_RXIC ,Receive interrupt clear" "0,1"
|
|
bitfld.long 0x00 5. " ICR_TXIC ,Transmit interrupt clear" "0,1"
|
|
bitfld.long 0x00 6. " ICR_RTIC ,Receive timeout interrupt clear" "0,1"
|
|
bitfld.long 0x00 7. " ICR_FEIC ,Framing error interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "ICR_PEIC ,Parity error interrupt clear" "0,1"
|
|
bitfld.long 0x00 9. " ICR_BEIC ,Break error interrupt clear" "0,1"
|
|
bitfld.long 0x00 10. " ICR_OEIC ,Overrun error interrupt clear" "0,1"
|
|
bitfld.long 0x00 11. " ICR_XOFFIC ,XOFF interrupt clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "ICR_TXFEIC ,TX FIFO empty interrupt clear" "0,1"
|
|
group 0x48++0x03
|
|
line.long 0x00 "DMACR,UART_DMACR - UART DMA control Register"
|
|
bitfld.long 0x00 0. " DMACR_RXDMAE ,Receive DMA enable bit" "0,1"
|
|
bitfld.long 0x00 1. " DMACR_TXDMAE ,Transmit DMA enable bit" "0,1"
|
|
bitfld.long 0x00 2. " DMACR_DMAONERR ,DMA on error" "0,1"
|
|
group 0x50++0x03
|
|
line.long 0x00 "XFCR,UART_XFCR - UART XON/XOFF control Register"
|
|
bitfld.long 0x00 0. " XFCR_SFEN ,Software flow control enable" "0,1"
|
|
bitfld.long 0x00 1.--2. " XFCR_SFRMOD ,Software receive flow control mode" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. " XFCR_SFTMOD ,Software transmit flow control mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. " XFCR_XONANY ,Xon-any bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "XFCR_SPECHR ,Special character detection bit" "0,1"
|
|
group 0x54++0x03
|
|
line.long 0x00 "XON1,UART XONn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XONn ,XONn character"
|
|
group 0x58++0x03
|
|
line.long 0x00 "XON2,UART XONn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XONn ,XONn character"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "XOFF1,UART XOFFNn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XOFFn ,XOFFn character"
|
|
group 0x60++0x03
|
|
line.long 0x00 "XOFF2,UART XOFFNn registerRegisters"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XOFFn ,XOFFn character"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,UART_ITCR - UART integration test control Register"
|
|
bitfld.long 0x00 0. " ITCR_ITEN ,integration test enable bit" "0,1"
|
|
bitfld.long 0x00 1. " ITCR_TESTFIFO ,FIFO test enable bit" "0,1"
|
|
bitfld.long 0x00 2. " ITCR_SIRTEST ,SIR test enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,UART_ITIP - UART integration test input Register"
|
|
bitfld.long 0x00 0. " ITIP_RXD ,Receive data input value" "0,1"
|
|
bitfld.long 0x00 1. " ITIP_SIRIN ,IrDA input value" "0,1"
|
|
bitfld.long 0x00 2. " ITIP_DSRN ,Data set ready input value" "0,1"
|
|
bitfld.long 0x00 3. " ITIP_CTSN ,Clear to send input value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ITIP_DCDN ,Data carrier detect input value" "0,1"
|
|
bitfld.long 0x00 5. " ITIP_RIN ,Ring indicator input value" "0,1"
|
|
bitfld.long 0x00 6. " ITIP_RXDMAC ,Receive DMA request clear" "0,1"
|
|
bitfld.long 0x00 7. " ITIP_TXDMAC ,Transmit DMA request clear" "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,UART_ITOP - UART integration test output Register"
|
|
bitfld.long 0x00 0. " ITIP_TXD ,UTXDx output x value" "0,1"
|
|
bitfld.long 0x00 1. " ITIP_SIROUTn ,USIROUTxn output x value" "0,1"
|
|
bitfld.long 0x00 2. " ITIP_DTRN ,UDTRNxn output x value" "0,1"
|
|
bitfld.long 0x00 3. " ITIP_RTSN ,URTSxn output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ITIP_OUTAN ,UOUTAxn output x value" "0,1"
|
|
bitfld.long 0x00 5. " ITIP_OUTBN ,UOUTBxn output x value" "0,1"
|
|
bitfld.long 0x00 6. " ITIP_I ,UARTINTR output x value" "0,1"
|
|
bitfld.long 0x00 7. " ITIP_EI ,UARTEINTR output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "ITIP_RTI ,UARTRTINTR output x value" "0,1"
|
|
bitfld.long 0x00 9. " ITIP_TXI ,UARTTXINTR output x value" "0,1"
|
|
bitfld.long 0x00 10. " ITIP_RXI ,UARTRXINTR output x value" "0,1"
|
|
bitfld.long 0x00 11. " ITIP_MSI ,UARTMSINTR output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "ITIP_RXDMABR ,UARTRXDMABREQ output x value" "0,1"
|
|
bitfld.long 0x00 13. " ITIP_RXDMASR ,UARTRXDMASREQ output x value" "0,1"
|
|
bitfld.long 0x00 14. " ITIP_TXDMABR ,UARTTXDMABREQ output x value" "0,1"
|
|
bitfld.long 0x00 15. " ITIP_TXDMASR ,UARTTXDMASREQ output x value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "ITIP_ABERRI ,UARTABERRINTR output x value" "0,1"
|
|
bitfld.long 0x00 17. " ITIP_ABDONEI ,UARTABDONEINTR output x value" "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TDR,UART_TDR - UART test data Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " TDR_TESTDATA ,FIFO test data"
|
|
group 0x100++0x03
|
|
line.long 0x00 "ABCR,UART_ABCR - UART Autobaud control Register"
|
|
bitfld.long 0x00 0. " ABCR_ACFGEN ,AutoConfig Enable" "0,1"
|
|
bitfld.long 0x00 1. " ABCR_RESTART ,Autobaud restart Enable" "0,1"
|
|
bitfld.long 0x00 2. " ABCR_UPDATEN ,Autobaud update Enable" "0,1"
|
|
rgroup 0x104++0x03
|
|
line.long 0x00 "ABSR,UART_ABCR - UART Autobaud Status Register"
|
|
bitfld.long 0x00 0.--2. " ABSR_BYTE2S ,Byte 2 status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " ABSR_BYTE1S ,Byte 1 status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. " ABSR_VALFMT ,Valid format detected" "0,1"
|
|
bitfld.long 0x00 9.--10. " ABSR_CMDERR ,Bad command sequence detected" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 11. "ABSR_BAUDERR ,Invalid baud rate status bit" "0,1"
|
|
bitfld.long 0x00 12. " ABSR_ACDONE ,Autconfig complete status bit" "0,1"
|
|
rgroup 0x108++0x03
|
|
line.long 0x00 "ABFMT,UART_ABFMT - UART Autobaud format Register"
|
|
bitfld.long 0x00 1. " ABFMT_PEN ,Parity enable" "0,1"
|
|
bitfld.long 0x00 2. " ABFMT_EPS ,Even parity select" "0,1"
|
|
bitfld.long 0x00 3. " ABFMT_STP2 ,Two stop bits select" "0,1"
|
|
bitfld.long 0x00 4. " ABFMT_FEN ,FIFO enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. "ABFMT_WLEN ,Word length" "0,1,2,3"
|
|
rgroup 0x150++0x03
|
|
line.long 0x00 "ABDR,UART_ABDR - UART Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ABDR_AUTOBAUDBDR ,AutoBaud divisor value"
|
|
rgroup 0x154++0x03
|
|
line.long 0x00 "ABDFR,UART_ABDFR - UART Autobaud Divisor fraction Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ABDFR_AUTOBAUDBDFR ,AutoBaud divisor fraction value"
|
|
rgroup 0x158++0x03
|
|
line.long 0x00 "ABMR,UART_ABMR - UART Autobaud measurement Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " ABMR_AUTOBAUDBMR ,AutoBaud measurement value"
|
|
group 0x15C++0x03
|
|
line.long 0x00 "ABIMSC,UART_ABIMSC - UART Autobaud interrupt mask set/clear Register"
|
|
bitfld.long 0x00 0. " ABIMSC_ABERRIM ,AutoBaud error interrupt mask" "0,1"
|
|
bitfld.long 0x00 1. " ABIMSC_ABDONEIM ,AutoBaud done interrupt mask" "0,1"
|
|
group 0x160++0x03
|
|
line.long 0x00 "ABRIS,UART_ABRIS - UART Autobaud raw interrupt Register"
|
|
bitfld.long 0x00 0. " ABRIS_ABERRRIS ,Break error interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " ABRIS_ABDONERIS ,Overrun error interrupt status" "0,1"
|
|
group 0x164++0x03
|
|
line.long 0x00 "ABMIS,UART_ABMIS - UART Autobaud masked interrupt Register"
|
|
bitfld.long 0x00 0. " ABMIS_ABERRMIS ,Autobaud error masked interrupt status" "0,1"
|
|
bitfld.long 0x00 1. " ABMIS_ABDONEMIS ,Autobaud done masked interrupt status" "0,1"
|
|
group 0x168++0x03
|
|
line.long 0x00 "ABICR,UART_ABICR - UART Autobaud interrupt clear Register"
|
|
bitfld.long 0x00 0. " ABICR_ABERRIC ,Autobaud error interrupt clear" "0,1"
|
|
bitfld.long 0x00 1. " ABICR_ABDONEIC ,Autobaud done interrupt clear" "0,1"
|
|
rgroup 0xFD8++0x03
|
|
line.long 0x00 "ID_PRODUCT_H_XY,UART_ID_PRODUCT_H_XY - UART Identification product Register"
|
|
bitfld.long 0x00 0.--3. " ID_PRODUCT_H_XY_Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " ID_PRODUCT_H_XY_X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--9. " ID_PRODUCT_H_XY_H ,Integration number" "0,1,2,3"
|
|
hexmask.long.byte 0x00 10.--17. 1. " ID_PRODUCT_H_XY_PRODUCT_ID ,Revision number"
|
|
rgroup 0xFDC++0x03
|
|
line.long 0x00 "ID_PROVIDER,UART_ID_PROVIDER - UART Identification product Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " PROVIDER_ID ,UART Provider Identification"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PERIPHID0,UART_PERIPHID0 - UART peripheral identification Register0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHID0_PARTNUMBER0 ,UART Part Number0"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PERIPHID1,UART_PERIPHID1 - UART peripheral identification Register1"
|
|
bitfld.long 0x00 0.--3. " PERIPHID1_PARTNUMBER1 ,UART Part Number1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " PERIPHID1_DESIGNER0 ,UART Designer Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PERIPHID2,UART_PERIPHID1 - UART peripheral identification Register2"
|
|
bitfld.long 0x00 0.--3. " PERIPHID2_DESIGNER1 ,UART Designer Number1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " PERIPHID2_REVISION ,UART Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PERIPHID3,UART_PERIPHID0 - UART peripheral identification Register3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHID3_CONFIGURATION ,UART Configuration"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCELLID0,UART_PCELLID0 - UART Pcell identification Register0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID0_UARTXPCELLID0 ,UART Pcell identification"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCELLID1,UART_PCELLID1 - UART Pcell identification Register1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID1_UARTXPCELLID1 ,UART Pcell identification"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCELLID2,UART_PCELLID2 - UART Pcell identification Register2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID2_UARTXPCELLID2 ,UART Pcell identification"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCELLID3,UART_PCELLID3 - UART Pcell identification Register3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCELLID3_UARTXPCELLID3 ,UART Pcell identification"
|
|
tree.end
|
|
tree "GPIO_0"
|
|
base ad:0x40A00000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO Data register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATx ,GPIOx Data"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GPIO_DATS,GPIO Data Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATSx ,Writing a 1b sets the corresponding bit in GPIO_DAT register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "GPIO_DATC,GPIO Data Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATCx ,Writing a 1b clears the corresponding bit in GPIO_DAT register"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO Pull Disable register"
|
|
hexmask.long 0x00 0.--31. 1. " PDISx ,Defines the pull-up or pull-down is enables or not"
|
|
group 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO Direction register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRx ,Defines the direction of the GPIO pin"
|
|
group 0x14++0x03
|
|
line.long 0x00 "GPIO_DIRS,GPIO Direction Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRSx ,Writing a 1b sets the corresponding bit in GPIO_DIR register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "GPIO_DIRC,GPIO Direction Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRCx ,Writing a 1b clears the corresponding bit in GPIO_DIR register"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO Sleep Mode register"
|
|
hexmask.long 0x00 0.--31. 1. " SLPMx ,Defines the behaviour of GPIOx in SLEEP/DEEP-SLEEP mode"
|
|
group 0x20++0x03
|
|
line.long 0x00 "GPIO_AFSLA,GPIO Alternate Function Select register A"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLA ,registers are the alternate function mode select registers"
|
|
group 0x24++0x03
|
|
line.long 0x00 "GPIO_AFSLB,GPIO Alternate Function Select register B"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLB ,registers are the alternate function mode select registers"
|
|
group 0x40++0x03
|
|
line.long 0x00 "GPIO_RIMSC,GPIO Rising edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRIMx ,GPIOx Rising-Edge Detection Interrupt Mask"
|
|
group 0x44++0x03
|
|
line.long 0x00 "GPIO_FIMSC,GPIO Falling edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFIMx ,GPIOx Interrupt Mask"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO Interrupt Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPISx ,GPIOx Interrupt Status bit"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "GPIO_IC,GPIO Interrupt Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPICx ,GPIO Interrupt Clear bit"
|
|
group 0x50++0x03
|
|
line.long 0x00 "GPIO_RWMSC,GPIO Rising edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRWMx ,GPIOx Rising Edge detection from wake up"
|
|
group 0x54++0x03
|
|
line.long 0x00 "GPIO_FWMSC,GPIO Falling edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFWMx ,GPIOx Falling Edge detection from wake up"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "GPIO_WKS,GPIO Wakeup Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPWKSx ,GPIOx Wake-up Status"
|
|
group 0x80++0x03
|
|
line.long 0x00 "GPIO_ITCR,GPIO Wakeup Status register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "GPIO_ITOP,Integration Test Output register"
|
|
bitfld.long 0x00 0. " GPIOINTR ,GPIOINTR output value" "0,1"
|
|
bitfld.long 0x00 1. " GPIOWKUP ,GPIOWKUP output value" "0,1"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "GPIOPeriphID0,Peripheral identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,These bits reads back as 60"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "GPIOPeriphID1,Peripheral identification register bits 15:8"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "GPIOPeriphID2,Peripheral identification register bits 23:16"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,These bits reads back as 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Revision ,These bits reads back as 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "GPIOPeriphID3,Peripheral identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,These bits reads back as 1F"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "GPIOPCellID0,Cell identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID00 ,These bits reads back as 0D"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "GPIOPCellID1,Cell identification register bits 15:8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID01 ,These bits reads back as F0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "GPIOPCellID2,Cell identification register bits 23:16"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID02 ,These bits reads back as F0"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "GPIOPCellID3,Cell identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID03 ,These bits reads back as B1"
|
|
tree.end
|
|
tree "GPIO_1"
|
|
base ad:0x40B00000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO Data register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATx ,GPIOx Data"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GPIO_DATS,GPIO Data Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATSx ,Writing a 1b sets the corresponding bit in GPIO_DAT register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "GPIO_DATC,GPIO Data Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATCx ,Writing a 1b clears the corresponding bit in GPIO_DAT register"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO Pull Disable register"
|
|
hexmask.long 0x00 0.--31. 1. " PDISx ,Defines the pull-up or pull-down is enables or not"
|
|
group 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO Direction register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRx ,Defines the direction of the GPIO pin"
|
|
group 0x14++0x03
|
|
line.long 0x00 "GPIO_DIRS,GPIO Direction Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRSx ,Writing a 1b sets the corresponding bit in GPIO_DIR register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "GPIO_DIRC,GPIO Direction Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRCx ,Writing a 1b clears the corresponding bit in GPIO_DIR register"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO Sleep Mode register"
|
|
hexmask.long 0x00 0.--31. 1. " SLPMx ,Defines the behaviour of GPIOx in SLEEP/DEEP-SLEEP mode"
|
|
group 0x20++0x03
|
|
line.long 0x00 "GPIO_AFSLA,GPIO Alternate Function Select register A"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLA ,registers are the alternate function mode select registers"
|
|
group 0x24++0x03
|
|
line.long 0x00 "GPIO_AFSLB,GPIO Alternate Function Select register B"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLB ,registers are the alternate function mode select registers"
|
|
group 0x40++0x03
|
|
line.long 0x00 "GPIO_RIMSC,GPIO Rising edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRIMx ,GPIOx Rising-Edge Detection Interrupt Mask"
|
|
group 0x44++0x03
|
|
line.long 0x00 "GPIO_FIMSC,GPIO Falling edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFIMx ,GPIOx Interrupt Mask"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO Interrupt Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPISx ,GPIOx Interrupt Status bit"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "GPIO_IC,GPIO Interrupt Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPICx ,GPIO Interrupt Clear bit"
|
|
group 0x50++0x03
|
|
line.long 0x00 "GPIO_RWMSC,GPIO Rising edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRWMx ,GPIOx Rising Edge detection from wake up"
|
|
group 0x54++0x03
|
|
line.long 0x00 "GPIO_FWMSC,GPIO Falling edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFWMx ,GPIOx Falling Edge detection from wake up"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "GPIO_WKS,GPIO Wakeup Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPWKSx ,GPIOx Wake-up Status"
|
|
group 0x80++0x03
|
|
line.long 0x00 "GPIO_ITCR,GPIO Wakeup Status register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "GPIO_ITOP,Integration Test Output register"
|
|
bitfld.long 0x00 0. " GPIOINTR ,GPIOINTR output value" "0,1"
|
|
bitfld.long 0x00 1. " GPIOWKUP ,GPIOWKUP output value" "0,1"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "GPIOPeriphID0,Peripheral identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,These bits reads back as 60"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "GPIOPeriphID1,Peripheral identification register bits 15:8"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "GPIOPeriphID2,Peripheral identification register bits 23:16"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,These bits reads back as 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Revision ,These bits reads back as 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "GPIOPeriphID3,Peripheral identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,These bits reads back as 1F"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "GPIOPCellID0,Cell identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID00 ,These bits reads back as 0D"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "GPIOPCellID1,Cell identification register bits 15:8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID01 ,These bits reads back as F0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "GPIOPCellID2,Cell identification register bits 23:16"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID02 ,These bits reads back as F0"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "GPIOPCellID3,Cell identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID03 ,These bits reads back as B1"
|
|
tree.end
|
|
tree "GPIO_2"
|
|
base ad:0x40C00000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO Data register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATx ,GPIOx Data"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GPIO_DATS,GPIO Data Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATSx ,Writing a 1b sets the corresponding bit in GPIO_DAT register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "GPIO_DATC,GPIO Data Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATCx ,Writing a 1b clears the corresponding bit in GPIO_DAT register"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO Pull Disable register"
|
|
hexmask.long 0x00 0.--31. 1. " PDISx ,Defines the pull-up or pull-down is enables or not"
|
|
group 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO Direction register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRx ,Defines the direction of the GPIO pin"
|
|
group 0x14++0x03
|
|
line.long 0x00 "GPIO_DIRS,GPIO Direction Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRSx ,Writing a 1b sets the corresponding bit in GPIO_DIR register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "GPIO_DIRC,GPIO Direction Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRCx ,Writing a 1b clears the corresponding bit in GPIO_DIR register"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO Sleep Mode register"
|
|
hexmask.long 0x00 0.--31. 1. " SLPMx ,Defines the behaviour of GPIOx in SLEEP/DEEP-SLEEP mode"
|
|
group 0x20++0x03
|
|
line.long 0x00 "GPIO_AFSLA,GPIO Alternate Function Select register A"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLA ,registers are the alternate function mode select registers"
|
|
group 0x24++0x03
|
|
line.long 0x00 "GPIO_AFSLB,GPIO Alternate Function Select register B"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLB ,registers are the alternate function mode select registers"
|
|
group 0x40++0x03
|
|
line.long 0x00 "GPIO_RIMSC,GPIO Rising edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRIMx ,GPIOx Rising-Edge Detection Interrupt Mask"
|
|
group 0x44++0x03
|
|
line.long 0x00 "GPIO_FIMSC,GPIO Falling edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFIMx ,GPIOx Interrupt Mask"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO Interrupt Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPISx ,GPIOx Interrupt Status bit"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "GPIO_IC,GPIO Interrupt Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPICx ,GPIO Interrupt Clear bit"
|
|
group 0x50++0x03
|
|
line.long 0x00 "GPIO_RWMSC,GPIO Rising edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRWMx ,GPIOx Rising Edge detection from wake up"
|
|
group 0x54++0x03
|
|
line.long 0x00 "GPIO_FWMSC,GPIO Falling edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFWMx ,GPIOx Falling Edge detection from wake up"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "GPIO_WKS,GPIO Wakeup Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPWKSx ,GPIOx Wake-up Status"
|
|
group 0x80++0x03
|
|
line.long 0x00 "GPIO_ITCR,GPIO Wakeup Status register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "GPIO_ITOP,Integration Test Output register"
|
|
bitfld.long 0x00 0. " GPIOINTR ,GPIOINTR output value" "0,1"
|
|
bitfld.long 0x00 1. " GPIOWKUP ,GPIOWKUP output value" "0,1"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "GPIOPeriphID0,Peripheral identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,These bits reads back as 60"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "GPIOPeriphID1,Peripheral identification register bits 15:8"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "GPIOPeriphID2,Peripheral identification register bits 23:16"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,These bits reads back as 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Revision ,These bits reads back as 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "GPIOPeriphID3,Peripheral identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,These bits reads back as 1F"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "GPIOPCellID0,Cell identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID00 ,These bits reads back as 0D"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "GPIOPCellID1,Cell identification register bits 15:8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID01 ,These bits reads back as F0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "GPIOPCellID2,Cell identification register bits 23:16"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID02 ,These bits reads back as F0"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "GPIOPCellID3,Cell identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID03 ,These bits reads back as B1"
|
|
tree.end
|
|
tree "GPIO_3"
|
|
base ad:0x40D00000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO Data register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATx ,GPIOx Data"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GPIO_DATS,GPIO Data Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATSx ,Writing a 1b sets the corresponding bit in GPIO_DAT register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "GPIO_DATC,GPIO Data Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATCx ,Writing a 1b clears the corresponding bit in GPIO_DAT register"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO Pull Disable register"
|
|
hexmask.long 0x00 0.--31. 1. " PDISx ,Defines the pull-up or pull-down is enables or not"
|
|
group 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO Direction register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRx ,Defines the direction of the GPIO pin"
|
|
group 0x14++0x03
|
|
line.long 0x00 "GPIO_DIRS,GPIO Direction Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRSx ,Writing a 1b sets the corresponding bit in GPIO_DIR register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "GPIO_DIRC,GPIO Direction Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRCx ,Writing a 1b clears the corresponding bit in GPIO_DIR register"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO Sleep Mode register"
|
|
hexmask.long 0x00 0.--31. 1. " SLPMx ,Defines the behaviour of GPIOx in SLEEP/DEEP-SLEEP mode"
|
|
group 0x20++0x03
|
|
line.long 0x00 "GPIO_AFSLA,GPIO Alternate Function Select register A"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLA ,registers are the alternate function mode select registers"
|
|
group 0x24++0x03
|
|
line.long 0x00 "GPIO_AFSLB,GPIO Alternate Function Select register B"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLB ,registers are the alternate function mode select registers"
|
|
group 0x40++0x03
|
|
line.long 0x00 "GPIO_RIMSC,GPIO Rising edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRIMx ,GPIOx Rising-Edge Detection Interrupt Mask"
|
|
group 0x44++0x03
|
|
line.long 0x00 "GPIO_FIMSC,GPIO Falling edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFIMx ,GPIOx Interrupt Mask"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO Interrupt Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPISx ,GPIOx Interrupt Status bit"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "GPIO_IC,GPIO Interrupt Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPICx ,GPIO Interrupt Clear bit"
|
|
group 0x50++0x03
|
|
line.long 0x00 "GPIO_RWMSC,GPIO Rising edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRWMx ,GPIOx Rising Edge detection from wake up"
|
|
group 0x54++0x03
|
|
line.long 0x00 "GPIO_FWMSC,GPIO Falling edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFWMx ,GPIOx Falling Edge detection from wake up"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "GPIO_WKS,GPIO Wakeup Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPWKSx ,GPIOx Wake-up Status"
|
|
group 0x80++0x03
|
|
line.long 0x00 "GPIO_ITCR,GPIO Wakeup Status register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "GPIO_ITOP,Integration Test Output register"
|
|
bitfld.long 0x00 0. " GPIOINTR ,GPIOINTR output value" "0,1"
|
|
bitfld.long 0x00 1. " GPIOWKUP ,GPIOWKUP output value" "0,1"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "GPIOPeriphID0,Peripheral identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,These bits reads back as 60"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "GPIOPeriphID1,Peripheral identification register bits 15:8"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "GPIOPeriphID2,Peripheral identification register bits 23:16"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,These bits reads back as 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Revision ,These bits reads back as 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "GPIOPeriphID3,Peripheral identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,These bits reads back as 1F"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "GPIOPCellID0,Cell identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID00 ,These bits reads back as 0D"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "GPIOPCellID1,Cell identification register bits 15:8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID01 ,These bits reads back as F0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "GPIOPCellID2,Cell identification register bits 23:16"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID02 ,These bits reads back as F0"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "GPIOPCellID3,Cell identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID03 ,These bits reads back as B1"
|
|
tree.end
|
|
tree "GPIO_4"
|
|
base ad:0x40E00000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO Data register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATx ,GPIOx Data"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GPIO_DATS,GPIO Data Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATSx ,Writing a 1b sets the corresponding bit in GPIO_DAT register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "GPIO_DATC,GPIO Data Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDATCx ,Writing a 1b clears the corresponding bit in GPIO_DAT register"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO Pull Disable register"
|
|
hexmask.long 0x00 0.--31. 1. " PDISx ,Defines the pull-up or pull-down is enables or not"
|
|
group 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO Direction register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRx ,Defines the direction of the GPIO pin"
|
|
group 0x14++0x03
|
|
line.long 0x00 "GPIO_DIRS,GPIO Direction Set register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRSx ,Writing a 1b sets the corresponding bit in GPIO_DIR register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "GPIO_DIRC,GPIO Direction Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPDIRCx ,Writing a 1b clears the corresponding bit in GPIO_DIR register"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO Sleep Mode register"
|
|
hexmask.long 0x00 0.--31. 1. " SLPMx ,Defines the behaviour of GPIOx in SLEEP/DEEP-SLEEP mode"
|
|
group 0x20++0x03
|
|
line.long 0x00 "GPIO_AFSLA,GPIO Alternate Function Select register A"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLA ,registers are the alternate function mode select registers"
|
|
group 0x24++0x03
|
|
line.long 0x00 "GPIO_AFSLB,GPIO Alternate Function Select register B"
|
|
hexmask.long 0x00 0.--31. 1. " AFSLB ,registers are the alternate function mode select registers"
|
|
group 0x40++0x03
|
|
line.long 0x00 "GPIO_RIMSC,GPIO Rising edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRIMx ,GPIOx Rising-Edge Detection Interrupt Mask"
|
|
group 0x44++0x03
|
|
line.long 0x00 "GPIO_FIMSC,GPIO Falling edge Interrupt Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFIMx ,GPIOx Interrupt Mask"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO Interrupt Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPISx ,GPIOx Interrupt Status bit"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "GPIO_IC,GPIO Interrupt Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPICx ,GPIO Interrupt Clear bit"
|
|
group 0x50++0x03
|
|
line.long 0x00 "GPIO_RWMSC,GPIO Rising edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPRWMx ,GPIOx Rising Edge detection from wake up"
|
|
group 0x54++0x03
|
|
line.long 0x00 "GPIO_FWMSC,GPIO Falling edge Wakeup Mask Set Clear register"
|
|
hexmask.long 0x00 0.--31. 1. " GPFWMx ,GPIOx Falling Edge detection from wake up"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "GPIO_WKS,GPIO Wakeup Status register"
|
|
hexmask.long 0x00 0.--31. 1. " GPWKSx ,GPIOx Wake-up Status"
|
|
group 0x80++0x03
|
|
line.long 0x00 "GPIO_ITCR,GPIO Wakeup Status register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable bit" "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "GPIO_ITOP,Integration Test Output register"
|
|
bitfld.long 0x00 0. " GPIOINTR ,GPIOINTR output value" "0,1"
|
|
bitfld.long 0x00 1. " GPIOWKUP ,GPIOWKUP output value" "0,1"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "GPIOPeriphID0,Peripheral identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,These bits reads back as 60"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "GPIOPeriphID1,Peripheral identification register bits 15:8"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,These bits reads back as 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "GPIOPeriphID2,Peripheral identification register bits 23:16"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,These bits reads back as 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Revision ,These bits reads back as 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "GPIOPeriphID3,Peripheral identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,These bits reads back as 1F"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "GPIOPCellID0,Cell identification register bits 7:0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID00 ,These bits reads back as 0D"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "GPIOPCellID1,Cell identification register bits 15:8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID01 ,These bits reads back as F0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "GPIOPCellID2,Cell identification register bits 23:16"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID02 ,These bits reads back as F0"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "GPIOPCellID3,Cell identification register bits 31:24"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCellID03 ,These bits reads back as B1"
|
|
tree.end
|
|
tree "MSP_0"
|
|
base ad:0x40F00000
|
|
width 11.
|
|
wgroup 0x00++0x03
|
|
line.long 0x00 "DR_WONLY,DR - MSP Control Register0"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GCR,GCR - MSP Configuration Register"
|
|
bitfld.long 0x00 0. " RXEN ," "0,1"
|
|
bitfld.long 0x00 1. " RFFEN ," "0,1"
|
|
bitfld.long 0x00 2. " RFSPOL ," "0,1"
|
|
bitfld.long 0x00 3. " DCM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RFSSEL ," "0,1"
|
|
bitfld.long 0x00 5. " RCKPOL ," "0,1"
|
|
bitfld.long 0x00 6. " RCKSEL ," "0,1"
|
|
bitfld.long 0x00 7. " LBM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "TXEN ," "0,1"
|
|
bitfld.long 0x00 9. " TFFEN ," "0,1"
|
|
bitfld.long 0x00 10. " TFSPOL ," "0,1"
|
|
bitfld.long 0x00 11.--12. " TFSSEL ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13. "TCKPOL ," "0,1"
|
|
bitfld.long 0x00 14. " TCKSEL ," "0,1"
|
|
bitfld.long 0x00 15. " TDXDL ," "0,1"
|
|
bitfld.long 0x00 16. " SGEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. "SCKPOL ," "0,1"
|
|
bitfld.long 0x00 18.--19. " SCKSEL ," "0,1,2,3"
|
|
bitfld.long 0x00 20. " FGEN ," "0,1"
|
|
bitfld.long 0x00 21. " SPICKM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. "SPIBME ," "0,1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "TCF,TCF- MSP Configuration Register"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,"
|
|
bitfld.long 0x00 10.--11. " TDTYP ," "0,1,2,3"
|
|
bitfld.long 0x00 12. " TENDN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. "TDDLY ," "0,1,2,3"
|
|
bitfld.long 0x00 15. " TFSIG ," "0,1"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,"
|
|
textline " "
|
|
bitfld.long 0x00 26. "TP2SN ," "0,1"
|
|
bitfld.long 0x00 27. " TP2EN ," "0,1"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ," "0,1,2,3"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "RCF,TCF- MSP Configuration Register"
|
|
bitfld.long 0x00 0.--2. " RP1ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 3.--9. 1. " RP1FLEN ,"
|
|
bitfld.long 0x00 10.--11. " RDTYP ," "0,1,2,3"
|
|
bitfld.long 0x00 12. " RENDN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. "RDDLY ," "0,1,2,3"
|
|
bitfld.long 0x00 15. " RFSIG ," "0,1"
|
|
bitfld.long 0x00 16.--18. " RP2ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 19.--25. 1. " RP2FLEN ,"
|
|
textline " "
|
|
bitfld.long 0x00 26. "RP2SM ," "0,1"
|
|
bitfld.long 0x00 27. " RP2EN ," "0,1"
|
|
bitfld.long 0x00 28.--29. " RBSWAP ," "0,1,2,3"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SRG,SRG- MSP S ample rate Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " SCKDIV ,"
|
|
hexmask.long.byte 0x00 10.--15. 1. " FRWID ,"
|
|
hexmask.long.word 0x00 16.--28. 1. " FRPER ,"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "FRC,FLR- MSP Flag Register"
|
|
bitfld.long 0x00 0. " RBUSY ," "0,1"
|
|
bitfld.long 0x00 1. " RFE ," "0,1"
|
|
bitfld.long 0x00 2. " RFU ," "0,1"
|
|
bitfld.long 0x00 3. " TBUSY ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TFE ," "0,1"
|
|
bitfld.long 0x00 5. " TFU ," "0,1"
|
|
group 0x18++0x03
|
|
line.long 0x00 "DMACR,DMACR- MSP DMA Control Register0"
|
|
bitfld.long 0x00 0. " RDMAE ," "0,1"
|
|
bitfld.long 0x00 1. " TDMAE ," "0,1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "IMSC,Interrupt set/clear mask register"
|
|
bitfld.long 0x00 0. " RXIM ," "0,1"
|
|
bitfld.long 0x00 1. " ROEIM ," "0,1"
|
|
bitfld.long 0x00 2. " RSEIM ," "0,1"
|
|
bitfld.long 0x00 3. " RFSIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXIM ," "0,1"
|
|
bitfld.long 0x00 5. " TUEIM ," "0,1"
|
|
bitfld.long 0x00 6. " TSEIM ," "0,1"
|
|
bitfld.long 0x00 7. " TFSIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOIM ," "0,1"
|
|
bitfld.long 0x00 9. " TFOIM ," "0,1"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "RIS,RIS Register"
|
|
bitfld.long 0x00 0. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 1. " ROERIS ," "0,1"
|
|
bitfld.long 0x00 2. " RSERIS ," "0,1"
|
|
bitfld.long 0x00 3. " RFSRIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXRIS ," "0,1"
|
|
bitfld.long 0x00 5. " TUERIS ," "0,1"
|
|
bitfld.long 0x00 6. " TSERIS ," "0,1"
|
|
bitfld.long 0x00 7. " TFSRIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOIS ," "0,1"
|
|
bitfld.long 0x00 9. " TFOIS ," "0,1"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "MIS,MIS Register"
|
|
bitfld.long 0x00 0. " RXMIS ," "0,1"
|
|
bitfld.long 0x00 1. " ROEMIS ," "0,1"
|
|
bitfld.long 0x00 2. " RSEMIS ," "0,1"
|
|
bitfld.long 0x00 3. " RFSMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXMIS ," "0,1"
|
|
bitfld.long 0x00 5. " TUEMIS ," "0,1"
|
|
bitfld.long 0x00 6. " TSEMIS ," "0,1"
|
|
bitfld.long 0x00 7. " TFSMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOMIS ," "0,1"
|
|
bitfld.long 0x00 9. " TFOMIS ," "0,1"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "ICR,ICR Register"
|
|
bitfld.long 0x00 1. " ROEIC ," "0,1"
|
|
bitfld.long 0x00 2. " RSEIC ," "0,1"
|
|
bitfld.long 0x00 3. " RFSIC ," "0,1"
|
|
bitfld.long 0x00 5. " TUEIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "TSEIC ," "0,1"
|
|
bitfld.long 0x00 7. " TFSIC ," "0,1"
|
|
group 0x30++0x03
|
|
line.long 0x00 "MCR,MCR Register"
|
|
bitfld.long 0x00 0. " RMCEN ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RMCSF ," "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. " RCMPM ," "0,1,2,3"
|
|
bitfld.long 0x00 5. " TMCEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. "TMCSF ," "0,1,2,3"
|
|
group 0x34++0x03
|
|
line.long 0x00 "RCV,MCR Receive compare value register"
|
|
hexmask.long 0x00 0.--31. 1. " RCVal ,"
|
|
group 0x38++0x03
|
|
line.long 0x00 "RCM,MCR Receive compare mask register"
|
|
hexmask.long 0x00 0.--31. 1. " RCMVal ,"
|
|
group 0x40++0x03
|
|
line.long 0x00 "TCE0,MCR Transmit channel Enable 0Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE0Val ,"
|
|
group 0x44++0x03
|
|
line.long 0x00 "TCE1,MCR Transmit channel Enable 1 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE1Val ,"
|
|
group 0x48++0x03
|
|
line.long 0x00 "TCE2,MCR Transmit channel Enable 2 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE2Val ,"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "TCE3,MCR Transmit channel Enable 3 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE3Val ,"
|
|
group 0x60++0x03
|
|
line.long 0x00 "RCE0,MCR Receive Enable 0Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE0Val ,"
|
|
group 0x64++0x03
|
|
line.long 0x00 "RCE1,MCR Receive channel Enable 1 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE1Val ,"
|
|
group 0x68++0x03
|
|
line.long 0x00 "RCE2,MCR Receive channel Enable 2 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE2Val ,"
|
|
group 0x6C++0x03
|
|
line.long 0x00 "RCE3,MCR Receive channel Enable 3 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE3Val ,"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,MSP control Register"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
bitfld.long 0x00 1. " TESTFIFO ," "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,ITIP Integration test input register"
|
|
bitfld.long 0x00 7. " MTDMAC ," "0,1"
|
|
bitfld.long 0x00 6. " MRDMAC ," "0,1"
|
|
bitfld.long 0x00 5. " MSCKI ," "0,1"
|
|
bitfld.long 0x00 4. " MTCKI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. "MTFSI ," "0,1"
|
|
bitfld.long 0x00 2. " MRCKI ," "0,1"
|
|
bitfld.long 0x00 1. " MRFSI ," "0,1"
|
|
bitfld.long 0x00 0. " MRDXI ," "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,ITOP Integration test output Register"
|
|
bitfld.long 0x00 22. " MTFOINTR ," "0,1"
|
|
bitfld.long 0x00 21. " MRFOINTR ," "0,1"
|
|
bitfld.long 0x00 20. " MTDMASREQ ," "0,1"
|
|
bitfld.long 0x00 19. " MTDMABREQ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. "MRDMASREQ ," "0,1"
|
|
bitfld.long 0x00 17. " MRDMABREQ ," "0,1"
|
|
bitfld.long 0x00 16. " MINTR ," "0,1"
|
|
bitfld.long 0x00 15. " MTFSINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "MTEINTR ," "0,1"
|
|
bitfld.long 0x00 13. " MTXINTR ," "0,1"
|
|
bitfld.long 0x00 12. " MRFSINTR ," "0,1"
|
|
bitfld.long 0x00 11. " MREINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. "MRXINTR ," "0,1"
|
|
bitfld.long 0x00 9. " MTCKOEn ," "0,1"
|
|
bitfld.long 0x00 8. " MTFSOEn ," "0,1"
|
|
bitfld.long 0x00 7. " MRCKOEn ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "MRFSOEn ," "0,1"
|
|
bitfld.long 0x00 5. " MTXDOEn ," "0,1"
|
|
bitfld.long 0x00 4. " MTCKO ," "0,1"
|
|
bitfld.long 0x00 3. " MTFSO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "MRCKO ," "0,1"
|
|
bitfld.long 0x00 1. " MRFSO ," "0,1"
|
|
bitfld.long 0x00 0. " MTDXO ," "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TSTDR,Test data register"
|
|
hexmask.long 0x00 0.--31. 1. " TEST_DATA ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Peripheral Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Peripheral Identification register 1"
|
|
bitfld.long 0x00 0.--3. " PARTNUMBER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DESIGNER0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Peripheral Identification register 2"
|
|
bitfld.long 0x00 0.--3. " DESIGNER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " REVISION ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Peripheral Identification register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CONFIGURATION ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell Identification register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID3 ,"
|
|
tree.end
|
|
tree "MSP_1"
|
|
base ad:0x41000000
|
|
width 11.
|
|
wgroup 0x00++0x03
|
|
line.long 0x00 "DR_WONLY,DR - MSP Control Register0"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,"
|
|
group 0x04++0x03
|
|
line.long 0x00 "GCR,GCR - MSP Configuration Register"
|
|
bitfld.long 0x00 0. " RXEN ," "0,1"
|
|
bitfld.long 0x00 1. " RFFEN ," "0,1"
|
|
bitfld.long 0x00 2. " RFSPOL ," "0,1"
|
|
bitfld.long 0x00 3. " DCM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "RFSSEL ," "0,1"
|
|
bitfld.long 0x00 5. " RCKPOL ," "0,1"
|
|
bitfld.long 0x00 6. " RCKSEL ," "0,1"
|
|
bitfld.long 0x00 7. " LBM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "TXEN ," "0,1"
|
|
bitfld.long 0x00 9. " TFFEN ," "0,1"
|
|
bitfld.long 0x00 10. " TFSPOL ," "0,1"
|
|
bitfld.long 0x00 11.--12. " TFSSEL ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13. "TCKPOL ," "0,1"
|
|
bitfld.long 0x00 14. " TCKSEL ," "0,1"
|
|
bitfld.long 0x00 15. " TDXDL ," "0,1"
|
|
bitfld.long 0x00 16. " SGEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. "SCKPOL ," "0,1"
|
|
bitfld.long 0x00 18.--19. " SCKSEL ," "0,1,2,3"
|
|
bitfld.long 0x00 20. " FGEN ," "0,1"
|
|
bitfld.long 0x00 21. " SPICKM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. "SPIBME ," "0,1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "TCF,TCF- MSP Configuration Register"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,"
|
|
bitfld.long 0x00 10.--11. " TDTYP ," "0,1,2,3"
|
|
bitfld.long 0x00 12. " TENDN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. "TDDLY ," "0,1,2,3"
|
|
bitfld.long 0x00 15. " TFSIG ," "0,1"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,"
|
|
textline " "
|
|
bitfld.long 0x00 26. "TP2SN ," "0,1"
|
|
bitfld.long 0x00 27. " TP2EN ," "0,1"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ," "0,1,2,3"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "RCF,TCF- MSP Configuration Register"
|
|
bitfld.long 0x00 0.--2. " RP1ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 3.--9. 1. " RP1FLEN ,"
|
|
bitfld.long 0x00 10.--11. " RDTYP ," "0,1,2,3"
|
|
bitfld.long 0x00 12. " RENDN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. "RDDLY ," "0,1,2,3"
|
|
bitfld.long 0x00 15. " RFSIG ," "0,1"
|
|
bitfld.long 0x00 16.--18. " RP2ELEN ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 19.--25. 1. " RP2FLEN ,"
|
|
textline " "
|
|
bitfld.long 0x00 26. "RP2SM ," "0,1"
|
|
bitfld.long 0x00 27. " RP2EN ," "0,1"
|
|
bitfld.long 0x00 28.--29. " RBSWAP ," "0,1,2,3"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SRG,SRG- MSP S ample rate Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " SCKDIV ,"
|
|
hexmask.long.byte 0x00 10.--15. 1. " FRWID ,"
|
|
hexmask.long.word 0x00 16.--28. 1. " FRPER ,"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "FRC,FLR- MSP Flag Register"
|
|
bitfld.long 0x00 0. " RBUSY ," "0,1"
|
|
bitfld.long 0x00 1. " RFE ," "0,1"
|
|
bitfld.long 0x00 2. " RFU ," "0,1"
|
|
bitfld.long 0x00 3. " TBUSY ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TFE ," "0,1"
|
|
bitfld.long 0x00 5. " TFU ," "0,1"
|
|
group 0x18++0x03
|
|
line.long 0x00 "DMACR,DMACR- MSP DMA Control Register0"
|
|
bitfld.long 0x00 0. " RDMAE ," "0,1"
|
|
bitfld.long 0x00 1. " TDMAE ," "0,1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "IMSC,Interrupt set/clear mask register"
|
|
bitfld.long 0x00 0. " RXIM ," "0,1"
|
|
bitfld.long 0x00 1. " ROEIM ," "0,1"
|
|
bitfld.long 0x00 2. " RSEIM ," "0,1"
|
|
bitfld.long 0x00 3. " RFSIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXIM ," "0,1"
|
|
bitfld.long 0x00 5. " TUEIM ," "0,1"
|
|
bitfld.long 0x00 6. " TSEIM ," "0,1"
|
|
bitfld.long 0x00 7. " TFSIM ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOIM ," "0,1"
|
|
bitfld.long 0x00 9. " TFOIM ," "0,1"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "RIS,RIS Register"
|
|
bitfld.long 0x00 0. " RXRIS ," "0,1"
|
|
bitfld.long 0x00 1. " ROERIS ," "0,1"
|
|
bitfld.long 0x00 2. " RSERIS ," "0,1"
|
|
bitfld.long 0x00 3. " RFSRIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXRIS ," "0,1"
|
|
bitfld.long 0x00 5. " TUERIS ," "0,1"
|
|
bitfld.long 0x00 6. " TSERIS ," "0,1"
|
|
bitfld.long 0x00 7. " TFSRIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOIS ," "0,1"
|
|
bitfld.long 0x00 9. " TFOIS ," "0,1"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "MIS,MIS Register"
|
|
bitfld.long 0x00 0. " RXMIS ," "0,1"
|
|
bitfld.long 0x00 1. " ROEMIS ," "0,1"
|
|
bitfld.long 0x00 2. " RSEMIS ," "0,1"
|
|
bitfld.long 0x00 3. " RFSMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TXMIS ," "0,1"
|
|
bitfld.long 0x00 5. " TUEMIS ," "0,1"
|
|
bitfld.long 0x00 6. " TSEMIS ," "0,1"
|
|
bitfld.long 0x00 7. " TFSMIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "RFOMIS ," "0,1"
|
|
bitfld.long 0x00 9. " TFOMIS ," "0,1"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "ICR,ICR Register"
|
|
bitfld.long 0x00 1. " ROEIC ," "0,1"
|
|
bitfld.long 0x00 2. " RSEIC ," "0,1"
|
|
bitfld.long 0x00 3. " RFSIC ," "0,1"
|
|
bitfld.long 0x00 5. " TUEIC ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "TSEIC ," "0,1"
|
|
bitfld.long 0x00 7. " TFSIC ," "0,1"
|
|
group 0x30++0x03
|
|
line.long 0x00 "MCR,MCR Register"
|
|
bitfld.long 0x00 0. " RMCEN ," "0,1"
|
|
bitfld.long 0x00 1.--2. " RMCSF ," "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. " RCMPM ," "0,1,2,3"
|
|
bitfld.long 0x00 5. " TMCEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. "TMCSF ," "0,1,2,3"
|
|
group 0x34++0x03
|
|
line.long 0x00 "RCV,MCR Receive compare value register"
|
|
hexmask.long 0x00 0.--31. 1. " RCVal ,"
|
|
group 0x38++0x03
|
|
line.long 0x00 "RCM,MCR Receive compare mask register"
|
|
hexmask.long 0x00 0.--31. 1. " RCMVal ,"
|
|
group 0x40++0x03
|
|
line.long 0x00 "TCE0,MCR Transmit channel Enable 0Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE0Val ,"
|
|
group 0x44++0x03
|
|
line.long 0x00 "TCE1,MCR Transmit channel Enable 1 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE1Val ,"
|
|
group 0x48++0x03
|
|
line.long 0x00 "TCE2,MCR Transmit channel Enable 2 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE2Val ,"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "TCE3,MCR Transmit channel Enable 3 Register"
|
|
hexmask.long 0x00 0.--31. 1. " TCE3Val ,"
|
|
group 0x60++0x03
|
|
line.long 0x00 "RCE0,MCR Receive Enable 0Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE0Val ,"
|
|
group 0x64++0x03
|
|
line.long 0x00 "RCE1,MCR Receive channel Enable 1 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE1Val ,"
|
|
group 0x68++0x03
|
|
line.long 0x00 "RCE2,MCR Receive channel Enable 2 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE2Val ,"
|
|
group 0x6C++0x03
|
|
line.long 0x00 "RCE3,MCR Receive channel Enable 3 Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCE3Val ,"
|
|
group 0x80++0x03
|
|
line.long 0x00 "ITCR,MSP control Register"
|
|
bitfld.long 0x00 0. " ITEN ," "0,1"
|
|
bitfld.long 0x00 1. " TESTFIFO ," "0,1"
|
|
group 0x84++0x03
|
|
line.long 0x00 "ITIP,ITIP Integration test input register"
|
|
bitfld.long 0x00 7. " MTDMAC ," "0,1"
|
|
bitfld.long 0x00 6. " MRDMAC ," "0,1"
|
|
bitfld.long 0x00 5. " MSCKI ," "0,1"
|
|
bitfld.long 0x00 4. " MTCKI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. "MTFSI ," "0,1"
|
|
bitfld.long 0x00 2. " MRCKI ," "0,1"
|
|
bitfld.long 0x00 1. " MRFSI ," "0,1"
|
|
bitfld.long 0x00 0. " MRDXI ," "0,1"
|
|
group 0x88++0x03
|
|
line.long 0x00 "ITOP,ITOP Integration test output Register"
|
|
bitfld.long 0x00 22. " MTFOINTR ," "0,1"
|
|
bitfld.long 0x00 21. " MRFOINTR ," "0,1"
|
|
bitfld.long 0x00 20. " MTDMASREQ ," "0,1"
|
|
bitfld.long 0x00 19. " MTDMABREQ ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. "MRDMASREQ ," "0,1"
|
|
bitfld.long 0x00 17. " MRDMABREQ ," "0,1"
|
|
bitfld.long 0x00 16. " MINTR ," "0,1"
|
|
bitfld.long 0x00 15. " MTFSINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. "MTEINTR ," "0,1"
|
|
bitfld.long 0x00 13. " MTXINTR ," "0,1"
|
|
bitfld.long 0x00 12. " MRFSINTR ," "0,1"
|
|
bitfld.long 0x00 11. " MREINTR ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. "MRXINTR ," "0,1"
|
|
bitfld.long 0x00 9. " MTCKOEn ," "0,1"
|
|
bitfld.long 0x00 8. " MTFSOEn ," "0,1"
|
|
bitfld.long 0x00 7. " MRCKOEn ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "MRFSOEn ," "0,1"
|
|
bitfld.long 0x00 5. " MTXDOEn ," "0,1"
|
|
bitfld.long 0x00 4. " MTCKO ," "0,1"
|
|
bitfld.long 0x00 3. " MTFSO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. "MRCKO ," "0,1"
|
|
bitfld.long 0x00 1. " MRFSO ," "0,1"
|
|
bitfld.long 0x00 0. " MTDXO ," "0,1"
|
|
group 0x8C++0x03
|
|
line.long 0x00 "TSTDR,Test data register"
|
|
hexmask.long 0x00 0.--31. 1. " TEST_DATA ,"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Peripheral Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Peripheral Identification register 1"
|
|
bitfld.long 0x00 0.--3. " PARTNUMBER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DESIGNER0 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Peripheral Identification register 2"
|
|
bitfld.long 0x00 0.--3. " DESIGNER1 ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " REVISION ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Peripheral Identification register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CONFIGURATION ,"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID0 ,"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell Identification register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID1 ,"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID2 ,"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell Identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MSPPCELLID3 ,"
|
|
tree.end
|
|
tree "WDOG"
|
|
base ad:0x41100000
|
|
width 5.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CR,CR - WDOG Control Register"
|
|
bitfld.long 0x00 0. " WE ,Watch Dog Enable" "0,1"
|
|
bitfld.long 0x00 1. " SC ,Start Counting" "0,1"
|
|
bitfld.long 0x00 2. " EE ,EXT_CK enable bit" "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "PR,PR - WDOG Prescalar Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRV ,Prescalar Value"
|
|
group 0x08++0x03
|
|
line.long 0x00 "VR,VR - WDOG Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TV ,Watch Dog Timer Preload Value"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "CNT,CNT - WDOG Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNTV ,Counter Value"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SR,CR - WDOG Status Register"
|
|
bitfld.long 0x00 0. " EC ,Watch Dog End of count pending bit" "0,1"
|
|
group 0x14++0x03
|
|
line.long 0x00 "MR,CR - WDOG Mask Register"
|
|
bitfld.long 0x00 0. " ECM ,Watch Dog End of count mask bit" "0,1"
|
|
group 0x18++0x03
|
|
line.long 0x00 "KR,CR - WDOG key Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " KEY ,Watch Dog Key Value"
|
|
tree.end
|
|
tree "EFT"
|
|
base ad:0x41200000
|
|
width 11.
|
|
rgroup 0x00++0x01
|
|
line.word 0x00 "TIMn_ICAR,EFT_TIMn_ICAR - Input Capture A Register"
|
|
hexmask.word 0x00 0.--15. 1. " COUNTA ,Counter value transferred by Input Capture A Event"
|
|
rgroup 0x04++0x01
|
|
line.word 0x00 "TIMn_ICBR,EFT_TIMn_ICBR - Input Capture B Register"
|
|
hexmask.word 0x00 0.--15. 1. " COUNTB ,Counter value transferred by Input Capture B Event"
|
|
group 0x08++0x01
|
|
line.word 0x00 "TIMn_OCAR,EFT_TIMn_OCAR - Output Compare A Register"
|
|
hexmask.word 0x00 0.--15. 1. " COUNTCMPA ,Contains value to be compared to the TIMn_CNTR register and signalled on OCMPA o/p"
|
|
group 0x0C++0x01
|
|
line.word 0x00 "TIMn_OCBR,EFT_TIMn_OCBR - Output Compare B Register"
|
|
hexmask.word 0x00 0.--15. 1. " COUNTCMPB ,Contains value to be compared to the TIMn_CNTR register and signalled on OCMPB o/p"
|
|
rgroup 0x10++0x01
|
|
line.word 0x00 "TIMn_CNTR,EFT_TIMn_CNTR - Counter Register"
|
|
hexmask.word 0x00 0.--15. 1. " COUNT ,Counter value"
|
|
group 0x14++0x01
|
|
line.word 0x00 "TIMn_CR1,EFT_TIMn_CR1 - Control Register 1"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "0,1"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "0,1"
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge B" "0,1"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 4. "PWM ,Pulse Width Modulation" "0,1"
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "0,1"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "0,1"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 8. "OLVLA ,Output Level A" "0,1"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "0,1"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "0,1"
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 12. "DMAS0 ,DMA Source Select" "0,1"
|
|
bitfld.word 0x00 13. " DMAS1 ,DMA Source Select" "0,1"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "0,1"
|
|
bitfld.word 0x00 15. " EN ,Timer Count Enable" "0,1"
|
|
group 0x18++0x01
|
|
line.word 0x00 "TIMn_CR2,EFT_TIMn_CR2 - Control Register 2"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC ,Prescaler Division Factor"
|
|
bitfld.word 0x00 10. " DMAIE ,Output Compare B Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 13. "TOIE ,Timer Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "0,1"
|
|
rgroup 0x1C++0x01
|
|
line.word 0x00 "TIMn_SR,EFT_TIMn_SR - Status Register"
|
|
bitfld.word 0x00 11. " OCFB ,Output Compare FLag B" "0,1"
|
|
bitfld.word 0x00 12. " ICFB ,Input Capture FLag B" "0,1"
|
|
bitfld.word 0x00 13. " TOF ,Timer Overflow" "0,1"
|
|
bitfld.word 0x00 14. " OCFA ,Output Compare FLag A" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 15. "ICFA ,Input Capture FLag A" "0,1"
|
|
tree.end
|
|
tree "MTU"
|
|
base ad:0x41300000
|
|
width 11.
|
|
group 0x00++0x03
|
|
line.long 0x00 "IMSC,Interupt Mask SET/CLEAR Register"
|
|
bitfld.long 0x00 3. " T3IM ,Timer x interrupt bits" "0,1"
|
|
bitfld.long 0x00 2. " T2IM ,Timer x interrupt bits" "0,1"
|
|
bitfld.long 0x00 1. " T1IM ,Timer x interrupt bits" "0,1"
|
|
bitfld.long 0x00 0. " T0IM ,Timer x interrupt bits" "0,1"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "RIS,PR - WDOG Prescalar Register"
|
|
bitfld.long 0x00 3. " T3RIS ,Raw interrupt status bits" "0,1"
|
|
bitfld.long 0x00 2. " T2RIS ,Raw interrupt status bits" "0,1"
|
|
bitfld.long 0x00 1. " T1RIS ,Raw interrupt status bits" "0,1"
|
|
bitfld.long 0x00 0. " T0RIS ,Raw interrupt status bits" "0,1"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "MIS,PR - WDOG Prescalar Register"
|
|
bitfld.long 0x00 3. " T3MIS ,Mask interrupt status bits" "0,1"
|
|
bitfld.long 0x00 2. " T2MIS ,Mask interrupt status bits" "0,1"
|
|
bitfld.long 0x00 1. " T1MIS ,Mask interrupt status bits" "0,1"
|
|
bitfld.long 0x00 0. " T0MIS ,Mask interrupt status bits" "0,1"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "ICR,PR - WDOG Prescalar Register"
|
|
bitfld.long 0x00 3. " T3IC ,interrupt clear bits" "0,1"
|
|
bitfld.long 0x00 2. " T2IC ,interrupt clear bits" "0,1"
|
|
bitfld.long 0x00 1. " T1IC ,interrupt clear bits" "0,1"
|
|
bitfld.long 0x00 0. " T0IC ,interrupt clear bits" "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "T0LR,LR - Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnLOAD ,Load Register"
|
|
group 0x20++0x03
|
|
line.long 0x00 "T1LR,LR - Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnLOAD ,Load Register"
|
|
group 0x30++0x03
|
|
line.long 0x00 "T2LR,LR - Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnLOAD ,Load Register"
|
|
group 0x40++0x03
|
|
line.long 0x00 "T3LR,LR - Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnLOAD ,Load Register"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "T0VAL,VAL -Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " Value ,value Register"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "T1VAL,VAL -Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " Value ,value Register"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "T2VAL,VAL -Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " Value ,value Register"
|
|
rgroup 0x44++0x03
|
|
line.long 0x00 "T3VAL,VAL -Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " Value ,value Register"
|
|
group 0x18++0x03
|
|
line.long 0x00 "T0CR,CR - Control Registers"
|
|
bitfld.long 0x00 7. " TnEN ,Timer enable Register" "0,1"
|
|
bitfld.long 0x00 6. " TnMOD ,Timer mode Register" "0,1"
|
|
bitfld.long 0x00 2.--3. " TnPRE ,Timer prescalar Register" "0,1,2,3"
|
|
bitfld.long 0x00 1. " TnSZ ,Timer size Register" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. "TnOS ,Timer one shot Register" "0,1"
|
|
group 0x28++0x03
|
|
line.long 0x00 "T1CR,CR - Control Registers"
|
|
bitfld.long 0x00 7. " TnEN ,Timer enable Register" "0,1"
|
|
bitfld.long 0x00 6. " TnMOD ,Timer mode Register" "0,1"
|
|
bitfld.long 0x00 2.--3. " TnPRE ,Timer prescalar Register" "0,1,2,3"
|
|
bitfld.long 0x00 1. " TnSZ ,Timer size Register" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. "TnOS ,Timer one shot Register" "0,1"
|
|
group 0x38++0x03
|
|
line.long 0x00 "T2CR,CR - Control Registers"
|
|
bitfld.long 0x00 7. " TnEN ,Timer enable Register" "0,1"
|
|
bitfld.long 0x00 6. " TnMOD ,Timer mode Register" "0,1"
|
|
bitfld.long 0x00 2.--3. " TnPRE ,Timer prescalar Register" "0,1,2,3"
|
|
bitfld.long 0x00 1. " TnSZ ,Timer size Register" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. "TnOS ,Timer one shot Register" "0,1"
|
|
group 0x48++0x03
|
|
line.long 0x00 "T3CR,CR - Control Registers"
|
|
bitfld.long 0x00 7. " TnEN ,Timer enable Register" "0,1"
|
|
bitfld.long 0x00 6. " TnMOD ,Timer mode Register" "0,1"
|
|
bitfld.long 0x00 2.--3. " TnPRE ,Timer prescalar Register" "0,1,2,3"
|
|
bitfld.long 0x00 1. " TnSZ ,Timer size Register" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. "TnOS ,Timer one shot Register" "0,1"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "T0BGLR,BGLR -Background Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnBGLOAD ,Background Load Register"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "T1BGLR,BGLR -Background Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnBGLOAD ,Background Load Register"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "T2BGLR,BGLR -Background Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnBGLOAD ,Background Load Register"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "T3BGLR,BGLR -Background Load Register"
|
|
hexmask.long 0x00 0.--31. 1. " TnBGLOAD ,Background Load Register"
|
|
rgroup 0xFE0++0x03
|
|
line.long 0x00 "PeriphID0,Periph ID0Periph Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PartNumber0 ,Part Number"
|
|
rgroup 0xFE4++0x03
|
|
line.long 0x00 "PeriphID1,Periph ID1Periph Register"
|
|
bitfld.long 0x00 0.--3. " PartNumber1 ,Part Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " Designer0 ,Designer Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFE8++0x03
|
|
line.long 0x00 "PeriphID2,Periph ID2Periph Register"
|
|
bitfld.long 0x00 0.--3. " Designer1 ,Designer Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup 0xFEC++0x03
|
|
line.long 0x00 "PeriphID3,Periph ID3Periph Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Configuration ,configuration Number"
|
|
rgroup 0xFF0++0x03
|
|
line.long 0x00 "PCellID0,Cell ID 0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MTUPCellID0 ,Cell ID 0"
|
|
rgroup 0xFF4++0x03
|
|
line.long 0x00 "PCellID1,Cell ID 1 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MTUPCellID1 ,Cell ID 0"
|
|
rgroup 0xFF8++0x03
|
|
line.long 0x00 "PCellID2,Cell ID 2 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MTUPCellID2 ,Cell ID 2"
|
|
rgroup 0xFFC++0x03
|
|
line.long 0x00 "PCellID3,Cell ID 3 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MTUPCellID3 ,Cell ID 3"
|
|
tree.end
|
|
tree "STA1_PRCCTRL_APB_MSR1"
|
|
base ad:0x41700000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "D0SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 23. " UPDS ," "0,1"
|
|
bitfld.long 0x00 24. " LCKE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "CFGE ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x04++0x03
|
|
line.long 0x00 "D1SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "D2SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "D3SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "D4SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x14++0x03
|
|
line.long 0x00 "D5SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x18++0x03
|
|
line.long 0x00 "D6SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "D7SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 23. " UPDS ," "0,1"
|
|
bitfld.long 0x00 24. " LCKE ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "CFGE ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "D8SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x24++0x03
|
|
line.long 0x00 "D9SCCR,"
|
|
bitfld.long 0x00 0.--3. " DIV ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. " SEL ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x28++0x03
|
|
line.long 0x00 "RES0x028,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "RES0x02C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x30++0x03
|
|
line.long 0x00 "RES0x030,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x34++0x03
|
|
line.long 0x00 "RES0x034,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x38++0x03
|
|
line.long 0x00 "RES0x038,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "RES0x03C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x100++0x03
|
|
line.long 0x00 "PRCCAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x108++0x03
|
|
line.long 0x00 "TUIFAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "TUIFCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x110++0x03
|
|
line.long 0x00 "AUDIOSSCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x118++0x03
|
|
line.long 0x00 "DAPAPBCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x11C++0x03
|
|
line.long 0x00 "DBGAPBCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x120++0x03
|
|
line.long 0x00 "DGBATBCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x124++0x03
|
|
line.long 0x00 "DBGTRCCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x12C++0x03
|
|
line.long 0x00 "NICX1PRCCCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x140++0x03
|
|
line.long 0x00 "ARMCLKINCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x144++0x03
|
|
line.long 0x00 "ARMFCLKCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x148++0x03
|
|
line.long 0x00 "ARMCLKCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x14C++0x03
|
|
line.long 0x00 "ARMHCLKCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x150++0x03
|
|
line.long 0x00 "ARMETMCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x160++0x03
|
|
line.long 0x00 "NICX2M7RCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x164++0x03
|
|
line.long 0x00 "NICX2M7CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x180++0x03
|
|
line.long 0x00 "ARPUCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x188++0x03
|
|
line.long 0x00 "NICX4RCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x18C++0x03
|
|
line.long 0x00 "NICX4CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1C0++0x03
|
|
line.long 0x00 "ETHAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1C4++0x03
|
|
line.long 0x00 "I2C0APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1C8++0x03
|
|
line.long 0x00 "I2C1APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1CC++0x03
|
|
line.long 0x00 "UART0APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1D0++0x03
|
|
line.long 0x00 "UART1APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1D4++0x03
|
|
line.long 0x00 "MTUAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1D8++0x03
|
|
line.long 0x00 "EFTAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1DC++0x03
|
|
line.long 0x00 "WDGAPBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x1E4++0x03
|
|
line.long 0x00 "NICX1APB1CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x200++0x03
|
|
line.long 0x00 "GPIO0APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x204++0x03
|
|
line.long 0x00 "GPIO1APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x208++0x03
|
|
line.long 0x00 "GPIO2APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x20C++0x03
|
|
line.long 0x00 "GPIO3APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x210++0x03
|
|
line.long 0x00 "GPIO4APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x218++0x03
|
|
line.long 0x00 "MSP0APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x21C++0x03
|
|
line.long 0x00 "MSP1APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x220++0x03
|
|
line.long 0x00 "SSP0APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x224++0x03
|
|
line.long 0x00 "SSP1APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x228++0x03
|
|
line.long 0x00 "SSP2APBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x22C++0x03
|
|
line.long 0x00 "NICX1APB2CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x240++0x03
|
|
line.long 0x00 "STMAXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x244++0x03
|
|
line.long 0x00 "OCTOSPIAHBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x248++0x03
|
|
line.long 0x00 "SQIOAHBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x24C++0x03
|
|
line.long 0x00 "ERAM0AXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x250++0x03
|
|
line.long 0x00 "ERAM1AXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x254++0x03
|
|
line.long 0x00 "ERAM2AXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x258++0x03
|
|
line.long 0x00 "ERAM3AXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x25C++0x03
|
|
line.long 0x00 "ERAM4AXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x268++0x03
|
|
line.long 0x00 "NICX2RCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x26C++0x03
|
|
line.long 0x00 "NICX2CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x280++0x03
|
|
line.long 0x00 "SSP0TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x284++0x03
|
|
line.long 0x00 "SSP1TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x288++0x03
|
|
line.long 0x00 "SSP2TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x28C++0x03
|
|
line.long 0x00 "I2C0TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x290++0x03
|
|
line.long 0x00 "I2C1TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x294++0x03
|
|
line.long 0x00 "UART0TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x298++0x03
|
|
line.long 0x00 "UART1TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x29C++0x03
|
|
line.long 0x00 "SQIOTXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2A0++0x03
|
|
line.long 0x00 "OCTOSPITXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2A4++0x03
|
|
line.long 0x00 "MSP0TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2A8++0x03
|
|
line.long 0x00 "MSP1TXCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2AC++0x03
|
|
line.long 0x00 "ETH_PTP_REFCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2C0++0x03
|
|
line.long 0x00 "AUDIOSS512CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2E4++0x03
|
|
line.long 0x00 "MSP0TXACR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x2E8++0x03
|
|
line.long 0x00 "MSP1TXACR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x300++0x03
|
|
line.long 0x00 "DRPU0CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x304++0x03
|
|
line.long 0x00 "DRPU1CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x308++0x03
|
|
line.long 0x00 "DRPU2CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x30C++0x03
|
|
line.long 0x00 "DRPU3CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x310++0x03
|
|
line.long 0x00 "DRPUAXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x31C++0x03
|
|
line.long 0x00 "NICX2DRPURCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x320++0x03
|
|
line.long 0x00 "NICX2DRPUCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x340++0x03
|
|
line.long 0x00 "DMA1AHBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x344++0x03
|
|
line.long 0x00 "DMA2AHBiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x348++0x03
|
|
line.long 0x00 "EROMAXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x34C++0x03
|
|
line.long 0x00 "ETHAXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x350++0x03
|
|
line.long 0x00 "ASSAXIiCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x35C++0x03
|
|
line.long 0x00 "NICX1RCR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x360++0x03
|
|
line.long 0x00 "NICX1CR,"
|
|
bitfld.long 0x00 0.--3. " DSEL ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " RSTEN ," "0,1"
|
|
bitfld.long 0x00 31. " CLKEN ," "0,1"
|
|
group 0x800++0x03
|
|
line.long 0x00 "PLL0CR,"
|
|
bitfld.long 0x00 0.--2. " ODF ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " IDF ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--14. 1. " NDIV ,"
|
|
bitfld.long 0x00 16. " LOCK ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 30. "SEL ," "0,1"
|
|
bitfld.long 0x00 31. " ENA ," "0,1"
|
|
group 0x804++0x03
|
|
line.long 0x00 "PLL0FRACCR,"
|
|
bitfld.long 0x00 0. " FRCCTL ," "0,1"
|
|
bitfld.long 0x00 1. " SSCGCTL ," "0,1"
|
|
bitfld.long 0x00 2. " SPRDCTL ," "0,1"
|
|
bitfld.long 0x00 8. " STRB ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. "STRBBYP ," "0,1"
|
|
hexmask.long.word 0x00 16.--31. 1. " FRACIN ,"
|
|
group 0x808++0x03
|
|
line.long 0x00 "PLL0SSCGCR,"
|
|
hexmask.long.word 0x00 0.--12. 1. " MODPER ,"
|
|
hexmask.long.word 0x00 16.--30. 1. " INCSTP ,"
|
|
group 0x80C++0x03
|
|
line.long 0x00 "RES0x80C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x810++0x03
|
|
line.long 0x00 "PLL1CR,"
|
|
bitfld.long 0x00 0.--2. " ODF ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " IDF ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--14. 1. " NDIV ,"
|
|
bitfld.long 0x00 16. " LOCK ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 30. "SEL ," "0,1"
|
|
bitfld.long 0x00 31. " ENA ," "0,1"
|
|
group 0x814++0x03
|
|
line.long 0x00 "PLL1FRACCR,"
|
|
bitfld.long 0x00 0. " FRCCTL ," "0,1"
|
|
bitfld.long 0x00 1. " SSCGCTL ," "0,1"
|
|
bitfld.long 0x00 2. " SPRDCTL ," "0,1"
|
|
bitfld.long 0x00 8. " STRB ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. "STRBBYP ," "0,1"
|
|
hexmask.long.word 0x00 16.--31. 1. " FRACIN ,"
|
|
group 0x818++0x03
|
|
line.long 0x00 "PLL1SSCGCR,"
|
|
hexmask.long.word 0x00 0.--12. 1. " MODPER ,"
|
|
hexmask.long.word 0x00 16.--30. 1. " INCSTP ,"
|
|
group 0x81C++0x03
|
|
line.long 0x00 "RES0x81C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x820++0x03
|
|
line.long 0x00 "DRPUSYSCR,"
|
|
bitfld.long 0x00 0. " MTXBTIN ," "0,1"
|
|
bitfld.long 0x00 1. " MTXBTRDY ," "0,1"
|
|
bitfld.long 0x00 2. " MTXBTMIN ," "0,1"
|
|
bitfld.long 0x00 3. " MTXDBGRST ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "SYSCKEN ," "0,1"
|
|
bitfld.long 0x00 7. " GPIOSEL ," "0,1"
|
|
bitfld.long 0x00 8.--11. " MTXBADR ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DREV ,"
|
|
textline " "
|
|
bitfld.long 0x00 30. "XOPTREQIDLE ," "0,1"
|
|
bitfld.long 0x00 31. " XOPTMEMIDLE ," "0,1"
|
|
group 0x824++0x03
|
|
line.long 0x00 "I2CPADCR,"
|
|
bitfld.long 0x00 0.--4. " I2C3PADC ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--12. " I2C3PADC ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 16.--20. " I2C3PADC ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 24.--28. " I2C3PADC ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
group 0x828++0x03
|
|
line.long 0x00 "CLKMTRCR,"
|
|
bitfld.long 0x00 0.--2. " MXCKSEL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. " MXCKEN ," "0,1"
|
|
bitfld.long 0x00 8.--10. " DMX1CKSEL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " DMX1CKEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. "DMX2CKSEL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23. " DMX2CKEN ," "0,1"
|
|
group 0x82C++0x03
|
|
line.long 0x00 "SYSPSCR,"
|
|
bitfld.long 0x00 0. " SYSRST ," "0,1"
|
|
bitfld.long 0x00 1. " MCLK ," "0,1"
|
|
bitfld.long 0x00 2. " CLKS ," "0,1"
|
|
bitfld.long 0x00 3.--4. " PSW ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. "BTSEL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTSEL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 31. " BTMON ," "0,1"
|
|
group 0x830++0x03
|
|
line.long 0x00 "JTAGPADCR,"
|
|
bitfld.long 0x00 0. " PDN_TCK ," "0,1"
|
|
bitfld.long 0x00 1. " PUN_TCK ," "0,1"
|
|
bitfld.long 0x00 2. " PDN_TDI ," "0,1"
|
|
bitfld.long 0x00 3. " PUN_TDI ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PDN_TDO ," "0,1"
|
|
bitfld.long 0x00 5. " PUN_TDO ," "0,1"
|
|
bitfld.long 0x00 6. " PDN_TMS ," "0,1"
|
|
bitfld.long 0x00 7. " PUN_TMS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PDN_TRSTn ," "0,1"
|
|
bitfld.long 0x00 9. " PUN_TRSTn ," "0,1"
|
|
group 0x834++0x03
|
|
line.long 0x00 "SAIWSCKSELR,"
|
|
bitfld.long 0x00 0.--1. " SEL_SCK1_A ," "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " SEL_LRCK1_A ," "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " SEL_SCK1_ZI ," "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " SEL_LRCK1_ZI ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. "SEL_SCK2_A ," "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. " SEL_LRCK2_A ," "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " SEL_SCK2_ZI ," "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " SEL_LRCK2_ZI ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. "SEL_SCK3_A ," "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " SEL_LRCK3_A ," "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. " SEL_SCK3_ZI ," "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " SEL_LRCK3_ZI ," "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. "SEL_SCK4_A ," "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. " SEL_LRCK4_A ," "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. " SEL_SCK4_ZI ," "0,1,2,3"
|
|
bitfld.long 0x00 30.--31. " SEL_LRCK4_ZI ," "0,1,2,3"
|
|
group 0x838++0x03
|
|
line.long 0x00 "ETHCLKCR,"
|
|
bitfld.long 0x00 0. " TXCLKSEL ," "0,1"
|
|
bitfld.long 0x00 8. " RGMII125SEL ," "0,1"
|
|
bitfld.long 0x00 24.--26. " PHYINTFSEL ," "0,1,2,3,4,5,6,7"
|
|
group 0x83C++0x03
|
|
line.long 0x00 "SYSRRQST,"
|
|
bitfld.long 0x00 0. " RSTRQARM ," "0,1"
|
|
bitfld.long 0x00 1. " RHWWDT ," "0,1"
|
|
bitfld.long 0x00 2. " TSTCORERST ," "0,1"
|
|
bitfld.long 0x00 3. " DRDYMREP ," "0,1"
|
|
group 0x840++0x03
|
|
line.long 0x00 "TRACEPADCR,"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. " EN_TRC ,"
|
|
bitfld.long 0x00 30. " EN_TRC_CTL ," "0,1"
|
|
bitfld.long 0x00 31. " EN_TRC_CLK ," "0,1"
|
|
group 0x844++0x03
|
|
line.long 0x00 "DRPUSADR,"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " ARADDR ,"
|
|
group 0x848++0x03
|
|
line.long 0x00 "DRPUIRQCR,"
|
|
bitfld.long 0x00 0. " IRQARPUENA ," "0,1"
|
|
bitfld.long 0x00 1. " IRQM7ENA ," "0,1"
|
|
bitfld.long 0x00 2. " IRQAXIMENA ," "0,1"
|
|
bitfld.long 0x00 3. " IRQAXISENA ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. "IRQAXIMCLR ," "0,1"
|
|
bitfld.long 0x00 19. " IRQAXISCLR ," "0,1"
|
|
group 0x84C++0x03
|
|
line.long 0x00 "DRPUSLPCR,"
|
|
bitfld.long 0x00 0. " WKUPNOW ," "0,1"
|
|
bitfld.long 0x00 1. " SLPNOW ," "0,1"
|
|
group 0x850++0x03
|
|
line.long 0x00 "CLKEFTCR,"
|
|
bitfld.long 0x00 0. " EFT0MXSEL ," "0,1"
|
|
bitfld.long 0x00 1. " EFT1MXSEL ," "0,1"
|
|
group 0x854++0x03
|
|
line.long 0x00 "DMABRQCR,"
|
|
bitfld.long 0x00 0. " DRPU_ch1 ," "0,1"
|
|
bitfld.long 0x00 1. " DRPU_ch2 ," "0,1"
|
|
group 0x858++0x03
|
|
line.long 0x00 "DMASELCR,"
|
|
bitfld.long 0x00 0. " DRPU_ch1 ," "0,1"
|
|
bitfld.long 0x00 1. " DRPU_ch2 ," "0,1"
|
|
bitfld.long 0x00 2. " OctoSPI ," "0,1"
|
|
bitfld.long 0x00 3. " SQIO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "MTU ," "0,1"
|
|
bitfld.long 0x00 5. " EFT ," "0,1"
|
|
bitfld.long 0x00 6. " UART0_RX ," "0,1"
|
|
bitfld.long 0x00 7. " UART0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "UART1_RX ," "0,1"
|
|
bitfld.long 0x00 9. " UART1_TX ," "0,1"
|
|
bitfld.long 0x00 10. " MSP0_RX ," "0,1"
|
|
bitfld.long 0x00 11. " MSP0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "MSP1_RX ," "0,1"
|
|
bitfld.long 0x00 13. " MSP1_TX ," "0,1"
|
|
bitfld.long 0x00 14. " SPI0_RX ," "0,1"
|
|
bitfld.long 0x00 15. " SPI0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "SPI1_RX ," "0,1"
|
|
bitfld.long 0x00 17. " SPI1_TX ," "0,1"
|
|
bitfld.long 0x00 18. " SPI2_RX ," "0,1"
|
|
bitfld.long 0x00 19. " SPI2_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "I2C0_RX ," "0,1"
|
|
bitfld.long 0x00 21. " I2C0_TX ," "0,1"
|
|
bitfld.long 0x00 22. " I2C1_RX ," "0,1"
|
|
bitfld.long 0x00 23. " I2C1_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "GPIO0 ," "0,1"
|
|
bitfld.long 0x00 25. " GPIO1 ," "0,1"
|
|
bitfld.long 0x00 26. " GPIO2 ," "0,1"
|
|
bitfld.long 0x00 27. " GPIO3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "GPIO4 ," "0,1"
|
|
group 0x85C++0x03
|
|
line.long 0x00 "DMASEL2CR,"
|
|
bitfld.long 0x00 0. " DRPU_ch1 ," "0,1"
|
|
bitfld.long 0x00 1. " DRPU_ch2 ," "0,1"
|
|
bitfld.long 0x00 2. " OctoSPI ," "0,1"
|
|
bitfld.long 0x00 3. " SQIO ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "MTU ," "0,1"
|
|
bitfld.long 0x00 5. " EFT ," "0,1"
|
|
bitfld.long 0x00 6. " UART0_RX ," "0,1"
|
|
bitfld.long 0x00 7. " UART0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "UART1_RX ," "0,1"
|
|
bitfld.long 0x00 9. " UART1_TX ," "0,1"
|
|
bitfld.long 0x00 10. " MSP0_RX ," "0,1"
|
|
bitfld.long 0x00 11. " MSP0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "MSP1_RX ," "0,1"
|
|
bitfld.long 0x00 13. " MSP1_TX ," "0,1"
|
|
bitfld.long 0x00 14. " SPI0_RX ," "0,1"
|
|
bitfld.long 0x00 15. " SPI0_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "SPI1_RX ," "0,1"
|
|
bitfld.long 0x00 17. " SPI1_TX ," "0,1"
|
|
bitfld.long 0x00 18. " SPI2_RX ," "0,1"
|
|
bitfld.long 0x00 19. " SPI2_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "I2C0_RX ," "0,1"
|
|
bitfld.long 0x00 21. " I2C0_TX ," "0,1"
|
|
bitfld.long 0x00 22. " I2C1_RX ," "0,1"
|
|
bitfld.long 0x00 23. " I2C1_TX ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "GPIO0 ," "0,1"
|
|
bitfld.long 0x00 25. " GPIO1 ," "0,1"
|
|
bitfld.long 0x00 26. " GPIO2 ," "0,1"
|
|
bitfld.long 0x00 27. " GPIO3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "GPIO4 ," "0,1"
|
|
group 0x860++0x03
|
|
line.long 0x00 "DMAMTUCR,"
|
|
bitfld.long 0x00 0.--1. " MTUSEL ," "0,1,2,3"
|
|
group 0x864++0x03
|
|
line.long 0x00 "RES0x864,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x868++0x03
|
|
line.long 0x00 "RES0x868,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x86C++0x03
|
|
line.long 0x00 "NMIENAR,"
|
|
bitfld.long 0x00 0. " TUIFNMI ," "0,1"
|
|
group 0x870++0x03
|
|
line.long 0x00 "IRQENAR,"
|
|
bitfld.long 0x00 0. " ERAM0P ," "0,1"
|
|
bitfld.long 0x00 1. " ERAM1P ," "0,1"
|
|
bitfld.long 0x00 2. " ERAM2P ," "0,1"
|
|
bitfld.long 0x00 3. " ERAM3P ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ERAM4P ," "0,1"
|
|
bitfld.long 0x00 8. " PLL0LKN ," "0,1"
|
|
bitfld.long 0x00 9. " PLL1LKN ," "0,1"
|
|
bitfld.long 0x00 16. " ARM2DRPU ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. "DRPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 18. " DRPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 19. " DRPUEXTT3 ," "0,1"
|
|
bitfld.long 0x00 20. " DRPUEXTT4 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. "DRPUEXTT5 ," "0,1"
|
|
bitfld.long 0x00 22. " DRPUEXTT6 ," "0,1"
|
|
bitfld.long 0x00 23. " DRPUEXTT7 ," "0,1"
|
|
bitfld.long 0x00 24. " DRPUEXTT8 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "ARPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 26. " ARPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 27. " DRPU2ARPU ," "0,1"
|
|
bitfld.long 0x00 28. " ARM2ARPU ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. "BLENDING ," "0,1"
|
|
bitfld.long 0x00 30. " DRPU2ARM ," "0,1"
|
|
bitfld.long 0x00 31. " RES ," "0,1"
|
|
group 0x874++0x03
|
|
line.long 0x00 "IRQSETR,"
|
|
bitfld.long 0x00 12. " EXTDMA1 ," "0,1"
|
|
bitfld.long 0x00 13. " EXTDMA2 ," "0,1"
|
|
bitfld.long 0x00 14. " EXTDMA1 ," "0,1"
|
|
bitfld.long 0x00 15. " EXTDMA2 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "ARM2DRPU ," "0,1"
|
|
bitfld.long 0x00 17. " DRPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 18. " DRPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 19. " DRPUEXTT3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "DRPUEXTT4 ," "0,1"
|
|
bitfld.long 0x00 21. " DRPUEXTT5 ," "0,1"
|
|
bitfld.long 0x00 22. " DRPUEXTT6 ," "0,1"
|
|
bitfld.long 0x00 23. " DRPUEXTT7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "DRPUEXTT8 ," "0,1"
|
|
bitfld.long 0x00 25. " ARPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 26. " ARPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 27. " DRPU2ARPU ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "ARM2ARPU ," "0,1"
|
|
bitfld.long 0x00 29. " BLENDING ," "0,1"
|
|
bitfld.long 0x00 30. " DRPU2ARM ," "0,1"
|
|
group 0x878++0x03
|
|
line.long 0x00 "IRQCLRR,"
|
|
bitfld.long 0x00 0. " ERAM0P ," "0,1"
|
|
bitfld.long 0x00 1. " ERAM1P ," "0,1"
|
|
bitfld.long 0x00 2. " ERAM2P ," "0,1"
|
|
bitfld.long 0x00 3. " ERAM3P ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ERAM4P ," "0,1"
|
|
bitfld.long 0x00 8. " PLL0LKN ," "0,1"
|
|
bitfld.long 0x00 9. " PLL1LKN ," "0,1"
|
|
bitfld.long 0x00 12. " DRPUDMA1CH1 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. "DRPUDMA1CH2 ," "0,1"
|
|
bitfld.long 0x00 14. " DRPUDMA2CH1 ," "0,1"
|
|
bitfld.long 0x00 15. " DRPUDMA2CH2 ," "0,1"
|
|
bitfld.long 0x00 16. " ARM2DRPU ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. "DRPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 18. " DRPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 19. " DRPUEXTT3 ," "0,1"
|
|
bitfld.long 0x00 20. " DRPUEXTT4 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. "DRPUEXTT5 ," "0,1"
|
|
bitfld.long 0x00 22. " DRPUEXTT6 ," "0,1"
|
|
bitfld.long 0x00 23. " DRPUEXTT7 ," "0,1"
|
|
bitfld.long 0x00 24. " DRPUEXTT8 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. "ARPUEXTT1 ," "0,1"
|
|
bitfld.long 0x00 26. " ARPUEXTT2 ," "0,1"
|
|
bitfld.long 0x00 27. " DRPU2ARPU ," "0,1"
|
|
bitfld.long 0x00 28. " ARM2ARPU ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. "BLENDING ," "0,1"
|
|
bitfld.long 0x00 30. " DRPU2ARM ," "0,1"
|
|
group 0x87C++0x03
|
|
line.long 0x00 "PRCCCR,"
|
|
bitfld.long 0x00 0. " LCKNRECDIS ," "0,1"
|
|
bitfld.long 0x00 1. " WDGSTOP ," "0,1"
|
|
bitfld.long 0x00 2. " PLLBYP ," "0,1"
|
|
group 0x880++0x03
|
|
line.long 0x00 "DRPUGPIOSR,"
|
|
hexmask.long 0x00 0.--31. 1. " DRPUGPO ,"
|
|
group 0x884++0x03
|
|
line.long 0x00 "DRPUGPIOCR,"
|
|
hexmask.long 0x00 0.--31. 1. " DRPUGPI ,"
|
|
group 0x888++0x03
|
|
line.long 0x00 "SPRGPO0R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x88C++0x03
|
|
line.long 0x00 "SPRGPO1R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x890++0x03
|
|
line.long 0x00 "SPRGPO2R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x894++0x03
|
|
line.long 0x00 "SPRGPO3R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x898++0x03
|
|
line.long 0x00 "SPRGPI0R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x89C++0x03
|
|
line.long 0x00 "SPRGPI1R,"
|
|
hexmask.long 0x00 0.--31. 1. " SPRGPO ,"
|
|
group 0x8A0++0x03
|
|
line.long 0x00 "TNDCR,"
|
|
bitfld.long 0x00 0. " NSGUAREN ," "0,1"
|
|
bitfld.long 0x00 1. " DBGSWEN ," "0,1"
|
|
bitfld.long 0x00 2. " SPNIDEN ," "0,1"
|
|
bitfld.long 0x00 3. " SPIDEN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "NIDEN ," "0,1"
|
|
bitfld.long 0x00 5. " DBGEN ," "0,1"
|
|
bitfld.long 0x00 6. " DEVICEEN ," "0,1"
|
|
group 0x8A4++0x03
|
|
line.long 0x00 "ERAMCR,"
|
|
bitfld.long 0x00 0. " ERAM0D2 ," "0,1"
|
|
bitfld.long 0x00 1. " ERAM1D2 ," "0,1"
|
|
bitfld.long 0x00 2. " ERAM2D2 ," "0,1"
|
|
bitfld.long 0x00 3. " ERAM3D2 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "ERAM4D2 ," "0,1"
|
|
group 0x8A8++0x03
|
|
line.long 0x00 "OTPKEY,"
|
|
hexmask.long 0x00 0.--31. 1. " KEY ,"
|
|
group 0x8AC++0x03
|
|
line.long 0x00 "RES0x8AC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8B0++0x03
|
|
line.long 0x00 "RES0x8B0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8B4++0x03
|
|
line.long 0x00 "RES0x8B4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8B8++0x03
|
|
line.long 0x00 "RES0x8B8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8BC++0x03
|
|
line.long 0x00 "RES0x8BC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8C0++0x03
|
|
line.long 0x00 "MPUM0SR,"
|
|
bitfld.long 0x00 0.--4. " MID ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--11. " RGN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " ERRRWB ," "0,1"
|
|
bitfld.long 0x00 31. " ERR ," "0,1"
|
|
group 0x8C4++0x03
|
|
line.long 0x00 "MPUM0SR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,"
|
|
group 0x8C8++0x03
|
|
line.long 0x00 "MPUM1SR,"
|
|
bitfld.long 0x00 0.--4. " MID ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--11. " RGN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " ERRRWB ," "0,1"
|
|
bitfld.long 0x00 31. " ERR ," "0,1"
|
|
group 0x8CC++0x03
|
|
line.long 0x00 "MPUM1SR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,"
|
|
group 0x8D0++0x03
|
|
line.long 0x00 "MPUM2SR,"
|
|
bitfld.long 0x00 0.--4. " MID ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--11. " RGN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " ERRRWB ," "0,1"
|
|
bitfld.long 0x00 31. " ERR ," "0,1"
|
|
group 0x8D4++0x03
|
|
line.long 0x00 "MPUM2SR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,"
|
|
group 0x8D8++0x03
|
|
line.long 0x00 "MPUM3SR,"
|
|
bitfld.long 0x00 0.--4. " MID ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--11. " RGN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " ERRRWB ," "0,1"
|
|
bitfld.long 0x00 31. " ERR ," "0,1"
|
|
group 0x8DC++0x03
|
|
line.long 0x00 "MPUM3SR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,"
|
|
group 0x8E0++0x03
|
|
line.long 0x00 "MPUM4SR,"
|
|
bitfld.long 0x00 0.--4. " MID ," "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 8.--11. " RGN ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 30. " ERRRWB ," "0,1"
|
|
bitfld.long 0x00 31. " ERR ," "0,1"
|
|
group 0x8E4++0x03
|
|
line.long 0x00 "MPUM4SR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,"
|
|
group 0x8E8++0x03
|
|
line.long 0x00 "RES0x8E8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8EC++0x03
|
|
line.long 0x00 "RES0x8EC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8F0++0x03
|
|
line.long 0x00 "RES0x8F0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8F4++0x03
|
|
line.long 0x00 "RES0x8F4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8F8++0x03
|
|
line.long 0x00 "RES0x8F8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x8FC++0x03
|
|
line.long 0x00 "RES0x8FC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x900++0x03
|
|
line.long 0x00 "MPUM0R0,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x904++0x03
|
|
line.long 0x00 "MPUM0R1,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x908++0x03
|
|
line.long 0x00 "MPUM0R2,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x90C++0x03
|
|
line.long 0x00 "MPUM0R3,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x910++0x03
|
|
line.long 0x00 "MPUM0R4,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x914++0x03
|
|
line.long 0x00 "MPUM0R5,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x918++0x03
|
|
line.long 0x00 "MPUM0R6,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x91C++0x03
|
|
line.long 0x00 "MPUM0R7,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x920++0x03
|
|
line.long 0x00 "MPUM1R0,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x924++0x03
|
|
line.long 0x00 "MPUM1R1,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x928++0x03
|
|
line.long 0x00 "MPUM1R2,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x92C++0x03
|
|
line.long 0x00 "MPUM1R3,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x930++0x03
|
|
line.long 0x00 "MPUM1R4,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x934++0x03
|
|
line.long 0x00 "MPUM1R5,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x938++0x03
|
|
line.long 0x00 "MPUM1R6,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x93C++0x03
|
|
line.long 0x00 "MPUM1R7,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x940++0x03
|
|
line.long 0x00 "MPUM2R0,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x944++0x03
|
|
line.long 0x00 "MPUM2R1,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x948++0x03
|
|
line.long 0x00 "MPUM2R2,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x94C++0x03
|
|
line.long 0x00 "MPUM2R3,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x950++0x03
|
|
line.long 0x00 "MPUM2R4,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x954++0x03
|
|
line.long 0x00 "MPUM2R5,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x958++0x03
|
|
line.long 0x00 "MPUM2R6,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x95C++0x03
|
|
line.long 0x00 "MPUM2R7,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x960++0x03
|
|
line.long 0x00 "MPUM3R0,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x964++0x03
|
|
line.long 0x00 "MPUM3R1,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x968++0x03
|
|
line.long 0x00 "MPUM3R2,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x96C++0x03
|
|
line.long 0x00 "MPUM3R3,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x970++0x03
|
|
line.long 0x00 "MPUM3R4,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x974++0x03
|
|
line.long 0x00 "MPUM3R5,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x978++0x03
|
|
line.long 0x00 "MPUM3R6,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x97C++0x03
|
|
line.long 0x00 "MPUM3R7,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x980++0x03
|
|
line.long 0x00 "MPUM4R0,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x984++0x03
|
|
line.long 0x00 "MPUM4R1,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x988++0x03
|
|
line.long 0x00 "MPUM4R2,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x98C++0x03
|
|
line.long 0x00 "MPUM4R3,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x990++0x03
|
|
line.long 0x00 "MPUM4R4,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x994++0x03
|
|
line.long 0x00 "MPUM4R5,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x998++0x03
|
|
line.long 0x00 "MPUM4R6,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x99C++0x03
|
|
line.long 0x00 "MPUM4R7,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9A0++0x03
|
|
line.long 0x00 "MPUM4R8,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9A4++0x03
|
|
line.long 0x00 "MPUM4R9,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9A8++0x03
|
|
line.long 0x00 "MPUM4R10,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9AC++0x03
|
|
line.long 0x00 "MPUM4R11,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9B0++0x03
|
|
line.long 0x00 "MPUM4R12,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9B4++0x03
|
|
line.long 0x00 "MPUM4R13,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9B8++0x03
|
|
line.long 0x00 "MPUM4R14,"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RLCK ,"
|
|
hexmask.long.byte 0x00 16.--21. 1. " WLCK ,"
|
|
group 0x9BC++0x03
|
|
line.long 0x00 "RES0x9BC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9C0++0x03
|
|
line.long 0x00 "RES0x9C0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9C4++0x03
|
|
line.long 0x00 "RES0x9C4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9C8++0x03
|
|
line.long 0x00 "RES0x9C8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9CC++0x03
|
|
line.long 0x00 "RES0x9CC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9D0++0x03
|
|
line.long 0x00 "RES0x9D0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9D4++0x03
|
|
line.long 0x00 "RES0x9D4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9D8++0x03
|
|
line.long 0x00 "RES0x9D8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9DC++0x03
|
|
line.long 0x00 "RES0x9DC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9E0++0x03
|
|
line.long 0x00 "RES0x9E0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9E4++0x03
|
|
line.long 0x00 "RES0x9E4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9E8++0x03
|
|
line.long 0x00 "RES0x9E8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9EC++0x03
|
|
line.long 0x00 "RES0x9EC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9F0++0x03
|
|
line.long 0x00 "RES0x9F0,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9F4++0x03
|
|
line.long 0x00 "RES0x9F4,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9F8++0x03
|
|
line.long 0x00 "RES0x9F8,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x9FC++0x03
|
|
line.long 0x00 "RES0x9FC,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA00++0x03
|
|
line.long 0x00 "G0INDISR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA04++0x03
|
|
line.long 0x00 "G0LOWEMIR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA08++0x03
|
|
line.long 0x00 "G0DRIVE0R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA0C++0x03
|
|
line.long 0x00 "G0DRIVE1R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA10++0x03
|
|
line.long 0x00 "G0DRIVE2R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA14++0x03
|
|
line.long 0x00 "RES0xA14,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA18++0x03
|
|
line.long 0x00 "RES0xA18,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA1C++0x03
|
|
line.long 0x00 "RES0xA1C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA20++0x03
|
|
line.long 0x00 "G1INDISR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA24++0x03
|
|
line.long 0x00 "G1LOWEMIR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA28++0x03
|
|
line.long 0x00 "G1DRIVE0R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA2C++0x03
|
|
line.long 0x00 "G1DRIVE1R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA30++0x03
|
|
line.long 0x00 "G1DRIVE2R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA34++0x03
|
|
line.long 0x00 "RES0xA34,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA38++0x03
|
|
line.long 0x00 "RES0xA38,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA3C++0x03
|
|
line.long 0x00 "RES0xA3C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA40++0x03
|
|
line.long 0x00 "G2INDISR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA44++0x03
|
|
line.long 0x00 "G2LOWEMIR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA48++0x03
|
|
line.long 0x00 "G2DRIVE0R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA4C++0x03
|
|
line.long 0x00 "G2DRIVE1R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA50++0x03
|
|
line.long 0x00 "G2DRIVE2R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA54++0x03
|
|
line.long 0x00 "RES0xA54,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA58++0x03
|
|
line.long 0x00 "RES0xA58,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA5C++0x03
|
|
line.long 0x00 "RES0xA5C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA60++0x03
|
|
line.long 0x00 "G3INDISR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA64++0x03
|
|
line.long 0x00 "G3LOWEMIR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA68++0x03
|
|
line.long 0x00 "G3DRIVE0R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA6C++0x03
|
|
line.long 0x00 "G3DRIVE1R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA70++0x03
|
|
line.long 0x00 "G3DRIVE2R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA74++0x03
|
|
line.long 0x00 "RES0xA74,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA78++0x03
|
|
line.long 0x00 "RES0xA78,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA7C++0x03
|
|
line.long 0x00 "RES0xA7C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA80++0x03
|
|
line.long 0x00 "G4INDISR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA84++0x03
|
|
line.long 0x00 "G4LOWEMIR,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA88++0x03
|
|
line.long 0x00 "G4DRIVE0R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA8C++0x03
|
|
line.long 0x00 "G4DRIVE1R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA90++0x03
|
|
line.long 0x00 "G4DRIVE2R,"
|
|
bitfld.long 0x00 0. " PADC0 ," "0,1"
|
|
bitfld.long 0x00 1. " PADC1 ," "0,1"
|
|
bitfld.long 0x00 2. " PADC2 ," "0,1"
|
|
bitfld.long 0x00 3. " PADC3 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "PADC4 ," "0,1"
|
|
bitfld.long 0x00 5. " PADC5 ," "0,1"
|
|
bitfld.long 0x00 6. " PADC6 ," "0,1"
|
|
bitfld.long 0x00 7. " PADC7 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "PADC8 ," "0,1"
|
|
bitfld.long 0x00 9. " PADC9 ," "0,1"
|
|
bitfld.long 0x00 10. " PADC10 ," "0,1"
|
|
bitfld.long 0x00 11. " PADC11 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. "PADC12 ," "0,1"
|
|
bitfld.long 0x00 13. " PADC13 ," "0,1"
|
|
bitfld.long 0x00 14. " PADC14 ," "0,1"
|
|
bitfld.long 0x00 15. " PADC15 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "PADC16 ," "0,1"
|
|
bitfld.long 0x00 17. " PADC17 ," "0,1"
|
|
bitfld.long 0x00 18. " PADC18 ," "0,1"
|
|
bitfld.long 0x00 19. " PADC19 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. "PADC20 ," "0,1"
|
|
bitfld.long 0x00 21. " PADC21 ," "0,1"
|
|
bitfld.long 0x00 22. " PADC22 ," "0,1"
|
|
bitfld.long 0x00 23. " PADC23 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. "PADC24 ," "0,1"
|
|
bitfld.long 0x00 25. " PADC25 ," "0,1"
|
|
bitfld.long 0x00 26. " PADC26 ," "0,1"
|
|
bitfld.long 0x00 27. " PADC27 ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. "PADC28 ," "0,1"
|
|
bitfld.long 0x00 29. " PADC29 ," "0,1"
|
|
bitfld.long 0x00 30. " PADC30 ," "0,1"
|
|
bitfld.long 0x00 31. " PADC31 ," "0,1"
|
|
group 0xA94++0x03
|
|
line.long 0x00 "RES0xA94,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA98++0x03
|
|
line.long 0x00 "RES0xA98,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0xA9C++0x03
|
|
line.long 0x00 "RES0xA9C,"
|
|
hexmask.long 0x00 0.--31. 1. " RES ,"
|
|
group 0x1000++0x03
|
|
line.long 0x00 "OTP0,"
|
|
hexmask.long 0x00 0.--31. 1. " OTP ,"
|
|
group 0x1004++0x03
|
|
line.long 0x00 "OTP1,"
|
|
hexmask.long 0x00 0.--31. 1. " OTP ,"
|
|
tree.end
|
|
tree "SQIO"
|
|
base ad:0x51800000
|
|
width 22.
|
|
group 0x00++0x03
|
|
line.long 0x00 "PAGE_BUF,Page Buffer"
|
|
hexmask.long 0x00 0.--31. 1. " PAGE_BUF_DATA ,"
|
|
group 0x100++0x03
|
|
line.long 0x00 "CMD_STAT_REG,CMD_STAT_REG"
|
|
hexmask.long.byte 0x00 24.--31. 1. " WR_CNFG_OPCD ,"
|
|
hexmask.long.byte 0x00 16.--23. 1. " READ_OPCODE ,"
|
|
bitfld.long 0x00 12.--14. " CMD_TYPE ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. " FRCLK ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. "SQIO_MODE ," "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SQIO_CMD ,"
|
|
group 0x104++0x03
|
|
line.long 0x00 "ADDR_REG,ADDR_REG"
|
|
hexmask.long.byte 0x00 24.--31. 1. " XFER_LEN ,"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MEM_ADD ,"
|
|
group 0x108++0x03
|
|
line.long 0x00 "DATA_REG,DATA_REG"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "CONF_REG1,CONF_REG1"
|
|
bitfld.long 0x00 31. " DMA_REQ_EN ," "0,1"
|
|
bitfld.long 0x00 29. " INT_EN ," "0,1"
|
|
bitfld.long 0x00 28. " INT_RAW_STATUS ," "0,1"
|
|
bitfld.long 0x00 27. " INT_EN_POL ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. "INT_RAW_STAT_POL ," "0,1"
|
|
bitfld.long 0x00 24. " SW_RESET ," "0,1"
|
|
bitfld.long 0x00 20.--22. " POL_CNT_PRE_SCL ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18. " DUMMY_DIS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. "DUMMY_CYCLES ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14. " INT_EN_ECC ," "0,1"
|
|
bitfld.long 0x00 13. " INT_RAW_STAT_ECC ," "0,1"
|
|
bitfld.long 0x00 8. " MODE ," "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPI_CLK_DIV_DATA ,"
|
|
group 0x110++0x03
|
|
line.long 0x00 "POLLING_REG,POLLING_REG"
|
|
hexmask.long.word 0x00 16.--31. 1. " POLLING_COUNT ,"
|
|
bitfld.long 0x00 12.--14. " POLL_BSY_BIT_INDEX ," "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10. " POLL_STATUS ," "0,1"
|
|
bitfld.long 0x00 9. " POLL_EN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. "POLL_START ," "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " POLL_CMD ,"
|
|
group 0x114++0x03
|
|
line.long 0x00 "EXT_MEM_ADD_REG,EXT_MEM_ADD_REG"
|
|
hexmask.long 0x00 0.--31. 1. " MEM_ADD ,"
|
|
group 0x118++0x03
|
|
line.long 0x00 "CONF_REG2,CONF_REG2"
|
|
bitfld.long 0x00 31. " ENDIAN ," "0,1"
|
|
bitfld.long 0x00 26. " EXT_SPI_CLK_DLY_BYP ," "0,1"
|
|
bitfld.long 0x00 25. " INV_EXT_SPI_CLK ," "0,1"
|
|
bitfld.long 0x00 24. " EXT_SPI_CLK_EN ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. "SQI_PARA_MODE ," "0,1"
|
|
bitfld.long 0x00 15. " EXT_MEM_MODE ," "0,1"
|
|
bitfld.long 0x00 14. " DUMMY_CYCLE_ALT ," "0,1"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DUMMY_CYCLE_NUM ,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. "EXT_MEM_ADDR_8MSB_MSK ,"
|
|
group 0x11C++0x03
|
|
line.long 0x00 "ECC_CONF_REG,ECC_CONF_REG"
|
|
bitfld.long 0x00 7. " ECC_ERR_OV ," "0,1"
|
|
bitfld.long 0x00 3.--6. " ECC_ERR_CNT ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " ECC_FLT_EN ," "0,1"
|
|
bitfld.long 0x00 1. " ECC_FLT_RAW_STATUS ," "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. "ECC_EN ," "0,1"
|
|
rgroup 0x120++0x03
|
|
line.long 0x00 "ECC_FAIL_MEM_ADD_REG,ECC_FAIL_MEM_ADD_REG"
|
|
hexmask.long 0x00 0.--31. 1. " ECC_FAIL_MEM_ADD ,"
|
|
group 0x400++0x03
|
|
line.long 0x00 "DLYB_CR,DELAY_BLOCK control register"
|
|
bitfld.long 0x00 0. " DEN ,Delay block enable" "0,1"
|
|
bitfld.long 0x00 1. " SEN ,Sampler lenght enable" "0,1"
|
|
group 0x404++0x03
|
|
line.long 0x00 "DLYB_CFGR,DELAY_BLOCK configuration register"
|
|
bitfld.long 0x00 0.--3. " SEL ,Output clock phase select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--14. 1. " UNIT ,UNIT delay value"
|
|
hexmask.long.word 0x00 16.--27. 1. " LNG ,Delay line lenght value"
|
|
bitfld.long 0x00 31. " LNGF ,Lenght valid flag" "0,1"
|
|
tree.end
|
|
tree "HYPERBUS"
|
|
base ad:0x58000000
|
|
width 16.
|
|
group 0x00++0x03
|
|
line.long 0x00 "OCTOSPI_CR,OCTOSPI_CR - OCTOSPI control register"
|
|
bitfld.long 0x00 0. " ENABLE ,OCTOSPI enable or disbale" "0,1"
|
|
bitfld.long 0x00 1. " ABORT ,OCTOSPI abort request" "0,1"
|
|
bitfld.long 0x00 2. " DMAEN ,OCTOSPI DMA enable" "0,1"
|
|
bitfld.long 0x00 3. " TCEN ,OCTOSPI Timeout counter enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. "DQM ,OCTOSPI dual quad mode" "0,1"
|
|
bitfld.long 0x00 7. " FSEL ,OCTOSPI Flash select" "0,1"
|
|
bitfld.long 0x00 8.--12. " FTHRES ,OCTOSPI FIFO threshold level" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 16. " TEIE ,OCTOSPI Transfer error Interrupt enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. "TCIE ,OCTOSPI Transfer complete Interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. " FTIE ,OCTOSPI FIFO threshold Interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. " SMIE ,OCTOSPI Status match Interrupt enable" "0,1"
|
|
bitfld.long 0x00 20. " TOIE ,OCTOSPI Timeout Interrupt enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. "APMS ,OCTOSPI Auto poll mode stop" "0,1"
|
|
bitfld.long 0x00 23. " PMM ,OCTOSPI Polling match mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " FMODE ,OCTOSPI Functional mode" "0,1,2,3"
|
|
group 0x08++0x03
|
|
line.long 0x00 "OCTOSPI_DCR1,OCTOSPI_DCR1 - OCTOSPI Device config register_1"
|
|
bitfld.long 0x00 0. " CKMODE ,OCTOSPI enable or disbale" "0,1"
|
|
bitfld.long 0x00 1. " FRCK ,OCTOSPI free running clock" "0,1"
|
|
bitfld.long 0x00 8.--10. " CSHT ,OCTOSPI Chip select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. " DEVSIZE ,OCTOSPI Device size" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. "MTYP ,OCTOSPI Memory type" "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "OCTOSPI_DCR2,OCTOSPI_DCR2 - OCTOSPI Device config register_2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESCALAR ,OCTOSPI clock prescalar"
|
|
bitfld.long 0x00 16.--18. " WRAPSIZE ,OCTOSPI wrap size" "0,1,2,3,4,5,6,7"
|
|
group 0x10++0x03
|
|
line.long 0x00 "OCTOSPI_DCR3,OCTOSPI_DCR3 - OCTOSPI Device config register_3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MAXTRAN ,OCTOSPI max transfer size"
|
|
bitfld.long 0x00 16.--20. " CSBOUND ,OCTOSPI CSboundary size" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "OCTOSPI_SR,OCTOSPI_SR - OCTOSPI Status register"
|
|
bitfld.long 0x00 0. " TEF ,OCTOSPI Transfer error flag" "0,1"
|
|
bitfld.long 0x00 1. " TCF ,OCTOSPI Transfer complete flag" "0,1"
|
|
bitfld.long 0x00 2. " FTF ,OCTOSPI FIFO threshold flag" "0,1"
|
|
bitfld.long 0x00 3. " SMF ,OCTOSPI Status match flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. "TOF ,OCTOSPI Timeout flag" "0,1"
|
|
bitfld.long 0x00 5. " BUSY ,OCTOSPI operation status" "0,1"
|
|
hexmask.long.byte 0x00 8.--13. 1. " FLEVEL ,OCTOSPI FIFO level"
|
|
wgroup 0x24++0x03
|
|
line.long 0x00 "OCTOSPI_FCR,OCTOSPI_FCR - OCTOSPI Flag clear register"
|
|
bitfld.long 0x00 0. " CTEF ,OCTOSPI Clear transfer error flag" "0,1"
|
|
bitfld.long 0x00 1. " CTCF ,OCTOSPI Clear transfer complete flag" "0,1"
|
|
bitfld.long 0x00 3. " CSMF ,OCTOSPI Clear status match flag" "0,1"
|
|
bitfld.long 0x00 4. " CTOF ,OCTOSPI Clear timeout flag" "0,1"
|
|
group 0x40++0x03
|
|
line.long 0x00 "OCTOSPI_DLR,OCTOSPI_FCR - OCTOSPI Data length register"
|
|
hexmask.long 0x00 0.--31. 1. " DL ,OCTOSPI data length"
|
|
group 0x48++0x03
|
|
line.long 0x00 "OCTOSPI_AR,OCTOSPI_AR - OCTOSPI Address register"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR ,OCTOSPI address"
|
|
wgroup 0x50++0x03
|
|
line.long 0x00 "OCTOSPI_DR_WONLY,OCTOSPI_DR - OCTOSPI Data register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,OCTOSPI data"
|
|
group 0x80++0x03
|
|
line.long 0x00 "OCTOSPI_PSMKR,OCTOSPI_PSMKR - OCTOSPI Polling status mask register"
|
|
hexmask.long 0x00 0.--31. 1. " MASK ,OCTOSPI mask register"
|
|
group 0x88++0x03
|
|
line.long 0x00 "OCTOSPI_PSMAR,OCTOSPI_PSMAR - OCTOSPI Polling status match register"
|
|
hexmask.long 0x00 0.--31. 1. " MATCH ,OCTOSPI status match register"
|
|
group 0x90++0x03
|
|
line.long 0x00 "OCTOSPI_PIR,OCTOSPI_PIR - OCTOSPI Polling interval register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTERVAL ,OCTOSPI polling interval register"
|
|
group 0x100++0x03
|
|
line.long 0x00 "OCTOSPI_CCR,OCTOSPI_CCR - OCTOSPI Communication configuration register"
|
|
bitfld.long 0x00 0.--2. " IMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " IDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 4.--5. " ISIZE ,OCTOSPI" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " ADMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11. "ADDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 12.--13. " ADSIZE ,OCTOSPI" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. " ABMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19. " ABDTR ,OCTOSPI" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. "ABSIZE ,OCTOSP" "0,1,2,3"
|
|
bitfld.long 0x00 24.--26. " DMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " DDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 29. " DQSE ,OCTOSPI" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 31. "SIOO ,OCTOSPI" "0,1"
|
|
group 0x108++0x03
|
|
line.long 0x00 "OCTOSPI_TCR,OCTOSPI_PIR - OCTOSPI Timing configuration register"
|
|
bitfld.long 0x00 0.--4. " DCYC ,OCTOSPI Dummy cycles" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
bitfld.long 0x00 28. " DHQC ,OCTOSPI Delay hold quater cycle" "0,1"
|
|
bitfld.long 0x00 30. " SSHIFT ,OCTOSPI Sample shift" "0,1"
|
|
group 0x110++0x03
|
|
line.long 0x00 "OCTOSPI_IR,OCTOSPI_PIR - OCTOSPI Instruction register"
|
|
hexmask.long 0x00 0.--31. 1. " INSTRUCTION ,OCTOSPI Instruction register"
|
|
group 0x120++0x03
|
|
line.long 0x00 "OCTOSPI_ABR,OCTOSPI_PIR - OCTOSPI Alternate byte register"
|
|
hexmask.long 0x00 0.--31. 1. " AB ,OCTOSPI Alternate byte register"
|
|
group 0x130++0x03
|
|
line.long 0x00 "OCTOSPI_LPTR,OCTOSPI_PIR - OCTOSPI Low power timeout register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,OCTOSPI Low power timeout register"
|
|
group 0x180++0x03
|
|
line.long 0x00 "OCTOSPI_WCCR,OCTOSPI_WCCR - OCTOSPI Write Communication configuration register"
|
|
bitfld.long 0x00 0.--2. " IMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " IDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 4.--5. " ISIZE ,OCTOSPI" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " ADMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11. "ADDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 12.--13. " ADSIZE ,OCTOSPI" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. " ABMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19. " ABDTR ,OCTOSPI" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. "ABSIZE ,OCTOSP" "0,1,2,3"
|
|
bitfld.long 0x00 24.--26. " DMODE ,OCTOSPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. " DDTR ,OCTOSPI" "0,1"
|
|
bitfld.long 0x00 29. " DQSE ,OCTOSPI" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 31. "SIOO ,OCTOSPI" "0,1"
|
|
group 0x188++0x03
|
|
line.long 0x00 "OCTOSPI_WTCR,OCTOSPI_PIR - OCTOSPI Write Timing configuration register"
|
|
bitfld.long 0x00 0.--4. " DCYC ,OCTOSPI Dummy cycles" "0,0x01,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
group 0x190++0x03
|
|
line.long 0x00 "OCTOSPI_WIR,OCTOSPI_PIR - OCTOSPI Write Instruction register"
|
|
hexmask.long 0x00 0.--31. 1. " INSTRUCTION ,OCTOSPI Instruction register"
|
|
group 0x1A0++0x03
|
|
line.long 0x00 "OCTOSPI_WABR,OCTOSPI_PIR - OCTOSPI Write Alternate byte register"
|
|
hexmask.long 0x00 0.--31. 1. " AB ,OCTOSPI Alternate byte register"
|
|
group 0x200++0x03
|
|
line.long 0x00 "OCTOSPI_HLCR,OCTOSPI_HLCR - OCTOSPI Hyperbus latency configuration register"
|
|
bitfld.long 0x00 0. " LM ,OCTOSPI Latency mode enable" "0,1"
|
|
bitfld.long 0x00 1. " WZL ,OCTOSPI Write zero latency" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TACC ,OCTOSPI Access time"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TRWR ,OCTOSPI Read write recovery time"
|
|
rgroup 0x3F0++0x03
|
|
line.long 0x00 "OCTOSPI_HWCFGR,OCTOSPI_HWCFGR - OCTOSPI HW configuration register"
|
|
hexmask.long 0x00 0.--31. 1. " TBD ,OCTOSPI HW configuration register"
|
|
rgroup 0x3F4++0x03
|
|
line.long 0x00 "OCTOSPI_VER,OCTOSPI_VER - OCTOSPI Version register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VER ,OCTOSPI version register"
|
|
rgroup 0x3F8++0x03
|
|
line.long 0x00 "OCTOSPI_ID,OCTOSPI_ID - OCTOSPI ID register"
|
|
hexmask.long 0x00 0.--31. 1. " ID ,OCTOSPI ID register"
|
|
rgroup 0x3FC++0x03
|
|
line.long 0x00 "OCTOSPI_MID,OCTOSPI_MID - OCTOSPI MID register"
|
|
hexmask.long 0x00 0.--31. 1. " MID ,OCTOSPI MID register"
|
|
group 0x400++0x03
|
|
line.long 0x00 "DLYB_CR,DELAY_BLOCK control register"
|
|
bitfld.long 0x00 0. " DEN ,Delay block enable" "0,1"
|
|
bitfld.long 0x00 1. " SEN ,Sampler lenght enable" "0,1"
|
|
group 0x404++0x03
|
|
line.long 0x00 "DLYB_CFGR,DELAY_BLOCK configuration register"
|
|
bitfld.long 0x00 0.--3. " SEL ,Output clock phase select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--14. 1. " UNIT ,UNIT delay value"
|
|
hexmask.long.word 0x00 16.--27. 1. " LNG ,Delay line lenght value"
|
|
bitfld.long 0x00 31. " LNGF ,Lenght valid flag" "0,1"
|
|
tree.end
|
|
tree "NVIC"
|
|
base ad:0xE000E004
|
|
width 9.
|
|
rgroup 0xE004++0x03
|
|
line.long 0x00 "IRQICTR,"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup 0xEF00++0x03
|
|
line.long 0x00 "IRQSTIR,"
|
|
hexmask.long 0x00 0.--31. 1. " STIR ,"
|
|
group 0xE100++0x03
|
|
line.long 0x00 "ISER0,"
|
|
hexmask.long 0x00 0.--31. 1. " SETENA ,"
|
|
group 0xE104++0x03
|
|
line.long 0x00 "ISER1,"
|
|
hexmask.long 0x00 0.--31. 1. " SETENA ,"
|
|
group 0xE108++0x03
|
|
line.long 0x00 "ISER2,"
|
|
hexmask.long 0x00 0.--31. 1. " SETENA ,"
|
|
group 0xE10C++0x03
|
|
line.long 0x00 "ISER3,"
|
|
hexmask.long 0x00 0.--31. 1. " SETENA ,"
|
|
group 0xE180++0x03
|
|
line.long 0x00 "ICER0,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRENA ,"
|
|
group 0xE184++0x03
|
|
line.long 0x00 "ICER1,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRENA ,"
|
|
group 0xE188++0x03
|
|
line.long 0x00 "ICER2,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRENA ,"
|
|
group 0xE18C++0x03
|
|
line.long 0x00 "ICER3,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRENA ,"
|
|
group 0xE200++0x03
|
|
line.long 0x00 "ISPR0,"
|
|
hexmask.long 0x00 0.--31. 1. " SETPEND ,"
|
|
group 0xE204++0x03
|
|
line.long 0x00 "ISPR1,"
|
|
hexmask.long 0x00 0.--31. 1. " SETPEND ,"
|
|
group 0xE208++0x03
|
|
line.long 0x00 "ISPR2,"
|
|
hexmask.long 0x00 0.--31. 1. " SETPEND ,"
|
|
group 0xE20C++0x03
|
|
line.long 0x00 "ISPR3,"
|
|
hexmask.long 0x00 0.--31. 1. " SETPEND ,"
|
|
group 0xE280++0x03
|
|
line.long 0x00 "ICPR0,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRPEND ,"
|
|
group 0xE284++0x03
|
|
line.long 0x00 "ICPR1,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRPEND ,"
|
|
group 0xE288++0x03
|
|
line.long 0x00 "ICPR2,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRPEND ,"
|
|
group 0xE28C++0x03
|
|
line.long 0x00 "ICPR3,"
|
|
hexmask.long 0x00 0.--31. 1. " CLRPEND ,"
|
|
rgroup 0xE300++0x03
|
|
line.long 0x00 "IABR0,"
|
|
hexmask.long 0x00 0.--31. 1. " ACTIVE ,"
|
|
rgroup 0xE304++0x03
|
|
line.long 0x00 "IABR1,"
|
|
hexmask.long 0x00 0.--31. 1. " ACTIVE ,"
|
|
rgroup 0xE308++0x03
|
|
line.long 0x00 "IABR2,"
|
|
hexmask.long 0x00 0.--31. 1. " ACTIVE ,"
|
|
rgroup 0xE30C++0x03
|
|
line.long 0x00 "IABR3,"
|
|
hexmask.long 0x00 0.--31. 1. " ACTIVE ,"
|
|
group 0xE400++0x03
|
|
line.long 0x00 "IPR0,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE404++0x03
|
|
line.long 0x00 "IPR1,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE408++0x03
|
|
line.long 0x00 "IPR2,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE40C++0x03
|
|
line.long 0x00 "IPR3,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE410++0x03
|
|
line.long 0x00 "IPR4,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE414++0x03
|
|
line.long 0x00 "IPR5,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE418++0x03
|
|
line.long 0x00 "IPR6,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE41C++0x03
|
|
line.long 0x00 "IPR7,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE420++0x03
|
|
line.long 0x00 "IPR8,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE424++0x03
|
|
line.long 0x00 "IPR9,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE428++0x03
|
|
line.long 0x00 "IPR10,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE42C++0x03
|
|
line.long 0x00 "IPR11,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE430++0x03
|
|
line.long 0x00 "IPR12,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE434++0x03
|
|
line.long 0x00 "IPR13,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE438++0x03
|
|
line.long 0x00 "IPR14,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE43C++0x03
|
|
line.long 0x00 "IPR15,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE440++0x03
|
|
line.long 0x00 "IPR16,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE444++0x03
|
|
line.long 0x00 "IPR17,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE448++0x03
|
|
line.long 0x00 "IPR18,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE44C++0x03
|
|
line.long 0x00 "IPR19,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE450++0x03
|
|
line.long 0x00 "IPR20,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE454++0x03
|
|
line.long 0x00 "IPR21,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE458++0x03
|
|
line.long 0x00 "IPR22,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE45C++0x03
|
|
line.long 0x00 "IPR23,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE460++0x03
|
|
line.long 0x00 "IPR24,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
group 0xE464++0x03
|
|
line.long 0x00 "IPR25,"
|
|
bitfld.long 0x00 0.--7. " PRI_N ,"
|
|
bitfld.long 0x00 8.--15. " PRI_N1 ,"
|
|
bitfld.long 0x00 16.--23. " PRI_N2 ,"
|
|
bitfld.long 0x00 24.--31. " PRI_N3 ,"
|
|
tree.end
|
|
tree "AUDIO_SS"
|
|
base ad:0x41C00000
|
|
width 12.
|
|
tree "AIF"
|
|
tree "AIF_SRC"
|
|
group 0x00++0x03
|
|
line.long 0x00 "SRC0CSR,AIF_SRC0CSR - AIF Sample Rate Converter 0 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
group 0x04++0x03
|
|
line.long 0x00 "SRC1CSR,AIF_SRC1CSR - AIF Sample Rate Converter 1 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
group 0x08++0x03
|
|
line.long 0x00 "SRC2CSR,AIF_SRC2CSR - AIF Sample Rate Converter 2 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "SRC3CSR,AIF_SRC3CSR - AIF Sample Rate Converter 3 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SRC4CSR,AIF_SRC4CSR - AIF Sample Rate Converter 4 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
group 0x14++0x03
|
|
line.long 0x00 "SRC5CSR,AIF_SRC5CSR - AIF Sample Rate Converter 5 Control Status Register"
|
|
bitfld.long 0x00 0.--3. "DRLL_THRES ,"
|
|
bitfld.long 0x00 4. " DITHER_EN ,"
|
|
bitfld.long 0x00 5. " ROU ,"
|
|
bitfld.long 0x00 6. " BY ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--25. "DRLL_DIFF ,"
|
|
bitfld.long 0x00 28.--29. " DRLL_LOCK ,"
|
|
rgroup 0x40++0x03
|
|
line.long 0x00 "SRCDO0L,AIF_SRCDO0L - AIF Sample Rate Converter 0 Data Output Left"
|
|
rgroup 0x44++0x03
|
|
line.long 0x00 "SRCDO0R,AIF_SRCDO0R - AIF Sample Rate Converter 0 Data Output Right"
|
|
rgroup 0x48++0x03
|
|
line.long 0x00 "SRCDO1L,AIF_SRCDO1L - AIF Sample Rate Converter 1 Data Output Left"
|
|
rgroup 0x4C++0x03
|
|
line.long 0x00 "SRCDO1R,AIF_SRCDO1R - AIF Sample Rate Converter 1 Data Output Right"
|
|
rgroup 0x50++0x03
|
|
line.long 0x00 "SRCDO2L,AIF_SRCDO2L - AIF Sample Rate Converter 2 Data Output Left"
|
|
rgroup 0x54++0x03
|
|
line.long 0x00 "SRCDO2R,AIF_SRCDO2R - AIF Sample Rate Converter 2 Data Output Right"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "SRCDO3L,AIF_SRCDO3L - AIF Sample Rate Converter 3 Data Output Left"
|
|
rgroup 0x5C++0x03
|
|
line.long 0x00 "SRCDO3R,AIF_SRCDO3R - AIF Sample Rate Converter 3 Data Output Right"
|
|
rgroup 0x60++0x03
|
|
line.long 0x00 "SRCDO4L,AIF_SRCDO4L - AIF Sample Rate Converter 4 Data Output Left"
|
|
rgroup 0x64++0x03
|
|
line.long 0x00 "SRCDO4R,AIF_SRCDO4R - AIF Sample Rate Converter 4 Data Output Right"
|
|
rgroup 0x68++0x03
|
|
line.long 0x00 "SRCDO5L,AIF_SRCDO5L - AIF Sample Rate Converter 5 Data Output Left"
|
|
rgroup 0x6C++0x03
|
|
line.long 0x00 "SRCDO5R,AIF_SRCDO5R - AIF Sample Rate Converter 5 Data Output Right"
|
|
group 0xC0++0x03
|
|
line.long 0x00 "SRC0RATIO,AIF_SRC0RATIO - AIF Sample Rate Converter 0 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
group 0xC4++0x03
|
|
line.long 0x00 "SRC1RATIO,AIF_SRC1RATIO - AIF Sample Rate Converter 1 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
group 0xC8++0x03
|
|
line.long 0x00 "SRC2RATIO,AIF_SRC2RATIO - AIF Sample Rate Converter 2 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
group 0xCC++0x03
|
|
line.long 0x00 "SRC3RATIO,AIF_SRC3RATIO - AIF Sample Rate Converter 3 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
group 0xD0++0x03
|
|
line.long 0x00 "SRC4RATIO,AIF_SRC4RATIO - AIF Sample Rate Converter 4 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
group 0xD4++0x03
|
|
line.long 0x00 "SRC5RATIO,AIF_SRC4RATIO - AIF Sample Rate Converter 5 Ratio"
|
|
bitfld.long 0x00 10.--31. "DRLL_RATIO ,"
|
|
tree.end
|
|
tree "AIF_LPF"
|
|
group 0x400++0x03
|
|
line.long 0x00 "LPFCSR,AIF_LPFCSR - AIF Low Pass Filter Control Status Register"
|
|
bitfld.long 0x00 0.--1. "FS_0 ,"
|
|
bitfld.long 0x00 2.--3. " FS_1 ,"
|
|
bitfld.long 0x00 4.--5. " FS_2 ,"
|
|
bitfld.long 0x00 6.--7. " FS_3 ,"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. "FS_4 ,"
|
|
bitfld.long 0x00 10.--11. " FS_5 ,"
|
|
bitfld.long 0x00 12. " TEST_OFD ,"
|
|
bitfld.long 0x00 13. " CLRF ,"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. "LPF_UFL ,"
|
|
bitfld.long 0x00 24.--29. "LPF_OVF ,"
|
|
group 0x440++0x03
|
|
line.long 0x00 "LPFDI0L,AIF_LPFDI0L - AIF Low Pass Filter Data Input 0 Left Register"
|
|
group 0x444++0x03
|
|
line.long 0x00 "LPFDI0R,AIF_LPFDI0R - AIF Low Pass Filter Data Input 0 Right Register"
|
|
group 0x448++0x03
|
|
line.long 0x00 "LPFDI1L,AIF_LPFDI1L - AIF Low Pass Filter Data Input 1 Left Register"
|
|
group 0x44C++0x03
|
|
line.long 0x00 "LPFDI1R,AIF_LPFDI1R - AIF Low Pass Filter Data Input 1 Right Register"
|
|
group 0x450++0x03
|
|
line.long 0x00 "LPFDI2L,AIF_LPFDI2L - AIF Low Pass Filter Data Input 2 Left Register"
|
|
group 0x454++0x03
|
|
line.long 0x00 "LPFDI2R,AIF_LPFDI2R - AIF Low Pass Filter Data Input 2 Right Register"
|
|
group 0x458++0x03
|
|
line.long 0x00 "LPFDI3L,AIF_LPFDI3L - AIF Low Pass Filter Data Input 3 Left Register"
|
|
group 0x45C++0x03
|
|
line.long 0x00 "LPFDI3R,AIF_LPFDI3R - AIF Low Pass Filter Data Input 3 Right Register"
|
|
group 0x460++0x03
|
|
line.long 0x00 "LPFDI4L,AIF_LPFDI4L - AIF Low Pass Filter Data Input 4 Left Register"
|
|
group 0x464++0x03
|
|
line.long 0x00 "LPFDI4R,AIF_LPFDI4R - AIF Low Pass Filter Data Input 4 Right Register"
|
|
group 0x468++0x03
|
|
line.long 0x00 "LPFDI5L,AIF_LPFDI5L - AIF Low Pass Filter Data Input 5 Left Register"
|
|
group 0x46C++0x03
|
|
line.long 0x00 "LPFDI5R,AIF_LPFDI5R - AIF Low Pass Filter Data Input 5 Right Register"
|
|
rgroup 0x480++0x03
|
|
line.long 0x00 "LPFDO0L,AIF_LPFDO0L - AIF Low Pass Filter Data Output 0 Left Register"
|
|
rgroup 0x484++0x03
|
|
line.long 0x00 "LPFDO0R,AIF_LPFDO0R - AIF Low Pass Filter Data Output 0 Right Register"
|
|
rgroup 0x488++0x03
|
|
line.long 0x00 "LPFDO1L,AIF_LPFDO1L - AIF Low Pass Filter Data Output 1 Left Register"
|
|
rgroup 0x48C++0x03
|
|
line.long 0x00 "LPFDO1R,AIF_LPFDO1R - AIF Low Pass Filter Data Output 1 Right Register"
|
|
rgroup 0x490++0x03
|
|
line.long 0x00 "LPFDO2L,AIF_LPFDO2L - AIF Low Pass Filter Data Output 2 Left Register"
|
|
rgroup 0x494++0x03
|
|
line.long 0x00 "LPFDO2R,AIF_LPFDO2R - AIF Low Pass Filter Data Output 2 Right Register"
|
|
rgroup 0x498++0x03
|
|
line.long 0x00 "LPFDO3L,AIF_LPFDO3L - AIF Low Pass Filter Data Output 3 Left Register"
|
|
rgroup 0x49C++0x03
|
|
line.long 0x00 "LPFDO3R,AIF_LPFDO3R - AIF Low Pass Filter Data Output 3 Right Register"
|
|
rgroup 0x4A0++0x03
|
|
line.long 0x00 "LPFDO4L,AIF_LPFDO4L - AIF Low Pass Filter Data Output 4 Left Register"
|
|
rgroup 0x4A4++0x03
|
|
line.long 0x00 "LPFDO4R,AIF_LPFDO4R - AIF Low Pass Filter Data Output 4 Right Register"
|
|
rgroup 0x4A8++0x03
|
|
line.long 0x00 "LPFDO5L,AIF_LPFDO5L - AIF Low Pass Filter Data Output 5 Left Register"
|
|
rgroup 0x4AC++0x03
|
|
line.long 0x00 "LPFDO5R,AIF_LPFDO5R - AIF Low Pass Filter Data Output 5 Right Register"
|
|
tree.end
|
|
tree "AIF_SAI"
|
|
group 0x1000++0x03
|
|
line.long 0x00 "SAI1CSR,AIF_SAI1CSR - AIF Serial Audio Interface 1 Control Status Register"
|
|
bitfld.long 0x00 0. "SAI1_EN ,"
|
|
bitfld.long 0x00 1. " SAI1_IO ,"
|
|
bitfld.long 0x00 3. " SAI1_MME ,"
|
|
bitfld.long 0x00 4.--6. " SAI1_WL ,"
|
|
textline " "
|
|
bitfld.long 0x00 7. "SAI1_DIR ,"
|
|
bitfld.long 0x00 8. " SAI1_LPR ,"
|
|
bitfld.long 0x00 9. " SAI1_CKP ,"
|
|
bitfld.long 0x00 10. " SAI1_REL ,"
|
|
textline " "
|
|
bitfld.long 0x00 11. "SAI1_ADJ ,"
|
|
bitfld.long 0x00 12.--13. " SAI1_CNT ,"
|
|
bitfld.long 0x00 14.--15. " SAI1_SYN ,"
|
|
bitfld.long 0x00 23. " SAI1_TM ,"
|
|
group 0x1004++0x03
|
|
line.long 0x00 "SAI2CSR,AIF_SAI2CSR - AIF Serial Audio Interface 2 Control Status Register"
|
|
bitfld.long 0x00 0. "SAI2_EN ,"
|
|
bitfld.long 0x00 1. " SAI2_IO ,"
|
|
bitfld.long 0x00 3. " SAI2_MME ,"
|
|
bitfld.long 0x00 4.--6. " SAI2_WL ,"
|
|
textline " "
|
|
bitfld.long 0x00 7. "SAI2_DIR ,"
|
|
bitfld.long 0x00 8. " SAI2_LPR ,"
|
|
bitfld.long 0x00 9. " SAI2_CKP ,"
|
|
bitfld.long 0x00 10. " SAI2_REL ,"
|
|
textline " "
|
|
bitfld.long 0x00 11. "SAI2_ADJ ,"
|
|
bitfld.long 0x00 12.--13. " SAI2_CNT ,"
|
|
bitfld.long 0x00 14.--15. " SAI2_SYN ,"
|
|
bitfld.long 0x00 23. " SAI2_TM ,"
|
|
group 0x1008++0x03
|
|
line.long 0x00 "SAI3CSR,AIF_SAI3CSR - AIF Serial Audio Interface 3 Control Status Register"
|
|
bitfld.long 0x00 0. "SAI3_EN ,"
|
|
bitfld.long 0x00 3. " SAI3_MME ,"
|
|
bitfld.long 0x00 4.--6. " SAI3_WL ,"
|
|
bitfld.long 0x00 7. "SAI3_DIR ,"
|
|
textline " "
|
|
bitfld.long 0x00 8. "SAI3_LPR ,"
|
|
bitfld.long 0x00 9. " SAI3_CKP ,"
|
|
bitfld.long 0x00 10. " SAI3_REL ,"
|
|
bitfld.long 0x00 11. " SAI3_ADJ ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. "SAI3_CNT ,"
|
|
bitfld.long 0x00 14.--15. " SAI3_SYN ,"
|
|
bitfld.long 0x00 23. " SAI3_TM ,"
|
|
group 0x100C++0x03
|
|
line.long 0x00 "SAI4CSR,AIF_SAI4CSR - AIF Serial Audio Interface 4 Control Status Register"
|
|
bitfld.long 0x00 0. "SAI4_EN ,"
|
|
bitfld.long 0x00 3. " SAI4_MME ,"
|
|
bitfld.long 0x00 4.--6. " SAI4_WL ,"
|
|
bitfld.long 0x00 7. "SAI4_DIR ,"
|
|
textline " "
|
|
bitfld.long 0x00 8. "SAI4_LPR ,"
|
|
bitfld.long 0x00 9. " SAI4_CKP ,"
|
|
bitfld.long 0x00 10. " SAI4_REL ,"
|
|
bitfld.long 0x00 11. " SAI4_ADJ ,"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. "SAI4_CNT ,"
|
|
bitfld.long 0x00 14.--15. " SAI4_SYN ,"
|
|
bitfld.long 0x00 23. " SAI4_TM ,"
|
|
rgroup 0x1040++0x03
|
|
line.long 0x00 "SAI1RX1L,AIF_SAI1RX1L - AIF Serial Audio Interface 1 Receiver Left Data Register 1"
|
|
rgroup 0x1044++0x03
|
|
line.long 0x00 "SAI1RX1R,AIF_SAI1RX1R - AIF Serial Audio Interface 1 Receiver Right Data Register 1"
|
|
rgroup 0x1048++0x03
|
|
line.long 0x00 "SAI1RX2L,AIF_SAI1RX2L - AIF Serial Audio Interface 1 Receiver Left Data Register 2"
|
|
rgroup 0x104C++0x03
|
|
line.long 0x00 "SAI1RX2R,AIF_SAI1RX2R - AIF Serial Audio Interface 1 Receiver Right Data Register 2"
|
|
rgroup 0x1050++0x03
|
|
line.long 0x00 "SAI1RX3L,AIF_SAI1RX3L - AIF Serial Audio Interface 1 Receiver Left Data Register 3"
|
|
rgroup 0x1054++0x03
|
|
line.long 0x00 "SAI1RX3R,AIF_SAI1RX3R - AIF Serial Audio Interface 1 Receiver Right Data Register 3"
|
|
rgroup 0x1058++0x03
|
|
line.long 0x00 "SAI1RX4L,AIF_SAI1RX4L - AIF Serial Audio Interface 1 Receiver Left Data Register 4"
|
|
rgroup 0x105C++0x03
|
|
line.long 0x00 "SAI1RX4R,AIF_SAI1RX4R - AIF Serial Audio Interface 1 Receiver Right Data Register 4"
|
|
group 0x1060++0x03
|
|
line.long 0x00 "SAI1TX1L,AIF_SAI1RX1L - AIF Serial Audio Interface 1 Transmitter Left Data Register 1"
|
|
group 0x1064++0x03
|
|
line.long 0x00 "SAI1TX1R,AIF_SAI1RX1R - AIF Serial Audio Interface 1 Transmitter Right Data Register 1"
|
|
rgroup 0x1080++0x03
|
|
line.long 0x00 "SAI2RX1L,AIF_SAI2RX1L - AIF Serial Audio Interface 2 Receiver Left Data Register 1"
|
|
rgroup 0x1084++0x03
|
|
line.long 0x00 "SAI2RX1R,AIF_SAI2RX1R - AIF Serial Audio Interface 2 Receiver Right Data Register 1"
|
|
rgroup 0x1088++0x03
|
|
line.long 0x00 "SAI2RX2L,AIF_SAI2RX2L - AIF Serial Audio Interface 2 Receiver Left Data Register 2"
|
|
rgroup 0x108C++0x03
|
|
line.long 0x00 "SAI2RX2R,AIF_SAI2RX2R - AIF Serial Audio Interface 2 Receiver Right Data Register 2"
|
|
rgroup 0x1090++0x03
|
|
line.long 0x00 "SAI2RX3L,AIF_SAI2RX3L - AIF Serial Audio Interface 2 Receiver Left Data Register 3"
|
|
rgroup 0x1094++0x03
|
|
line.long 0x00 "SAI2RX3R,AIF_SAI2RX3R - AIF Serial Audio Interface 2 Receiver Right Data Register 3"
|
|
rgroup 0x1098++0x03
|
|
line.long 0x00 "SAI2RX4L,AIF_SAI2RX4L - AIF Serial Audio Interface 2 Receiver Left Data Register 4"
|
|
rgroup 0x109C++0x03
|
|
line.long 0x00 "SAI2RX4R,AIF_SAI2RX4R - AIF Serial Audio Interface 2 Receiver Right Data Register 4"
|
|
group 0x10A0++0x03
|
|
line.long 0x00 "SAI2TX1L,AIF_SAI2TX1L - AIF Serial Audio Interface 2 Transmitter Left Data Register 1"
|
|
group 0x10A4++0x03
|
|
line.long 0x00 "SAI2TX1R,AIF_SAI2TX1R - AIF Serial Audio Interface 2 Transmitter Right Data Register 1"
|
|
rgroup 0x10C0++0x03
|
|
line.long 0x00 "SAI3RX1L,AIF_SAI3RX1L - AIF Serial Audio Interface 3 Receiver Left Data Register 1"
|
|
rgroup 0x10C4++0x03
|
|
line.long 0x00 "SAI3RX1R,AIF_SAI3RX1R - AIF Serial Audio Interface 3 Receiver Right Data Register 1"
|
|
rgroup 0x10C8++0x03
|
|
line.long 0x00 "SAI3RX2L,AIF_SAI3RX2L - AIF Serial Audio Interface 3 Receiver Left Data Register 2"
|
|
rgroup 0x10CC++0x03
|
|
line.long 0x00 "SAI3RX2R,AIF_SAI3RX2R - AIF Serial Audio Interface 3 Receiver Right Data Register 2"
|
|
rgroup 0x10D0++0x03
|
|
line.long 0x00 "SAI3RX3L,AIF_SAI3RX3L - AIF Serial Audio Interface 3 Receiver Left Data Register 3"
|
|
rgroup 0x10D4++0x03
|
|
line.long 0x00 "SAI3RX3R,AIF_SAI3RX3R - AIF Serial Audio Interface 3 Receiver Right Data Register 3"
|
|
rgroup 0x10D8++0x03
|
|
line.long 0x00 "SAI3RX4L,AIF_SAI3RX4L - AIF Serial Audio Interface 3 Receiver Left Data Register 4"
|
|
rgroup 0x10DC++0x03
|
|
line.long 0x00 "SAI3RX4R,AIF_SAI3RX4R - AIF Serial Audio Interface 3 Receiver Right Data Register 4"
|
|
group 0x10E0++0x03
|
|
line.long 0x00 "SAI3TX1L,AIF_SAI3TX1L - AIF Serial Audio Interface 3 Transmitter Left Data Register 1"
|
|
group 0x10E4++0x03
|
|
line.long 0x00 "SAI3TX1R,AIF_SAI3TX1R - AIF Serial Audio Interface 3 Transmitter Right Data Register 1"
|
|
group 0x10E8++0x03
|
|
line.long 0x00 "SAI3TX2L,AIF_SAI3TX2L - AIF Serial Audio Interface 3 Transmitter Left Data Register 2"
|
|
group 0x10EC++0x03
|
|
line.long 0x00 "SAI3TX2R,AIF_SAI3TX2R - AIF Serial Audio Interface 3 Transmitter Right Data Register 2"
|
|
group 0x10F0++0x03
|
|
line.long 0x00 "SAI3TX3L,AIF_SAI3TX3L - AIF Serial Audio Interface 3 Transmitter Left Data Register 3"
|
|
group 0x10F4++0x03
|
|
line.long 0x00 "SAI3TX3R,AIF_SAI3TX3R - AIF Serial Audio Interface 3 Transmitter Right Data Register 3"
|
|
group 0x10F8++0x03
|
|
line.long 0x00 "SAI3TX4L,AIF_SAI3TX4L - AIF Serial Audio Interface 3 Transmitter Left Data Register 4"
|
|
group 0x10FC++0x03
|
|
line.long 0x00 "SAI3TX4R,AIF_SAI3TX4R - AIF Serial Audio Interface 3 Transmitter Right Data Register 4"
|
|
rgroup 0x1100++0x03
|
|
line.long 0x00 "SAI3RX1L,AIF_SAI3RX1L - AIF Serial Audio Interface 3 Receiver Left Data Register 1"
|
|
rgroup 0x1104++0x03
|
|
line.long 0x00 "SAI3RX1R,AIF_SAI3RX1R - AIF Serial Audio Interface 3 Receiver Right Data Register 1"
|
|
rgroup 0x1108++0x03
|
|
line.long 0x00 "SAI3RX2L,AIF_SAI3RX2L - AIF Serial Audio Interface 3 Receiver Left Data Register 2"
|
|
rgroup 0x110C++0x03
|
|
line.long 0x00 "SAI3RX2R,AIF_SAI3RX2R - AIF Serial Audio Interface 3 Receiver Right Data Register 2"
|
|
rgroup 0x1110++0x03
|
|
line.long 0x00 "SAI3RX3L,AIF_SAI3RX3L - AIF Serial Audio Interface 3 Receiver Left Data Register 3"
|
|
rgroup 0x1114++0x03
|
|
line.long 0x00 "SAI3RX3R,AIF_SAI3RX3R - AIF Serial Audio Interface 3 Receiver Right Data Register 3"
|
|
rgroup 0x1118++0x03
|
|
line.long 0x00 "SAI3RX4L,AIF_SAI3RX4L - AIF Serial Audio Interface 3 Receiver Left Data Register 4"
|
|
rgroup 0x111C++0x03
|
|
line.long 0x00 "SAI3RX4R,AIF_SAI3RX4R - AIF Serial Audio Interface 3 Receiver Right Data Register 4"
|
|
group 0x1120++0x03
|
|
line.long 0x00 "SAI3TX1L,AIF_SAI3TX1L - AIF Serial Audio Interface 3 Transmitter Left Data Register 1"
|
|
group 0x1124++0x03
|
|
line.long 0x00 "SAI3TX1R,AIF_SAI3TX1R - AIF Serial Audio Interface 3 Transmitter Right Data Register 1"
|
|
group 0x1128++0x03
|
|
line.long 0x00 "SAI3TX2L,AIF_SAI3TX2L - AIF Serial Audio Interface 3 Transmitter Left Data Register 2"
|
|
group 0x112C++0x03
|
|
line.long 0x00 "SAI3TX2R,AIF_SAI3TX2R - AIF Serial Audio Interface 3 Transmitter Right Data Register 2"
|
|
group 0x1130++0x03
|
|
line.long 0x00 "SAI3TX3L,AIF_SAI3TX3L - AIF Serial Audio Interface 3 Transmitter Left Data Register 3"
|
|
group 0x1134++0x03
|
|
line.long 0x00 "SAI3TX3R,AIF_SAI3TX3R - AIF Serial Audio Interface 3 Transmitter Right Data Register 3"
|
|
group 0x1138++0x03
|
|
line.long 0x00 "SAI3TX4L,AIF_SAI3TX4L - AIF Serial Audio Interface 3 Transmitter Left Data Register 4"
|
|
group 0x113C++0x03
|
|
line.long 0x00 "SAI3TX4R,AIF_SAI3TX4R - AIF Serial Audio Interface 3 Transmitter Right Data Register 4"
|
|
tree.end
|
|
tree "AIF_MUX"
|
|
group 0x1400++0x03
|
|
line.long 0x00 "AIMUXCSR_L,AIF_AIMUXCSR_L - AIF Audio Input Multiplexer 1 Control Status Register"
|
|
bitfld.long 0x00 0.--4. "CH0SEL ,"
|
|
bitfld.long 0x00 8.--12. "CH1SEL ,"
|
|
bitfld.long 0x00 16.--20. "CH2SEL ,"
|
|
group 0x1404++0x03
|
|
line.long 0x00 "AIMUXCSR_H,AIF_AIMUXCSR_H - AIF Audio Input Multiplexer 2 Control Status Register"
|
|
bitfld.long 0x00 0.--4. "CH3SEL ,"
|
|
bitfld.long 0x00 8.--12. "CH4SEL ,"
|
|
bitfld.long 0x00 16.--20. "CH5SEL ,"
|
|
group 0x1408++0x03
|
|
line.long 0x00 "AOMUXCSR,AIF_AOMUXCSR - AIF Audio Output Multiplexer Control Status Register"
|
|
bitfld.long 0x00 0.--3. "OUT0SEL ,"
|
|
bitfld.long 0x00 4.--7. "OUT1SEL ,"
|
|
bitfld.long 0x00 8.--11. "OUT2SEL ,"
|
|
bitfld.long 0x00 12.--15. "OUT3SEL ,"
|
|
bitfld.long 0x00 16.--19. "OUT4SEL ,"
|
|
bitfld.long 0x00 20.--23. "OUT5SEL ,"
|
|
tree.end
|
|
tree.end
|
|
tree "AUDIO_DMA"
|
|
group 0x2FC0++0x03
|
|
line.long 0x00 "DMA_RUN,DMA_RUN - DMA run register. Allow to enable / disable a group of DMA simultaneaously"
|
|
group 0x2FC4++0x03
|
|
line.long 0x00 "DMA_INT,DMA_INT - DMA interrupt register. Allow to check / clear a group of DMA simultaneaously"
|
|
tree "DMA_0"
|
|
group 0x2000++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2004++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2008++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x200C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2010++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2014++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2018++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x201C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2020++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_1"
|
|
group 0x2080++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2084++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2088++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x208C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2090++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2094++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2098++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x209C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x20A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_2"
|
|
group 0x2100++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2104++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2108++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x210C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2110++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2114++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2118++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x211C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2120++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_3"
|
|
group 0x2180++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2184++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2188++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x218C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2190++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2194++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2198++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x219C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x21A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_4"
|
|
group 0x2200++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2204++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2208++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x220C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2210++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2214++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2218++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x221C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2220++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_5"
|
|
group 0x2280++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2284++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2288++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x228C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2290++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2294++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2298++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x229C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x22A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_6"
|
|
group 0x2300++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2304++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2308++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x230C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2310++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2314++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2318++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x231C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2320++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_7"
|
|
group 0x2380++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2384++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2388++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x238C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2390++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2394++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2398++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x239C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x23A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_8"
|
|
group 0x2400++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2404++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2408++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x240C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2410++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2414++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2418++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x241C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2420++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_9"
|
|
group 0x2480++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2484++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2488++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x248C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2490++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2494++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2498++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x249C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x24A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_10"
|
|
group 0x2500++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2504++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2508++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x250C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2510++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2514++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2518++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x251C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2520++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_11"
|
|
group 0x2580++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2584++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2588++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x258C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2590++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2594++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2598++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x259C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x25A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_12"
|
|
group 0x2600++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2604++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2608++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x260C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2610++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2614++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2618++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x261C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2620++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_13"
|
|
group 0x2680++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2684++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2688++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x268C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2690++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2694++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2698++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x269C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x26A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_14"
|
|
group 0x2700++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2704++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2708++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x270C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2710++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2714++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2718++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x271C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2720++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_15"
|
|
group 0x2780++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2784++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2788++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x278C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2790++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2794++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2798++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x279C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x27A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_16"
|
|
group 0x2800++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2804++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2808++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x280C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2810++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2814++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2818++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x281C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2820++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_17"
|
|
group 0x2880++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2884++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2888++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x288C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2890++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2894++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2898++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x289C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x28A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_18"
|
|
group 0x2900++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2904++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2908++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x290C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2910++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2914++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2918++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x291C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2920++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_19"
|
|
group 0x2980++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2984++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2988++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x298C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2990++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2994++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2998++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x299C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x29A0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_20"
|
|
group 0x2A00++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2A04++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2A08++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x2A0C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2A10++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2A14++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2A18++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x2A1C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2A20++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_21"
|
|
group 0x2A80++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2A84++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2A88++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x2A8C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2A90++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2A94++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2A98++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x2A9C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2AA0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_22"
|
|
group 0x2B00++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2B04++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2B08++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x2B0C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2B10++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2B14++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2B18++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x2B1C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2B20++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree "DMA_23"
|
|
group 0x2B80++0x03
|
|
line.long 0x00 "BUFSTART,DMA_BUFSTART - Memory buffer start address (first byte of the buffer)"
|
|
group 0x2B84++0x03
|
|
line.long 0x00 "BUFEND,DMA_BUFEND - Memory buffer end address (first byte after the buffer)"
|
|
group 0x2B88++0x03
|
|
line.long 0x00 "AIFREG1,DMA_AIFREG1 - 1st channel AIF buffer address"
|
|
group 0x2B8C++0x03
|
|
line.long 0x00 "AIFREG2,DMA_AIFREG2 - 2nd channel AIF buffer address"
|
|
rgroup 0x2B90++0x03
|
|
line.long 0x00 "BUFFCURR,DMA_BUFFCURR - Memory buffer current address"
|
|
group 0x2B94++0x03
|
|
line.long 0x00 "RUN,DMA_RUN - Run register"
|
|
bitfld.long 0x00 0. "RUN ,"
|
|
group 0x2B98++0x03
|
|
line.long 0x00 "INTPERIOD,DMA_INTPERIOD - Interrupt period (in stereo audio samples)."
|
|
bitfld.long 0x00 0.--15. "PERIOD ,"
|
|
group 0x2B9C++0x03
|
|
line.long 0x00 "INTCLR,DMA_INTCLR - Interrupt clear / status register."
|
|
bitfld.long 0x00 0. "BUFFER_ISC ,"
|
|
bitfld.long 0x00 1. " ERROR_ISC ,"
|
|
group 0x2BA0++0x03
|
|
line.long 0x00 "CONFIG,DMA_CONFIG - DMA configuration register."
|
|
bitfld.long 0x00 0.--1. "SAMPLE_SIZE ,"
|
|
bitfld.long 0x00 4.--9. " 1ST2NDSPAWN ,"
|
|
bitfld.long 0x00 12.--17. "SAMPTOSAMPSPAWN ,"
|
|
bitfld.long 0x00 20. " RXTX ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "STOPONERR ,"
|
|
bitfld.long 0x00 30. " AIFOVFUDF ,"
|
|
bitfld.long 0x00 31. " AXIERR ,"
|
|
tree.end
|
|
tree.end
|
|
tree "AUDIO_CLOCK"
|
|
group 0x3000++0x03
|
|
line.long 0x00 "CLKFREQ,AUDIO_CLKFREQ - Audio Clock Frequency."
|
|
bitfld.long 0x00 0.--4. "PHASE_INCR ,"
|
|
bitfld.long 0x00 5.--31. "INCR_PERIOD ,"
|
|
group 0x3004++0x03
|
|
line.long 0x00 "CLKSELECT,DMA_CLKSELECT - Select Audio Clock. 0 => sys_clk_4x, 1 => audio_clk"
|
|
bitfld.long 0x00 0. "CLKSEL ,"
|
|
tree.end
|
|
tree "TXAUDIO"
|
|
group 0x4000++0x03
|
|
line.long 0x00 "ASRC,AUDIO_TXAUDIO_ASRC - Audio source of A-SRC."
|
|
bitfld.long 0x00 0.--3. "ASRC0 ,"
|
|
bitfld.long 0x00 4.--7. "ASRC1 ,"
|
|
bitfld.long 0x00 8.--11. "ASRC2 ,"
|
|
group 0x4004++0x03
|
|
line.long 0x00 "SAI1,AUDIO_TXAUDIO_SAI1 - Audio source of SAI1."
|
|
bitfld.long 0x00 0.--3. "SAI1_TX1 ,"
|
|
bitfld.long 0x00 4.--7. "SAI1_TX2 ,"
|
|
bitfld.long 0x00 8.--11. "SAI1_TX3 ,"
|
|
bitfld.long 0x00 12.--15. "SAI1_TX4 ,"
|
|
group 0x4008++0x03
|
|
line.long 0x00 "SAI2,AUDIO_TXAUDIO_SAI2 - Audio source of SAI2."
|
|
bitfld.long 0x00 0.--3. "SAI2_TX1 ,"
|
|
bitfld.long 0x00 4.--7. "SAI2_TX2 ,"
|
|
bitfld.long 0x00 8.--11. "SAI2_TX3 ,"
|
|
bitfld.long 0x00 12.--15. "SAI2_TX4 ,"
|
|
group 0x400C++0x03
|
|
line.long 0x00 "SAI3,AUDIO_TXAUDIO_SAI3 - Audio source of SAI3."
|
|
bitfld.long 0x00 0.--3. "SAI3_TX1 ,"
|
|
bitfld.long 0x00 4.--7. "SAI3_TX2 ,"
|
|
bitfld.long 0x00 8.--11. "SAI3_TX3 ,"
|
|
bitfld.long 0x00 12.--15. "SAI3_TX4 ,"
|
|
group 0x4010++0x03
|
|
line.long 0x00 "SAI4,AUDIO_TXAUDIO_SAI4 - Audio source of SAI4."
|
|
bitfld.long 0x00 0.--3. "SAI4_TX1 ,"
|
|
bitfld.long 0x00 4.--7. "SAI4_TX2 ,"
|
|
bitfld.long 0x00 8.--11. "SAI4_TX3 ,"
|
|
bitfld.long 0x00 12.--15. "SAI4_TX4 ,"
|
|
group 0x4014++0x03
|
|
line.long 0x00 "TXAUDIO,AUDIO_TXAUDIO_TXAUDIO - Freq for TX_Audio."
|
|
bitfld.long 0x00 0.--3. "TXAUDIO0 ,"
|
|
bitfld.long 0x00 4.--7. "TXAUDIO1 ,"
|
|
bitfld.long 0x00 8.--11. "TXAUDIO2 ,"
|
|
bitfld.long 0x00 12.--15. "TXAUDIO3 ,"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. "TXAUDIO4 ,"
|
|
bitfld.long 0x00 20.--23. "TXAUDIO5 ,"
|
|
bitfld.long 0x00 24.--27. "TXAUDIO6 ,"
|
|
bitfld.long 0x00 28.--31. "TXAUDIO7 ,"
|
|
tree.end
|
|
tree "RXAUDIO"
|
|
group 0x4080++0x03
|
|
line.long 0x00 "RXAUDIO0,AUDIO_RXAUDIO0 - Audio source for for RX_audio_0."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x4084++0x03
|
|
line.long 0x00 "RXAUDIO1,AUDIO_RXAUDIO1 - Audio source for for RX_audio_1."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x4088++0x03
|
|
line.long 0x00 "RXAUDIO2,AUDIO_RXAUDIO2 - Audio source for for RX_audio_2."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x408C++0x03
|
|
line.long 0x00 "RXAUDIO3,AUDIO_RXAUDIO3 - Audio source for for RX_audio_3."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x4090++0x03
|
|
line.long 0x00 "RXAUDIO4,AUDIO_RXAUDIO4 - Audio source for for RX_audio_4."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x4094++0x03
|
|
line.long 0x00 "RXAUDIO5,AUDIO_RXAUDIO5 - Audio source for for RX_audio_5."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x4098++0x03
|
|
line.long 0x00 "RXAUDIO6,AUDIO_RXAUDIO6 - Audio source for for RX_audio_6."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
group 0x409C++0x03
|
|
line.long 0x00 "RXAUDIO7,AUDIO_RXAUDIO7 - Audio source for for RX_audio_7."
|
|
bitfld.long 0x00 0.--3. "DEVICE ,"
|
|
bitfld.long 0x00 4.--7. "SUBDEVICE ,"
|
|
tree.end
|
|
tree "DIVIDER"
|
|
tree "DIVIDER0"
|
|
group 0x5000++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV0DIVFREQ - Audio Divider 0 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5004++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV0DIVCFG - Audio Divider 0 configuration."
|
|
tree.end
|
|
tree "DIVIDER1"
|
|
group 0x5100++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV1DIVFREQ - Audio Divider 1 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5104++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV1DIVCFG - Audio Divider 1 configuration."
|
|
tree.end
|
|
tree "DIVIDER2"
|
|
group 0x5200++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV2DIVFREQ - Audio Divider 2 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5204++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV2DIVCFG - Audio Divider 2 configuration."
|
|
tree.end
|
|
tree "DIVIDER3"
|
|
group 0x5300++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV3DIVFREQ - Audio Divider 3 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5304++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV3DIVCFG - Audio Divider 3 configuration."
|
|
tree.end
|
|
tree "DIVIDER4"
|
|
group 0x5400++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV4DIVFREQ - Audio Divider 4 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5404++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV4DIVCFG - Audio Divider 4 configuration."
|
|
tree.end
|
|
tree "DIVIDER5"
|
|
group 0x5500++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV5DIVFREQ - Audio Divider 5 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5504++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV5DIVCFG - Audio Divider 5 configuration."
|
|
tree.end
|
|
tree "DIVIDER6"
|
|
group 0x5600++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV6DIVFREQ - Audio Divider 6 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5604++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV6DIVCFG - Audio Divider 6 configuration."
|
|
tree.end
|
|
tree "DIVIDER7"
|
|
group 0x5700++0x03
|
|
line.long 0x00 "DIVFREQ,AUDIO_DIV7DIVFREQ - Audio Divider 7 frequency."
|
|
bitfld.long 0x00 0.--4. "DIVFREQ ,"
|
|
bitfld.long 0x00 5.--31. "DIVCFG ,"
|
|
group 0x5704++0x03
|
|
line.long 0x00 "DIVCFG,AUDIO_DIV7DIVCFG - Audio Divider 7 configuration."
|
|
tree.end
|
|
tree.end
|
|
tree "A-SRC"
|
|
tree "ASRC0"
|
|
group 0x6000++0x03
|
|
line.long 0x00 "CTRL,AUDIO_ASRC0CTRL - Audio A-SRC 0 control."
|
|
bitfld.long 0x00 0.--1. "SYNCCTRL ,"
|
|
bitfld.long 0x00 31. " RESET ,"
|
|
group 0x6004++0x03
|
|
line.long 0x00 "RCFACTOR,AUDIO_ASRC0RCFACTOR - Audio A-SRC 0 RC Factor."
|
|
bitfld.long 0x00 0.--24. "RCFACTOR ,"
|
|
group 0x6008++0x03
|
|
line.long 0x00 "RDFACTOR,AUDIO_ASRC0RDFACTOR - Audio A-SRC 0 FD Factor."
|
|
bitfld.long 0x00 0.--18. "RDFACTOR ,"
|
|
group 0x600C++0x03
|
|
line.long 0x00 "PPM,AUDIO_ASRC0PPM - Audio A-SRC 0 PPM."
|
|
bitfld.long 0x00 0.--9. "PPM ,"
|
|
group 0x6010++0x03
|
|
line.long 0x00 "HBPHASE,AUDIO_ASRC0HBPHASE - Audio A-SRC 0 HB Phase."
|
|
bitfld.long 0x00 0. "HBPHASE ,"
|
|
group 0x6014++0x03
|
|
line.long 0x00 "ENINPRD,AUDIO_ASRC0ENINPRD - Audio A-SRC 0 ENIN period."
|
|
bitfld.long 0x00 0.--10. "ENINPRD ,"
|
|
rgroup 0x6018++0x03
|
|
line.long 0x00 "RXDATA_L,AUDIO_ASRC0RXDATA_L - Audio A-SRC 0 Rx data left bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x601C++0x03
|
|
line.long 0x00 "RXDATA_R,AUDIO_ASRC0RXDATA_R - Audio A-SRC 0 Rx data right bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6020++0x03
|
|
line.long 0x00 "RXFIFODATA_L,AUDIO_ASRC0RXFIFODATA_L - Audio A-SRC 0 Rx data left through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6024++0x03
|
|
line.long 0x00 "RXFIFODATA_R,AUDIO_ASRC0RXFIFODATA_R - Audio A-SRC 0 Rx data right through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6028++0x03
|
|
line.long 0x00 "TXDATA_L,AUDIO_ASRC0TXDATA_L - Audio A-SRC 0 Tx data left."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x602C++0x03
|
|
line.long 0x00 "TXDATA_R,AUDIO_ASRC0TXDATA_R - Audio A-SRC 0 Tx data right."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6030++0x03
|
|
line.long 0x00 "DVALID,AUDIO_ASRC0DVALID - Audio A-SRC 0 valid."
|
|
bitfld.long 0x00 0.--15. "DIV ,"
|
|
bitfld.long 0x00 16.--31. " LEN ,"
|
|
group 0x6034++0x03
|
|
line.long 0x00 "FREQ,AUDIO_ASRC0FREQ - Audio A-SRC 0 frequency."
|
|
bitfld.long 0x00 0.--4. "INCPERIOD ,"
|
|
bitfld.long 0x00 5.--31. " PHASEINC ,"
|
|
tree.end
|
|
tree "ASRC1"
|
|
group 0x6100++0x03
|
|
line.long 0x00 "CTRL,AUDIO_ASRC1CTRL - Audio A-SRC 1 control."
|
|
bitfld.long 0x00 0.--1. "SYNCCTRL ,"
|
|
bitfld.long 0x00 31. " RESET ,"
|
|
group 0x6104++0x03
|
|
line.long 0x00 "RCFACTOR,AUDIO_ASRC1RCFACTOR - Audio A-SRC 1 RC Factor."
|
|
bitfld.long 0x00 0.--24. "RCFACTOR ,"
|
|
group 0x6108++0x03
|
|
line.long 0x00 "RDFACTOR,AUDIO_ASRC1RDFACTOR - Audio A-SRC 1 FD Factor."
|
|
bitfld.long 0x00 0.--18. "RDFACTOR ,"
|
|
group 0x610C++0x03
|
|
line.long 0x00 "PPM,AUDIO_ASRC1PPM - Audio A-SRC 1 PPM."
|
|
bitfld.long 0x00 0.--9. "PPM ,"
|
|
group 0x6110++0x03
|
|
line.long 0x00 "HBPHASE,AUDIO_ASRC1HBPHASE - Audio A-SRC 1 HB Phase."
|
|
bitfld.long 0x00 0. "HBPHASE ,"
|
|
group 0x6114++0x03
|
|
line.long 0x00 "ENINPRD,AUDIO_ASRC1ENINPRD - Audio A-SRC 1 ENIN period."
|
|
bitfld.long 0x00 0.--10. "ENINPRD ,"
|
|
rgroup 0x6118++0x03
|
|
line.long 0x00 "RXDATA_L,AUDIO_ASRC1RXDATA_L - Audio A-SRC 1 Rx data left bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x611C++0x03
|
|
line.long 0x00 "RXDATA_R,AUDIO_ASRC1RXDATA_R - Audio A-SRC 1 Rx data right bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6120++0x03
|
|
line.long 0x00 "RXFIFODATA_L,AUDIO_ASRC1RXFIFODATA_L - Audio A-SRC 1 Rx data left through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6124++0x03
|
|
line.long 0x00 "RXFIFODATA_R,AUDIO_ASRC1RXFIFODATA_R - Audio A-SRC 1 Rx data right through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6128++0x03
|
|
line.long 0x00 "TXDATA_L,AUDIO_ASRC1TXDATA_L - Audio A-SRC 1 Tx data left."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x612C++0x03
|
|
line.long 0x00 "TXDATA_R,AUDIO_ASRC1TXDATA_R - Audio A-SRC 1 Tx data right."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6130++0x03
|
|
line.long 0x00 "DVALID,AUDIO_ASRC1DVALID - Audio A-SRC 1 valid."
|
|
bitfld.long 0x00 0.--15. "DIV ,"
|
|
bitfld.long 0x00 16.--31. " LEN ,"
|
|
group 0x6134++0x03
|
|
line.long 0x00 "FREQ,AUDIO_ASRC1FREQ - Audio A-SRC 1 frequency."
|
|
bitfld.long 0x00 0.--4. "INCPERIOD ,"
|
|
bitfld.long 0x00 5.--31. " PHASEINC ,"
|
|
tree.end
|
|
tree "ASRC2"
|
|
group 0x6200++0x03
|
|
line.long 0x00 "CTRL,AUDIO_ASRC2CTRL - Audio A-SRC 2 control."
|
|
bitfld.long 0x00 0.--1. "SYNCCTRL ,"
|
|
bitfld.long 0x00 31. " RESET ,"
|
|
group 0x6204++0x03
|
|
line.long 0x00 "RCFACTOR,AUDIO_ASRC2RCFACTOR - Audio A-SRC 2 RC Factor."
|
|
bitfld.long 0x00 0.--24. "RCFACTOR ,"
|
|
group 0x6208++0x03
|
|
line.long 0x00 "RDFACTOR,AUDIO_ASRC2RDFACTOR - Audio A-SRC 2 FD Factor."
|
|
bitfld.long 0x00 0.--18. "RDFACTOR ,"
|
|
group 0x620C++0x03
|
|
line.long 0x00 "PPM,AUDIO_ASRC2PPM - Audio A-SRC 2 PPM."
|
|
bitfld.long 0x00 0.--9. "PPM ,"
|
|
group 0x6210++0x03
|
|
line.long 0x00 "HBPHASE,AUDIO_ASRC2HBPHASE - Audio A-SRC 2 HB Phase."
|
|
bitfld.long 0x00 0. "HBPHASE ,"
|
|
group 0x6214++0x03
|
|
line.long 0x00 "ENINPRD,AUDIO_ASRC2ENINPRD - Audio A-SRC 2 ENIN period."
|
|
bitfld.long 0x00 0.--10. "ENINPRD ,"
|
|
rgroup 0x6218++0x03
|
|
line.long 0x00 "RXDATA_L,AUDIO_ASRC2RXDATA_L - Audio A-SRC 2 Rx data left bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x621C++0x03
|
|
line.long 0x00 "RXDATA_R,AUDIO_ASRC2RXDATA_R - Audio A-SRC 2 Rx data right bypassing FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6220++0x03
|
|
line.long 0x00 "RXFIFODATA_L,AUDIO_ASRC2RXFIFODATA_L - Audio A-SRC 2 Rx data left through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
rgroup 0x6224++0x03
|
|
line.long 0x00 "RXFIFODATA_R,AUDIO_ASRC2RXFIFODATA_R - Audio A-SRC 2 Rx data right through FIFO."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6228++0x03
|
|
line.long 0x00 "TXDATA_L,AUDIO_ASRC2TXDATA_L - Audio A-SRC 2 Tx data left."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x622C++0x03
|
|
line.long 0x00 "TXDATA_R,AUDIO_ASRC2TXDATA_R - Audio A-SRC 2 Tx data right."
|
|
bitfld.long 0x00 8.--31. "DATA ,"
|
|
group 0x6230++0x03
|
|
line.long 0x00 "DVALID,AUDIO_ASRC2DVALID - Audio A-SRC 2 valid."
|
|
bitfld.long 0x00 0.--15. "DIV ,"
|
|
bitfld.long 0x00 16.--31. " LEN ,"
|
|
group 0x6234++0x03
|
|
line.long 0x00 "FREQ,AUDIO_ASRC2FREQ - Audio A-SRC 2 frequency."
|
|
bitfld.long 0x00 0.--4. "INCPERIOD ,"
|
|
bitfld.long 0x00 5.--31. " PHASEINC ,"
|
|
tree.end
|
|
tree.end
|
|
tree "AUDIO_SLINK_BASE"
|
|
group 0x700C++0x03
|
|
line.long 0x00 "SAICTRL,AUDIO_SLINKSAICTRL - Audio SLINK control register."
|
|
bitfld.long 0x00 0. "SAI0POL ,"
|
|
bitfld.long 0x00 1. " SAI0WSLEN ,"
|
|
bitfld.long 0x00 2. " SAI0LEN ,"
|
|
bitfld.long 0x00 3. " SAI0CTRL ,"
|
|
textline " "
|
|
bitfld.long 0x00 4. "SAI0DLY ,"
|
|
bitfld.long 0x00 5. " SAI0SPL ,"
|
|
bitfld.long 0x00 6. " SAI0PAD ,"
|
|
bitfld.long 0x00 7. " SAI0EN ,"
|
|
textline " "
|
|
bitfld.long 0x00 8. "SAI1POL ,"
|
|
bitfld.long 0x00 9. " SAI1WSLEN ,"
|
|
bitfld.long 0x00 10. " SAI1LEN ,"
|
|
bitfld.long 0x00 11. " SAI1CTRL ,"
|
|
textline " "
|
|
bitfld.long 0x00 12. "SAI1DLY ,"
|
|
bitfld.long 0x00 13. " SAI1SPL ,"
|
|
bitfld.long 0x00 14. " SAI1PAD ,"
|
|
bitfld.long 0x00 15. " SAI1EN ,"
|
|
textline " "
|
|
bitfld.long 0x00 16. "SAI2POL ,"
|
|
bitfld.long 0x00 17. " SAI2WSLEN ,"
|
|
bitfld.long 0x00 18. " SAI2LEN ,"
|
|
bitfld.long 0x00 19. " SAI2CTRL ,"
|
|
textline " "
|
|
bitfld.long 0x00 20. "SAI2DLY ,"
|
|
bitfld.long 0x00 21. " SAI2SPL ,"
|
|
bitfld.long 0x00 22. " SAI2PAD ,"
|
|
bitfld.long 0x00 23. " SAI2EN ,"
|
|
textline " "
|
|
bitfld.long 0x00 24. "SAI3POL ,"
|
|
bitfld.long 0x00 25. " SAI3WSLEN ,"
|
|
bitfld.long 0x00 26. " SAI3LEN ,"
|
|
bitfld.long 0x00 27. " SAI3CTRL ,"
|
|
textline " "
|
|
bitfld.long 0x00 28. "SAI3DLY ,"
|
|
bitfld.long 0x00 29. " SAI3SPL ,"
|
|
bitfld.long 0x00 30. " SAI3PAD ,"
|
|
bitfld.long 0x00 31. " SAI3EN ,"
|
|
tree.end
|
|
tree.end
|
|
newline
|