18831 lines
1.3 MiB
18831 lines
1.3 MiB
; --------------------------------------------------------------------------------
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; @Title: iMX31 On-Chip Peripherals
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; @Props: Released
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; @Author: MAL
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; @Changelog: 2013-03-07 MAL
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; @Manufacturer: NXP
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; @Doc: MCIMX31_RM_RFS.pdf Rev. 2.3 2007-01
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; @Core: ARM1136JF-S
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; @Chip: IMX31
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: permcimx31.per 7591 2017-02-18 12:05:10Z askoncej $
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config 16. 8.
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tree "ARM Core Registers"
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width 8.
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width 0x8
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup c15:0x0--0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup c15:0x100--0x100
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line.long 0x0 "CTYPE,Cache Type Register"
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bitfld.long 0x0 25.--28. " CTYPE ,Cache type" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " S ,Unified or Separate Instruction Cache" "Unified,Separate"
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textline " "
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bitfld.long 0x0 23. " DP ,Restriction on page allocation for bits [13:12] of the Virtual Address" "No restriction,Restriction"
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bitfld.long 0x0 18.--20. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "Reserved,Reserved,4-way,?..."
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bitfld.long 0x0 14. " DM ,Data multiplier bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "Reserved,Reserved,32 bytes,?..."
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textline " "
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bitfld.long 0x0 11. " IP ,Restriction on page allocation for bits [1:0] of the Virtual Address" "No restriction,Restriction"
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bitfld.long 0x0 6.--8. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "Reserved,Reserved,4-way,?..."
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bitfld.long 0x0 2. " IM ,Instruction multiplier bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "Reserved,Reserved,32 bytes,?..."
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rgroup c15:0x200--0x200
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line.long 0x0 "TCMS,TCM Status Register"
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bitfld.long 0x0 16.--18. " DTCM ,Number of Data TCMs Implemented" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0.--2. " ITCM ,Number of Instruction TCMs Implemented" "0,1,2,3,4,5,6,7"
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rgroup c15:0x300--0x300
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line.long 0x0 "TLBT,TLB Type Register"
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hexmask.long.byte 0x0 16.--23. 0x1 " ITLBLOCK ,Specifies the Number of Instruction TLB Lockable Entries"
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hexmask.long.byte 0x0 8.--15. 0x1 " DTLBLOCK ,Specifies the Number of Unified or Data TLB Lockable Entries"
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bitfld.long 0x0 0. " U ,Unified or Separate Instruction TLBs" "Unified,Separate"
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tree.end
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tree "System Configuration and Control"
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
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bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable"
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bitfld.long 0x0 25. " EE ,Exception Endianess" "Little,Big"
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bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC"
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textline " "
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bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6"
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bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable"
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bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable"
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bitfld.long 0x0 18. " IT ,Global Instruction TCM enable/disable" "No,Yes"
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textline " "
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bitfld.long 0x0 16. " DT ,Global Data TCM enable/disable" "No,Yes"
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bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin"
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textline " "
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bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
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bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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textline " "
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Check" "Disable,Enable"
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textline " "
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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group c15:0x101--0x101
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line.long 0x0 "ACR,Auxiliary Control Register"
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bitfld.long 0x0 6. " CZ ,Restrict cache size" "Normal,Limited"
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bitfld.long 0x0 5. " RV ,Disable Block Transfer Cache Operations" "Enable,Disable"
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bitfld.long 0x0 4. " RA ,Disable Clean Entire Data Cache" "Enable,Disable"
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bitfld.long 0x0 3. " TR ,MicroTLB Random Replacement" "Round robin,Random"
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textline " "
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bitfld.long 0x0 2. " SB ,Static Branch Prediction Enable" "Disable,Enable"
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bitfld.long 0x0 1. " DB ,Dynamic Branch Prediction Enable" "Disable,Enable"
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bitfld.long 0x0 0. " RS ,Return Stack Enable" "Disable,Enable"
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group c15:0x201--0x201
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line.long 0x0 "CACR,Coprocessor Access Control Register"
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bitfld.long 0x0 26.--27. " CP13 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 24.--25. " CP12 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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textline " "
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bitfld.long 0x0 22.--23. " CP11 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 20.--21. " CP10 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 18.--19. " CP9 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 16.--17. " CP8 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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textline " "
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bitfld.long 0x0 14.--15. " CP7 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 12.--13. " CP6 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 10.--11. " CP5 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 8.--9. " CP4 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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textline " "
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bitfld.long 0x0 6.--7. " CP3 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 4.--5. " CP2 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 2.--3. " CP1 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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bitfld.long 0x0 0.--1. " CP0 ,Coprocesor Access Control" "Denied,Priv,Res,Full"
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tree.end
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tree "Memory Management Unit"
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width 0x8
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
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bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable"
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bitfld.long 0x0 25. " EE ,Exception Endianess" "Little,Big"
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bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC"
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textline " "
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bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6"
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bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable"
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bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable"
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bitfld.long 0x0 18. " IT ,Global Instruction TCM enable/disable" "No,Yes"
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textline " "
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bitfld.long 0x0 16. " DT ,Global Data TCM enable/disable" "No,Yes"
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bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin"
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textline " "
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bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
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bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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textline " "
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Check" "Disable,Enable"
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textline " "
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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group c15:0x0002++0x00
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line.long 0x00 "TTBR0,Translation Table Base Register 0"
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hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
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bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough/not allocated,Copyback/not allocated"
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textline " "
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bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
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bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
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group c15:0x0102++0x00
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line.long 0x00 "TTBR1,Translation Table Base Register 1"
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hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
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bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough/not allocated,Copyback/not allocated"
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textline " "
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bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
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bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
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group c15:0x0202++0x00
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line.long 0x00 "TTBCR,Translation Table Base Control Register"
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bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "16KB,8KB,4KB,2KB,1KB,512-byte,256-byte,128-byte"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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rgroup c15:0x5--0x5
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 11. " RW ,Indicates what Type of Access Caused the Abort" "Read,Write"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 10. " STATUS ,Status" "Reserved,Alignment,Debug event,Access section flag,Cache maintenance,Translation section,Access page flag,Translation page,Precise external abort,Domain section,Reserved,Domain page,ext_abort_on_trans_l1,Permission section,ext_abort_on_trans_l2,Permission page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Imprecise external abort,?..."
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group c15:0x6--0x6
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line.long 0x0 "DFAR,Data Fault Address Register"
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hexmask.long 0x0 0.--31. 0x1 " MVA ,Modified Virtual Address of Fault Address"
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rgroup c15:0x105--0x105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Type of fault generated" "Reserved,Alignment,Debug event,Access section flag,Reserved,Translation section,Access page flag,Translation page,Precise external abort,Domain section,Reserved,Domain page,ext_abort_on_trans_l1,Permission section,ext_abort_on_trans_l2,Permission page"
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group c15:0x106--0x106
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line.long 0x0 "IFAR,Instruction Fault Address Register"
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hexmask.long 0x0 0.--31. 0x1 " MVA ,Modified Virtual Address of Fault Address"
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textline ""
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wgroup c15:0x058--0x058
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line.long 0x0 "TLBOR,TLB Operations Register"
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hexmask.long 0x0 12.--31. 0x1000 " MVA ,Modified Virtual Address"
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hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID"
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group c15:0xa--0xa
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line.long 0x0 "TLBLR,TLB Lockdown Register"
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bitfld.long 0x0 26.--28. " VICTIM ,Entry in the lockdown region" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown"
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textline ""
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group c15:0x02f--0x02f
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line.long 0x0 "DTMRR,Data Memory Remap Register"
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bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes"
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textline " "
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bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes"
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bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB"
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group c15:0x12f--0x12f
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line.long 0x0 "IMRR,Instruction Memory Remap Register"
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bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA"
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bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes"
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textline " "
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bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes"
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bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB"
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bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB"
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group c15:0x42f--0x42f
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line.long 0x0 "PPMRR,Peripheral Port Memory Remap Register"
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hexmask.long 0x00 12.--31. 0x1000 " BA ,Base Address"
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bitfld.long 0x00 0.--4. " Size ,Ssize of the memory region that is to be remapped to be used by the peripheral port" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,b01011,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,?..."
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textline ""
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group c15:0xd--0xd
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line.long 0x0 "FCSEPID,FCSE PID Register"
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hexmask.long.byte 0x0 25.--31. 0x1 " FCSEPID ,Specific process for fast context switch"
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group c15:0x10d--0x10d
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line.long 0x0 "CIDR,Context ID Register"
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hexmask.long 0x0 8.--31. 0x1 " PROCID ,Process ID"
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hexmask.long.byte 0x0 0.--7. 0x1 " ASID ,The ASID Value"
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group c15:0x20d--0x20d
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line.long 0x00 "URWTPID,User Read/Write Thread and Process ID Register"
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group c15:0x30d--0x30d
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line.long 0x00 "UROTPID,User Read Only Thread and Process ID Register"
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group c15:0x40d--0x40d
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line.long 0x00 "POTPID,Privileged Only Thread and Process ID Register"
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tree.end
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tree "Cache Configuration and Control"
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group c15:0x009--0x009
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line.long 0x0 "DCLR,Data Cache Lockdown Register"
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bitfld.long 0x0 3. " L3 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 2. " L2 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 1. " L1 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 0. " L0 , Cache Lockdown" "Free,Locked"
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group c15:0x109--0x109
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line.long 0x0 "ICLR,Instruction Cache Lockdown Register"
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bitfld.long 0x0 3. " L3 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 2. " L2 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 1. " L1 , Cache Lockdown" "Free,Locked"
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bitfld.long 0x0 0. " L0 , Cache Lockdown" "Free,Locked"
|
|
group c15:0x107--0x107
|
|
line.long 0x0 "COR,Cache Operations Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " COV ,Cache Operations Value"
|
|
tree.end
|
|
tree "TCM Configuration and Control"
|
|
group c15:0x019--0x019
|
|
line.long 0x0 "DTCMR,Data TCM Region Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " BA ,Base Address (physical address)"
|
|
bitfld.long 0x0 2.--6. " S ,Indicates the size of the TCM" "0 KB,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,?..."
|
|
bitfld.long 0x0 1. " SC ,Is TCM Enabled as SmartCache" "No,Yes"
|
|
bitfld.long 0x0 0. " En ,Indicates if TCM is Enabled" "Dis,Ena"
|
|
group c15:0x119--0x119
|
|
line.long 0x0 "ITCMR,Instruction TCM Region Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " BA ,Base Address (physical address)"
|
|
bitfld.long 0x0 2.--6. " S ,Indicates the Size of the TCM" "0 KB,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,?..."
|
|
bitfld.long 0x0 1. " SC ,Is TCM Enabled as SmartCache" "No,Yes"
|
|
bitfld.long 0x0 0. " En ,Indicates if TCM is Enabled" "Dis,Ena"
|
|
tree.end
|
|
tree "DMA Control"
|
|
rgroup c15:0x10b--0x10b
|
|
line.long 0x0 "DMAISQR,DMA Identification and Status Queued Register"
|
|
bitfld.long 0x0 1. " CQ1 , DMA Channel 1 Queued" "No,Yes"
|
|
bitfld.long 0x0 0. " CQ0 , DMA Channel 0 Queued" "No,Yes"
|
|
rgroup c15:0x20b--0x20b
|
|
line.long 0x0 "DMAISRR,DMA Identification and Status Running Register"
|
|
bitfld.long 0x0 1. " CR1 , DMA Channel 1 Running" "No,Yes"
|
|
bitfld.long 0x0 0. " CR0 , DMA Channel 0 Running" "No,Yes"
|
|
rgroup c15:0x30b--0x30b
|
|
line.long 0x0 "DMAISIR,DMA Identification and Status Interrupting Register"
|
|
bitfld.long 0x0 1. " CR1 , DMA Channel 1 Interrupting" "No,Yes"
|
|
bitfld.long 0x0 0. " CR0 , DMA Channel 0 Interrupting" "No,Yes"
|
|
group c15:0x23b--0x23b
|
|
line.long 0x0 "DMAECR,DMA Enable Clear Register"
|
|
bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Clear" "No,Yes"
|
|
bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Clear" "No,Yes"
|
|
group c15:0x22f--0x22f
|
|
line.long 0x0 "DMRR,DMA Memory Remap Register"
|
|
bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
|
|
bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
|
|
bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA"
|
|
bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA"
|
|
bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes"
|
|
bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB"
|
|
bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB"
|
|
bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB"
|
|
bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB"
|
|
bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB"
|
|
group c15:0x02b--0x02b
|
|
line.long 0x0 "DMACNR,DMA Channel Number Register"
|
|
bitfld.long 0x0 0. " CN ,DMA Channel Number" "0,1"
|
|
rgroup c15:0x8b--0x8b
|
|
line.long 0x0 "DMACSR, DMA Channel Status Register"
|
|
bitfld.long 0x0 12. " BP ,DMA Parameter Bit" "Acc,Ina"
|
|
bitfld.long 0x0 7.--11. " ES ,The External Address Error Status bits" "NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,Res,UDE,Res,Res,Res,Res,Res,Res,Res,Res,Res,AFS,Res,TFS,AFP,TFP,Res,DFS,ExtAb,DFP,ExtAbF,PFS,ExtAbS,PFP"
|
|
bitfld.long 0x0 2.--6. " IS ,The Ixternal Address Error Status bits" "Res,Res,Res,Res,Res,Res,Res,Res,TCM out of range,Res,Res,Res,Res,Res,Res,Res,Res,Res,Res,AFS,Res,TFS,AFP,TFP,Res,DFS,Res,DFP,ExtAbF,PFS,ExtAbS,PFP"
|
|
bitfld.long 0x0 0.--1. " Status ,The Status Bits" "Idle,Queued,Running,CompErr"
|
|
group c15:0xfb--0xfb
|
|
line.long 0x0 "DMACIDR,DMA Context ID Register"
|
|
hexmask.long 0x0 8.--31. 0x1 " PROCID ,Process ID value"
|
|
hexmask.long.byte 0x0 0.--7. 0x1 " ASID ,ASID of the current process and identifies the current ASID"
|
|
group c15:0x4b--0x4b
|
|
line.long 0x0 "DMACR, DMA Control Register"
|
|
bitfld.long 0x0 31. " TR ,Target TCM" "Data,Instr"
|
|
bitfld.long 0x0 30. " DT ,Direction of Transfer" "FrLvl,ToLvl"
|
|
bitfld.long 0x0 29. " IC ,Interrupt on Completion" "No,Yes"
|
|
bitfld.long 0x0 28. " IE ,Interrupt on Error" "No,Yes"
|
|
bitfld.long 0x0 27. " FT ,Full Transfer" "TCM,All"
|
|
textline " "
|
|
bitfld.long 0x0 26. " UM ,User Mode" "Priv,User"
|
|
hexmask.long.word 0x0 8.--19. 0x1 " ST ,Stride in Bytes"
|
|
bitfld.long 0x0 0.--1. " TS ,Transaction Size" "Byte,Halfword,Word,Doubleword"
|
|
group c15:0x03b--0x03b
|
|
line.long 0x0 "DMAESR,DMA Enable Stop Register"
|
|
bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Stop" "No,Yes"
|
|
bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Stop" "No,Yes"
|
|
group c15:0x13b--0x13b
|
|
line.long 0x0 "DMAESTR,DMA Enable Start Register"
|
|
bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Start" "No,Yes"
|
|
bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Start" "No,Yes"
|
|
group c15:0x6b--0x6b
|
|
line.long 0x0 "DMAESAR,DMA External Start Address Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA External Start Address"
|
|
rgroup c15:0xb--0xb
|
|
line.long 0x0 "DMAISPR,DMA Identification and Status Present Register"
|
|
bitfld.long 0x0 1. " CP1 , DMA Channel 1 Present" "No,Yes"
|
|
bitfld.long 0x0 0. " CP0 , DMA Channel 0 Present" "No,Yes"
|
|
group c15:0x7b--0x7b
|
|
line.long 0x0 "DMAIEAR,DMA Internal End Address Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA Internal End Address"
|
|
group c15:0x5b--0x5b
|
|
line.long 0x0 "DMAISAR,DMA Internal Start Address Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA Internal Start Address"
|
|
group c15:0x01b--0x01b
|
|
line.long 0x0 "DMAUAR,DMA User Accessibility Register"
|
|
bitfld.long 0x0 1. " CU1 , DMA Channel 1 User Accessible" "No,Yes"
|
|
bitfld.long 0x0 0. " CU0 , DMA Channel 0 User Accessible" "No,Yes"
|
|
tree.end
|
|
tree "System Performance Monitoring"
|
|
group c15:0xcf--0xcf
|
|
line.long 0x0 "PMNC,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x0 20.--27. 0x1 " EvtCount0 ,Identifies the Source of Events for Count Register 0"
|
|
hexmask.long.byte 0x0 12.--19. 0x1 " EvtCount1 ,Identifies the Source of Events for Count Register 1"
|
|
bitfld.long 0x0 11. " X ,Enable Export of the Events to the Event Bus" "Dis,Ena"
|
|
textline " "
|
|
bitfld.long 0x0 10. " CCR ,Cycle Count Register overflow flag" "Not occurred,Occurred"
|
|
bitfld.long 0x0 9. " CR1 ,Count Register 1 overflow flag" "Not occurred,Occurred"
|
|
bitfld.long 0x0 8. " CR0 ,Count Register 0 overflow flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 6. " ECC ,Enable Cycle Counter interrupt" "Dis,Ena"
|
|
bitfld.long 0x0 5. " EC1 ,Enable Counter Register 1 interrupt" "Dis,Ena"
|
|
bitfld.long 0x0 4. " EC0 ,Enable Counter Register 0 interrupt" "Dis,Ena"
|
|
textline " "
|
|
bitfld.long 0x0 3. " D ,Cycle Count Divider" "Every,64th"
|
|
bitfld.long 0x0 2. " C ,Cycle Counter Register Reset on Write" "Noact,Reset"
|
|
bitfld.long 0x0 1. " P ,Count Register Reset on Write" "Noact,Reset"
|
|
bitfld.long 0x0 0. " E ,Enable All Three Counters" "Dis,Ena"
|
|
group c15:0x2cf--0x2cf
|
|
line.long 0x0 "CR0,Count Register 0"
|
|
hexmask.long 0x0 0.--31. 0x1 " CR0 ,Counter Nr 0"
|
|
group c15:0x3cf--0x3cf
|
|
line.long 0x0 "CR1,Count Register 1"
|
|
hexmask.long 0x0 0.--31. 0x1 " CR1 ,Counter Nr 1"
|
|
group c15:0x1cf--0x1cf
|
|
line.long 0x0 "CCR,Cycle Counter Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " CCR ,Cycle Counter"
|
|
tree.end
|
|
tree "Debug Access to Caches and TLBs"
|
|
group c15:0x700f--0x700f
|
|
line.long 0x0 "CDCR,Cache Debug Control Register"
|
|
bitfld.long 0x0 2. " WT , Write-Through enable flag" "Dis,Ena"
|
|
bitfld.long 0x0 1. " IL , Instruction cache Linefill disable flag" "Ena,Dis"
|
|
bitfld.long 0x0 0. " DL , Data cache Linefill disable flag" "Ena,Dis"
|
|
wgroup c15:0x302f--0x302f
|
|
line.long 0x0 "DTRRO,Data Tag RAM Read Operation Register"
|
|
hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way"
|
|
group c15:0x30cf--0x30cf
|
|
line.long 0x0 "DCMVR,Data Cache Master Valid Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " DCMV ,Data Cache Master Valid"
|
|
rgroup c15:0x310f--0x310f
|
|
line.long 0x0 "DBCR,Instruction Debug Cache Register"
|
|
hexmask.long 0x0 10.--31. 0x1 " TAG ,Tag Address"
|
|
bitfld.long 0x0 1.--2. " Dirty ,Dirty Bits" "00,01,10,11"
|
|
bitfld.long 0x0 0. " Valid ,Valid Bit" "No,Yes"
|
|
rgroup c15:0x300f--0x300f
|
|
line.long 0x0 "DBCR,Data Debug Cache Register"
|
|
hexmask.long 0x0 10.--31. 0x1 " TAG ,Tag Address"
|
|
bitfld.long 0x0 1.--2. " Dirty ,Dirty Bits" "00,01,10,11"
|
|
bitfld.long 0x0 0. " Valid ,Valid Bit" "No,Yes"
|
|
group c15:0x308f--0x308f
|
|
line.long 0x0 "ICMVR,Instruction Cache Master Valid Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " ICMV ,Instruction Cache Master Valid"
|
|
group c15:0x30ef--0x30ef
|
|
line.long 0x0 "DSCMVR,Data SmartCache Master Valid Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " DSCMV ,Data SmartCache Master Valid"
|
|
group c15:0x30af--0x30af
|
|
line.long 0x0 "ISCMVR,Instruction SmartCache Master Valid Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " ISCMV ,Instruction SmartCache Master Valid"
|
|
rgroup c15:0x507f--0x507f
|
|
line.long 0x0 "DMTLBAR,Data MicroTLB Attribute Register"
|
|
bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes"
|
|
bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB"
|
|
bitfld.long 0x0 0. " S ,Shared Attribute" "0,1"
|
|
group c15:0x504f--0x504f
|
|
line.long 0x0 "DMTLBI,Data MicroTLB Index Register"
|
|
bitfld.long 0x0 0.--3. " IDX ,Micro TLB Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup c15:0x506f--0x506f
|
|
line.long 0x0 "DMTLBPA,Data MicroTLB PA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address"
|
|
bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,Res,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,16KB subpage,Res,4KB page,1KB subpage"
|
|
bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBWA,WTNWA,WBNWA"
|
|
textline " "
|
|
bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..."
|
|
bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes"
|
|
rgroup c15:0x505f--0x505f
|
|
line.long 0x0 "DMTLBVA,Data MicroTLB VA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address"
|
|
hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory space identifier"
|
|
wgroup c15:0x314f--0x314f
|
|
line.long 0x0 "ICDRRO,Instruction Cache Data RAM Read Operations Register"
|
|
hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way"
|
|
bitfld.long 0x0 2.--4. " WIL ,Word in Line" "0,1,2,3,4,5,6,7"
|
|
rgroup c15:0x517f--0x517f
|
|
line.long 0x0 "IMTLBAR,Instruction MicroTLB Attribute Register"
|
|
bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes"
|
|
bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 4. " XN ,Execute Never Attribute" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB"
|
|
bitfld.long 0x0 0. " S ,Shared Attribute" "0,1"
|
|
group c15:0x514f--0x514f
|
|
line.long 0x0 "IMTLBI,Instruction MicroTLB Index Register"
|
|
bitfld.long 0x0 0.--3. " IDX ,Micro TLB Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup c15:0x516f--0x516f
|
|
line.long 0x0 "IMTLBPA,Instruction MicroTLB PA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address"
|
|
bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,Res,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,16KB subpage,Res,4KB page,1KB subpage"
|
|
bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBAW,WTNAW,WB"
|
|
textline " "
|
|
bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..."
|
|
bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes"
|
|
rgroup c15:0x515f--0x515f
|
|
line.long 0x0 "IMTLBVA,Instruction MicroTLB VA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address"
|
|
hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory Space Identifier"
|
|
wgroup c15:0x312f--0x312f
|
|
line.long 0x0 "ITRRO,Instruction Tag RAM Read Operation Register"
|
|
hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way"
|
|
group c15:0x527f--0x527f
|
|
line.long 0x0 "MTLBAR,Main TLB Attribute Register"
|
|
bitfld.long 0x0 30.--31. " AP3 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full"
|
|
textline " "
|
|
bitfld.long 0x0 28.--29. " AP2 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " AP1 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes"
|
|
bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 4. " XN ,Execute Never Attribute" "No,Yes"
|
|
bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB"
|
|
bitfld.long 0x0 0. " S ,Shared Attribute" "0,1"
|
|
wgroup c15:0x524f--0x524f
|
|
line.long 0x0 "RMTLBER,Read Main TLB Entry Register"
|
|
bitfld.long 0x0 31. " L ,Lockable Region" "Set,Lock"
|
|
bitfld.long 0x0 0.--5. " IDX[0:5] ,Entry in the main TLB to access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup c15:0x544f--0x544f
|
|
line.long 0x0 "WMTLBER,Write Main TLB Entry Register"
|
|
bitfld.long 0x0 31. " L ,Lockable Region" "Set,Lock"
|
|
bitfld.long 0x0 0.--5. " IDX[0:5] ,Entry in the main TLB to access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group c15:0x526f--0x526f
|
|
line.long 0x0 "MTLBPA,Main TLB PA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address"
|
|
bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,16MB supersection,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,Res,Res,4KB page,Res"
|
|
bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBAW,WTNAW,WB"
|
|
textline " "
|
|
bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..."
|
|
bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes"
|
|
group c15:0x525f--0x525f
|
|
line.long 0x0 "MTLBVA,Main TLB VA Register"
|
|
hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address"
|
|
hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory Space Identifier"
|
|
group c15:0x701f--0x701f
|
|
line.long 0x0 "TLBDCR,TLB Debug Control Register"
|
|
bitfld.long 0x0 7. " IMM ,Instruction Main TLB Match" "Ena,Dis"
|
|
bitfld.long 0x0 6. " DMM ,Data Main TLB Match" "Ena,Dis"
|
|
bitfld.long 0x0 5. " IML ,Instruction Main TLB Load" "Ena,Dis"
|
|
bitfld.long 0x0 4. " DML ,Data Main TLB Load" "Ena,Dis"
|
|
bitfld.long 0x0 3. " IUM ,Instruction MicroTLB Match" "Ena,Dis"
|
|
bitfld.long 0x0 2. " DUM ,Data MicroTLB Match" "Ena,Dis"
|
|
bitfld.long 0x0 1. " IUL ,Instruction MicroTLB Load and Flush" "Ena,Dis"
|
|
bitfld.long 0x0 0. " DUL ,Data MicroTLB Load and Flush" "Ena,Dis"
|
|
group c15:0x50ef--0x50ef
|
|
line.long 0x00 "RMTLBMVR,Read Main TLB Master Valid Register"
|
|
hexmask.long 0x00 0.--31. 1. " RMTLBMV ,Read Main TLB Master Valid"
|
|
group c15:0x51ef--0x51ef
|
|
line.long 0x00 "WMTLBMVR,Write Main TLB Master Valid Register"
|
|
hexmask.long 0x00 0.--31. 1. " WMTLBMV ,Write Main TLB Master Valid"
|
|
tree.end
|
|
width 11.
|
|
config 16. 8.
|
|
width 8.
|
|
tree "Debug Register"
|
|
rgroup c14:0x00--0x00
|
|
line.long 0x0 "DIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Res,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " Context ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group c14:0x10--0x10
|
|
line.long 0x0 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " rDTRfull ,rDTR Buffer Full Flag (core read)" "Empty,Full"
|
|
bitfld.long 0x0 29. " wDTRfull ,wDTR Buffer Full Flag (core write)" "Empty,Full"
|
|
bitfld.long 0x0 15. " MONITOR ,Monitor Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " MODE ,Mode Select" "Monitor,Halt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " ARM ,Execute ARM Instruction in ITR" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " COMMS ,User Mode Access to Comms Channel Disable" "Enabled,Disabled"
|
|
bitfld.long 0x0 11. " INTDIS ,Interrupts Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DBGACK ,Force DBGACK Signal High" "No,Yes"
|
|
bitfld.long 0x0 9. " DbgNoPwrdwn ,Powerdown Disable" "Enabled,Disabled"
|
|
bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Data Abort" "No,Yes"
|
|
bitfld.long 0x0 6. " PABORT ,Sticky Precise Data Abort" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " ENTRY ,Method of Entry" "Halt,Breakpoint,Watchpoint,BKPT,EDBGRQ,Vector,DAbort,IAbort,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "No,Yes"
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "No,Yes"
|
|
group c14:0x50--0x50
|
|
line.long 0x00 "DTR,Data Transfer Register"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Breakpoints"
|
|
group c14:0x400--0x400
|
|
line.long 0x0 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address"
|
|
group c14:0x500--0x500
|
|
line.long 0x0 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x410--0x410
|
|
line.long 0x0 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address"
|
|
group c14:0x510--0x510
|
|
line.long 0x0 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x420--0x420
|
|
line.long 0x0 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address"
|
|
group c14:0x520--0x520
|
|
line.long 0x0 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x430--0x430
|
|
line.long 0x0 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address"
|
|
group c14:0x530--0x530
|
|
line.long 0x0 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x440--0x440
|
|
line.long 0x0 "BVR4,Breakpoint Value Register 4"
|
|
group c14:0x540--0x540
|
|
line.long 0x0 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x450--0x450
|
|
line.long 0x0 "BVR5,Breakpoint Value Register 5"
|
|
group c14:0x550--0x550
|
|
line.long 0x0 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
tree "Watchpoints"
|
|
group c14:0x600--0x600
|
|
line.long 0x0 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " WADD ,Watchpoint Address"
|
|
group c14:0x700--0x700
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store Access" "Reserved,Load,Store,Load/Store"
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " W ,Watchpoint Enable" "Disabled,Enabled"
|
|
group c14:0x610--0x610
|
|
line.long 0x0 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x0 2.--31. 0x4 " WADD ,Watchpoint Address"
|
|
group c14:0x710--0x710
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes"
|
|
bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes"
|
|
bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes"
|
|
bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store Access" "Reserved,Load,Store,Load/Store"
|
|
bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User"
|
|
bitfld.long 0x0 0. " W ,Watchpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 11.
|
|
width 0xb
|
|
tree.end
|
|
width 0xe
|
|
tree "CCM (Clock Control Module)"
|
|
base asd:0x53f80000
|
|
width 0x7
|
|
group 0x00--0x53
|
|
line.long 0x00 "CCMR,Control Register"
|
|
bitfld.long 0x00 29. " L2PG ,L2 Cache Power Gating Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " VSTBY ,Supply Regulator Standby Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " WBEN ,ARM Domain well Bias Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " FPMF ,FPM Multiplying Factor" "0,1024"
|
|
bitfld.long 0x00 25. " CSCS ,ipg_clk_csi_baud Clock Generation Source" "USB,SRPLL"
|
|
bitfld.long 0x00 24. " PERCS ,ipg_per_clk Clock Generation Source" "USB,ipg_clk"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SSI2S ,SSI2 Post Divider Clock Source Select" "MCU CLK,usb_clk,serial_clk,?..."
|
|
bitfld.long 0x00 18.--19. " SSI1S ,SSI1 Post Divider Clock Source Select" "mcu clk,usb_clk,serial_clk,?..."
|
|
bitfld.long 0x00 16.--17. " RAMW ,Wait State Control Bits for ARM RAM" "0,0 and 1,1 and 0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " LPM ,Low Power Mode" "Wait,Doze,State retention,Deep sleep"
|
|
bitfld.long 0x00 11.--12. " FIRS ,FIRI Post Divider Clock Source Select" "mcu clk,usb_clk,serial_clk,?..."
|
|
bitfld.long 0x00 10. " WAMO ,Wakeup Interrupt Mask" "DSM,SR or DSM"
|
|
textline " "
|
|
bitfld.long 0x00 9. " UPE ,USB PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SPE ,Serial PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " MDS ,MCU Clock Domain Source Select" "MCU PLL,Reference clock"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " ROMW ,Wait State Control Bit from ARM ROM" "0,0 and 1,1 and 0,1"
|
|
bitfld.long 0x00 4. " SBYCS ,Clock Source Enable in Standby Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MPE ,MCU PLL Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PRCS ,PLL Reference Clock Select Bits" "Reserved,FPM,CKIH,?..."
|
|
bitfld.long 0x00 0. " FPME ,FPM Enable Bit" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDR0,Post Divider Register"
|
|
hexmask.long.word 0x04 23.--31. 1. " CSI_PODF ,CSI Post Divider"
|
|
bitfld.long 0x04 16.--20. " PER_PODF ,Per Postdivider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32"
|
|
bitfld.long 0x04 11.--13. " HSP_PODF ,hsp Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x04 8.--10. " NFC_PODF ,NFC Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
bitfld.long 0x04 6.--7. " IPG_PODF ,Clock Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
bitfld.long 0x04 3.--5. " MAX_PODF ,hclk Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " MCU_PODF ,MCU Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "PDR1,Post Divider Register 1"
|
|
bitfld.long 0x08 30.--31. " USB_PRDF ,USB Pre Divider" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
bitfld.long 0x08 27.--29. " USB_PODF ,USB Post Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
bitfld.long 0x08 24.--26. " FIRI_PRE_PODF ,FIRI Pre Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
textline " "
|
|
hexmask.long.byte 0x08 18.--23. 1. " FIRI_PODF ,FIRI Post Divider"
|
|
bitfld.long 0x08 15.--17. " SSI2_PRE_PODF ,SSI2 Pre Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
hexmask.long.byte 0x08 9.--14. 1. " SSI2_PODF ,SSI2 Post Divider"
|
|
textline " "
|
|
bitfld.long 0x08 6.--8. " SSI1_PRE_PODF ,SSI1 Pre Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
hexmask.long.byte 0x08 0.--5. 1. " SSI1_PODF ,SSI2 Post Divider"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "RCSR,Reset Control and Source Register"
|
|
bitfld.long 0x0C 31. " NF16B ,NANDFlash Device" "16-bit,8-bit"
|
|
bitfld.long 0x0C 30. " NFMS ,Size for NANDFlash Device" "2KB,512B"
|
|
hexmask.long.byte 0x0c 23.--27. 1. " BTP ,Boot Mode Bits"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 16.--22. 1. " OSCNT ,Oscillator Ready Counter Value"
|
|
bitfld.long 0x0C 15. " PERES ,Peripheral S/W Reset Bit" "No reset,Reset"
|
|
bitfld.long 0x0C 12.--13. " SDM ,Scan Divergence Mode Bits" "Disabled,Stopped after 1 cycle,Stopped after finished counting,Stopped after 2 cycle"
|
|
textline " "
|
|
bitfld.long 0x0C 5.--7. " GPF ,General Purpose Flag Bits" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x0C 4. " WFIS , WFI Pending SW Control" "Not pending,Pending"
|
|
bitfld.long 0x0C 0.--2. " REST ,Reset Status Bits" "POR external reset,Qualified external reset,Watchdog timeout,Reserved,Reserved,Reserved,JTAG reset,ARM11P power gating"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "MPCTL,MCU PLL Control Register"
|
|
bitfld.long 0x10 31. " BRMO ,BRM Order Bit" "First,Second"
|
|
bitfld.long 0x10 26.--29. " PD ,Pre-Divider Factor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x10 16.--25. 1. " MFD ,Multiplication Factor (Denominator Part)"
|
|
textline " "
|
|
bitfld.long 0x10 10.--13. " MFI ,Multiplication Factor (Integer part)" "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x10 0.--9. 1. " MFN ,Multiplication Factor (Numerator part)"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "UPCTL,USB PLL Control Register"
|
|
bitfld.long 0x14 31. " BRMO ,BRM Order Bit" "First,Second"
|
|
bitfld.long 0x14 26.--29. " PD ,Pre-Divider Factor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x14 16.--25. 1. " MFD ,Multiplication Factor (Denominator Part)"
|
|
textline " "
|
|
bitfld.long 0x14 10.--13. " MFI ,Multiplication Factor (Integer part)" "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x14 0.--9. 1. " MFN ,Multiplication Factor (Numerator part)"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "SPCTL,SR PLL Control Register"
|
|
bitfld.long 0x18 31. " BRMO ,BRM Order Bit" "First,Second"
|
|
bitfld.long 0x18 26.--29. " PD ,Pre-Divider Factor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x18 16.--25. 1. " MFD ,Multiplication Factor (Denominator Part)"
|
|
textline " "
|
|
bitfld.long 0x18 10.--13. " MFI ,Multiplication Factor (Integer part)" "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x18 0.--9. 1. " MFN ,Multiplication Factor (Numerator part)"
|
|
;group 0x1c++0x03
|
|
line.long 0x1c "COSR,Clock Out Source Register"
|
|
bitfld.long 0x1C 9. " CLKOEN ,Clock Output Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6.--8. " CLKOUTDIV ,Clock Output Divide Factor" "1,2,4,8,16,?..."
|
|
bitfld.long 0x1C 0.--3. " CLKOSEL ,Clock Output CKO" "mpl_dpdgck_clk,ipg_clk_ccm,upl_dpdgck_clk,pll_ref_clk,fpm_ckil512_clk,ipg_clk_ahb_arm,ipg_clk_arm,spl_dpdgck_clk,ckih,ipg_clk_ahb_emi_clk,ipg_clk_ipu_hsp,ipg_clk_nfc_20m,ipg_clk_perclk_uart1,ref_cir1,ref_cir2,ref_cir3"
|
|
;group 0x20++0x03
|
|
line.long 0x20 "CGR0,Clock Gating Register 0"
|
|
bitfld.long 0x20 30.--31. " CG15 ,Clock Gating for Power Reduction in i2c3" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 28.--29. " CG14 ,Clock Gating for Power Reduction in i2c2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 26.--27. " CG13 ,Clock Gating for Power Reduction in i2c1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " CG12 ,Clock Gating for Power Reduction in ssi1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 22.--23. " CG11 ,Clock Gating for Power Reduction in uart2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 20.--21. " CG10 ,Clock Gating for Power Reduction in uart1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " CG9 ,Clock Gating for Power Reduction in rng" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 16.--17. " CG8 ,Clock Gating for Power Reduction in cspi3" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 14.--15. " CG7 ,Clock Gating for Power Reduction in sdma" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " CG6 ,Clock Gating for Power Reduction in ata" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 10.--11. " CG5 ,Clock Gating for Power Reduction in iim" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 8.--9. " CG4 ,Clock Gating for Power Reduction in epit2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " CG3 ,Clock Gating for Power Reduction in epit1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 4.--5. " CG2 ,Clock Gating for Power Reduction in gpt" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x20 2.--3. " CG1 ,Clock Gating for Power Reduction in sd_mmc2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " CG0 ,Clock Gating for Power Reduction in sd_mmc1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
;group 0x24++0x03
|
|
line.long 0x24 "CGR1,Clock Gating Register 1"
|
|
bitfld.long 0x24 30.--31. " CG15 ,Clock Gating for Power Reduction in 1-wire" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 28.--29. " CG14 ,Clock Gating for Power Reduction in uart5" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 26.--27. " CG13 ,Clock Gating for Power Reduction in uart4" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x24 24.--25. " CG12 ,Clock Gating for Power Reduction in uart3" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 22.--23. " CG11 ,Clock Gating for Power Reduction in ipu" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 20.--21. " CG10 ,Clock Gating for Power Reduction in kpp" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " CG9 ,Clock Gating for Power Reduction in usbotg" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 16.--17. " CG8 ,Clock Gating for Power Reduction in ect" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 14.--15. " CG7 ,Clock Gating for Power Reduction in sim" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " CG6 ,Clock Gating for Power Reduction in pwm" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 10.--11. " CG5 ,Clock Gating for Power Reduction in wdog" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 8.--9. " CG4 ,Clock Gating for Power Reduction in rtc" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x24 6.--7. " CG3 ,Clock Gating for Power Reduction in csi" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 4.--5. " CG2 ,Clock Gating for Power Reduction in memstick2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x24 2.--3. " CG1 ,Clock Gating for Power Reduction in memstick1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x24 0.--1. " CG0 ,Clock Gating for Power Reduction in hantro" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
;group 0x28++0x03
|
|
line.long 0x28 "CGR2,Clock Gating Register 2"
|
|
bitfld.long 0x28 12.--13. " CG6 ,Clock Gating for Power Reduction in firi" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x28 10.--11. " CG5 ,Clock Gating for Power Reduction in rtic" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x28 8.--9. " CG4 ,Clock Gating for Power Reduction in emi" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x28 6.--7. " CG3 ,Clock Gating for Power Reduction in gacc" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x28 4.--5. " CG2 ,Clock Gating for Power Reduction in cspi2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
bitfld.long 0x28 2.--3. " CG1 ,Clock Gating for Power Reduction in cspi1" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
textline " "
|
|
bitfld.long 0x28 0.--1. " CG0 ,Clock Gating for Power Reduction in ssi2" "Off,On in run mode,On in run and wait modes,On during all modes"
|
|
;group 0x2c++0x03
|
|
line.long 0x2c "WIMR0,Wake-Up Interrupt Mask Register"
|
|
bitfld.long 0x2c 31. " WIM31 ,Interrupt 31 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 30. " WIM30 ,Interrupt 30 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 29. " WIM29 ,Interrupt 29 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 28. " WIM28 ,Interrupt 28 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 27. " WIM27 ,Interrupt 27 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 26. " WIM26 ,Interrupt 26 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 25. " WIM25 ,Interrupt 25 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 24. " WIM24 ,Interrupt 24 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 23. " WIM23 ,Interrupt 23 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 22. " WIM22 ,Interrupt 22 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 21. " WIM21 ,Interrupt 21 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 20. " WIM20 ,Interrupt 20 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 19. " WIM19 ,Interrupt 19 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 18. " WIM18 ,Interrupt 18 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 17. " WIM17 ,Interrupt 17 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 16. " WIM16 ,Interrupt 16 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 15. " WIM15 ,Interrupt 15 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 14. " WIM14 ,Interrupt 14 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 13. " WIM13 ,Interrupt 13 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 12. " WIM12 ,Interrupt 12 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 11. " WIM11 ,Interrupt 11 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 10. " WIM10 ,Interrupt 10 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 9. " WIM9 ,Interrupt 9 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 8. " WIM8 ,Interrupt 8 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 7. " WIM7 ,Interrupt 7 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 6. " WIM6 ,Interrupt 6 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 5. " WIM5 ,Interrupt 5 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 4. " WIM4 ,Interrupt 4 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 3. " WIM3 ,Interrupt 3 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 2. " WIM2 ,Interrupt 2 Mask Bit" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x2c 1. " WIM1 ,Interrupt 1 Mask Bit" "Enabled,Masked"
|
|
bitfld.long 0x2c 0. " WIM0 ,Interrupt 0 Mask Bit" "Enabled,Masked"
|
|
;group 0x30++0x03
|
|
line.long 0x30 "LDC,Latch Divergence Counter Register"
|
|
hexmask.long 0x30 0.--31. 1. " LDC[31:0] ,Latch Divergence Counter Value"
|
|
;group 0x34++0x03
|
|
line.long 0x34 "DCVR0,DPTC Comparator Value Register 0"
|
|
hexmask.long.word 0x34 22.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x34 12.--21. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x34 2.--11. 1. " ELV ,Emergency Limit"
|
|
;group 0x38++0x03
|
|
line.long 0x38 "DCVR1,DPTC Comparator Value Register 1"
|
|
hexmask.long.word 0x38 22.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x38 12.--21. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x38 2.--11. 1. " ELV ,Emergency Limit"
|
|
;group 0x3c++0x03
|
|
line.long 0x3c "DCVR2,DPTC Comparator Value Register 2"
|
|
hexmask.long.word 0x3c 22.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x3c 12.--21. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x3c 2.--11. 1. " ELV ,Emergency Limit"
|
|
;group 0x40++0x03
|
|
line.long 0x40 "DCVR3,DPTC Comparator Value Register 3"
|
|
hexmask.long.word 0x40 22.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x40 12.--21. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x40 2.--11. 1. " ELV ,Emergency Limit"
|
|
;group 0x44++0x03
|
|
line.long 0x44 "LTR0,Load Tracking Register 0"
|
|
bitfld.long 0x44 31. " SIGD15 ,Signal Detection on dvfs_w_sig 15" "Level,Edge"
|
|
bitfld.long 0x44 30. " SIGD14 ,Signal Detection on dvfs_w_sig 14" "Level,Edge"
|
|
bitfld.long 0x44 29. " SIGD13 ,Signal Detection on dvfs_w_sig 13" "Level,Edge"
|
|
textline " "
|
|
hexmask.long.byte 0x44 22.--27. 1. " UPTHR ,Upper Threshold for Load Tracking"
|
|
hexmask.long.byte 0x44 16.--21. 1. " DNTHR ,Lower Threshold for Load Tracking"
|
|
bitfld.long 0x44 15. " SIGD12 ,Signal Detection on dvfs_w_sig 12" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x44 14. " SIGD11 ,Signal Detection on dvfs_w_sig 11" "Level,Edge"
|
|
bitfld.long 0x44 13. " SIGD10 ,Signal Detection on dvfs_w_sig 10" "Level,Edge"
|
|
bitfld.long 0x44 12. " SIGD9 ,Signal Detection on dvfs_w_sig 9" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x44 11. " SIGD8 ,Signal Detection on dvfs_w_sig 8" "Level,Edge"
|
|
bitfld.long 0x44 10. " SIGD7 ,Signal Detection on dvfs_w_sig 7" "Level,Edge"
|
|
bitfld.long 0x44 9. " SIGD6 ,Signal Detection on dvfs_w_sig 6" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x44 8. " SIGD5 ,Signal Detection on dvfs_w_sig 5" "Level,Edge"
|
|
bitfld.long 0x44 7. " SIGD4 ,Signal Detection on dvfs_w_sig 4" "Level,Edge"
|
|
bitfld.long 0x44 6. " SIGD3 ,Signal Detection on dvfs_w_sig 3" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x44 5. " SIGD2 ,Signal Detection on dvfs_w_sig 2" "Level,Edge"
|
|
bitfld.long 0x44 4. " SIGD1 ,Signal Detection on dvfs_w_sig 1" "Level,Edge"
|
|
bitfld.long 0x44 3. " SIGD0 ,Signal Detection on dvfs_w_sig 0" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x44 1.--2. " DIV3CK ,Division Value of div_3_clk" "00,01,10,11"
|
|
;group 0x48++0x03
|
|
line.long 0x48 "LTR1,Load Tracking Register 1"
|
|
bitfld.long 0x48 23. " LTBRSH ,Load Tracking Buffer Shift" "ld_add - ld_add[5:2],ld_add - ld_add[4:1]"
|
|
bitfld.long 0x48 22. " LTBRSR ,Load Tracking Buffer Source" "pre_ld_add,ld_add"
|
|
hexmask.long.byte 0x48 14.--21. 1. " DNCNT ,Number of Consecutive Times the Lower Frequency Threshold"
|
|
textline " "
|
|
hexmask.long.byte 0x48 6.--13. 1. " UPCNT ,Number of Consecutive Times the Upper Frequency Threshold"
|
|
hexmask.long.byte 0x48 0.--5. 1. " PNCTHR ,Panic Mode Level Threshold for Load Tracking"
|
|
;group 0x4c++0x03
|
|
line.long 0x4c "LTR2,Load Tracking Register 1"
|
|
bitfld.long 0x4c 29.--31. " WSW15 ,WSW15 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x4c 26.--28. " WSW14 ,WSW14 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x4c 23.--25. " WSW13 ,WSW13 Value" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x4c 20.--22. " WSW12 ,WSW12 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x4c 17.--19. " WSW11 ,WSW11 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x4c 14.--16. " WSW10 ,WSW10 Value" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x4c 11.--13. " WSW9 ,WSW9 Value" "000,001,010,011,100,101,110,111"
|
|
hexmask.long.word 0x4c 0.--8. 1. " EMAC ,EMA Configuration"
|
|
;group 0x50++0x03
|
|
line.long 0x50 "LTR3,Load Tracking Register"
|
|
bitfld.long 0x50 29.--31. " WSW8 ,WSW8 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 26.--28. " WSW7 ,WSW7 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 23.--25. " WSW6 ,WSW6 Value" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x50 20.--22. " WSW5 ,WSW5 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 17.--19. " WSW4 ,WSW4 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 14.--16. " WSW3 ,WSW3 Value" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x50 11.--13. " WSW2 ,WSW2 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 8.--10. " WSW1 ,WSW1 Value" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x50 5.--7. " WSW0 ,WSW0 Value" "000,001,010,011,100,101,110,111"
|
|
rgroup 0x54--0x5b
|
|
line.long 0x00 "LTBR0,Load Tracking Buffer Register 0"
|
|
bitfld.long 0x00 28.--31. " LTS7 ,7th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 24.--27. " LTS6 ,6th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 20.--23. " LTS5 ,5th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " LTS4 ,4th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 12.--15. " LTS3 ,3rd Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 8.--11. " LTS2 ,2nd Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " LTS1 ,1th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 0.--3. " LTS0 ,0 Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
;rgroup 0x58++0x03
|
|
line.long 0x04 "LTBR1,Load Tracking Buffer Register 1"
|
|
bitfld.long 0x04 28.--31. " LTS15 ,15th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x04 24.--27. " LTS14 ,16th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x04 20.--23. " LTS13 ,13th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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textline " "
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bitfld.long 0x04 16.--19. " LTS12 ,12th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x04 12.--15. " LTS11 ,11rd Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x04 8.--11. " LTS10 ,10nd Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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textline " "
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bitfld.long 0x04 4.--7. " LTS9 ,9th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x04 0.--3. " LTS8 ,8th Sample of Load Tracking" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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group 0x5c--0x67
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line.long 0x00 "PMCR0,Power Management Control Register"
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bitfld.long 0x00 31. " DFSUP[1] ,DFS update" "SRPLL,MCUPLL"
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bitfld.long 0x00 30. " DFSUP[0] ,DFS update" "PLL and postdividers,Postdividers"
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bitfld.long 0x00 28.--29. " DVSUP ,DVS update" "Highest,High,Low,Lowest"
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textline " "
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bitfld.long 0x00 27. " UDSC ,Up-down Scaling" "Decreased,Increased"
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bitfld.long 0x00 24.--26. " VSCNT ,Voltage Scaling Counter" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 23. " DVFEV ,Always Give a DVFS Event" "Not always,Always"
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textline " "
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bitfld.long 0x00 22. " DVFIS ,DVFS Interrupt Select" "SDMA for DVFS,MCU for DVFS"
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bitfld.long 0x00 21. " LBMI ,Load Buffer Full Mask Interrupt" "Enabled,Masked"
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bitfld.long 0x00 20. " LBFL ,Load Buffer Full Status Bit" "Not full,Full"
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textline " "
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bitfld.long 0x00 18.--19. " LBCF ,DVFS Load Buffer Programmable Size" "4,8,12,16"
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bitfld.long 0x00 17. " PTVIS ,DPTC Interrupt Select" "SDMA for DPTC,MCU for DPTC"
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bitfld.long 0x00 16. " UPDTEN ,DVFS Update Enable of New Value" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " FSVAIM ,DVFS Frequency Adjustment Interrupt Mask" "Enabled,Masked"
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bitfld.long 0x00 13.--14. " FSVAI[1:0] ,DVFS Frequency Adjustment Interrupt" "No interrupt,Increased,Decreased,Increased immediately"
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bitfld.long 0x00 12. " DPVCR ,DPTC Voltage Change Request" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 11. " DPVV ,DPTC Voltage Valid Edge Detect" "Not valid,Valid"
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bitfld.long 0x00 10. " WFIM ,DVFS Wait for Interrupt Mask Bit" "Not masked,Masked"
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bitfld.long 0x00 9. " DRCE3 ,DPTC Reference Circuit3 Enable Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 8. " DRCE2 , DPTC Reference Circuit2 Enable Bit" "Disabled,Enabled"
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bitfld.long 0x00 7. " DRCE1 , DPTC Reference Circuit1 Enable Bit" "Disabled,Enabled"
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bitfld.long 0x00 6. " DRCE0 , DPTC Reference Circuit0 Enable Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 5. " DCR ,DPTC Counting Range" "256,512"
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bitfld.long 0x00 4. " DVFEN ,DVFS Enable" "Disabled,Enabled"
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bitfld.long 0x00 3. " PTVAIM ,DPTC Voltage Adjustment Interrupt Mask" "Enabled,Masked"
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textline " "
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bitfld.long 0x00 1.--2. " PTVAI[1:0] ,DPTC Voltage Adjustment Interrupt" "No interrupt,Decreased,Increased,Increased immediately"
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bitfld.long 0x00 0. " DPTEN ,DPTC Enable" "Disabled,Enabled"
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;group 0x60++0x03
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line.long 0x04 "PMCR1,Power Management Control Register"
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hexmask.long.byte 0x04 16.--23. 1. " WBCN ,8 Bit Programmable Well Bias Counter Configuration Bits"
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hexmask.long.byte 0x04 9.--12. 1. " CPSPA ,WBCP Adjustment"
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bitfld.long 0x04 8. " PWTS ,WBCP Pwell Pump Test" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 7. " NWTS ,WBCP Nwell Pump Test" "Disabled,Enabled"
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bitfld.long 0x04 6. " CPFA ,WBCP Frequency Adjustment" "Normal,Lower"
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hexmask.long.byte 0x04 0.--3. 1. " DVGP ,DVFS General Purpose"
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;group 0x64++0x03
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line.long 0x08 "PDR2,Post Divider Register 2"
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bitfld.long 0x08 7.--12. " MST2_PDF ,M-stick2 Post Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
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bitfld.long 0x08 0.--5. " MST1_PDF ,M-stick1 Post Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
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width 0x14
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tree.end
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tree "IOMUXC (IOMUX Controller)"
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base asd:0x43fac000
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width 0xa
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;group 0x00--0x0c
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; line.long 0x00 "INT_OBS1,Interrupt Observability Register1"
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; bitfld.long 0x0 24.--29. " INT_OBS[29:24] ,Interrupt Observability" "int0 on obs_int[4],int1 on obs_int[4],int2 on obs_int[4],int3 on obs_int[4],int4 on obs_int[4],int5 on obs_int[4],int6 on obs_int[4],int7 on obs_int[4],int8 on obs_int[4],int9 on obs_int[4],int10 on obs_int[4],int11 on obs_int[4],int12 on obs_int[4],int13 on obs_int[4],int14 on obs_int[4],int15 on obs_int[4],int16 on obs_int[4],int17 on obs_int[4],int18 on obs_int[4],int19 on obs_int[4],int20 on obs_int[4],int21 on obs_int[4],int22 on obs_int[4],int23 on obs_int[4],int24 on obs_int[4],int25 on obs_int[4],int26 on obs_int[4],int27 on obs_int[4],int28 on obs_int[4],int29 on obs_int[4],int30 on obs_int[4],int31 on obs_int[4],int32 on obs_int[4],int33 on obs_int[4],int34 on obs_int[4],int35 on obs_int[4],int36 on obs_int[4],int37 on obs_int[4],int38 on obs_int[4],int39 on obs_int[4],int40 on obs_int[4],int41 on obs_int[4],int42 on obs_int[4],int43 on obs_int[4],int44 on obs_int[4],int45 on obs_int[4],int46 on obs_int[4],int47 on obs_int[4],int48 on obs_int[4],int49 on obs_int[4],int50 on obs_int[4],int51 on obs_int[4],int52 on obs_int[4],int53 on obs_int[4],int54 on obs_int[4],int55 on obs_int[4],int56 on obs_int[4],int57 on obs_int[4],int58 on obs_int[4],int59 on obs_int[4],int60 on obs_int[4],int61 on obs_int[4],int62 on obs_int[4],int63 on obs_int[4]"
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; bitfld.long 0x0 18.--23. " INT_OBS[23:18] ,Interrupt Observability" "int0 on obs_int[3],int1 on obs_int[3],int2 on obs_int[3],int3 on obs_int[3],int4 on obs_int[3],int5 on obs_int[3],int6 on obs_int[3],int7 on obs_int[3],int8 on obs_int[3],int9 on obs_int[3],int10 on obs_int[3],int11 on obs_int[3],int12 on obs_int[3],int13 on obs_int[3],int14 on obs_int[3],int15 on obs_int[3],int16 on obs_int[3],int17 on obs_int[3],int18 on obs_int[3],int19 on obs_int[3],int20 on obs_int[3],int21 on obs_int[3],int22 on obs_int[3],int23 on obs_int[3],int24 on obs_int[3],int25 on obs_int[3],int26 on obs_int[3],int27 on obs_int[3],int28 on obs_int[3],int29 on obs_int[3],int30 on obs_int[3],int31 on obs_int[3],int32 on obs_int[3],int33 on obs_int[3],int34 on obs_int[3],int35 on obs_int[3],int36 on obs_int[3],int37 on obs_int[3],int38 on obs_int[3],int39 on obs_int[3],int40 on obs_int[3],int41 on obs_int[3],int42 on obs_int[3],int43 on obs_int[3],int44 on obs_int[3],int45 on obs_int[3],int46 on obs_int[3],int47 on obs_int[3],int48 on obs_int[3],int49 on obs_int[3],int50 on obs_int[3],int51 on obs_int[3],int52 on obs_int[3],int53 on obs_int[3],int54 on obs_int[3],int55 on obs_int[3],int56 on obs_int[3],int57 on obs_int[3],int58 on obs_int[3],int59 on obs_int[3],int60 on obs_int[3],int61 on obs_int[3],int62 on obs_int[3],int63 on obs_int[3]"
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; textline " "
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; bitfld.long 0x0 12.--17. " INT_OBS[17:12] ,Interrupt Observability" "int0 on obs_int[2],int1 on obs_int[2],int2 on obs_int[2],int3 on obs_int[2],int4 on obs_int[2],int5 on obs_int[2],int6 on obs_int[2],int7 on obs_int[2],int8 on obs_int[2],int9 on obs_int[2],int10 on obs_int[2],int11 on obs_int[2],int12 on obs_int[2],int13 on obs_int[2],int14 on obs_int[2],int15 on obs_int[2],int16 on obs_int[2],int17 on obs_int[2],int18 on obs_int[2],int19 on obs_int[2],int20 on obs_int[2],int21 on obs_int[2],int22 on obs_int[2],int23 on obs_int[2],int24 on obs_int[2],int25 on obs_int[2],int26 on obs_int[2],int27 on obs_int[2],int28 on obs_int[2],int29 on obs_int[2],int30 on obs_int[2],int31 on obs_int[2],int32 on obs_int[2],int33 on obs_int[2],int34 on obs_int[2],int35 on obs_int[2],int36 on obs_int[2],int37 on obs_int[2],int38 on obs_int[2],int39 on obs_int[2],int40 on obs_int[2],int41 on obs_int[2],int42 on obs_int[2],int43 on obs_int[2],int44 on obs_int[2],int45 on obs_int[2],int46 on obs_int[2],int47 on obs_int[2],int48 on obs_int[2],int49 on obs_int[2],int50 on obs_int[2],int51 on obs_int[2],int52 on obs_int[2],int53 on obs_int[2],int54 on obs_int[2],int55 on obs_int[2],int56 on obs_int[2],int57 on obs_int[2],int58 on obs_int[2],int59 on obs_int[2],int60 on obs_int[2],int61 on obs_int[2],int62 on obs_int[2],int63 on obs_int[2]"
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; bitfld.long 0x0 6.--11. " INT_OBS[11:6] ,Interrupt Observability" "int0 on obs_int[1],int1 on obs_int[1],int2 on obs_int[1],int3 on obs_int[1],int4 on obs_int[1],int5 on obs_int[1],int6 on obs_int[1],int7 on obs_int[1],int8 on obs_int[1],int9 on obs_int[1],int10 on obs_int[1],int11 on obs_int[1],int12 on obs_int[1],int13 on obs_int[1],int14 on obs_int[1],int15 on obs_int[1],int16 on obs_int[1],int17 on obs_int[1],int18 on obs_int[1],int19 on obs_int[1],int20 on obs_int[1],int21 on obs_int[1],int22 on obs_int[1],int23 on obs_int[1],int24 on obs_int[1],int25 on obs_int[1],int26 on obs_int[1],int27 on obs_int[1],int28 on obs_int[1],int29 on obs_int[1],int30 on obs_int[1],int31 on obs_int[1],int32 on obs_int[1],int33 on obs_int[1],int34 on obs_int[1],int35 on obs_int[1],int36 on obs_int[1],int37 on obs_int[1],int38 on obs_int[1],int39 on obs_int[1],int40 on obs_int[1],int41 on obs_int[1],int42 on obs_int[1],int43 on obs_int[1],int44 on obs_int[1],int45 on obs_int[1],int46 on obs_int[1],int47 on obs_int[1],int48 on obs_int[1],int49 on obs_int[1],int50 on obs_int[1],int51 on obs_int[1],int52 on obs_int[1],int53 on obs_int[1],int54 on obs_int[1],int55 on obs_int[1],int56 on obs_int[1],int57 on obs_int[1],int58 on obs_int[1],int59 on obs_int[1],int60 on obs_int[1],int61 on obs_int[1],int62 on obs_int[1],int63 on obs_int[1]"
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; textline " "
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; bitfld.long 0x0 0.--5. " INT_OBS[5:0] ,Interrupt Observability" "int0 on obs_int[0],int1 on obs_int[0],int2 on obs_int[0],int3 on obs_int[0],int4 on obs_int[0],int5 on obs_int[0],int6 on obs_int[0],int7 on obs_int[0],int8 on obs_int[0],int9 on obs_int[0],int10 on obs_int[0],int11 on obs_int[0],int12 on obs_int[0],int13 on obs_int[0],int14 on obs_int[0],int15 on obs_int[0],int16 on obs_int[0],int17 on obs_int[0],int18 on obs_int[0],int19 on obs_int[0],int20 on obs_int[0],int21 on obs_int[0],int22 on obs_int[0],int23 on obs_int[0],int24 on obs_int[0],int25 on obs_int[0],int26 on obs_int[0],int27 on obs_int[0],int28 on obs_int[0],int29 on obs_int[0],int30 on obs_int[0],int31 on obs_int[0],int32 on obs_int[0],int33 on obs_int[0],int34 on obs_int[0],int35 on obs_int[0],int36 on obs_int[0],int37 on obs_int[0],int38 on obs_int[0],int39 on obs_int[0],int40 on obs_int[0],int41 on obs_int[0],int42 on obs_int[0],int43 on obs_int[0],int44 on obs_int[0],int45 on obs_int[0],int46 on obs_int[0],int47 on obs_int[0],int48 on obs_int[0],int49 on obs_int[0],int50 on obs_int[0],int51 on obs_int[0],int52 on obs_int[0],int53 on obs_int[0],int54 on obs_int[0],int55 on obs_int[0],int56 on obs_int[0],int57 on obs_int[0],int58 on obs_int[0],int59 on obs_int[0],int60 on obs_int[0],int61 on obs_int[0],int62 on obs_int[0],int63 on obs_int[0]"
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;;group 0x04++0x03
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; line.long 0x04 "INT_OBS2,Interrupt Observability Register2"
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; bitfld.long 0x04 24.--29. " INT_OBS[29:24] ,Interrupt Observability" "sdma_event0 on obs_int[4],sdma_event1 on obs_int[4],sdma_event2 on obs_int[4],sdma_event3 on obs_int[4],sdma_event4 on obs_int[4],sdma_event5 on obs_int[4],sdma_event6 on obs_int[4],sdma_event7 on obs_int[4],sdma_event8 on obs_int[4],sdma_event9 on obs_int[4],sdma_event10 on obs_int[4],sdma_event11 on obs_int[4],sdma_event12 on obs_int[4],sdma_event13 on obs_int[4],sdma_event14 on obs_int[4],sdma_event15 on obs_int[4],sdma_event16 on obs_int[4],sdma_event17 on obs_int[4],sdma_event18 on obs_int[4],sdma_event19 on obs_int[4],sdma_event20 on obs_int[4],sdma_event21 on obs_int[4],sdma_event22 on obs_int[4],sdma_event23 on obs_int[4],sdma_event24 on obs_int[4],sdma_event25 on obs_int[4],sdma_event26 on obs_int[4],sdma_event27 on obs_int[4],sdma_event28 on obs_int[4],sdma_event29 on obs_int[4],sdma_event30 on obs_int[4],sdma_event31 on obs_int[4],ctm_lines[0] on obs_int[4],ctm_lines[1] on obs_int[4],ctm_lines[2] on obs_int[4],ctm_lines[3] on obs_int[4],Reserved,Reserved,standbywfi on obs_int[4],wfipending on obs_int[4],java_mode on obs_int[4],thumb_mode on obs_int[4],htransi_reg_1 on obs_int[4],htransi_reg_1 on obs_int[4],htransp_reg_0 on obs_int[4],htransp_reg_1 on obs_int[4],htransr_reg_0 on obs_int[4],htransr_reg_1 on obs_int[4],htransw_reg_0 on obs_int[4],htransw_reg_1 on obs_int[4],iainstvalid on obs_int[4],mpll_lrf on obs_int[4],spll_lrf on obs_int[4],upll_lrf on obs_int[4],sjc_sdma_de on obs_int[4],sdma_debug_matched_dmbus on obs_int[4],sdma_deug_bus_error on obs_int[4],sdma_debug_rtbuffer_wrire onobs_int[4],?..."
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; textline " "
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; bitfld.long 0x04 18.--23. " INT_OBS[23:19] ,Interrupt Observability" "sdma_event0 on obs_int[3],sdma_event1 on obs_int[3],sdma_event2 on obs_int[3],sdma_event3 on obs_int[3],sdma_event4 on obs_int[3],sdma_event5 on obs_int[3],sdma_event6 on obs_int[3],sdma_event7 on obs_int[3],sdma_event8 on obs_int[3],sdma_event9 on obs_int[3],sdma_event10 on obs_int[3],sdma_event11 on obs_int[3],sdma_event12 on obs_int[3],sdma_event13 on obs_int[3],sdma_event14 on obs_int[3],sdma_event15 on obs_int[3],sdma_event16 on obs_int[3],sdma_event17 on obs_int[3],sdma_event18 on obs_int[3],sdma_event19 on obs_int[3],sdma_event20 on obs_int[3],sdma_event21 on obs_int[3],sdma_event22 on obs_int[3],sdma_event23 on obs_int[3],sdma_event24 on obs_int[3],sdma_event25 on obs_int[3],sdma_event26 on obs_int[3],sdma_event27 on obs_int[3],sdma_event28 on obs_int[3],sdma_event29 on obs_int[3],sdma_event30 on obs_int[3],sdma_event31 on obs_int[3],ctm_lines[0] on obs_int[3],ctm_lines[1] on obs_int[3],ctm_lines[2] on obs_int[3],ctm_lines[3] on obs_int[3],Reserved,Reserved,standbywfi on obs_int[3],wfipending on obs_int[3],java_mode on obs_int[3],thumb_mode on obs_int[3],htransi_reg_1 on obs_int[3],htransi_reg_1 on obs_int[3],htransp_reg_0 on obs_int[3],htransp_reg_1 on obs_int[3],htransr_reg_0 on obs_int[3],htransr_reg_1 on obs_int[3],htransw_reg_0 on obs_int[3],htransw_reg_1 on obs_int[3],iainstvalid on obs_int[3],mpll_lrf on obs_int[3],spll_lrf on obs_int[3],upll_lrf on obs_int[3],sjc_sdma_de on obs_int[3],sdma_debug_matched_dmbus on obs_int[3],sdma_deug_bus_error on obs_int[3],sdma_debug_rtbuffer_wrire onobs_int[3],?..."
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; textline " "
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; bitfld.long 0x04 12.--17. " INT_OBS[17:12] ,Interrupt Observability" "sdma_event0 on obs_int[2],sdma_event1 on obs_int[2],sdma_event2 on obs_int[2],sdma_event3 on obs_int[2],sdma_event4 on obs_int[2],sdma_event5 on obs_int[2],sdma_event6 on obs_int[2],sdma_event7 on obs_int[2],sdma_event8 on obs_int[2],sdma_event9 on obs_int[2],sdma_event10 on obs_int[2],sdma_event11 on obs_int[2],sdma_event12 on obs_int[2],sdma_event13 on obs_int[2],sdma_event14 on obs_int[2],sdma_event15 on obs_int[2],sdma_event16 on obs_int[2],sdma_event17 on obs_int[2],sdma_event18 on obs_int[2],sdma_event19 on obs_int[2],sdma_event20 on obs_int[2],sdma_event21 on obs_int[2],sdma_event22 on obs_int[2],sdma_event23 on obs_int[2],sdma_event24 on obs_int[2],sdma_event25 on obs_int[2],sdma_event26 on obs_int[2],sdma_event27 on obs_int[2],sdma_event28 on obs_int[2],sdma_event29 on obs_int[2],sdma_event30 on obs_int[2],sdma_event31 on obs_int[2],ctm_lines[0] on obs_int[2],ctm_lines[1] on obs_int[2],ctm_lines[2] on obs_int[2],ctm_lines[3] on obs_int[2],Reserved,Reserved,standbywfi on obs_int[2],wfipending on obs_int[2],java_mode on obs_int[2],thumb_mode on obs_int[2],htransi_reg_1 on obs_int[2],htransi_reg_1 on obs_int[2],htransp_reg_0 on obs_int[2],htransp_reg_1 on obs_int[2],htransr_reg_0 on obs_int[2],htransr_reg_1 on obs_int[2],htransw_reg_0 on obs_int[2],htransw_reg_1 on obs_int[2],iainstvalid on obs_int[2],mpll_lrf on obs_int[2],spll_lrf on obs_int[2],upll_lrf on obs_int[2],sjc_sdma_de on obs_int[2],sdma_debug_matched_dmbus on obs_int[2],sdma_deug_bus_error on obs_int[2],sdma_debug_rtbuffer_wrire onobs_int[2],?..."
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; textline " "
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; bitfld.long 0x04 6.--11. " INT_OBS[11:6] ,Interrupt Observability" "sdma_event0 on obs_int[1],sdma_event1 on obs_int[1],sdma_event2 on obs_int[1],sdma_event3 on obs_int[1],sdma_event4 on obs_int[1],sdma_event5 on obs_int[1],sdma_event6 on obs_int[1],sdma_event7 on obs_int[1],sdma_event8 on obs_int[1],sdma_event9 on obs_int[1],sdma_event10 on obs_int[1],sdma_event11 on obs_int[1],sdma_event12 on obs_int[1],sdma_event13 on obs_int[1],sdma_event14 on obs_int[1],sdma_event15 on obs_int[1],sdma_event16 on obs_int[1],sdma_event17 on obs_int[1],sdma_event18 on obs_int[1],sdma_event19 on obs_int[1],sdma_event20 on obs_int[1],sdma_event21 on obs_int[1],sdma_event22 on obs_int[1],sdma_event23 on obs_int[1],sdma_event24 on obs_int[1],sdma_event25 on obs_int[1],sdma_event26 on obs_int[1],sdma_event27 on obs_int[1],sdma_event28 on obs_int[1],sdma_event29 on obs_int[1],sdma_event30 on obs_int[1],sdma_event31 on obs_int[1],ctm_lines[0] on obs_int[1],ctm_lines[1] on obs_int[1],ctm_lines[2] on obs_int[1],ctm_lines[3] on obs_int[1],Reserved,Reserved,standbywfi on obs_int[1],wfipending on obs_int[1],java_mode on obs_int[1],thumb_mode on obs_int[1],htransi_reg_1 on obs_int[1],htransi_reg_1 on obs_int[1],htransp_reg_0 on obs_int[1],htransp_reg_1 on obs_int[1],htransr_reg_0 on obs_int[1],htransr_reg_1 on obs_int[1],htransw_reg_0 on obs_int[1],htransw_reg_1 on obs_int[1],iainstvalid on obs_int[1],mpll_lrf on obs_int[1],spll_lrf on obs_int[1],upll_lrf on obs_int[1],sjc_sdma_de on obs_int[1],sdma_debug_matched_dmbus on obs_int[1],sdma_deug_bus_error on obs_int[1],sdma_debug_rtbuffer_wrire onobs_int[1],?..."
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; textline " "
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; bitfld.long 0x04 0.--5. " INT_OBS[5:0] ,Interrupt Observability" "sdma_event0 on obs_int[0],sdma_event1 on obs_int[0],sdma_event2 on obs_int[0],sdma_event3 on obs_int[0],sdma_event4 on obs_int[0],sdma_event5 on obs_int[0],sdma_event6 on obs_int[0],sdma_event7 on obs_int[0],sdma_event8 on obs_int[0],sdma_event9 on obs_int[0],sdma_event10 on obs_int[0],sdma_event11 on obs_int[0],sdma_event12 on obs_int[0],sdma_event13 on obs_int[0],sdma_event14 on obs_int[0],sdma_event15 on obs_int[0],sdma_event16 on obs_int[0],sdma_event17 on obs_int[0],sdma_event18 on obs_int[0],sdma_event19 on obs_int[0],sdma_event20 on obs_int[0],sdma_event21 on obs_int[0],sdma_event22 on obs_int[0],sdma_event23 on obs_int[0],sdma_event24 on obs_int[0],sdma_event25 on obs_int[0],sdma_event26 on obs_int[0],sdma_event27 on obs_int[0],sdma_event28 on obs_int[0],sdma_event29 on obs_int[0],sdma_event30 on obs_int[0],sdma_event31 on obs_int[0],ctm_lines[0] on obs_int[0],ctm_lines[1] on obs_int[0],ctm_lines[2] on obs_int[0],ctm_lines[0] on obs_int[0],Reserved,Reserved,standbywfi on obs_int[0],wfipending on obs_int[0],java_mode on obs_int[0],thumb_mode on obs_int[0],htransi_reg_1 on obs_int[0],htransi_reg_1 on obs_int[0],htransp_reg_0 on obs_int[0],htransp_reg_1 on obs_int[0],htransr_reg_0 on obs_int[0],htransr_reg_1 on obs_int[0],htransw_reg_0 on obs_int[0],htransw_reg_1 on obs_int[0],iainstvalid on obs_int[0],mpll_lrf on obs_int[0],spll_lrf on obs_int[0],upll_lrf on obs_int[0],sjc_sdma_de on obs_int[0],sdma_debug_matched_dmbus on obs_int[0],sdma_deug_bus_error on obs_int[0],sdma_debug_rtbuffer_wrire onobs_int[0],?..."
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group 0x08++0x03
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line.long 0x00 "GPR,General Purpose Register"
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bitfld.long 0x00 31. " GPR[31] ,DDR Drive Strength Enable" "Disabled,Enabled"
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bitfld.long 0x00 30. " GPR[30] ,USBH2 Loopback Enable" "Disabled,Enabled"
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bitfld.long 0x00 29. " GPR[29] ,USBH1 Loopback Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 28. " GPR[28] ,USBOTG Loopback Enable" "Disabled,Enabled"
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bitfld.long 0x00 27. " GPR[27] ,USBH1_SUSPEND Enabled" "Disabled,Enabled"
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bitfld.long 0x00 26. " GPR[26] ,ATA Signal Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " GPR[25] ,CSPI or UART5 DMA Request" "CSPI3,UART5"
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bitfld.long 0x00 24. " GPR[24] ,PC_CD1_B Rate Signal" "Slow,Fast"
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bitfld.long 0x00 23. " GPR[23] ,PC_CD1_B Drive Strength" "Standard/high,Maximum"
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textline " "
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bitfld.long 0x00 22. " GPR[22] ,GPIO3_1 or UPLL_BYPASS_CLK Select" "GPIO3_1,UPLL_BYPASS_CLK"
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bitfld.long 0x00 21. " GPR[21] ,GPIO3_0 or SPLL_BYPASS_CLK Select" "GPIO3_0,SPLL_BYPASS_CLK"
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bitfld.long 0x00 20. " GPR[20] ,SDHC2 or MSHC2 DMA Request" "SDHC2,MSHC2"
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textline " "
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bitfld.long 0x00 19. " GPR[19] ,SDHC1 or MSHC1 DMA Request" "SDHC1,MSHC1"
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bitfld.long 0x00 18. " GPR[18] ,USBOTG_DATA[5:3] Enable" "Disabled,Enabled"
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bitfld.long 0x00 17. " GPR[17] ,USBOTG_DATA4 Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 16. " GPR[16] ,Tamper Detect Logic Enable" "Disabled,Enabled"
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bitfld.long 0x00 15. " GPR[15] ,External or MBX DMA Request" "External,MBX"
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bitfld.long 0x00 14. " GPR[14] ,CSPI1 or UART3 DMA Request" "CSPI1,UART3"
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textline " "
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bitfld.long 0x00 13. " GPR[13] ,CSD1 or WEIM Select" "CSDI1,WEIM"
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bitfld.long 0x00 12. " GPR[12] ,CSD0 or WEIM Select" "CSD0,WEIM"
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bitfld.long 0x00 11. " GPR[11] ,USBH2 Signals Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 10. " GPR[10] ,ATA Signal Enable" "Disabled,Enabled"
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bitfld.long 0x00 9. " GPR[9] ,ATA Data 14-15 Signals Enable" "Disabled,Enabled"
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bitfld.long 0x00 8. " GPR[8] ,ATA Data 7-10 Signals Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 7. " GPR[7] ,ATA DATA 0-13 Signals Enable" "Disabled,Enabled"
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bitfld.long 0x00 6. " GPR[6] ,ATA Signals Enable" "Disabled,Enabled"
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bitfld.long 0x00 5. " GPR[5] ,ATA Data [13:7] Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 4. " GPR[4] ,ATA Signals Enable" "Disabled,Enabled"
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bitfld.long 0x00 3. " GPR[3] ,ATA IORDY Signal Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " GPR[2] ,CSPI1 Signal Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 1. " GPR[1] ,Forces all DDR type contacts to DDR Strength setting" "Not forced,Forced"
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bitfld.long 0x00 0. " GPR[0] ,FIR or UART2 SDMA Select" "UART2,FIR"
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width 0xe
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tree "IOMUX Control Registers"
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group (0x0c+0x0)++0x03
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line.long 0x00 "SW_MUX_CTL0,IOMUX 0 Control Register"
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bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
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group (0x0c+0x4)++0x03
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line.long 0x00 "SW_MUX_CTL1,IOMUX 1 Control Register"
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bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
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group (0x0c+0x8)++0x03
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line.long 0x00 "SW_MUX_CTL2,IOMUX 2 Control Register"
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bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
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group (0x0c+0xC)++0x03
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line.long 0x00 "SW_MUX_CTL3,IOMUX 3 Control Register"
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bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
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bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
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bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
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group (0x0c+0x10)++0x03
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line.long 0x00 "SW_MUX_CTL4,IOMUX 4 Control Register"
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bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
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bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
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textline " "
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bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
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bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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textline " "
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bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
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bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
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textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
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bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
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textline " "
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bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
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bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x14)++0x03
|
|
line.long 0x00 "SW_MUX_CTL5,IOMUX 5 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x18)++0x03
|
|
line.long 0x00 "SW_MUX_CTL6,IOMUX 6 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x1C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL7,IOMUX 7 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x20)++0x03
|
|
line.long 0x00 "SW_MUX_CTL8,IOMUX 8 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x24)++0x03
|
|
line.long 0x00 "SW_MUX_CTL9,IOMUX 9 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x28)++0x03
|
|
line.long 0x00 "SW_MUX_CTL10,IOMUX 10 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x2C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL11,IOMUX 11 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x30)++0x03
|
|
line.long 0x00 "SW_MUX_CTL12,IOMUX 12 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x34)++0x03
|
|
line.long 0x00 "SW_MUX_CTL13,IOMUX 13 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x38)++0x03
|
|
line.long 0x00 "SW_MUX_CTL14,IOMUX 14 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x3C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL15,IOMUX 15 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x40)++0x03
|
|
line.long 0x00 "SW_MUX_CTL16,IOMUX 16 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x44)++0x03
|
|
line.long 0x00 "SW_MUX_CTL17,IOMUX 17 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x48)++0x03
|
|
line.long 0x00 "SW_MUX_CTL18,IOMUX 18 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x4C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL19,IOMUX 19 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x50)++0x03
|
|
line.long 0x00 "SW_MUX_CTL20,IOMUX 20 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x54)++0x03
|
|
line.long 0x00 "SW_MUX_CTL21,IOMUX 21 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x58)++0x03
|
|
line.long 0x00 "SW_MUX_CTL22,IOMUX 22 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x5C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL23,IOMUX 23 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x60)++0x03
|
|
line.long 0x00 "SW_MUX_CTL24,IOMUX 24 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x64)++0x03
|
|
line.long 0x00 "SW_MUX_CTL25,IOMUX 25 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x68)++0x03
|
|
line.long 0x00 "SW_MUX_CTL26,IOMUX 26 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x6C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL27,IOMUX 27 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x70)++0x03
|
|
line.long 0x00 "SW_MUX_CTL28,IOMUX 28 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x74)++0x03
|
|
line.long 0x00 "SW_MUX_CTL29,IOMUX 29 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x78)++0x03
|
|
line.long 0x00 "SW_MUX_CTL30,IOMUX 30 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x7C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL31,IOMUX 31 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x80)++0x03
|
|
line.long 0x00 "SW_MUX_CTL32,IOMUX 32 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x84)++0x03
|
|
line.long 0x00 "SW_MUX_CTL33,IOMUX 33 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x88)++0x03
|
|
line.long 0x00 "SW_MUX_CTL34,IOMUX 34 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x8C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL35,IOMUX 35 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x90)++0x03
|
|
line.long 0x00 "SW_MUX_CTL36,IOMUX 36 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x94)++0x03
|
|
line.long 0x00 "SW_MUX_CTL37,IOMUX 37 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x98)++0x03
|
|
line.long 0x00 "SW_MUX_CTL38,IOMUX 38 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x9C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL39,IOMUX 39 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xA0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL40,IOMUX 40 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xA4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL41,IOMUX 41 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xA8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL42,IOMUX 42 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xAC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL43,IOMUX 43 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xB0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL44,IOMUX 44 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xB4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL45,IOMUX 45 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xB8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL46,IOMUX 46 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xBC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL47,IOMUX 47 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xC0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL48,IOMUX 48 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xC4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL49,IOMUX 49 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xC8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL50,IOMUX 50 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xCC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL51,IOMUX 51 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xD0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL52,IOMUX 52 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xD4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL53,IOMUX 53 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xD8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL54,IOMUX 54 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xDC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL55,IOMUX 55 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xE0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL56,IOMUX 56 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xE4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL57,IOMUX 57 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xE8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL58,IOMUX 58 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xEC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL59,IOMUX 59 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xF0)++0x03
|
|
line.long 0x00 "SW_MUX_CTL60,IOMUX 60 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xF4)++0x03
|
|
line.long 0x00 "SW_MUX_CTL61,IOMUX 61 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xF8)++0x03
|
|
line.long 0x00 "SW_MUX_CTL62,IOMUX 62 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0xFC)++0x03
|
|
line.long 0x00 "SW_MUX_CTL63,IOMUX 63 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x100)++0x03
|
|
line.long 0x00 "SW_MUX_CTL64,IOMUX 64 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x104)++0x03
|
|
line.long 0x00 "SW_MUX_CTL65,IOMUX 65 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x108)++0x03
|
|
line.long 0x00 "SW_MUX_CTL66,IOMUX 66 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x10C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL67,IOMUX 67 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x110)++0x03
|
|
line.long 0x00 "SW_MUX_CTL68,IOMUX 68 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x114)++0x03
|
|
line.long 0x00 "SW_MUX_CTL69,IOMUX 69 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x118)++0x03
|
|
line.long 0x00 "SW_MUX_CTL70,IOMUX 70 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x11C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL71,IOMUX 71 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x120)++0x03
|
|
line.long 0x00 "SW_MUX_CTL72,IOMUX 72 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x124)++0x03
|
|
line.long 0x00 "SW_MUX_CTL73,IOMUX 73 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x128)++0x03
|
|
line.long 0x00 "SW_MUX_CTL74,IOMUX 74 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x12C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL75,IOMUX 75 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x130)++0x03
|
|
line.long 0x00 "SW_MUX_CTL76,IOMUX 76 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x134)++0x03
|
|
line.long 0x00 "SW_MUX_CTL77,IOMUX 77 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x138)++0x03
|
|
line.long 0x00 "SW_MUX_CTL78,IOMUX 78 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x13C)++0x03
|
|
line.long 0x00 "SW_MUX_CTL79,IOMUX 79 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x140)++0x03
|
|
line.long 0x00 "SW_MUX_CTL80,IOMUX 80 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
group (0x0c+0x144)++0x03
|
|
line.long 0x00 "SW_MUX_CTL81,IOMUX 81 Control Register"
|
|
bitfld.long 0x00 28.--30. " SW_MUX_CTL[30:28] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 27. " SW_MUX_CTL[27] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SW_MUX_CTL[26] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 25. " SW_MUX_CTL[25] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SW_MUX_CTL[24] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 20.--22. " ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SW_MUX_CTL[19] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " SW_MUX_CTL[18] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SW_MUX_CTL[17] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " SW_MUX_CTL[16] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " SW_MUX_CTL[12:14] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
bitfld.long 0x00 11. " SW_MUX_CTL[11] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SW_MUX_CTL[10] ,FUNC_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " SW_MUX_CTL[9] ,MUX1_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SW_MUX_CTL[8] ,MUX2_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 4.--6. " SW_MUX_CTL[4:6] ,Decode for Regular IOMUX" "GPIO DR,Funct output,MUX1 output,MUX2 output,MUX3 output,MUX4 output,MUX5 output,MUX6 output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_MUX_CTL[3] ,GPIO PSR / ISR" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SW_MUX_CTL[2] ,FUNC_IN" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SW_MUX_CTL[1] ,MUX1_IN" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SW_MUX_CTL[0] ,MUX2_IN" "Not selected,Selected"
|
|
textline " "
|
|
tree.end
|
|
width 0xf
|
|
tree "Software PAD Control Registers"
|
|
group 0x154++0x03
|
|
line.long 0x00 "SW_PAD_CTL0,Software PAD Control 0 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL1,Software PAD Control 1 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x4)++0x03
|
|
line.long 0x00 "SW_PAD_CTL2,Software PAD Control 2 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x8)++0x03
|
|
line.long 0x00 "SW_PAD_CTL3,Software PAD Control 3 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xC)++0x03
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line.long 0x00 "SW_PAD_CTL4,Software PAD Control 4 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x10)++0x03
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line.long 0x00 "SW_PAD_CTL5,Software PAD Control 5 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x14)++0x03
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line.long 0x00 "SW_PAD_CTL6,Software PAD Control 6 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x18)++0x03
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line.long 0x00 "SW_PAD_CTL7,Software PAD Control 7 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x1C)++0x03
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line.long 0x00 "SW_PAD_CTL8,Software PAD Control 8 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x20)++0x03
|
|
line.long 0x00 "SW_PAD_CTL9,Software PAD Control 9 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x24)++0x03
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line.long 0x00 "SW_PAD_CTL10,Software PAD Control 10 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x28)++0x03
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line.long 0x00 "SW_PAD_CTL11,Software PAD Control 11 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x2C)++0x03
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line.long 0x00 "SW_PAD_CTL12,Software PAD Control 12 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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|
textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x30)++0x03
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line.long 0x00 "SW_PAD_CTL13,Software PAD Control 13 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x34)++0x03
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line.long 0x00 "SW_PAD_CTL14,Software PAD Control 14 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x38)++0x03
|
|
line.long 0x00 "SW_PAD_CTL15,Software PAD Control 15 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x3C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL16,Software PAD Control 16 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x40)++0x03
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line.long 0x00 "SW_PAD_CTL17,Software PAD Control 17 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x44)++0x03
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line.long 0x00 "SW_PAD_CTL18,Software PAD Control 18 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x48)++0x03
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line.long 0x00 "SW_PAD_CTL19,Software PAD Control 19 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x4C)++0x03
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line.long 0x00 "SW_PAD_CTL20,Software PAD Control 20 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x50)++0x03
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line.long 0x00 "SW_PAD_CTL21,Software PAD Control 21 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x54)++0x03
|
|
line.long 0x00 "SW_PAD_CTL22,Software PAD Control 22 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x58)++0x03
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line.long 0x00 "SW_PAD_CTL23,Software PAD Control 23 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x5C)++0x03
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line.long 0x00 "SW_PAD_CTL24,Software PAD Control 24 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x60)++0x03
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line.long 0x00 "SW_PAD_CTL25,Software PAD Control 25 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x64)++0x03
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line.long 0x00 "SW_PAD_CTL26,Software PAD Control 26 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x68)++0x03
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line.long 0x00 "SW_PAD_CTL27,Software PAD Control 27 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x6C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL28,Software PAD Control 28 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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|
textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x70)++0x03
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line.long 0x00 "SW_PAD_CTL29,Software PAD Control 29 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x74)++0x03
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line.long 0x00 "SW_PAD_CTL30,Software PAD Control 30 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x78)++0x03
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line.long 0x00 "SW_PAD_CTL31,Software PAD Control 31 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x7C)++0x03
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line.long 0x00 "SW_PAD_CTL32,Software PAD Control 32 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x80)++0x03
|
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line.long 0x00 "SW_PAD_CTL33,Software PAD Control 33 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x84)++0x03
|
|
line.long 0x00 "SW_PAD_CTL34,Software PAD Control 34 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x88)++0x03
|
|
line.long 0x00 "SW_PAD_CTL35,Software PAD Control 35 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x8C)++0x03
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line.long 0x00 "SW_PAD_CTL36,Software PAD Control 36 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x90)++0x03
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line.long 0x00 "SW_PAD_CTL37,Software PAD Control 37 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x94)++0x03
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line.long 0x00 "SW_PAD_CTL38,Software PAD Control 38 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x98)++0x03
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line.long 0x00 "SW_PAD_CTL39,Software PAD Control 39 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x9C)++0x03
|
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line.long 0x00 "SW_PAD_CTL40,Software PAD Control 40 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0xA0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL41,Software PAD Control 41 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xA4)++0x03
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line.long 0x00 "SW_PAD_CTL42,Software PAD Control 42 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xA8)++0x03
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line.long 0x00 "SW_PAD_CTL43,Software PAD Control 43 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xAC)++0x03
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line.long 0x00 "SW_PAD_CTL44,Software PAD Control 44 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xB0)++0x03
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line.long 0x00 "SW_PAD_CTL45,Software PAD Control 45 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xB4)++0x03
|
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line.long 0x00 "SW_PAD_CTL46,Software PAD Control 46 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0xB8)++0x03
|
|
line.long 0x00 "SW_PAD_CTL47,Software PAD Control 47 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xBC)++0x03
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line.long 0x00 "SW_PAD_CTL48,Software PAD Control 48 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xC0)++0x03
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line.long 0x00 "SW_PAD_CTL49,Software PAD Control 49 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xC4)++0x03
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line.long 0x00 "SW_PAD_CTL50,Software PAD Control 50 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xC8)++0x03
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line.long 0x00 "SW_PAD_CTL51,Software PAD Control 51 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xCC)++0x03
|
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line.long 0x00 "SW_PAD_CTL52,Software PAD Control 52 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0xD0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL53,Software PAD Control 53 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0xD4)++0x03
|
|
line.long 0x00 "SW_PAD_CTL54,Software PAD Control 54 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xD8)++0x03
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line.long 0x00 "SW_PAD_CTL55,Software PAD Control 55 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xDC)++0x03
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line.long 0x00 "SW_PAD_CTL56,Software PAD Control 56 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xE0)++0x03
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line.long 0x00 "SW_PAD_CTL57,Software PAD Control 57 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xE4)++0x03
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line.long 0x00 "SW_PAD_CTL58,Software PAD Control 58 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xE8)++0x03
|
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line.long 0x00 "SW_PAD_CTL59,Software PAD Control 59 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0xEC)++0x03
|
|
line.long 0x00 "SW_PAD_CTL60,Software PAD Control 60 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xF0)++0x03
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line.long 0x00 "SW_PAD_CTL61,Software PAD Control 61 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xF4)++0x03
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line.long 0x00 "SW_PAD_CTL62,Software PAD Control 62 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xF8)++0x03
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line.long 0x00 "SW_PAD_CTL63,Software PAD Control 63 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0xFC)++0x03
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line.long 0x00 "SW_PAD_CTL64,Software PAD Control 64 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x100)++0x03
|
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line.long 0x00 "SW_PAD_CTL65,Software PAD Control 65 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x104)++0x03
|
|
line.long 0x00 "SW_PAD_CTL66,Software PAD Control 66 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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|
textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x108)++0x03
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line.long 0x00 "SW_PAD_CTL67,Software PAD Control 67 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x10C)++0x03
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line.long 0x00 "SW_PAD_CTL68,Software PAD Control 68 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x110)++0x03
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line.long 0x00 "SW_PAD_CTL69,Software PAD Control 69 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x114)++0x03
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line.long 0x00 "SW_PAD_CTL70,Software PAD Control 70 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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group (0x158+0x118)++0x03
|
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line.long 0x00 "SW_PAD_CTL71,Software PAD Control 71 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x11C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL72,Software PAD Control 72 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x120)++0x03
|
|
line.long 0x00 "SW_PAD_CTL73,Software PAD Control 73 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x124)++0x03
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line.long 0x00 "SW_PAD_CTL74,Software PAD Control 74 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x128)++0x03
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line.long 0x00 "SW_PAD_CTL75,Software PAD Control 75 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x12C)++0x03
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line.long 0x00 "SW_PAD_CTL76,Software PAD Control 76 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x130)++0x03
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line.long 0x00 "SW_PAD_CTL77,Software PAD Control 77 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x134)++0x03
|
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line.long 0x00 "SW_PAD_CTL78,Software PAD Control 78 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x138)++0x03
|
|
line.long 0x00 "SW_PAD_CTL79,Software PAD Control 79 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x13C)++0x03
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line.long 0x00 "SW_PAD_CTL80,Software PAD Control 80 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x140)++0x03
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line.long 0x00 "SW_PAD_CTL81,Software PAD Control 81 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x144)++0x03
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line.long 0x00 "SW_PAD_CTL82,Software PAD Control 82 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x148)++0x03
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line.long 0x00 "SW_PAD_CTL83,Software PAD Control 83 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x14C)++0x03
|
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line.long 0x00 "SW_PAD_CTL84,Software PAD Control 84 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x150)++0x03
|
|
line.long 0x00 "SW_PAD_CTL85,Software PAD Control 85 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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|
textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x154)++0x03
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line.long 0x00 "SW_PAD_CTL86,Software PAD Control 86 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x158)++0x03
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line.long 0x00 "SW_PAD_CTL87,Software PAD Control 87 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x15C)++0x03
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line.long 0x00 "SW_PAD_CTL88,Software PAD Control 88 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x160)++0x03
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line.long 0x00 "SW_PAD_CTL89,Software PAD Control 89 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x164)++0x03
|
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line.long 0x00 "SW_PAD_CTL90,Software PAD Control 90 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x168)++0x03
|
|
line.long 0x00 "SW_PAD_CTL91,Software PAD Control 91 Register"
|
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x16C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL92,Software PAD Control 92 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x170)++0x03
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line.long 0x00 "SW_PAD_CTL93,Software PAD Control 93 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x174)++0x03
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line.long 0x00 "SW_PAD_CTL94,Software PAD Control 94 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x178)++0x03
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line.long 0x00 "SW_PAD_CTL95,Software PAD Control 95 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x17C)++0x03
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line.long 0x00 "SW_PAD_CTL96,Software PAD Control 96 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x180)++0x03
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line.long 0x00 "SW_PAD_CTL97,Software PAD Control 97 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x184)++0x03
|
|
line.long 0x00 "SW_PAD_CTL98,Software PAD Control 98 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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|
textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x188)++0x03
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line.long 0x00 "SW_PAD_CTL99,Software PAD Control 99 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x18C)++0x03
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line.long 0x00 "SW_PAD_CTL100,Software PAD Control 100 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x190)++0x03
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line.long 0x00 "SW_PAD_CTL101,Software PAD Control 101 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x194)++0x03
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line.long 0x00 "SW_PAD_CTL102,Software PAD Control 102 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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textline " "
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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textline " "
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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textline " "
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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textline " "
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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group (0x158+0x198)++0x03
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line.long 0x00 "SW_PAD_CTL103,Software PAD Control 103 Register"
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bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
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bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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textline " "
|
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bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
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bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
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bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
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bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
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bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x19C)++0x03
|
|
line.long 0x00 "SW_PAD_CTL104,Software PAD Control 104 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
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bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
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bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
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bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
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bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
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bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
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bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
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bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x1A0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL105,Software PAD Control 105 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x1A4)++0x03
|
|
line.long 0x00 "SW_PAD_CTL106,Software PAD Control 106 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x1A8)++0x03
|
|
line.long 0x00 "SW_PAD_CTL107,Software PAD Control 107 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x1AC)++0x03
|
|
line.long 0x00 "SW_PAD_CTL108,Software PAD Control 108 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
group (0x158+0x1B0)++0x03
|
|
line.long 0x00 "SW_PAD_CTL109,Software PAD Control 109 Register"
|
|
bitfld.long 0x00 29. " SW_PAD_CTL[29] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " SW_PAD_CTL[28:27] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " SW_PAD_CTL[26:25] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 24. " SW_PAD_CTL[24] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_PAD_CTL[23] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 21.--22. " SW_PAD_CTL[22:21] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SW_PAD_CTL[20] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
bitfld.long 0x00 19. " SW_PAD_CTL[19] ,Loopback Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " SW_PAD_CTL[18:17] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
bitfld.long 0x00 15.--16. " SW_PAD_CTL[16:15] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SW_PAD_CTL[14] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SW_PAD_CTL[13] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SW_PAD_CTL[12:11] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
bitfld.long 0x00 10. " SW_PAD_CTL[10] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SW_PAD_CTL[9] ,Loopback Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " SW_PAD_CTL[8:7] ,ipp_pke - Signal To Enable The Pull Up Pull Down Or Keeper Capability" "Disabled,Disabled,Keeper,Pull-up/pull-down"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " SW_PAD_CTL[6:5] ,ipp_pus0 ipp_pus1 - Integration-Level Option Bits To Select PU Or PD Strength" "100KOhm PD,100KOhm PU,47KOhm PU,22KOhm PU"
|
|
bitfld.long 0x00 4. " SW_PAD_CTL[4] ,ipp_hys - Hysteresis Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SW_PAD_CTL[3] ,ipp_ode - Open-Drain Control" "CMOS,Open-drain"
|
|
bitfld.long 0x00 1.--2. " SW_PAD_CTL[2:1] ,ipp_dse - Output Drive Strength" "Standard,High,Max,Max"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SW_PAD_CTL[0] ,ipp_sre - Slew Rate Control" "Slow,Fast"
|
|
tree.end
|
|
width 0x14
|
|
tree.end
|
|
tree "1-Wire (1-Wire Interface)"
|
|
base asd:0x43f9c000
|
|
width 0xe
|
|
group 0x00++0x07
|
|
line.word 0x00 "CONTROL,Control Register"
|
|
bitfld.word 0x00 7. " RPP ,Reset Presence Pulse" "No effect,Reset"
|
|
bitfld.word 0x00 6. " PST ,Presence Status" "Not present,Present"
|
|
bitfld.word 0x00 5. " WR0 ,Write 0" "No effect,Write"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WR1 ,Write 1/Read" "No effect,Write"
|
|
bitfld.word 0x00 3. " RDST ,Read Status" "0 sampled,1 sampled"
|
|
line.word 0x02 "TIME_DIVIDER,Time Divider Register"
|
|
hexmask.long.byte 0x02 0.--7. 1. " DVDR ,Predivider Factor"
|
|
line.word 0x04 "RESET, Reset Register"
|
|
bitfld.word 0x04 0. " RST ,Software Reset" "No effect,Reset"
|
|
tree.end
|
|
tree.open "AIPS (AHB-Lite 2.v6 to IP Bus Interface)"
|
|
tree "AIPS 1"
|
|
base asd:0x43f00000
|
|
width 0x9
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MPR_1,Master Privilege Register 1"
|
|
bitfld.long 0x00 31. " MBW0 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " MTR0 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 29. " MTW0 ,Master Trusted For Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 28. " MPL0 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MBW1 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " MTR1 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 25. " MTW1 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 24. " MPL1 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MBW2 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " MTR2 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 21. " MTW2 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 20. " MPL2 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MBW3 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " MTR3 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 17. " MTW3 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 16. " MPL3 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MBW4 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " MTR4 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 13. " MTW4 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 12. " MPL4 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MBW5 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " MTR5 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 9. " MTW5 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 8. " MPL5 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MBW6 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " MTR6 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 5. " MTW6 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 4. " MPL6 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MBW7 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " MTR7 ,Master Trusted for Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 1. " MTW7 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 0. " MPL7 ,Master Privilege Level" "Forced,Not forced"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPR_2,Master Privilege Register 2"
|
|
bitfld.long 0x00 31. " MBW8 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " MTR8 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 29. " MTW8 ,Master Trusted For Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 28. " MPL8 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MBW9 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " MTR9 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 25. " MTW9 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 24. " MPL9 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MBW10 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " MTR10 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 21. " MTW10 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 20. " MPL10 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MBW11 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " MTR11 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 17. " MTW11 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 16. " MPL11 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MBW12 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " MTR12 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 13. " MTW12 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 12. " MPL12 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MBW13 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " MTR13 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 9. " MTW13 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 8. " MPL13 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MBW14 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " MTR14 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 5. " MTW14 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 4. " MPL15 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MBW15 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " MTR15 ,Master Trusted for Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 1. " MTW15 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 0. " MPL15 ,Master Privilege Level" "Forced,Not forced"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PACR_1,Peripheral Access Control Registers 1"
|
|
bitfld.long 0x00 31. " BW0 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP0 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW1 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP1 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW2 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP2 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW3 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP3 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW4 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP4 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW5 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP5 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW6 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP6 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW7 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP7 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PACR_2,Peripheral Access Control Registers 2"
|
|
bitfld.long 0x00 31. " BW8 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP8 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP8 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP8 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW9 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP9 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP9 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP9 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW10 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP10 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP10 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP10 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW11 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP11 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP11 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP11 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW12 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP12 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP12 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP12 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW13 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP13 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP13 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP13 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW14 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP14 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP14 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP14 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW15 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP15 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP15 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP15 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PACR_3,Peripheral Access Control Registers 3"
|
|
bitfld.long 0x00 31. " BW16 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP16 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP16 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP16 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW17 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP17 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP17 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP17 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW18 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP18 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP18 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP18 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW19 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP19 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP19 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP19 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW20 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP20 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP20 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP20 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW21 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP21 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP21 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP21 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW22 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP22 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP22 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP22 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW23 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP23 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP23 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP23 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "PACR_4,Peripheral Access Control Registers 4"
|
|
bitfld.long 0x00 31. " BW24 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP24 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP24 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP24 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW25 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP25 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP25 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP25 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW26 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP26 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP26 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP26 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW27 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP27 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP27 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP27 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW28 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP28 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP28 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP28 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW29 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP29 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP29 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP29 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW30 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP30 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP30 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP30 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW31 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP31 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP31 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP31 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "OPACR_1,Off-Platform Peripheral Access Control Register 1"
|
|
bitfld.long 0x00 31. " BW0 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP0 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW1 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP1 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW2 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP2 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW3 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP3 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW4 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP4 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW5 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP5 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW6 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP6 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW7 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP7 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "OPACR_2,Off-Platform Peripheral Access Control Register 2"
|
|
bitfld.long 0x00 31. " BW8 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP8 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP8 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP8 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW9 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP9 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP9 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP9 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW10 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP10 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP10 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP10 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW11 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP11 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP11 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP11 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW12 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP12 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP12 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP12 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW13 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP13 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP13 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP13 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW14 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP14 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP14 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP14 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW15 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP15 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP15 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP15 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "OPACR_3,Off-Platform Peripheral Access Control Register 3"
|
|
bitfld.long 0x00 31. " BW16 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP16 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP16 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP16 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW17 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP17 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP17 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP17 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW18 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP18 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP18 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP18 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW19 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP19 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP19 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP19 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW20 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP20 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP20 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP20 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW21 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP21 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP21 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP21 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW22 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP22 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP22 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP22 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW23 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP23 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP23 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP23 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "OPACR_4,Off-Platform Peripheral Access Control Register 4"
|
|
bitfld.long 0x00 31. " BW24 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP24 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP24 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP24 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW25 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP25 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP25 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP25 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW26 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP26 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP26 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP26 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW27 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP27 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP27 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP27 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW28 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP28 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP28 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP28 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW29 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP29 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP29 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP29 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW30 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP30 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP30 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP30 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW31 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP31 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP31 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP31 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "OPACR_5,Off-Platform Peripheral Access Control Register 5"
|
|
bitfld.long 0x00 31. " BW32 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP32 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP32 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP32 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW33 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP33 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP33 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP33 ,Trusted Protect" "Not protected,Protected"
|
|
width 0x14
|
|
tree.end
|
|
tree "AIPS 2"
|
|
base asd:0x53f00000
|
|
width 0x9
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MPR_1,Master Privilege Register 1"
|
|
bitfld.long 0x00 31. " MBW0 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " MTR0 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 29. " MTW0 ,Master Trusted For Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 28. " MPL0 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MBW1 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " MTR1 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 25. " MTW1 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 24. " MPL1 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MBW2 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " MTR2 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 21. " MTW2 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 20. " MPL2 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MBW3 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " MTR3 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 17. " MTW3 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 16. " MPL3 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MBW4 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " MTR4 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 13. " MTW4 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 12. " MPL4 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MBW5 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " MTR5 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 9. " MTW5 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 8. " MPL5 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MBW6 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " MTR6 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 5. " MTW6 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 4. " MPL6 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MBW7 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " MTR7 ,Master Trusted for Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 1. " MTW7 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 0. " MPL7 ,Master Privilege Level" "Forced,Not forced"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPR_2,Master Privilege Register 2"
|
|
bitfld.long 0x00 31. " MBW8 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " MTR8 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 29. " MTW8 ,Master Trusted For Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 28. " MPL8 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MBW9 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " MTR9 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 25. " MTW9 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 24. " MPL9 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MBW10 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " MTR10 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 21. " MTW10 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 20. " MPL10 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MBW11 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " MTR11 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 17. " MTW11 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 16. " MPL11 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MBW12 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " MTR12 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 13. " MTW12 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 12. " MPL12 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MBW13 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " MTR13 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 9. " MTW13 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 8. " MPL13 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MBW14 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " MTR14 ,Master Trusted For Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 5. " MTW14 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 4. " MPL15 ,Master Privilege Level" "Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MBW15 ,Master Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " MTR15 ,Master Trusted for Reads" "Not trusted,Trusted"
|
|
bitfld.long 0x00 1. " MTW15 ,Master Trusted for Writes" "Not trusted,Trusted"
|
|
bitfld.long 0x00 0. " MPL15 ,Master Privilege Level" "Forced,Not forced"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PACR_1,Peripheral Access Control Registers 1"
|
|
bitfld.long 0x00 31. " BW0 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP0 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW1 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP1 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW2 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP2 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW3 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP3 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW4 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP4 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW5 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP5 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW6 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP6 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW7 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP7 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PACR_2,Peripheral Access Control Registers 2"
|
|
bitfld.long 0x00 31. " BW8 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP8 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP8 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP8 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW9 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP9 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP9 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP9 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW10 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP10 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP10 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP10 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW11 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP11 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP11 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP11 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW12 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP12 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP12 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP12 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW13 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP13 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP13 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP13 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW14 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP14 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP14 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP14 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW15 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP15 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP15 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP15 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PACR_3,Peripheral Access Control Registers 3"
|
|
bitfld.long 0x00 31. " BW16 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP16 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP16 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP16 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW17 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP17 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP17 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP17 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW18 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP18 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP18 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP18 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW19 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP19 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP19 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP19 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW20 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP20 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP20 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP20 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW21 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP21 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP21 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP21 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW22 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP22 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP22 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP22 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW23 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP23 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP23 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP23 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "PACR_4,Peripheral Access Control Registers 4"
|
|
bitfld.long 0x00 31. " BW24 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP24 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP24 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP24 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW25 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP25 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP25 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP25 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW26 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP26 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP26 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP26 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW27 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP27 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP27 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP27 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW28 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP28 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP28 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP28 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW29 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP29 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP29 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP29 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW30 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP30 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP30 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP30 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW31 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP31 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP31 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP31 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "OPACR_1,Off-Platform Peripheral Access Control Register 1"
|
|
bitfld.long 0x00 31. " BW0 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP0 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW1 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP1 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW2 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP2 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW3 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP3 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW4 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP4 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW5 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP5 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW6 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP6 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW7 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP7 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "OPACR_2,Off-Platform Peripheral Access Control Register 2"
|
|
bitfld.long 0x00 31. " BW8 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP8 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP8 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP8 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW9 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP9 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP9 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP9 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW10 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP10 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP10 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP10 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW11 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP11 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP11 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP11 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW12 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP12 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP12 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP12 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW13 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP13 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP13 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP13 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW14 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP14 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP14 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP14 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW15 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP15 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP15 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP15 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "OPACR_3,Off-Platform Peripheral Access Control Register 3"
|
|
bitfld.long 0x00 31. " BW16 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP16 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP16 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP16 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW17 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP17 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP17 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP17 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW18 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP18 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP18 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP18 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW19 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP19 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP19 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP19 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW20 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP20 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP20 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP20 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW21 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP21 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP21 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP21 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW22 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP22 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP22 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP22 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW23 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP23 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP23 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP23 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "OPACR_4,Off-Platform Peripheral Access Control Register 4"
|
|
bitfld.long 0x00 31. " BW24 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP24 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP24 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP24 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW25 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP25 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP25 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP25 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BW26 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 22. " SP26 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 21. " WP26 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " TP26 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BW27 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 18. " SP27 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 17. " WP27 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 16. " TP27 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BW28 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 14. " SP28 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 13. " WP28 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " TP28 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BW29 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 10. " SP29 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 9. " WP29 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " TP29 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BW30 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 6. " SP30 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 5. " WP30 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " TP30 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BW31 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 2. " SP31 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 1. " WP31 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " TP31 ,Trusted Protect" "Not protected,Protected"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "OPACR_5,Off-Platform Peripheral Access Control Register 5"
|
|
bitfld.long 0x00 31. " BW32 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 30. " SP32 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 29. " WP32 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28. " TP32 ,Trusted Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BW33 ,Buffer Writes" "Not buffered,Buffered"
|
|
bitfld.long 0x00 26. " SP33 ,Supervisor Protect" "Not required,Required"
|
|
bitfld.long 0x00 25. " WP33 ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24. " TP33 ,Trusted Protect" "Not protected,Protected"
|
|
width 0x14
|
|
tree.end
|
|
tree.end
|
|
tree "L2CC (L2 Cache Controller)"
|
|
base asd:0x30000000
|
|
width 0xe
|
|
rgroup 0x00--0x07
|
|
line.long 0x00 "L2CID,L2CC Cache ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RTL_IMPL ,RTL Implementor"
|
|
hexmask.long.byte 0x00 10.--15. 1. " CACHEID ,Input Pins For Layout Implemented"
|
|
bitfld.long 0x00 6.--9. " PARTNUM ,Part Number Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--5. " RTL_REL ,RTL Release Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "L2CT,L2CC Cache Type Register"
|
|
bitfld.long 0x04 25.--28. " CTYPE ,Lockdown Format C" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 20.--23. " L2CACHEWAY ,L2 Cache-Way Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 15.--19. " L2ASSOC ,L2 Associativity" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
bitfld.long 0x04 12.--13. " L2CACHLEN ,L2 Cache Line Length" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " L2CACHEWAY ,L2 Cache-Way Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " L2ASSOC ,L2 Associativity" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--2. " L2CACHLEN ,L2 Cache Line Length" "0,1,2,3,4,5,6,7"
|
|
group 0x100--0x107
|
|
line.long 0x00 "L2CON,L2CC Control Register"
|
|
bitfld.long 0x00 0. " CACHEN ,Cache Enable" "Bypass,Enabled"
|
|
;group 0x104++0x03
|
|
line.long 0x04 "L2AUXCON,L2CC Auxiliary Control Register"
|
|
bitfld.long 0x04 31. " WRAP8DISABLE ,WRAP8 Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 30. " WRAP4DISABLE ,WRAP4 Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 29. " INCRDISABLE ,INCR Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 28. " CLKEN_CORE ,Clock Enable Core" "AHB only,AHB and L2CC"
|
|
textline " "
|
|
bitfld.long 0x04 27. " IDLE8DISABLE ,Idle 8 Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 26. " IDLEPINFORCE ,Idle Pin Force" "Normal,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WRAP2DISABLE ,WRAP2 Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 24. " EXCABORTDIS ,Exclusive Abort Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " WRALLOVER ,Write Allocate Override" "HPROT,Override HPROT"
|
|
bitfld.long 0x04 22. " SHATTOVEREN ,Shared Attribute Override Enable" "Treated as NC,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PARITYENABLE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " EVEMONBUSEN ,Event Monitor Bus Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17.--19. " WAYSIZE ,Way Size" "8KB,16KB,32KB,64KB,128KB,256KB,?..."
|
|
bitfld.long 0x04 13.--16. " ASSOCIATIVITY ,Associativity" "Cache absent,Direct-mapped,2-way cache,3-way cache,4-way cache,5-way cache,6-way cache,7-way cache,8-way cache,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12. " WRAPACCDIS ,WRAP Accesses Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 9.--11. " CYCLATFORDIRTYRAM ,Cycles Of Latency For Dirty RAM " "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
textline " "
|
|
bitfld.long 0x04 6.--8. " CYCLATFORTAGRAM ,Cycles Of Latency For Tag RAM" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x04 3.--5. " CYCLATFORDATARAMWR ,Cycles Of Latency For Data RAM Writes" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " CYCLATFORDATARAMRE ,Cycles Of Latency For Data RAM Reads" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
rgroup 0x7b0++0x03
|
|
line.long 0x00 "CLNLINPA,Clean Line By PA Register"
|
|
rgroup 0x7b8++0x03
|
|
line.long 0x00 "CLNLININWAY,Clean Line By Index/Way Register"
|
|
rgroup 0x770++0x03
|
|
line.long 0x00 "INVLINPA,Invalidate Line By PA Register"
|
|
rgroup 0x7f0++0x03
|
|
line.long 0x00 "CLNINVLINPA,Clean And Invalidate Line By PA Register"
|
|
rgroup 0x7f8++0x03
|
|
line.long 0x00 "CLNINVLININD,Clean And Invalidate Line By Index/Way Register"
|
|
rgroup 0x730++0x03
|
|
line.long 0x00 "CACHESYNC,Cache Sync Register"
|
|
group 0x77c++0x03
|
|
line.long 0x00 "INVWAY,Invalidate by Way Register"
|
|
group 0x7bc++0x03
|
|
line.long 0x00 "CLNWAY,Clean By Way Register"
|
|
group 0x7fc++0x03
|
|
line.long 0x00 "CLINVWAY,Clean And Invalidate By Way Register"
|
|
group 0x900--0x907
|
|
line.long 0x00 "L2LDWDS,L2 Lockdown By Way-D Side Register"
|
|
line.long 0x04 "L2LDWIS,L2 Lockdown By Way-I Sude Register"
|
|
rgroup 0xf00++0x03
|
|
line.long 0x00 "L2TESTOP,Test Operation Register"
|
|
group 0xf10--0xf2f
|
|
line.long 0x00 "L2LINDATA0,L2 Line Data 0 Register"
|
|
line.long 0x04 "L2LINDATA1,L2 Line Data 1 Register"
|
|
line.long 0x08 "L2LINDATA2,L2 Line Data 2 Register"
|
|
line.long 0x0c "L2LINDATA3,L2 Line Data 3 Register"
|
|
line.long 0x10 "L2LINDATA4,L2 Line Data 4 Register"
|
|
line.long 0x14 "L2LINDATA5,L2 Line Data 5 Register"
|
|
line.long 0x18 "L2LINDATA6,L2 Line Data 6 Register"
|
|
line.long 0x1c "L2LINDATA7,L2 Line Data 7 Register"
|
|
group 0xf30++0x03
|
|
line.long 0x00 "L2LINTAG,L2 Line Tag Register"
|
|
hexmask.long.tbyte 0x00 13.--31. 1. " TAG ,TAG"
|
|
bitfld.long 0x00 12. " VALID ,Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 11. " DIRTY1 ,Dirty 1" "Low,High"
|
|
bitfld.long 0x00 10. " DIRTY0 ,Dirty 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7.--9. " VICTIMPOINTER ,Victim Pointer" "0,1,2,3,4,5,6,7"
|
|
group 0xf40++0x03
|
|
line.long 0x00 "L2DEBCON,L2CC Debug Control Register"
|
|
bitfld.long 0x00 1. " DWB ,Disable Write-Back" "Enabled,Forced"
|
|
bitfld.long 0x00 0. " DCL ,Disable Cache Linefill" "Enabled,Disabled"
|
|
width 0x14
|
|
tree.end
|
|
tree "EVTMON (ARM11 Event Monitor)"
|
|
base asd:0x43f08000
|
|
width 0x7
|
|
group 0x00--0x17
|
|
line.long 0x00 "EMMC,Monitor Control Register"
|
|
bitfld.long 0x00 11. " EMC3RST ,Counter 3 Reset" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " EMC2RST ,Counter 2 Reset" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " EMC1RST ,Counter 1 Reset" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " EMC0RST ,Counter 0 Reset" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " INTPULDUR ,Interrupt Pulse Duration" "1 CLK cycle,2 CLK cycles,4 CLK cycles,8 CLK cycles,16 CLK cycles,32 CLK cycles,64 CLK cycles,128 CLK cycles"
|
|
bitfld.long 0x00 2. " POL ,Interrupt Polarity" "Low,High"
|
|
bitfld.long 0x00 1. " TYPE ,Interrupt Type" "Level,Edge"
|
|
bitfld.long 0x00 0. " EVTMONEN ,Event Monitor Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "EMCS,Counter Status Register"
|
|
eventfld.long 0x04 3. " EMC3 ,Event Counter 3 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 2. " EMC2 ,Event Counter 2 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 1. " EMC1 ,Event Counter 1 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " EMC0 ,Event Counter 0 Flag" "Not occurred,Occurred"
|
|
;group 0x08++0x03
|
|
line.long (0x08+0x0) "EMCC0,Counter 0 Configuration Register"
|
|
bitfld.long (0x08+0x0) 2.--5. " SOURCE ,Counter Event Source" "Counter disabled,Buffered write abort,L2 cache,Data read hit,Data read request,Data write hit,Data write request/WR-through,Data write request,Instruction read hit,Instruction read request,Write allocate,EMC3 overflow,EMC2 overflow,EMC1 overflow,EMC0 overflow,CLK cycle"
|
|
bitfld.long (0x08+0x0) 1. " FLAG ,Counter Flag Set Condition" "Overflowed,Incremented"
|
|
bitfld.long (0x08+0x0) 0. " INTEN ,Counter Interrupt Generation Enable" "No interrupt,Interrupt"
|
|
;group 0x08++0x03
|
|
line.long (0x08+0x4) "EMCC1,Counter 1 Configuration Register"
|
|
bitfld.long (0x08+0x4) 2.--5. " SOURCE ,Counter Event Source" "Counter disabled,Buffered write abort,L2 cache,Data read hit,Data read request,Data write hit,Data write request/WR-through,Data write request,Instruction read hit,Instruction read request,Write allocate,EMC3 overflow,EMC2 overflow,EMC1 overflow,EMC0 overflow,CLK cycle"
|
|
bitfld.long (0x08+0x4) 1. " FLAG ,Counter Flag Set Condition" "Overflowed,Incremented"
|
|
bitfld.long (0x08+0x4) 0. " INTEN ,Counter Interrupt Generation Enable" "No interrupt,Interrupt"
|
|
;group 0x08++0x03
|
|
line.long (0x08+0x8) "EMCC2,Counter 2 Configuration Register"
|
|
bitfld.long (0x08+0x8) 2.--5. " SOURCE ,Counter Event Source" "Counter disabled,Buffered write abort,L2 cache,Data read hit,Data read request,Data write hit,Data write request/WR-through,Data write request,Instruction read hit,Instruction read request,Write allocate,EMC3 overflow,EMC2 overflow,EMC1 overflow,EMC0 overflow,CLK cycle"
|
|
bitfld.long (0x08+0x8) 1. " FLAG ,Counter Flag Set Condition" "Overflowed,Incremented"
|
|
bitfld.long (0x08+0x8) 0. " INTEN ,Counter Interrupt Generation Enable" "No interrupt,Interrupt"
|
|
;group 0x08++0x03
|
|
line.long (0x08+0xC) "EMCC3,Counter 3 Configuration Register"
|
|
bitfld.long (0x08+0xC) 2.--5. " SOURCE ,Counter Event Source" "Counter disabled,Buffered write abort,L2 cache,Data read hit,Data read request,Data write hit,Data write request/WR-through,Data write request,Instruction read hit,Instruction read request,Write allocate,EMC3 overflow,EMC2 overflow,EMC1 overflow,EMC0 overflow,CLK cycle"
|
|
bitfld.long (0x08+0xC) 1. " FLAG ,Counter Flag Set Condition" "Overflowed,Incremented"
|
|
bitfld.long (0x08+0xC) 0. " INTEN ,Counter Interrupt Generation Enable" "No interrupt,Interrupt"
|
|
rgroup (0x18+0x0)++0x03
|
|
line.long 0x00 "EMC0,Counter 0 Registers"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Bits"
|
|
rgroup (0x18+0x4)++0x03
|
|
line.long 0x00 "EMC1,Counter 1 Registers"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Bits"
|
|
rgroup (0x18+0x8)++0x03
|
|
line.long 0x00 "EMC2,Counter 2 Registers"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Bits"
|
|
rgroup (0x18+0xC)++0x03
|
|
line.long 0x00 "EMC3,Counter 3 Registers"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Bits"
|
|
width 0x14
|
|
tree.end
|
|
tree "AVIC (ARM1136JF-S Interrupt Controller)"
|
|
base asd:0x68000000
|
|
width 0x0d
|
|
group 0x00--0x40
|
|
line.long 0x00 "INTCNTL,Interrupt Control Register"
|
|
bitfld.long 0x00 25. " ABFLAG ,Core Arbitration Prioritization Risen Flag" "Not affected,Rising"
|
|
eventfld.long 0x00 24. " ABFEN ,ABFLAG Sticky Enable" "Normal,Sticky"
|
|
bitfld.long 0x00 22. " NIDIS ,Normal Interrupt Disable" "Not affected,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FIDIS ,Fast Interrupt Disable" "Not affected,Disabled"
|
|
bitfld.long 0x00 20. " NIAD ,Normal Interrupt Arbiter Rise ARM Level" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " FIAD ,Fast Interrupt Arbiter Rise ARM Level" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " NM ,Normal Interrupt Mode Control" "Software,Hardware"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "NIMASK,Normal Interrupt Mask Register"
|
|
bitfld.long 0x04 0.--4. " NIMASK ,Normal Interrupt Mask" "Disabled priority level 0,Disabled priority level 1,Disabled priority level 2,Disabled priority level 3,Disabled priority level 4,Disabled priority level 5,Disabled priority level 6,Disabled priority level 7,Disabled priority level 8,Disabled priority level 9,Disabled priority level 10,Disabled priority level 11,Disabled priority level 12,Disabled priority level 13,Disabled priority level 14,Disabled all,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "INTENNUM,Interrupt Enable Number Register"
|
|
bitfld.long 0x08 0.--5. " ENNUM ,Interrupt Enable Number" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 8,Source 9,Source 10,Source 11,Source 12,Source 13,Source 14,Source 15,Source 16,Source 17,Source 18,Source 19,Source 20,Source 21,Source 22,Source 23,Source 24,Source 25,Source 26,Source 27,Source 28,Source 29,Source 30,Source 31,Source 32,Source 33,Source 34,Source 35,Source 36,Source 37,Source 38,Source 39,Source 40,Source 41,Source 42,Source 43,Source 44,Source 45,Source 46,Source 47,Source 48,Source 49,Source 50,Source 51,Source 52,Source 53,Source 54,Source 55,Source 56,Source 57,Source 58,Source 59,Source 60,Source 61,Source 62,Source 63"
|
|
;group 0xc++0c03
|
|
line.long 0xc "INTDISNUM,Interrupt Disable Number Register"
|
|
bitfld.long 0x0c 0.--5. " DISNUM ,Interrupt Disable Number" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 8,Source 9,Source 10,Source 11,Source 12,Source 13,Source 14,Source 15,Source 16,Source 17,Source 18,Source 19,Source 20,Source 21,Source 22,Source 23,Source 24,Source 25,Source 26,Source 27,Source 28,Source 29,Source 30,Source 31,Source 32,Source 33,Source 34,Source 35,Source 36,Source 37,Source 38,Source 39,Source 40,Source 41,Source 42,Source 43,Source 44,Source 45,Source 46,Source 47,Source 48,Source 49,Source 50,Source 51,Source 52,Source 53,Source 54,Source 55,Source 56,Source 57,Source 58,Source 59,Source 60,Source 61,Source 62,Source 63"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "INTENABLEH,Interrupt Enable Register High"
|
|
bitfld.long 0x10 31. " INTENABLE63 ,Interrupt Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " INTENABLE62 ,Interrupt Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " INTENABLE61 ,Interrupt Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " INTENABLE60 ,Interrupt Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " INTENABLE59 ,Interrupt Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " INTENABLE58 ,Interrupt Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " INTENABLE57 ,Interrupt Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " INTENABLE56 ,Interrupt Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " INTENABLE55 ,Interrupt Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " INTENABLE54 ,Interrupt Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " INTENABLE53 ,Interrupt Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " INTENABLE52 ,Interrupt Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " INTENABLE51 ,Interrupt Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " INTENABLE50 ,Interrupt Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " INTENABLE49 ,Interrupt Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " INTENABLE48 ,Interrupt Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " INTENABLE47 ,Interrupt Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " INTENABLE46 ,Interrupt Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " INTENABLE45 ,Interrupt Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " INTENABLE44 ,Interrupt Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " INTENABLE43 ,Interrupt Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " INTENABLE42 ,Interrupt Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " INTENABLE41 ,Interrupt Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " INTENABLE40 ,Interrupt Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " INTENABLE39 ,Interrupt Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " INTENABLE38 ,Interrupt Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " INTENABLE37 ,Interrupt Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " INTENABLE36 ,Interrupt Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " INTENABLE35 ,Interrupt Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " INTENABLE34 ,Interrupt Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " INTENABLE33 ,Interrupt Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " INTENABLE32 ,Interrupt Enable 32" "Disabled,Enabled"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "INTENABLEL,Interrupt Enable Register Low"
|
|
bitfld.long 0x14 31. " INTENABLE31 ,Interrupt Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " INTENABLE30 ,Interrupt Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x14 29. " INTENABLE29 ,Interrupt Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 28. " INTENABLE28 ,Interrupt Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x14 27. " INTENABLE27 ,Interrupt Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x14 26. " INTENABLE26 ,Interrupt Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 25. " INTENABLE25 ,Interrupt Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " INTENABLE24 ,Interrupt Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x14 23. " INTENABLE23 ,Interrupt Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 22. " INTENABLE22 ,Interrupt Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " INTENABLE21 ,Interrupt Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " INTENABLE20 ,Interrupt Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 19. " INTENABLE19 ,Interrupt Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x14 18. " INTENABLE18 ,Interrupt Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x14 17. " INTENABLE17 ,Interrupt Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16. " INTENABLE16 ,Interrupt Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x14 15. " INTENABLE15 ,Interrupt Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " INTENABLE14 ,Interrupt Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 13. " INTENABLE13 ,Interrupt Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x14 12. " INTENABLE12 ,Interrupt Enable 12 " "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " INTENABLE11 ,Interrupt Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 10. " INTENABLE10 ,Interrupt Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " INTENABLE9 ,Interrupt Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " INTENABLE8 ,Interrupt Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " INTENABLE7 ,Interrupt Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " INTENABLE6 ,Interrupt Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " INTENABLE5 ,Interrupt Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " INTENABLE4 ,Interrupt Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " INTENABLE3 ,Interrupt Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " INTENABLE2 ,Interrupt Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " INTENABLE1 ,Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " INTENABLE0 ,Interrupt Enable 0" "Disabled,Enabled"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "INTTYPEH,Interrupt Type Register High"
|
|
bitfld.long 0x18 31. " INTTYPE63 ,Interrupt Type 63" "Normal,Fast"
|
|
bitfld.long 0x18 30. " INTTYPE62 ,Interrupt Type 62" "Normal,Fast"
|
|
bitfld.long 0x18 29. " INTTYPE61 ,Interrupt Type 61" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 28. " INTTYPE60 ,Interrupt Type 60" "Normal,Fast"
|
|
bitfld.long 0x18 27. " INTTYPE59 ,Interrupt Type 59" "Normal,Fast"
|
|
bitfld.long 0x18 26. " INTTYPE58 ,Interrupt Type 58" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 25. " INTTYPE57 ,Interrupt Type 57" "Normal,Fast"
|
|
bitfld.long 0x18 24. " INTTYPE56 ,Interrupt Type 56" "Normal,Fast"
|
|
bitfld.long 0x18 23. " INTTYPE55 ,Interrupt Type 55" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 22. " INTTYPE54 ,Interrupt Type 54" "Normal,Fast"
|
|
bitfld.long 0x18 21. " INTTYPE53 ,Interrupt Type 53" "Normal,Fast"
|
|
bitfld.long 0x18 20. " INTTYPE52 ,Interrupt Type 52" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 19. " INTTYPE51 ,Interrupt Type 51" "Normal,Fast"
|
|
bitfld.long 0x18 18. " INTTYPE50 ,Interrupt Type 50" "Normal,Fast"
|
|
bitfld.long 0x18 17. " INTTYPE49 ,Interrupt Type 49" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 16. " INTTYPE48 ,Interrupt Type 48" "Normal,Fast"
|
|
bitfld.long 0x18 15. " INTTYPE47 ,Interrupt Type 47" "Normal,Fast"
|
|
bitfld.long 0x18 14. " INTTYPE46 ,Interrupt Type 46" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 13. " INTTYPE45 ,Interrupt Type 45" "Normal,Fast"
|
|
bitfld.long 0x18 12. " INTTYPE44 ,Interrupt Type 44" "Normal,Fast"
|
|
bitfld.long 0x18 11. " INTTYPE43 ,Interrupt Type 43" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 10. " INTTYPE42 ,Interrupt Type 42" "Normal,Fast"
|
|
bitfld.long 0x18 9. " INTTYPE41 ,Interrupt Type 41" "Normal,Fast"
|
|
bitfld.long 0x18 8. " INTTYPE40 ,Interrupt Type 40" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 7. " INTTYPE39 ,Interrupt Type 39" "Normal,Fast"
|
|
bitfld.long 0x18 6. " INTTYPE38 ,Interrupt Type 38" "Normal,Fast"
|
|
bitfld.long 0x18 5. " INTTYPE37 ,Interrupt Type 37" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 4. " INTTYPE36 ,Interrupt Type 36" "Normal,Fast"
|
|
bitfld.long 0x18 3. " INTTYPE35 ,Interrupt Type 35" "Normal,Fast"
|
|
bitfld.long 0x18 2. " INTTYPE34 ,Interrupt Type 34" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x18 1. " INTTYPE33 ,Interrupt Type 33" "Normal,Fast"
|
|
bitfld.long 0x18 0. " INTTYPE32 ,Interrupt Type 32" "Normal,Fast"
|
|
;group 0x1c++0x03
|
|
line.long 0x1c "INTTYPEL,Interrupt Type Register Low"
|
|
bitfld.long 0x1C 31. " INTTYPE31 ,Interrupt Type 31" "Normal,Fast"
|
|
bitfld.long 0x1C 30. " INTTYPE30 ,Interrupt Type 30" "Normal,Fast"
|
|
bitfld.long 0x1C 29. " INTTYPE29 ,Interrupt Type 29" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " INTTYPE28 ,Interrupt Type 28" "Normal,Fast"
|
|
bitfld.long 0x1C 27. " INTTYPE27 ,Interrupt Type 27" "Normal,Fast"
|
|
bitfld.long 0x1C 26. " INTTYPE26 ,Interrupt Type 26" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " INTTYPE25 ,Interrupt Type 25" "Normal,Fast"
|
|
bitfld.long 0x1C 24. " INTTYPE24 ,Interrupt Type 24" "Normal,Fast"
|
|
bitfld.long 0x1C 23. " INTTYPE23 ,Interrupt Type 23" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " INTTYPE22 ,Interrupt Type 22" "Normal,Fast"
|
|
bitfld.long 0x1C 21. " INTTYPE21 ,Interrupt Type 21" "Normal,Fast"
|
|
bitfld.long 0x1C 20. " INTTYPE20 ,Interrupt Type 20" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " INTTYPE19 ,Interrupt Type 19" "Normal,Fast"
|
|
bitfld.long 0x1C 18. " INTTYPE18 ,Interrupt Type 18" "Normal,Fast"
|
|
bitfld.long 0x1C 17. " INTTYPE17 ,Interrupt Type 17" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " INTTYPE16 ,Interrupt Type 16" "Normal,Fast"
|
|
bitfld.long 0x1C 15. " INTTYPE15 ,Interrupt Type 15" "Normal,Fast"
|
|
bitfld.long 0x1C 14. " INTTYPE14 ,Interrupt Type 14" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " INTTYPE13 ,Interrupt Type 13" "Normal,Fast"
|
|
bitfld.long 0x1C 12. " INTTYPE12 ,Interrupt Type 12" "Normal,Fast"
|
|
bitfld.long 0x1C 11. " INTTYPE11 ,Interrupt Type 11" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " INTTYPE10 ,Interrupt Type 10" "Normal,Fast"
|
|
bitfld.long 0x1C 9. " INTTYPE9 ,Interrupt Type 9" "Normal,Fast"
|
|
bitfld.long 0x1C 8. " INTTYPE8 ,Interrupt Type 8" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " INTTYPE7 ,Interrupt Type 7" "Normal,Fast"
|
|
bitfld.long 0x1C 6. " INTTYPE6 ,Interrupt Type 6" "Normal,Fast"
|
|
bitfld.long 0x1C 5. " INTTYPE5 ,Interrupt Type 5" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " INTTYPE4 ,Interrupt Type 4" "Normal,Fast"
|
|
bitfld.long 0x1C 3. " INTTYPE3 ,Interrupt Type 3" "Normal,Fast"
|
|
bitfld.long 0x1C 2. " INTTYPE2 ,Interrupt Type 2" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " INTTYPE1 ,Interrupt Type 1" "Normal,Fast"
|
|
bitfld.long 0x1C 0. " INTTYPE0 ,Interrupt Type 0" "Normal,Fast"
|
|
;group 0x20++0x03
|
|
line.long 0x20 "NIPRIORITY7,Normal Interrupt Priority Level Register 7"
|
|
bitfld.long 0x20 28.--31. " NIPR63 ,Normal Interrupt Priority Level 63" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 24.--27. " NIPR62 ,Normal Interrupt Priority Level 62" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 20.--23. " NIPR61 ,Normal Interrupt Priority Level 61" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 16.--19. " NIPR60 ,Normal Interrupt Priority Level 60" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x20 12.--15. " NIPR59 ,Normal Interrupt Priority Level 59" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 8.--11. " NIPR58 ,Normal Interrupt Priority Level 58" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 4.--7. " NIPR57 ,Normal Interrupt Priority Level 57" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x20 0.--3. " NIPR56 ,Normal Interrupt Priority Level 56" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x24++0x03
|
|
line.long 0x24 "NIPRIORITY6,Normal Interrupt Priority Level Register 6"
|
|
bitfld.long 0x24 28.--31. " NIPR55 ,Normal Interrupt Priority Level 55" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 24.--27. " NIPR54 ,Normal Interrupt Priority Level 54" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 20.--23. " NIPR53 ,Normal Interrupt Priority Level 53" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 16.--19. " NIPR52 ,Normal Interrupt Priority Level 52" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x24 12.--15. " NIPR51 ,Normal Interrupt Priority Level 51" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 8.--11. " NIPR50 ,Normal Interrupt Priority Level 50" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 4.--7. " NIPR49 ,Normal Interrupt Priority Level 49" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x24 0.--3. " NIPR48 ,Normal Interrupt Priority Level 48" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x28++0x03
|
|
line.long 0x28 "NIPRIORITY5,Normal Interrupt Priority Level Register 5"
|
|
bitfld.long 0x28 28.--31. " NIPR47 ,Normal Interrupt Priority Level 47" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 24.--27. " NIPR46 ,Normal Interrupt Priority Level 46" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 20.--23. " NIPR45 ,Normal Interrupt Priority Level 45" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 16.--19. " NIPR44 ,Normal Interrupt Priority Level 44" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x28 12.--15. " NIPR43 ,Normal Interrupt Priority Level 43" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 8.--11. " NIPR42 ,Normal Interrupt Priority Level 42" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 4.--7. " NIPR41 ,Normal Interrupt Priority Level 41" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x28 0.--3. " NIPR40 ,Normal Interrupt Priority Level 40" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x2c++0x03
|
|
line.long 0x2c "NIPRIORITY4,Normal Interrupt Priority Level Register 4"
|
|
bitfld.long 0x2C 28.--31. " NIPR39 ,Normal Interrupt Priority Level 39" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 24.--27. " NIPR38 ,Normal Interrupt Priority Level 38" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 20.--23. " NIPR37 ,Normal Interrupt Priority Level 37" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 16.--19. " NIPR36 ,Normal Interrupt Priority Level 36" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x2C 12.--15. " NIPR35 ,Normal Interrupt Priority Level 35" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 8.--11. " NIPR34 ,Normal Interrupt Priority Level 34" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 4.--7. " NIPR33 ,Normal Interrupt Priority Level 33" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x2C 0.--3. " NIPR32 ,Normal Interrupt Priority Level 32" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x30++0x03
|
|
line.long 0x30 "NIPRIORITY3,Normal Interrupt Priority Level Register 3"
|
|
bitfld.long 0x30 28.--31. " NIPR31 ,Normal Interrupt Priority Level 31" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 24.--27. " NIPR30 ,Normal Interrupt Priority Level 30" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 20.--23. " NIPR29 ,Normal Interrupt Priority Level 29" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 16.--19. " NIPR28 ,Normal Interrupt Priority Level 28" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x30 12.--15. " NIPR27 ,Normal Interrupt Priority Level 27" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 8.--11. " NIPR26 ,Normal Interrupt Priority Level 26" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 4.--7. " NIPR25 ,Normal Interrupt Priority Level 25" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x30 0.--3. " NIPR24 ,Normal Interrupt Priority Level 24" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x34++0x03
|
|
line.long 0x34 "NIPRIORITY2,Normal Interrupt Priority Level Register 2"
|
|
bitfld.long 0x34 28.--31. " NIPR23 ,Normal Interrupt Priority Level 23" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 24.--27. " NIPR22 ,Normal Interrupt Priority Level 22" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 20.--23. " NIPR21 ,Normal Interrupt Priority Level 21" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 16.--19. " NIPR20 ,Normal Interrupt Priority Level 20" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x34 12.--15. " NIPR19 ,Normal Interrupt Priority Level 19" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 8.--11. " NIPR18 ,Normal Interrupt Priority Level 18" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 4.--7. " NIPR17 ,Normal Interrupt Priority Level 17" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x34 0.--3. " NIPR16 ,Normal Interrupt Priority Level 16" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x38++0x03
|
|
line.long 0x38 "NIPRIORITY1,Normal Interrupt Priority Level Register 1"
|
|
bitfld.long 0x38 28.--31. " NIPR15 ,Normal Interrupt Priority Level 15" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 24.--27. " NIPR14 ,Normal Interrupt Priority Level 14" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 20.--23. " NIPR13 ,Normal Interrupt Priority Level 13" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 16.--19. " NIPR12 ,Normal Interrupt Priority Level 12" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x38 12.--15. " NIPR11 ,Normal Interrupt Priority Level 11" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 8.--11. " NIPR10 ,Normal Interrupt Priority Level 10" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 4.--7. " NIPR9 ,Normal Interrupt Priority Level 9" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x38 0.--3. " NIPR8 ,Normal Interrupt Priority Level 8" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
;group 0x3c++0x03
|
|
line.long 0x3c "NIPRIORITY0,Normal Interrupt Priority Level Register 0"
|
|
bitfld.long 0x3C 28.--31. " NIPR7 ,Normal Interrupt Priority Level 7" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 24.--27. " NIPR6 ,Normal Interrupt Priority Level 6" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 20.--23. " NIPR5 ,Normal Interrupt Priority Level 5" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 16.--19. " NIPR4 ,Normal Interrupt Priority Level 4" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
textline " "
|
|
bitfld.long 0x3C 12.--15. " NIPR3 ,Normal Interrupt Priority Level 3" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 8.--11. " NIPR2 ,Normal Interrupt Priority Level 2" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 4.--7. " NIPR1 ,Normal Interrupt Priority Level 1" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
bitfld.long 0x3C 0.--3. " NIPR0 ,Normal Interrupt Priority Level 0" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup 0x40--0x50
|
|
line.long 0x00 "NIVECSR,Normal Interrupt Vector And Status"
|
|
hexmask.long.word 0x00 16.--31. 1. " NIVECTOR ,Normal Interrupt Vector"
|
|
hexmask.long.word 0x00 0.--15. 1. " NIPRILVL ,Normal Interrupt Priority Level"
|
|
;rgroup 0x44++0x03
|
|
line.long 0x04 "FIVECSR,Fast Interrupt Vector And Status Register"
|
|
hexmask.long 0x04 0.--31. 1. " FIVECTOR ,Fast Interrupt Vector"
|
|
;rgroup 0x48++0x03
|
|
line.long 0x08 "INTSRCH,Interrupt Source Register High"
|
|
bitfld.long 0x08 31. " INTIN63 ,Interrupt Source 63" "Negated,Asserted"
|
|
bitfld.long 0x08 30. " INTIN62 ,Interrupt Source 62" "Negated,Asserted"
|
|
bitfld.long 0x08 29. " INTIN61 ,Interrupt Source 61" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 28. " INTIN60 ,Interrupt Source 60" "Negated,Asserted"
|
|
bitfld.long 0x08 27. " INTIN59 ,Interrupt Source 59" "Negated,Asserted"
|
|
bitfld.long 0x08 26. " INTIN58 ,Interrupt Source 58" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 25. " INTIN57 ,Interrupt Source 57" "Negated,Asserted"
|
|
bitfld.long 0x08 24. " INTIN56 ,Interrupt Source 56" "Negated,Asserted"
|
|
bitfld.long 0x08 23. " INTIN55 ,Interrupt Source 55" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 22. " INTIN54 ,Interrupt Source 54" "Negated,Asserted"
|
|
bitfld.long 0x08 21. " INTIN53 ,Interrupt Source 53" "Negated,Asserted"
|
|
bitfld.long 0x08 20. " INTIN52 ,Interrupt Source 52" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INTIN51 ,Interrupt Source 51" "Negated,Asserted"
|
|
bitfld.long 0x08 18. " INTIN50 ,Interrupt Source 50" "Negated,Asserted"
|
|
bitfld.long 0x08 17. " INTIN49 ,Interrupt Source 49" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 16. " INTIN48 ,Interrupt Source 48" "Negated,Asserted"
|
|
bitfld.long 0x08 15. " INTIN47 ,Interrupt Source 47" "Negated,Asserted"
|
|
bitfld.long 0x08 14. " INTIN46 ,Interrupt Source 46" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " INTIN45 ,Interrupt Source 45" "Negated,Asserted"
|
|
bitfld.long 0x08 12. " INTIN44 ,Interrupt Source 44" "Negated,Asserted"
|
|
bitfld.long 0x08 11. " INTIN43 ,Interrupt Source 43" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " INTIN42 ,Interrupt Source 42" "Negated,Asserted"
|
|
bitfld.long 0x08 9. " INTIN41 ,Interrupt Source 41" "Negated,Asserted"
|
|
bitfld.long 0x08 8. " INTIN40 ,Interrupt Source 40" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INTIN39 ,Interrupt Source 39" "Negated,Asserted"
|
|
bitfld.long 0x08 6. " INTIN38 ,Interrupt Source 38" "Negated,Asserted"
|
|
bitfld.long 0x08 5. " INTIN37 ,Interrupt Source 37" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " INTIN36 ,Interrupt Source 36" "Negated,Asserted"
|
|
bitfld.long 0x08 3. " INTIN35 ,Interrupt Source 35" "Negated,Asserted"
|
|
bitfld.long 0x08 2. " INTIN34 ,Interrupt Source 34" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INTIN33 ,Interrupt Source 33" "Negated,Asserted"
|
|
bitfld.long 0x08 0. " INTIN32 ,Interrupt Source 32" "Negated,Asserted"
|
|
;rgroup 0x4c++0x03
|
|
line.long 0x0c "INTSRCL,Interrupt Source Register Low"
|
|
bitfld.long 0x0C 31. " INTIN31 ,Interrupt Source 31" "Negated,Asserted"
|
|
bitfld.long 0x0C 30. " INTIN30 ,Interrupt Source 30" "Negated,Asserted"
|
|
bitfld.long 0x0C 29. " INTIN29 ,Interrupt Source 29" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " INTIN28 ,Interrupt Source 28" "Negated,Asserted"
|
|
bitfld.long 0x0C 27. " INTIN27 ,Interrupt Source 27" "Negated,Asserted"
|
|
bitfld.long 0x0C 26. " INTIN26 ,Interrupt Source 26" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " INTIN25 ,Interrupt Source 25" "Negated,Asserted"
|
|
bitfld.long 0x0C 24. " INTIN24 ,Interrupt Source 24" "Negated,Asserted"
|
|
bitfld.long 0x0C 23. " INTIN23 ,Interrupt Source 23" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " INTIN22 ,Interrupt Source 22" "Negated,Asserted"
|
|
bitfld.long 0x0C 21. " INTIN21 ,Interrupt Source 21" "Negated,Asserted"
|
|
bitfld.long 0x0C 20. " INTIN20 ,Interrupt Source 20" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INTIN19 ,Interrupt Source 19" "Negated,Asserted"
|
|
bitfld.long 0x0C 18. " INTIN18 ,Interrupt Source 18" "Negated,Asserted"
|
|
bitfld.long 0x0C 17. " INTIN17 ,Interrupt Source 17" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " INTIN16 ,Interrupt Source 16" "Negated,Asserted"
|
|
bitfld.long 0x0C 15. " INTIN15 ,Interrupt Source 15" "Negated,Asserted"
|
|
bitfld.long 0x0C 14. " INTIN14 ,Interrupt Source 14" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " INTIN13 ,Interrupt Source 13" "Negated,Asserted"
|
|
bitfld.long 0x0C 12. " INTIN12 ,Interrupt Source 12" "Negated,Asserted"
|
|
bitfld.long 0x0C 11. " INTIN11 ,Interrupt Source 11" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " INTIN10 ,Interrupt Source 10" "Negated,Asserted"
|
|
bitfld.long 0x0C 9. " INTIN9 ,Interrupt Source 9" "Negated,Asserted"
|
|
bitfld.long 0x0C 8. " INTIN8 ,Interrupt Source 8" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INTIN7 ,Interrupt Source 7" "Negated,Asserted"
|
|
bitfld.long 0x0C 6. " INTIN6 ,Interrupt Source 6" "Negated,Asserted"
|
|
bitfld.long 0x0C 5. " INTIN5 ,Interrupt Source 5" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " INTIN4 ,Interrupt Source 4" "Negated,Asserted"
|
|
bitfld.long 0x0C 3. " INTIN3 ,Interrupt Source 3" "Negated,Asserted"
|
|
bitfld.long 0x0C 2. " INTIN2 ,Interrupt Source 2" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " INTIN1 ,Interrupt Source 1" "Negated,Asserted"
|
|
bitfld.long 0x0C 0. " INTIN0 ,Interrupt Source 0" "Negated,Asserted"
|
|
group 0x50--0x58
|
|
line.long 0x00 "INTFRCH,Interrupt Force Register High"
|
|
bitfld.long 0x00 31. " FORCE63 ,Interrupt Source Force Request 63" "Standard,Forced"
|
|
bitfld.long 0x00 30. " FORCE62 ,Interrupt Source Force Request 62" "Standard,Forced"
|
|
bitfld.long 0x00 29. " FORCE61 ,Interrupt Source Force Request 61" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FORCE60 ,Interrupt Source Force Request 60" "Standard,Forced"
|
|
bitfld.long 0x00 27. " FORCE59 ,Interrupt Source Force Request 59" "Standard,Forced"
|
|
bitfld.long 0x00 26. " FORCE58 ,Interrupt Source Force Request 58" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FORCE57 ,Interrupt Source Force Request 57" "Standard,Forced"
|
|
bitfld.long 0x00 24. " FORCE56 ,Interrupt Source Force Request 56" "Standard,Forced"
|
|
bitfld.long 0x00 23. " FORCE55 ,Interrupt Source Force Request 55" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FORCE54 ,Interrupt Source Force Request 54" "Standard,Forced"
|
|
bitfld.long 0x00 21. " FORCE53 ,Interrupt Source Force Request 53" "Standard,Forced"
|
|
bitfld.long 0x00 20. " FORCE52 ,Interrupt Source Force Request 52" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FORCE51 ,Interrupt Source Force Request 51" "Standard,Forced"
|
|
bitfld.long 0x00 18. " FORCE50 ,Interrupt Source Force Request 50" "Standard,Forced"
|
|
bitfld.long 0x00 17. " FORCE49 ,Interrupt Source Force Request 49" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FORCE48 ,Interrupt Source Force Request 48" "Standard,Forced"
|
|
bitfld.long 0x00 15. " FORCE47 ,Interrupt Source Force Request 47" "Standard,Forced"
|
|
bitfld.long 0x00 14. " FORCE46 ,Interrupt Source Force Request 46" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FORCE45 ,Interrupt Source Force Request 45" "Standard,Forced"
|
|
bitfld.long 0x00 12. " FORCE44 ,Interrupt Source Force Request 44" "Standard,Forced"
|
|
bitfld.long 0x00 11. " FORCE43 ,Interrupt Source Force Request 43" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FORCE42 ,Interrupt Source Force Request 42" "Standard,Forced"
|
|
bitfld.long 0x00 9. " FORCE41 ,Interrupt Source Force Request 41" "Standard,Forced"
|
|
bitfld.long 0x00 8. " FORCE40 ,Interrupt Source Force Request 40" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FORCE39 ,Interrupt Source Force Request 39" "Standard,Forced"
|
|
bitfld.long 0x00 6. " FORCE38 ,Interrupt Source Force Request 38" "Standard,Forced"
|
|
bitfld.long 0x00 5. " FORCE37 ,Interrupt Source Force Request 37" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FORCE36 ,Interrupt Source Force Request 36" "Standard,Forced"
|
|
bitfld.long 0x00 3. " FORCE35 ,Interrupt Source Force Request 35" "Standard,Forced"
|
|
bitfld.long 0x00 2. " FORCE34 ,Interrupt Source Force Request 34" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FORCE33 ,Interrupt Source Force Request 33" "Standard,Forced"
|
|
bitfld.long 0x00 0. " FORCE32 ,Interrupt Source Force Request 32" "Standard,Forced"
|
|
;group 0x54++0x03
|
|
line.long 0x04 "INTFRCL,Interrupt Force Register Low"
|
|
bitfld.long 0x04 31. " FORCE31 ,Interrupt Source Force Request 31" "Standard,Forced"
|
|
bitfld.long 0x04 30. " FORCE30 ,Interrupt Source Force Request 30" "Standard,Forced"
|
|
bitfld.long 0x04 29. " FORCE29 ,Interrupt Source Force Request 29" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FORCE28 ,Interrupt Source Force Request 28" "Standard,Forced"
|
|
bitfld.long 0x04 27. " FORCE27 ,Interrupt Source Force Request 27" "Standard,Forced"
|
|
bitfld.long 0x04 26. " FORCE26 ,Interrupt Source Force Request 26" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FORCE25 ,Interrupt Source Force Request 25" "Standard,Forced"
|
|
bitfld.long 0x04 24. " FORCE24 ,Interrupt Source Force Request 24" "Standard,Forced"
|
|
bitfld.long 0x04 23. " FORCE23 ,Interrupt Source Force Request 23" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FORCE22 ,Interrupt Source Force Request 22" "Standard,Forced"
|
|
bitfld.long 0x04 21. " FORCE21 ,Interrupt Source Force Request 21" "Standard,Forced"
|
|
bitfld.long 0x04 20. " FORCE20 ,Interrupt Source Force Request 20" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FORCE19 ,Interrupt Source Force Request 19" "Standard,Forced"
|
|
bitfld.long 0x04 18. " FORCE18 ,Interrupt Source Force Request 18" "Standard,Forced"
|
|
bitfld.long 0x04 17. " FORCE17 ,Interrupt Source Force Request 17" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE16 ,Interrupt Source Force Request 16" "Standard,Forced"
|
|
bitfld.long 0x04 15. " FORCE15 ,Interrupt Source Force Request 15" "Standard,Forced"
|
|
bitfld.long 0x04 14. " FORCE14 ,Interrupt Source Force Request 14" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FORCE13 ,Interrupt Source Force Request 13" "Standard,Forced"
|
|
bitfld.long 0x04 12. " FORCE12 ,Interrupt Source Force Request 12" "Standard,Forced"
|
|
bitfld.long 0x04 11. " FORCE11 ,Interrupt Source Force Request 11" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FORCE10 ,Interrupt Source Force Request 10" "Standard,Forced"
|
|
bitfld.long 0x04 9. " FORCE9 ,Interrupt Source Force Request 9" "Standard,Forced"
|
|
bitfld.long 0x04 8. " FORCE8 ,Interrupt Source Force Request 8" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FORCE7 ,Interrupt Source Force Request 7" "Standard,Forced"
|
|
bitfld.long 0x04 6. " FORCE6 ,Interrupt Source Force Request 6" "Standard,Forced"
|
|
bitfld.long 0x04 5. " FORCE5 ,Interrupt Source Force Request 5" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FORCE4 ,Interrupt Source Force Request 4" "Standard,Forced"
|
|
bitfld.long 0x04 3. " FORCE3 ,Interrupt Source Force Request 3" "Standard,Forced"
|
|
bitfld.long 0x04 2. " FORCE2 ,Interrupt Source Force Request 2" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FORCE1 ,Interrupt Source Force Request 1" "Standard,Forced"
|
|
bitfld.long 0x04 0. " FORCE0 ,Interrupt Source Force Request 0" "Standard,Forced"
|
|
rgroup 0x58--0x60
|
|
line.long 0x00 "NIPNDH,Normal Interrupt Pending Register High"
|
|
bitfld.long 0x00 31. " INPEND63 ,Normal Interrupt Pending Bit 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INPEND62 ,Normal Interrupt Pending Bit 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " INPEND61 ,Normal Interrupt Pending Bit 61" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INPEND60 ,Normal Interrupt Pending Bit 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " INPEND59 ,Normal Interrupt Pending Bit 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INPEND58 ,Normal Interrupt Pending Bit 58" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INPEND57 ,Normal Interrupt Pending Bit 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " INPEND56 ,Normal Interrupt Pending Bit 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " INPEND55 ,Normal Interrupt Pending Bit 55" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INPEND54 ,Normal Interrupt Pending Bit 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " INPEND53 ,Normal Interrupt Pending Bit 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INPEND52 ,Normal Interrupt Pending Bit 52" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INPEND51 ,Normal Interrupt Pending Bit 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " INPEND50 ,Normal Interrupt Pending Bit 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " INPEND49 ,Normal Interrupt Pending Bit 49" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INPEND48 ,Normal Interrupt Pending Bit 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " INPEND47 ,Normal Interrupt Pending Bit 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INPEND46 ,Normal Interrupt Pending Bit 46" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INPEND45 ,Normal Interrupt Pending Bit 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INPEND44 ,Normal Interrupt Pending Bit 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " INPEND43 ,Normal Interrupt Pending Bit 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INPEND42 ,Normal Interrupt Pending Bit 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " INPEND41 ,Normal Interrupt Pending Bit 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INPEND40 ,Normal Interrupt Pending Bit 40" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INPEND39 ,Normal Interrupt Pending Bit 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INPEND38 ,Normal Interrupt Pending Bit 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " INPEND37 ,Normal Interrupt Pending Bit 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INPEND36 ,Normal Interrupt Pending Bit 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " INPEND35 ,Normal Interrupt Pending Bit 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " INPEND34 ,Normal Interrupt Pending Bit 34" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INPEND33 ,Normal Interrupt Pending Bit 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " INPEND32 ,Normal Interrupt Pending Bit 32" "Not requested,Requested"
|
|
;rgroup 0x5c++0x03
|
|
line.long 0x04 "NIPNDL,Normal Interrupt Pending Register Low"
|
|
bitfld.long 0x04 31. " INPEND31 ,Normal Interrupt Pending Bit 31" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " INPEND30 ,Normal Interrupt Pending Bit 30" "Not requested,Requested"
|
|
bitfld.long 0x04 29. " INPEND29 ,Normal Interrupt Pending Bit 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 28. " INPEND28 ,Normal Interrupt Pending Bit 28" "Not requested,Requested"
|
|
bitfld.long 0x04 27. " INPEND27 ,Normal Interrupt Pending Bit 27" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " INPEND26 ,Normal Interrupt Pending Bit 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 25. " INPEND25 ,Normal Interrupt Pending Bit 25" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " INPEND24 ,Normal Interrupt Pending Bit 24" "Not requested,Requested"
|
|
bitfld.long 0x04 23. " INPEND23 ,Normal Interrupt Pending Bit 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 22. " INPEND22 ,Normal Interrupt Pending Bit 22" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " INPEND21 ,Normal Interrupt Pending Bit 21" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " INPEND20 ,Normal Interrupt Pending Bit 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INPEND19 ,Normal Interrupt Pending Bit 19" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " INPEND18 ,Normal Interrupt Pending Bit 18" "Not requested,Requested"
|
|
bitfld.long 0x04 17. " INPEND17 ,Normal Interrupt Pending Bit 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 16. " INPEND16 ,Normal Interrupt Pending Bit 16" "Not requested,Requested"
|
|
bitfld.long 0x04 15. " INPEND15 ,Normal Interrupt Pending Bit 15" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " INPEND14 ,Normal Interrupt Pending Bit 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 13. " INPEND13 ,Normal Interrupt Pending Bit 13" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " INPEND12 ,Normal Interrupt Pending Bit 12" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " INPEND11 ,Normal Interrupt Pending Bit 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 10. " INPEND10 ,Normal Interrupt Pending Bit 10" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " INPEND9 ,Normal Interrupt Pending Bit 9" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " INPEND8 ,Normal Interrupt Pending Bit 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INPEND7 ,Normal Interrupt Pending Bit 7" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " INPEND6 ,Normal Interrupt Pending Bit 6" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " INPEND5 ,Normal Interrupt Pending Bit 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " INPEND4 ,Normal Interrupt Pending Bit 4" "Not requested,Requested"
|
|
bitfld.long 0x04 3. " INPEND3 ,Normal Interrupt Pending Bit 3" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " INPEND2 ,Normal Interrupt Pending Bit 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 1. " INPEND1 ,Normal Interrupt Pending Bit 1" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " INPEND0 ,Normal Interrupt Pending Bit 0" "Not requested,Requested"
|
|
rgroup 0x60++0x07
|
|
line.long 0x00 "FIPNDH,Fast Interrupt Pending Register High"
|
|
bitfld.long 0x00 31. " FIPEND63 ,Fast Interrupt Pending Bit 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " FIPEND62 ,Fast Interrupt Pending Bit 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " FIPEND61 ,Fast Interrupt Pending Bit 61" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FIPEND60 ,Fast Interrupt Pending Bit 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " FIPEND59 ,Fast Interrupt Pending Bit 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " FIPEND58 ,Fast Interrupt Pending Bit 58" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FIPEND57 ,Fast Interrupt Pending Bit 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " FIPEND56 ,Fast Interrupt Pending Bit 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " FIPEND55 ,Fast Interrupt Pending Bit 55" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FIPEND54 ,Fast Interrupt Pending Bit 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " FIPEND53 ,Fast Interrupt Pending Bit 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " FIPEND52 ,Fast Interrupt Pending Bit 52" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FIPEND51 ,Fast Interrupt Pending Bit 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " FIPEND50 ,Fast Interrupt Pending Bit 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " FIPEND49 ,Fast Interrupt Pending Bit 49" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FIPEND48 ,Fast Interrupt Pending Bit 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " FIPEND47 ,Fast Interrupt Pending Bit 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " FIPEND46 ,Fast Interrupt Pending Bit 46" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FIPEND45 ,Fast Interrupt Pending Bit 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " FIPEND44 ,Fast Interrupt Pending Bit 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " FIPEND43 ,Fast Interrupt Pending Bit 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FIPEND42 ,Fast Interrupt Pending Bit 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " FIPEND41 ,Fast Interrupt Pending Bit 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " FIPEND40 ,Fast Interrupt Pending Bit 40" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FIPEND39 ,Fast Interrupt Pending Bit 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " FIPEND38 ,Fast Interrupt Pending Bit 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " FIPEND37 ,Fast Interrupt Pending Bit 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FIPEND36 ,Fast Interrupt Pending Bit 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " FIPEND35 ,Fast Interrupt Pending Bit 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " FIPEND34 ,Fast Interrupt Pending Bit 34" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FIPEND33 ,Fast Interrupt Pending Bit 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " FIPEND32 ,Fast Interrupt Pending Bit 32" "Not requested,Requested"
|
|
;rgroup 0x64++0x03
|
|
line.long 0x04 "FIPNDL,Fast Interrupt Pending Register Low"
|
|
bitfld.long 0x04 31. " FIPNDL31 ,Fast Interrupt Pending Register Low 31" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " FIPNDL30 ,Fast Interrupt Pending Register Low 30" "Not requested,Requested"
|
|
bitfld.long 0x04 29. " FIPNDL29 ,Fast Interrupt Pending Register Low 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FIPNDL28 ,Fast Interrupt Pending Register Low 28" "Not requested,Requested"
|
|
bitfld.long 0x04 27. " FIPNDL27 ,Fast Interrupt Pending Register Low 27" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " FIPNDL26 ,Fast Interrupt Pending Register Low 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FIPNDL25 ,Fast Interrupt Pending Register Low 25" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " FIPNDL24 ,Fast Interrupt Pending Register Low 24" "Not requested,Requested"
|
|
bitfld.long 0x04 23. " FIPNDL23 ,Fast Interrupt Pending Register Low 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FIPNDL22 ,Fast Interrupt Pending Register Low 22" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " FIPNDL21 ,Fast Interrupt Pending Register Low 21" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " FIPNDL20 ,Fast Interrupt Pending Register Low 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FIPNDL19 ,Fast Interrupt Pending Register Low 19" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " FIPNDL18 ,Fast Interrupt Pending Register Low 18" "Not requested,Requested"
|
|
bitfld.long 0x04 17. " FIPNDL17 ,Fast Interrupt Pending Register Low 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FIPNDL16 ,Fast Interrupt Pending Register Low 16" "Not requested,Requested"
|
|
bitfld.long 0x04 15. " FIPNDL15 ,Fast Interrupt Pending Register Low 15" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " FIPNDL14 ,Fast Interrupt Pending Register Low 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FIPNDL13 ,Fast Interrupt Pending Register Low 13" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " FIPNDL12 ,Fast Interrupt Pending Register Low 12" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " FIPNDL11 ,Fast Interrupt Pending Register Low 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FIPNDL10 ,Fast Interrupt Pending Register Low 10" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " FIPNDL9 ,Fast Interrupt Pending Register Low 9" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " FIPNDL8 ,Fast Interrupt Pending Register Low 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FIPNDL7 ,Fast Interrupt Pending Register Low 7" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " FIPNDL6 ,Fast Interrupt Pending Register Low 6" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " FIPNDL5 ,Fast Interrupt Pending Register Low 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FIPNDL4 ,Fast Interrupt Pending Register Low 4" "Not requested,Requested"
|
|
bitfld.long 0x04 3. " FIPNDL3 ,Fast Interrupt Pending Register Low 3" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " FIPNDL2 ,Fast Interrupt Pending Register Low 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FIPNDL1 ,Fast Interrupt Pending Register Low 1" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " FIPNDL0 ,Fast Interrupt Pending Register Low 0" "Not requested,Requested"
|
|
width 0xa
|
|
tree "AVIC Vector Registers"
|
|
group (0x100+0x0)++0x03
|
|
line.long 0x00 "VECTOR0,AVIC Vector Register 0"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x4)++0x03
|
|
line.long 0x00 "VECTOR1,AVIC Vector Register 1"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x8)++0x03
|
|
line.long 0x00 "VECTOR2,AVIC Vector Register 2"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xC)++0x03
|
|
line.long 0x00 "VECTOR3,AVIC Vector Register 3"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x10)++0x03
|
|
line.long 0x00 "VECTOR4,AVIC Vector Register 4"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x14)++0x03
|
|
line.long 0x00 "VECTOR5,AVIC Vector Register 5"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x18)++0x03
|
|
line.long 0x00 "VECTOR6,AVIC Vector Register 6"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x1C)++0x03
|
|
line.long 0x00 "VECTOR7,AVIC Vector Register 7"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x20)++0x03
|
|
line.long 0x00 "VECTOR8,AVIC Vector Register 8"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x24)++0x03
|
|
line.long 0x00 "VECTOR9,AVIC Vector Register 9"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x28)++0x03
|
|
line.long 0x00 "VECTOR10,AVIC Vector Register 10"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x2C)++0x03
|
|
line.long 0x00 "VECTOR11,AVIC Vector Register 11"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x30)++0x03
|
|
line.long 0x00 "VECTOR12,AVIC Vector Register 12"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x34)++0x03
|
|
line.long 0x00 "VECTOR13,AVIC Vector Register 13"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x38)++0x03
|
|
line.long 0x00 "VECTOR14,AVIC Vector Register 14"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x3C)++0x03
|
|
line.long 0x00 "VECTOR15,AVIC Vector Register 15"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x40)++0x03
|
|
line.long 0x00 "VECTOR16,AVIC Vector Register 16"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x44)++0x03
|
|
line.long 0x00 "VECTOR17,AVIC Vector Register 17"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x48)++0x03
|
|
line.long 0x00 "VECTOR18,AVIC Vector Register 18"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x4C)++0x03
|
|
line.long 0x00 "VECTOR19,AVIC Vector Register 19"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x50)++0x03
|
|
line.long 0x00 "VECTOR20,AVIC Vector Register 20"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x54)++0x03
|
|
line.long 0x00 "VECTOR21,AVIC Vector Register 21"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x58)++0x03
|
|
line.long 0x00 "VECTOR22,AVIC Vector Register 22"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x5C)++0x03
|
|
line.long 0x00 "VECTOR23,AVIC Vector Register 23"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x60)++0x03
|
|
line.long 0x00 "VECTOR24,AVIC Vector Register 24"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x64)++0x03
|
|
line.long 0x00 "VECTOR25,AVIC Vector Register 25"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x68)++0x03
|
|
line.long 0x00 "VECTOR26,AVIC Vector Register 26"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x6C)++0x03
|
|
line.long 0x00 "VECTOR27,AVIC Vector Register 27"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x70)++0x03
|
|
line.long 0x00 "VECTOR28,AVIC Vector Register 28"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x74)++0x03
|
|
line.long 0x00 "VECTOR29,AVIC Vector Register 29"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x78)++0x03
|
|
line.long 0x00 "VECTOR30,AVIC Vector Register 30"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x7C)++0x03
|
|
line.long 0x00 "VECTOR31,AVIC Vector Register 31"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x80)++0x03
|
|
line.long 0x00 "VECTOR32,AVIC Vector Register 32"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x84)++0x03
|
|
line.long 0x00 "VECTOR33,AVIC Vector Register 33"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x88)++0x03
|
|
line.long 0x00 "VECTOR34,AVIC Vector Register 34"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x8C)++0x03
|
|
line.long 0x00 "VECTOR35,AVIC Vector Register 35"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x90)++0x03
|
|
line.long 0x00 "VECTOR36,AVIC Vector Register 36"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x94)++0x03
|
|
line.long 0x00 "VECTOR37,AVIC Vector Register 37"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x98)++0x03
|
|
line.long 0x00 "VECTOR38,AVIC Vector Register 38"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0x9C)++0x03
|
|
line.long 0x00 "VECTOR39,AVIC Vector Register 39"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xA0)++0x03
|
|
line.long 0x00 "VECTOR40,AVIC Vector Register 40"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xA4)++0x03
|
|
line.long 0x00 "VECTOR41,AVIC Vector Register 41"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xA8)++0x03
|
|
line.long 0x00 "VECTOR42,AVIC Vector Register 42"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xAC)++0x03
|
|
line.long 0x00 "VECTOR43,AVIC Vector Register 43"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xB0)++0x03
|
|
line.long 0x00 "VECTOR44,AVIC Vector Register 44"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xB4)++0x03
|
|
line.long 0x00 "VECTOR45,AVIC Vector Register 45"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xB8)++0x03
|
|
line.long 0x00 "VECTOR46,AVIC Vector Register 46"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xBC)++0x03
|
|
line.long 0x00 "VECTOR47,AVIC Vector Register 47"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xC0)++0x03
|
|
line.long 0x00 "VECTOR48,AVIC Vector Register 48"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xC4)++0x03
|
|
line.long 0x00 "VECTOR49,AVIC Vector Register 49"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xC8)++0x03
|
|
line.long 0x00 "VECTOR50,AVIC Vector Register 50"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xCC)++0x03
|
|
line.long 0x00 "VECTOR51,AVIC Vector Register 51"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xD0)++0x03
|
|
line.long 0x00 "VECTOR52,AVIC Vector Register 52"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xD4)++0x03
|
|
line.long 0x00 "VECTOR53,AVIC Vector Register 53"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xD8)++0x03
|
|
line.long 0x00 "VECTOR54,AVIC Vector Register 54"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xDC)++0x03
|
|
line.long 0x00 "VECTOR55,AVIC Vector Register 55"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xE0)++0x03
|
|
line.long 0x00 "VECTOR56,AVIC Vector Register 56"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xE4)++0x03
|
|
line.long 0x00 "VECTOR57,AVIC Vector Register 57"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xE8)++0x03
|
|
line.long 0x00 "VECTOR58,AVIC Vector Register 58"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xEC)++0x03
|
|
line.long 0x00 "VECTOR59,AVIC Vector Register 59"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xF0)++0x03
|
|
line.long 0x00 "VECTOR60,AVIC Vector Register 60"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xF4)++0x03
|
|
line.long 0x00 "VECTOR61,AVIC Vector Register 61"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xF8)++0x03
|
|
line.long 0x00 "VECTOR62,AVIC Vector Register 62"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
group (0x100+0xFC)++0x03
|
|
line.long 0x00 "VECTOR63,AVIC Vector Register 63"
|
|
hexmask.long 0x00 2.--31. 0x4 " VECTOR[31:2] ,AVIC Vector Register"
|
|
tree.end
|
|
tree.end
|
|
tree "MAX (Multi-Layer AHB Crossbar Switch)"
|
|
base asd:0x43f04000
|
|
width 0x8
|
|
if (((data.long(asd:(0x43f04010+0x0))&0x80000000)==0x80000000))
|
|
rgroup (0x000+0x0)++0x03 "PORT 0"
|
|
line.long 0x00 "MPR0,Master Priority Register 0"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x0)++0x03
|
|
line.long 0x00 "SGPCR0,Slave General Purpose Control Register For Slave Port 0"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
group (0x000+0x0)++0x03 "PORT 0"
|
|
line.long 0x00 "MPR0,Master Priority Register For Slave Port 0"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x0)++0x03
|
|
line.long 0x00 "SGPCR0,Slave General Purpose Control Register For Slave Port 0"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(asd:(0x43f04010+0x100))&0x80000000)==0x80000000))
|
|
rgroup (0x000+0x100)++0x03 "PORT 1"
|
|
line.long 0x00 "MPR1,Master Priority Register 1"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x100)++0x03
|
|
line.long 0x00 "SGPCR1,Slave General Purpose Control Register For Slave Port 1"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
group (0x000+0x100)++0x03 "PORT 1"
|
|
line.long 0x00 "MPR1,Master Priority Register For Slave Port 1"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x100)++0x03
|
|
line.long 0x00 "SGPCR1,Slave General Purpose Control Register For Slave Port 1"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(asd:(0x43f04010+0x200))&0x80000000)==0x80000000))
|
|
rgroup (0x000+0x200)++0x03 "PORT 2"
|
|
line.long 0x00 "MPR2,Master Priority Register 2"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x200)++0x03
|
|
line.long 0x00 "SGPCR2,Slave General Purpose Control Register For Slave Port 2"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
group (0x000+0x200)++0x03 "PORT 2"
|
|
line.long 0x00 "MPR2,Master Priority Register For Slave Port 2"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x200)++0x03
|
|
line.long 0x00 "SGPCR2,Slave General Purpose Control Register For Slave Port 2"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(asd:(0x43f04010+0x300))&0x80000000)==0x80000000))
|
|
rgroup (0x000+0x300)++0x03 "PORT 3"
|
|
line.long 0x00 "MPR3,Master Priority Register 3"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x300)++0x03
|
|
line.long 0x00 "SGPCR3,Slave General Purpose Control Register For Slave Port 3"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
group (0x000+0x300)++0x03 "PORT 3"
|
|
line.long 0x00 "MPR3,Master Priority Register For Slave Port 3"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x300)++0x03
|
|
line.long 0x00 "SGPCR3,Slave General Purpose Control Register For Slave Port 3"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(asd:(0x43f04010+0x400))&0x80000000)==0x80000000))
|
|
rgroup (0x000+0x400)++0x03 "PORT 4"
|
|
line.long 0x00 "MPR4,Master Priority Register 4"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x400)++0x03
|
|
line.long 0x00 "SGPCR4,Slave General Purpose Control Register For Slave Port 4"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
group (0x000+0x400)++0x03 "PORT 4"
|
|
line.long 0x00 "MPR4,Master Priority Register For Slave Port 4"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group (0x010+0x400)++0x03
|
|
line.long 0x00 "SGPCR4,Slave General Purpose Control Register For Slave Port 4"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "Park,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
group 0x800--0xfd4 "Master General Purpose Control Registers"
|
|
line.long (0x00+0x0) "MGPCR0,Master General Purpose Control Register For Master Port 0"
|
|
bitfld.long (0x00+0x0) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
line.long (0x00+0x100) "MGPCR1,Master General Purpose Control Register For Master Port 1"
|
|
bitfld.long (0x00+0x100) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
line.long (0x00+0x200) "MGPCR2,Master General Purpose Control Register For Master Port 2"
|
|
bitfld.long (0x00+0x200) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
line.long (0x00+0x300) "MGPCR3,Master General Purpose Control Register For Master Port 3"
|
|
bitfld.long (0x00+0x300) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
line.long (0x00+0x400) "MGPCR4,Master General Purpose Control Register For Master Port 4"
|
|
bitfld.long (0x00+0x400) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
line.long (0x00+0x500) "MGPCR5,Master General Purpose Control Register For Master Port 5"
|
|
bitfld.long (0x00+0x500) 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
width 0x16
|
|
tree.end
|
|
tree "ATA (Advanced Technology Attachment)"
|
|
base asd:0x43f8c000
|
|
width 18.
|
|
tree "Timing Registers"
|
|
group 0x00--0x18
|
|
line.byte 0x00 "TIME_OFF,TIME OFF Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TIME_OFF[7:0] ,Transceiver Timing Parameter Controls TOFF"
|
|
;group 0x01++0x00
|
|
line.byte 0x01 "TIME_ON,TIME ON Register"
|
|
hexmask.byte 0x01 0.--7. 1. " TIME_ON[7:0] ,Transceiver Timing Parameter Controls TON"
|
|
;group 0x02++0x00
|
|
line.byte 0x02 "TIME_1,TIME 1 Register"
|
|
hexmask.byte 0x02 0.--7. 1. " TIME_1[7:0] ,PIO Timing Parameter Controls T1"
|
|
;group 0x03++0x00
|
|
line.byte 0x03 "TIME_2W,TIME 2W Register"
|
|
hexmask.byte 0x03 0.--7. 1. " TIME_2W[7:0] ,PIO Timing Parameter Controls T2 During Write Cycles"
|
|
;group 0x04++0x00
|
|
line.byte 0x04 "TIME_2R,TIME 2R Register"
|
|
hexmask.byte 0x04 0.--7. 1. " TIME_2R[7:0] ,PIO Timing Parameter Controls T2 During Read Cycles"
|
|
;group 0x05++0x00
|
|
line.byte 0x05 "TIME_AX,TIME AX Register"
|
|
hexmask.byte 0x05 0.--7. 1. " TIME_AX[7:0] ,PIO Timing Parameter Controls TA"
|
|
;group 0x0f++0x00
|
|
line.byte 0x0f "TIME_PIO_RDX/RPX,TIME PIO RDX/RPX Register"
|
|
hexmask.byte 0x0f 0.--7. 1. " TIME_RDX/RPX[7:0] ,PIO/UDMA Timing Parameter Controls TRD"
|
|
;group 0x07++0x00
|
|
line.byte 0x07 "TIME_4,TIME 4 Register"
|
|
hexmask.byte 0x07 0.--7. 1. " TIME_4[7:0] ,PIO Timing Parameter Controls T4"
|
|
;group 0x08++0x00
|
|
line.byte 0x08 "TIME_9,TIME 9 Register"
|
|
hexmask.byte 0x08 0.--7. 1. " TIME_9[7:0] ,PIO Timing Parameter Controls T9"
|
|
;group 0x09++0x00
|
|
line.byte 0x09 "TIME_M,TIME M Register"
|
|
hexmask.byte 0x09 0.--7. 1. " TIME_M[7:0] ,MDMA Timing Parameter Controls TM"
|
|
;group 0x0a++0x00
|
|
line.byte 0x0a "TIME_JN,TIME JN Register"
|
|
hexmask.byte 0x0a 0.--7. 1. " TIME_JN[7:0] ,MDMA Timing Parameter Controls TN and TJ"
|
|
;group 0x0b++0x00
|
|
line.byte 0x0b "TIME_D,TIME D Register"
|
|
hexmask.byte 0x0b 0.--7. 1. " TIME_D[7:0] ,MDMA Timing Parameter Controls TD"
|
|
;group 0x0c++0x00
|
|
line.byte 0x0c "TIME_K,TIME K Register"
|
|
hexmask.byte 0x0c 0.--7. 1. " TIME_K[7:0] ,MDMA Timing Parameter Controls TK"
|
|
;group 0x0d++0x00
|
|
line.byte 0x0d "TIME_ACK,TIME ACK Register"
|
|
hexmask.byte 0x0d 0.--7. 1. " TIME_ACK[7:0] ,UDMA Timing Parameter Controls TACK"
|
|
;group 0x0e++0x00
|
|
line.byte 0x0e "TIME_ENV,TIME ENV Register"
|
|
hexmask.byte 0x0e 0.--7. 1. " TIME_ENV[7:0] ,UDMA Timing Parameter Controls TENV"
|
|
;group 0xf++0x00
|
|
; line.byte 0x0f "TIME_RPX,TIME RPX Register"
|
|
; hexmask.byte 0x0f 0.--7. 1. " TIME_RPX[7:0] ,UDMA Timing Parameter Controls TRP"
|
|
;group 0x10++0x00
|
|
line.byte 0x10 "TIME_ZAH,TIME ZAH Register"
|
|
hexmask.byte 0x10 0.--7. 1. " TIME_ZAH[7:0] ,UDMA Timing Parameter Controls TZAH"
|
|
;group 0x11++0x00
|
|
line.byte 0x11 "TIME_MLIX,TIME MLIX Register"
|
|
hexmask.byte 0x11 0.--7. 1. " TIME_MLIX[7:0] ,UDMA Timing Parameter Controls TMLI"
|
|
;group 0x12++0x00
|
|
line.byte 0x12 "TIME_DVH,TIME DVH Register"
|
|
hexmask.byte 0x12 0.--7. 1. " TIME_DVH[7:0] ,UDMA Timing Parameter Controls TDVH"
|
|
;group 0x13++0x00
|
|
line.byte 0x13 "TIME_DZFS,TIME DZFS Register"
|
|
hexmask.byte 0x13 0.--7. 1. " TIME_DZFS[7:0] ,UDMA Timing Parameter Controls TDZFS"
|
|
;group 0x14++0x00
|
|
line.byte 0x14 "TIME_DVS,TIME DVS Register"
|
|
hexmask.byte 0x14 0.--7. 1. " TIME_D[7:0] ,UDMA Timing Parameter Controls TDVS"
|
|
;group 0x15++0x00
|
|
line.byte 0x15 "TIME_CVH,Time CVH Register"
|
|
hexmask.byte 0x15 0.--7. 1. " TIME_CVH[7:0] ,UDMA Timing Parameter Controls TCVH"
|
|
;group 0x16++0x00
|
|
line.byte 0x16 "TIME_SS,TIME SS Register"
|
|
hexmask.byte 0x16 0.--7. 1. " TIME_SS[7:0] ,UDMA Timing Parameter Controls TSS"
|
|
;group 0x17++0x00
|
|
line.byte 0x17 "TIME_CYC,TIME CYC Register"
|
|
hexmask.byte 0x17 0.--7. 1. " TIME_CYC[7:0] ,TIME_CYC Register"
|
|
tree.end
|
|
width 20.
|
|
group 0x18--0x1e
|
|
line.word 0x04 "FIFO_DATA_16,FIFO DATA Register In 16-bit Mode"
|
|
hexmask.word 0x04 0.--15. 1. " FIFO_DATA[15:0] ,FIFO DATA In 16-bit Mode"
|
|
;group 0x18++0x03
|
|
line.long 0x00 "FIFO_DATA_32,FIFO_DATA Register In 32-bit Mode"
|
|
hexmask.long 0x00 0.--31. 1. " FIFO_DATA[31:0] ,FIFO_DATA In 32-bit Mode"
|
|
rgroup 0x20++0x00
|
|
line.byte 0x00 "FIFO_FILL,FIFO_FILL Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIGO_FILL[7:0] ,FIFO_FILL Value"
|
|
group 0x24++0x00
|
|
line.byte 0x00 "ATA_CONTROL,ATA Control Register"
|
|
bitfld.byte 0x00 7. " FIFO_RST ,FIFO Reset or Enable" "Reset,Normal"
|
|
bitfld.byte 0x00 6. " ATA_RST ,Control The Reset Of The Internal ATA" "Reset,Normal"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " FIFO_TX_EN ,FIFO Transmit Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " FIFO_RCV_EN ,FIFO Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DMA_PENDING ,DMA Pending Bit" "Not start,Start"
|
|
bitfld.byte 0x00 2. " DMA_ULTRA_SELECTED ,UDMA Or MDMA Protocol Is used" "MDMA,UDMA"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DMA_WRITE ,Data Direction On Any DMA" "In burst,Out burst"
|
|
bitfld.byte 0x00 0. " IORDY_EN ,IORDY Handshake Or Disregarded" "Disregarded,Handshake"
|
|
rgroup 0x28++0x00
|
|
line.byte 0x00 "INT_PENDING,Interrupt Pending Register"
|
|
bitfld.byte 0x00 7. " ATA_INTRQ1 ,ATA Interrupt Request 1" "Not pending,Pending"
|
|
bitfld.byte 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow" "No underflow,Underflow"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow" "No overflow,Overflow"
|
|
bitfld.byte 0x00 4. " CONTROLLER_IDLE ,Controller Idle" "Active,Idle"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ATA_INTRQ2 ,ATA interrupt request 2" "Not pending,Pending"
|
|
group 0x2c++0x00
|
|
line.byte 0x00 "INT_ENABLE,Interrupt_Enable Register"
|
|
bitfld.byte 0x00 7. " ATA_INTRQ1 ,ATA Interrupt Request 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " CONTROLLER_IDLE ,Controller Idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ATA_INTRQ2 ,ATA Interrupt Request 2" "Disabled,Enabled"
|
|
wgroup 0x30++0x00
|
|
line.byte 0x00 "INTERRUPT_CLEAR,Interrupt Clear Register"
|
|
eventfld.byte 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow Interrupt Clear" "Not cleared,Cleared"
|
|
eventfld.byte 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow Interrupt Clear" "Not cleared,Cleared"
|
|
group 0x34++0x00
|
|
line.byte 0x00 "FIFO_ALARM,FIFO Alarm Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_ALARM[7:0] , FIFO Alarm Threshold"
|
|
group 0xa0--0xbb
|
|
line.word 0x00 "DRIVE_DATA,Drive Data Register"
|
|
;group 0xa4++0x00
|
|
line.byte 0x04 "DRIVE_FEATURES,Drive Features Register"
|
|
;group 0xa8++0x00
|
|
line.byte 0x08 "DRIVE_SECTOR_COUNT,Drive Sector Count Register"
|
|
;group 0xac++0x00
|
|
line.byte 0x0c "DRIVE_SECTOR_NUM,Drive Sector Number Register"
|
|
;group 0xb0++0x00
|
|
line.byte 0x10 "DRIVE_CYL_LOW,Drive Cylinder Low Register"
|
|
;group 0xb4++0x00
|
|
line.byte 0x14 "DRIVE_CYL_HIGH,Drive Cylinder High Register"
|
|
;group 0xb8++0x00
|
|
line.byte 0x18 "DRIVE_DEV_HEAD,Drive Device Head Register"
|
|
wgroup 0xbc++0x00
|
|
line.byte 0x00 "DRIVE_COMMAND,Drive Command Register"
|
|
;rgroup 0xc0--0xc8
|
|
; line.byte 0x00 "DRIVE_STATUS,Drive Status Register"
|
|
;rgroup 0xc4++0x00
|
|
; line.byte 0x04 "DRIVE_ALT_STATUS,Drive Alternate Status Register"
|
|
wgroup 0xc8++0x00
|
|
line.byte 0x00 "DRIVE_CONTROL,Drive Control Register"
|
|
width 0x14
|
|
tree.end
|
|
tree "AUDMUX (Digital Audio Mux)"
|
|
base asd:0x53fc4000
|
|
width 7.
|
|
group (0x00+0x0)++0x08 "Port 1"
|
|
line.long 0x00 "PTCR1,Port Timing Control Register 1"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR1,Port Data Control Register 1"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x8)++0x08 "Port 2"
|
|
line.long 0x00 "PTCR2,Port Timing Control Register 2"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR2,Port Data Control Register 2"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x10)++0x08 "Port 3"
|
|
line.long 0x00 "PTCR3,Port Timing Control Register 3"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR3,Port Data Control Register 3"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x18)++0x08 "Port 4"
|
|
line.long 0x00 "PTCR4,Port Timing Control Register 4"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR4,Port Data Control Register 4"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x20)++0x08 "Port 5"
|
|
line.long 0x00 "PTCR5,Port Timing Control Register 5"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR5,Port Data Control Register 5"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x28)++0x08 "Port 6"
|
|
line.long 0x00 "PTCR6,Port Timing Control Register 6"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR6,Port Data Control Register 6"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group (0x00+0x30)++0x08 "Port 7"
|
|
line.long 0x00 "PTCR7,Port Timing Control Register 7"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS"
|
|
bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk"
|
|
bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PDCR7,Port Data Control Register 7"
|
|
bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..."
|
|
bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
bitfld.long 0x04 8.--9. " MODE[1:0] ,Mode Select" "Normal,Internal Network,CE Bus Network,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6. " INMMASK7 ,Internal Network Mode Mask 7" "Includes,Excludes"
|
|
bitfld.long 0x04 5. " INMMASK6 ,Internal Network Mode Mask 6" "Includes,Excludes"
|
|
bitfld.long 0x04 4. " INMMASK5 ,Internal Network Mode Mask 5" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INMMASK4 ,Internal Network Mode Mask 4" "Includes,Excludes"
|
|
bitfld.long 0x04 2. " INMMASK3 ,Internal Network Mode Mask 3" "Includes,Excludes"
|
|
bitfld.long 0x04 1. " INMMASK2 ,Internal Network Mode Mask 2" "Includes,Excludes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " INMMASK1 ,Internal Network Mode Mask 1" "Includes,Excludes"
|
|
group 0x38++0x03 "CE Bus Network Mode Control"
|
|
line.long 0x00 "CNMCR,CE Bus Network Mode Control Register"
|
|
bitfld.long 0x00 18. " BEN ,CE Bus Enable" "Held low,Generated"
|
|
bitfld.long 0x00 17. " FSPOL ,Frame Sync Polarity Select" "0,1"
|
|
bitfld.long 0x00 16. " CLKPOL ,Clock Sync Polarity Select" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CNTHI[7:0] ,CE Bus Disable Signal High Period Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CNTLOW[7:0] ,CE Bus Disable Signal Low Period Count"
|
|
width 0x14
|
|
tree.end
|
|
tree.open "CSPI (Configurable Serial Peripheral Interface)"
|
|
tree "CSPI 1"
|
|
base asd:0x43fa4000
|
|
width 10.
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "RXDATA1,Receive Data Register 1"
|
|
in
|
|
wgroup 0x04++0x03
|
|
line.long 0x00 "TXDATA1,Transmit Data Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data"
|
|
if ((data.long(asd:0x43fa4008)&0x02)==0x02)
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG1,Control Register 1"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "Only one,Multiple"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 3. " SMC ,Start Mode Control" "After write 1 to XCH,Immediately"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy"
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
else
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG1,Control Register 1"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "BURST LENGTH+1,/SS edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
endif
|
|
group 0x0c++0x03
|
|
line.long 0x00 "INT1,Interrupt Control Register 1"
|
|
bitfld.long 0x00 8. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " BOEN ,Bit Counter Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHEN ,RXFIFO Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THEN ,TXFIFO Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
group 0x10++0x03
|
|
line.long 0x00 "DMAREG1,DMA Control Register 1"
|
|
bitfld.long 0x00 5. " RFDEN ,RXFIFO Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHDEN ,RXFIFO Half Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THDEN ,TXFIFO Half Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
group 0x14++0x03
|
|
line.long 0x00 "STATREG1,Status Register 1"
|
|
eventfld.long 0x00 8. " TC , Transfer Completed" "Busy,Completed"
|
|
eventfld.long 0x00 7. " BO ,Bit Counter Overflow" "Not overflowed,Overflowed"
|
|
bitfld.long 0x00 6. " RO ,RXFIFO Overflow" "Available,Overflowed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RH ,RXFIFO Half Full" "Less then 4,4 or more"
|
|
bitfld.long 0x00 3. " RR ,RXFIFO Ready" "No data,More than 1 word"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 1. " TH ,TXFIFO Half Empty" "More than 4 words,4 or fewer words"
|
|
bitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PERIODREG1,Sample Period Control Register 1"
|
|
bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x00 0.--14. 1. " SAMPLEPERIOD ,Sample Period Control"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "TESTREG1,Test Control Register 1"
|
|
bitfld.long 0x00 15. " SWAP ,Data Swap" "Unchanged,Swapped"
|
|
bitfld.long 0x00 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x00 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x00 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
width 0x16
|
|
tree.end
|
|
tree "CSPI 2"
|
|
base asd:0x50010000
|
|
width 10.
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "RXDATA2,Receive Data Register 2"
|
|
in
|
|
wgroup 0x04++0x03
|
|
line.long 0x00 "TXDATA2,Transmit Data Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data"
|
|
if ((data.long(asd:0x50010008)&0x02)==0x02)
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG2,Control Register 2"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "Only one,Multiple"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 3. " SMC ,Start Mode Control" "After write 1 to XCH,Immediately"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy"
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
else
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG2,Control Register 2"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "BURST LENGTH+1,/SS edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
endif
|
|
group 0x0c++0x03
|
|
line.long 0x00 "INT2,Interrupt Control Register 2"
|
|
bitfld.long 0x00 8. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " BOEN ,Bit Counter Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHEN ,RXFIFO Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THEN ,TXFIFO Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
group 0x10++0x03
|
|
line.long 0x00 "DMAREG2,DMA Control Register 2"
|
|
bitfld.long 0x00 5. " RFDEN ,RXFIFO Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHDEN ,RXFIFO Half Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THDEN ,TXFIFO Half Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
group 0x14++0x03
|
|
line.long 0x00 "STATREG2,Status Register 2"
|
|
eventfld.long 0x00 8. " TC , Transfer Completed" "Busy,Completed"
|
|
eventfld.long 0x00 7. " BO ,Bit Counter Overflow" "Not overflowed,Overflowed"
|
|
bitfld.long 0x00 6. " RO ,RXFIFO Overflow" "Available,Overflowed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RH ,RXFIFO Half Full" "Less then 4,4 or more"
|
|
bitfld.long 0x00 3. " RR ,RXFIFO Ready" "No data,More than 1 word"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 1. " TH ,TXFIFO Half Empty" "More than 4 words,4 or fewer words"
|
|
bitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PERIODREG2,Sample Period Control Register 2"
|
|
bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x00 0.--14. 1. " SAMPLEPERIOD ,Sample Period Control"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "TESTREG2,Test Control Register 2"
|
|
bitfld.long 0x00 15. " SWAP ,Data Swap" "Unchanged,Swapped"
|
|
bitfld.long 0x00 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x00 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x00 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
width 0x16
|
|
tree.end
|
|
tree "CSPI 3"
|
|
base asd:0x53f84000
|
|
width 10.
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "RXDATA3,Receive Data Register 3"
|
|
in
|
|
wgroup 0x04++0x03
|
|
line.long 0x00 "TXDATA3,Transmit Data Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data"
|
|
if ((data.long(asd:0x53f84008)&0x02)==0x02)
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG3,Control Register 3"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "Only one,Multiple"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 3. " SMC ,Start Mode Control" "After write 1 to XCH,Immediately"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy"
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
else
|
|
group 0x08++0x03
|
|
line.long 0x00 "CONREG3,Control Register 3"
|
|
bitfld.long 0x00 24.--25. " CHIPSELECT ,Chip Select" "/SS0,/SS1,/SS2,/SS3"
|
|
bitfld.long 0x00 20.--21. " DRCTL ,SPI Data Ready Control" "Not important,Failing edge,Low level,/RSV"
|
|
bitfld.long 0x00 16.--18. " DATARATE ,SPI Data Rate Control" "Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
bitfld.long 0x00 7. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
bitfld.long 0x00 6. " SSCTL ,SPI SS Wave Form Select" "BURST LENGTH+1,/SS edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
bitfld.long 0x00 4. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled"
|
|
endif
|
|
group 0x0c++0x03
|
|
line.long 0x00 "INT3,Interrupt Control Register 3"
|
|
bitfld.long 0x00 8. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " BOEN ,Bit Counter Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHEN ,RXFIFO Half Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THEN ,TXFIFO Half Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
group 0x10++0x03
|
|
line.long 0x00 "DMAREG3,DMA Control Register 3"
|
|
bitfld.long 0x00 5. " RFDEN ,RXFIFO Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RHDEN ,RXFIFO Half Full DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THDEN ,TXFIFO Half Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
group 0x14++0x03
|
|
line.long 0x00 "STATREG3,Status Register 3"
|
|
eventfld.long 0x00 8. " TC , Transfer Completed" "Busy,Completed"
|
|
eventfld.long 0x00 7. " BO ,Bit Counter Overflow" "Not overflowed,Overflowed"
|
|
bitfld.long 0x00 6. " RO ,RXFIFO Overflow" "Available,Overflowed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RH ,RXFIFO Half Full" "Less then 4,4 or more"
|
|
bitfld.long 0x00 3. " RR ,RXFIFO Ready" "No data,More than 1 word"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 1. " TH ,TXFIFO Half Empty" "More than 4 words,4 or fewer words"
|
|
bitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PERIODREG3,Sample Period Control Register 3"
|
|
bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x00 0.--14. 1. " SAMPLEPERIOD ,Sample Period Control"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "TESTREG3,Test Control Register 3"
|
|
bitfld.long 0x00 15. " SWAP ,Data Swap" "Unchanged,Swapped"
|
|
bitfld.long 0x00 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x00 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x00 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
width 0x16
|
|
tree.end
|
|
tree.end
|
|
tree.open "EPIT (Enhanced Periodic Interrupt Timer)"
|
|
tree "EPIT 1"
|
|
base asd:0x53f94000
|
|
width 11.
|
|
if ((data.long(asd:0x53f94000)&0x8)==0x8)
|
|
group 0x00++0x03
|
|
line.long 0x00 "EPITCR1,EPIT Control Register"
|
|
bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set"
|
|
bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOZEN ,EPIT Doze Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EPIT ,EPITWait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset"
|
|
hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RLD ,Counter Reload Control" "0xFFFFFFFF,Modulus register"
|
|
bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,Load value"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled"
|
|
else
|
|
group 0x00++0x03
|
|
line.long 0x00 "EPITCR1,EPIT Control Register"
|
|
bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set"
|
|
bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOZEN ,EPIT Doze Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EPIT ,EPITWait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset"
|
|
hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RLD ,Counter Reload Control" "0xFFFFFFFF,Modulus register"
|
|
bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,0xFFFFFFFF"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled"
|
|
endif
|
|
group 0x04--0x10
|
|
line.long 0x00 "EPITSR1,EPIT Status Register"
|
|
eventfld.long 0x00 0. " OCIF ,Output Compare Interrupt Flag" "Not occurred,Occurred"
|
|
;group 0x08++0x03
|
|
line.long 0x04 "EPITLR1,EPIT Load Register"
|
|
hexmask.long 0x04 0.--31. 1. " LOAD ,Load Value"
|
|
;group 0x0c++0x03
|
|
line.long 0x08 "EPITCMPR1,EPIT Compare Register"
|
|
hexmask.long 0x08 0.--31. 1. " COMPARE ,Compare Value"
|
|
rgroup 0x10++0x03
|
|
line.long 0x00 "EPITCNT1,EPIT Counter Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Value"
|
|
width 0x14
|
|
tree.end
|
|
tree "EPIT 2"
|
|
base asd:0x53f98000
|
|
width 11.
|
|
if ((data.long(asd:0x53f98000)&0x8)==0x8)
|
|
group 0x00++0x03
|
|
line.long 0x00 "EPITCR2,EPIT Control Register"
|
|
bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set"
|
|
bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOZEN ,EPIT Doze Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EPIT ,EPITWait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset"
|
|
hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RLD ,Counter Reload Control" "0xFFFFFFFF,Modulus register"
|
|
bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,Load value"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled"
|
|
else
|
|
group 0x00++0x03
|
|
line.long 0x00 "EPITCR2,EPIT Control Register"
|
|
bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set"
|
|
bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOZEN ,EPIT Doze Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EPIT ,EPITWait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset"
|
|
hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RLD ,Counter Reload Control" "0xFFFFFFFF,Modulus register"
|
|
bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,0xFFFFFFFF"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled"
|
|
endif
|
|
group 0x04--0x10
|
|
line.long 0x00 "EPITSR2,EPIT Status Register"
|
|
eventfld.long 0x00 0. " OCIF ,Output Compare Interrupt Flag" "Not occurred,Occurred"
|
|
;group 0x08++0x03
|
|
line.long 0x04 "EPITLR2,EPIT Load Register"
|
|
hexmask.long 0x04 0.--31. 1. " LOAD ,Load Value"
|
|
;group 0x0c++0x03
|
|
line.long 0x08 "EPITCMPR2,EPIT Compare Register"
|
|
hexmask.long 0x08 0.--31. 1. " COMPARE ,Compare Value"
|
|
rgroup 0x10++0x03
|
|
line.long 0x00 "EPITCNT2,EPIT Counter Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Value"
|
|
width 0x14
|
|
tree.end
|
|
tree.end
|
|
tree "FIRI (Fast Infrared Interface)"
|
|
base asd:0x53f8c000
|
|
width 0x9
|
|
group 0x00++0x1f
|
|
line.long 0x00 "FIRITCR,Transmitter Control Register"
|
|
bitfld.long 0x00 24. " HAG ,Hardware Address Generator" "Read from FIFO,Use TPA bits"
|
|
hexmask.long 0x00 16.--23. 1. " TPA ,Transmit Packet Address"
|
|
bitfld.long 0x00 13.--14. " SRF ,Start Field Repeat Factor" "16 PA or 2 STA,32 PA or 4 STA,64 PA or 8 STA,128 PA or 16 STA"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " TDT ,Transmitter DMA Request Trigger Level" "Empty,16 bytes,32 bytes,48 bytes,64 bytes,80 bytes,96 bytes,112 bytes"
|
|
bitfld.long 0x00 9. " TCIE ,Transmit Complete Interrupt Enable" "Not triggered,Triggered"
|
|
bitfld.long 0x00 8. " TPEIE ,Transmit Packet End Interrupt Enable" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TFUIE ,Transmitter FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PCF ,Packet Complete By FIFO" "CRC and STO fields,Packet abort symbol"
|
|
bitfld.long 0x00 5. " PC ,Packet Complete" "CRC and STO fields,Packet abort symbol"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SIP ,SIP Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPP ,Transmitter Pulse Polarity" "Not inverted,Inverted"
|
|
bitfld.long 0x00 1.--2. " TM ,Transmitter Mode" "4 Mbps FIR,0.576 Mbps MIR,1.152 Mbps MIR,Software Packet Assembling"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TE ,Transmitter Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FIRITCTR,FIRI Transmitter Count Register"
|
|
hexmask.long.word 0x04 0.--10. 1. " TPL ,Transmit Packet Length"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "FIRIRCR,FIRI Receiver Control Register"
|
|
bitfld.long 0x08 24.--25. " RAM ,Address Match" "Not matched,Matched to RA bits,Matched to broadcast,Matched to RA bits and Broadcast"
|
|
textline " "
|
|
hexmask.long.byte 0x08 16.--23. 1. " RA ,Determine Receiver Packet Address"
|
|
bitfld.long 0x08 11. " RPEDE ,Receiver Packet End DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " RDT ,Receiver DMA Request Trigger Level" "Reserved,16 bytes,32 bytes,48 bytes,64 bytes,80 bytes,96 bytes,112 bytes"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RPA ,Receiver Packet Abort" "FIFO not cleared,FIFO cleared"
|
|
bitfld.long 0x08 6. " RPEIE ,Receiver Packet End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " PAIE ,Packet Abort Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RFOIE ,Receiver FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RPP ,Receiver Pulse Polarity" "Not inverted,Inverted"
|
|
bitfld.long 0x08 1.--2. " RM ,Reciever Mode" "FIR,0.576 Mbps MIR,1.152 Mbps MIR,Software Packet Assembling"
|
|
textline " "
|
|
bitfld.long 0x08 0. " RE ,Receiver Enable" "Disabled,Enabled"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "FIRITSR,FIRI Transmit Status Register"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " TFP ,Transmitter FIFO Pointer"
|
|
eventfld.long 0x0c 3. " TC ,Transmit Complete" "Not completed,Completed"
|
|
eventfld.long 0x0c 2. " SIPE ,SIP End" "Not completed,Transmitted"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " TPE ,Transmitter Packet End" "Not completed,Transmitted"
|
|
eventfld.long 0x0c 0. " TXU ,Transmitter FIFO Underrun" "No underrun,Underrun"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "FIRIRSR,FIRI Receive Status Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. " RFP ,Receiver FIFO Pointer"
|
|
bitfld.long 0x10 5. " PAS ,Preamble Search" "Not search,Search"
|
|
eventfld.long 0x10 4. " RPE ,Receiver Packet End" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x10 3. " RFO ,Receiver FIFO Overrun" "Not overrun,Overrun"
|
|
eventfld.long 0x10 2. " BAM ,Broadcast Address Match" "No Broadcast,Broadcast"
|
|
eventfld.long 0x10 1. " CRCE ,CRC Error" "No failure,Failure"
|
|
textline " "
|
|
eventfld.long 0x10 0. " DDE ,DD Error" "No error,Error"
|
|
;group 0x1c++0x03
|
|
line.long 0x1c "FIRICR,FIRI Control Register"
|
|
hexmask.long.byte 0x1c 5.--11. 1. " BL ,Burst Length"
|
|
bitfld.long 0x1c 0.--3. " OSF ,Over Sampling Factor" "Not oversampled,Oversampled by 2,Oversampled by 3,Oversampled by 4,Oversampled by 5,Oversampled by 6,Oversampled by 7,Oversampled by 8,Oversampled by 9,Oversampled by 10,Oversampled by 11,Oversampled by 12,Oversampled by 13,Oversampled by 14,Oversampled by 15,Oversampled by 16"
|
|
wgroup 0x14++0x03
|
|
line.long 0x00 "FIRITR,Transmitter FIFO"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "FIRIRE,Receiver FIFO"
|
|
width 0xf
|
|
tree.end
|
|
tree "GPT (General Purpose Timer)"
|
|
base asd:0x53f90000
|
|
width 9.
|
|
group 0x00--0x1b
|
|
line.long 0x00 "GPTCR,GPT Control Register"
|
|
bitfld.long 0x00 31. " FO3 ,Force Output Compare Channel 3" "No effect,Compared"
|
|
bitfld.long 0x00 30. " F02 ,Force Output Compare Channel 2" "No effect,Compared"
|
|
bitfld.long 0x00 29. " FO1 ,Force Output Compare Channel 1" "No effect,Compared"
|
|
bitfld.long 0x00 26.--28. " OM3 ,Output Compare Channel 3 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " OM2 ,Output Compare Channel 2 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 20.--22. " OM1 ,Output Compare Channel 1 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 18.--19. " IM2 ,Input Capture Channel 2 Operating Mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.long 0x00 16.--17. " IM1 ,Input Capture Channel 1 Operating Mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "Normal,Reset"
|
|
bitfld.long 0x00 9. " FRR ,Freerun Or Restart Mode" "Reset,Freerun"
|
|
bitfld.long 0x00 6.--8. " CLKSRC ,Clock Source Select" "No clock,ipg_clk,ipg_clk_highfreq,ipp_ind_clkin,ipg_clk_32k,?..."
|
|
bitfld.long 0x00 5. " STOPEN ,GPT Stop Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DOZEN ,GPT Doze Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAITEN ,GPT Wait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBGEN ,GPT Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENMODE ,GPT Enable Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,GPT Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "GPTPR,GPT Prescaler Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " PRESCALER ,Prescaler"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "GPTSR,GPT Status Register"
|
|
eventfld.long 0x08 5. " ROV ,Rollover Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x08 4. " IF2 ,Input Capture 2 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x08 3. " IF1 ,Input Capture 1 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x08 2. " OF3 ,Output Compare 3 Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x08 1. " OF2 ,Output Compare 2 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x08 0. " OF1 ,Output Compare 1Flag" "Not occurred,Occurred"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "GPTIR,GPT Interrupt Register"
|
|
bitfld.long 0x0C 5. " ROV ,Rollover Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " IF2IE ,Input Capture 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " IF1IE ,Input Capture 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " OF3IE ,Output Compare 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OF2IE ,Output Compare 2Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " OF1IE ,Output Compare 1Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "GPTOCR1,GPT Output Compare Register 1"
|
|
hexmask.long 0x10 0.--31. 1. " COMP ,Compare Value"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "GPTOCR2,GPT Output Compare Register 2"
|
|
hexmask.long 0x14 0.--31. 1. " COMP ,Compare Value"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "GPTOCR3,GPT Output Compare Register 3"
|
|
hexmask.long 0x18 0.--31. 1. " COMP ,Compare Value"
|
|
rgroup 0x1c++0x0b
|
|
line.long 0x00 "GPTICR1,GPT Input Capture Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CAPT ,Capture Value"
|
|
;rgroup 0x20++0x03
|
|
line.long 0x04 "GPTICR2,GPT Input Capture Register 2"
|
|
hexmask.long 0x04 0.--31. 1. " CAPT ,Capture Value"
|
|
;rgroup 0x24++0x03
|
|
line.long 0x08 "GPTCNT,GPT Counter Register"
|
|
hexmask.long 0x08 0.--31. 1. " COUNT ,Counter Value"
|
|
tree.end
|
|
tree.open "I2C (Inter-Integrated Circuit)"
|
|
tree "I2C 1"
|
|
base asd:0x43F80000
|
|
width 7.
|
|
group 0x00++0x01
|
|
line.word 0x00 "IADR1,I2C Address Register"
|
|
hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address"
|
|
group 0x04++0x01
|
|
line.word 0x00 "IFDR1,I2C Frequency Divider Register"
|
|
hexmask.word.byte 0x00 0.--5. 1. " IC ,I2C Clock Rate Divider"
|
|
group 0x08++0x01
|
|
line.word 0x00 "I2CR1,I2C Control Register"
|
|
bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "Acknowledge,No acknowledge"
|
|
bitfld.word 0x00 2. " RSTA ,Repeated START" "Not repeated,Repeated"
|
|
group 0x0c++0x01
|
|
line.word 0x00 "I2SR1,I2C Status Register"
|
|
bitfld.word 0x00 7. " ICF ,Data Transferring" "In progress,Completed"
|
|
bitfld.word 0x00 6. " IAAS ,I2C Addressed As a Slave" "Not addressed,Addressed"
|
|
bitfld.word 0x00 5. " IBB ,I2C Bus Busy" "Idle,Busy"
|
|
bitfld.word 0x00 4. " IAL ,Arbitration Lost" "No arbitration,Arbitration"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SRW ,Slave Read/Write" "Slave receive,Slave transmit"
|
|
bitfld.word 0x00 1. " IIF ,I2C Interrupt" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " RXAK ,Received Acknowledge" "Acknowledge,No acknowledge"
|
|
group 0x10++0x01
|
|
line.word 0x00 "I2DR1,I2C Data I/O Register"
|
|
hexmask.word.byte 0x00 0.--07. 1. " DATA ,I2C Data"
|
|
width 0x16
|
|
tree.end
|
|
tree "I2C 2"
|
|
base asd:0x43F98000
|
|
width 7.
|
|
group 0x00++0x01
|
|
line.word 0x00 "IADR2,I2C Address Register"
|
|
hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address"
|
|
group 0x04++0x01
|
|
line.word 0x00 "IFDR2,I2C Frequency Divider Register"
|
|
hexmask.word.byte 0x00 0.--5. 1. " IC ,I2C Clock Rate Divider"
|
|
group 0x08++0x01
|
|
line.word 0x00 "I2CR2,I2C Control Register"
|
|
bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "Acknowledge,No acknowledge"
|
|
bitfld.word 0x00 2. " RSTA ,Repeated START" "Not repeated,Repeated"
|
|
group 0x0c++0x01
|
|
line.word 0x00 "I2SR2,I2C Status Register"
|
|
bitfld.word 0x00 7. " ICF ,Data Transferring" "In progress,Completed"
|
|
bitfld.word 0x00 6. " IAAS ,I2C Addressed As a Slave" "Not addressed,Addressed"
|
|
bitfld.word 0x00 5. " IBB ,I2C Bus Busy" "Idle,Busy"
|
|
bitfld.word 0x00 4. " IAL ,Arbitration Lost" "No arbitration,Arbitration"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SRW ,Slave Read/Write" "Slave receive,Slave transmit"
|
|
bitfld.word 0x00 1. " IIF ,I2C Interrupt" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " RXAK ,Received Acknowledge" "Acknowledge,No acknowledge"
|
|
group 0x10++0x01
|
|
line.word 0x00 "I2DR2,I2C Data I/O Register"
|
|
hexmask.word.byte 0x00 0.--07. 1. " DATA ,I2C Data"
|
|
width 0x16
|
|
tree.end
|
|
tree "I2C 3"
|
|
base asd:0x43F84000
|
|
width 7.
|
|
group 0x00++0x01
|
|
line.word 0x00 "IADR3,I2C Address Register"
|
|
hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address"
|
|
group 0x04++0x01
|
|
line.word 0x00 "IFDR3,I2C Frequency Divider Register"
|
|
hexmask.word.byte 0x00 0.--5. 1. " IC ,I2C Clock Rate Divider"
|
|
group 0x08++0x01
|
|
line.word 0x00 "I2CR3,I2C Control Register"
|
|
bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "Acknowledge,No acknowledge"
|
|
bitfld.word 0x00 2. " RSTA ,Repeated START" "Not repeated,Repeated"
|
|
group 0x0c++0x01
|
|
line.word 0x00 "I2SR3,I2C Status Register"
|
|
bitfld.word 0x00 7. " ICF ,Data Transferring" "In progress,Completed"
|
|
bitfld.word 0x00 6. " IAAS ,I2C Addressed As a Slave" "Not addressed,Addressed"
|
|
bitfld.word 0x00 5. " IBB ,I2C Bus Busy" "Idle,Busy"
|
|
bitfld.word 0x00 4. " IAL ,Arbitration Lost" "No arbitration,Arbitration"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SRW ,Slave Read/Write" "Slave receive,Slave transmit"
|
|
bitfld.word 0x00 1. " IIF ,I2C Interrupt" "Not pending,Pending"
|
|
bitfld.word 0x00 0. " RXAK ,Received Acknowledge" "Acknowledge,No acknowledge"
|
|
group 0x10++0x01
|
|
line.word 0x00 "I2DR3,I2C Data I/O Register"
|
|
hexmask.word.byte 0x00 0.--07. 1. " DATA ,I2C Data"
|
|
width 0x16
|
|
tree.end
|
|
tree.end
|
|
tree.open "IPU (Image Processing Unit)"
|
|
base asd:0x53fc0000
|
|
width 21.
|
|
tree "CSPI Common Registers"
|
|
group 0x00--0x1b
|
|
line.long 0x00 "IPU_CONF,CSPI Configuration Register"
|
|
bitfld.long 0x00 8. " PXL_ENDIAN ,Pixel Endianess" "Little,Big"
|
|
bitfld.long 0x00 7. " DU_EN ,Debug Unit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DI_EN ,Display Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADC_EN ,Asynchronous Display Controller Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SDC_EN ,Synchronous Display Controller Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PF_EN ,Postfilter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ROT_EN ,Rotation Unit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IC_EN ,Image Converter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CSI_EN ,Camera Sensor Interface Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "IPU_CHA_BUF0_RDY,CSPI Channels Buffer 0 Ready Register"
|
|
bitfld.long 0x04 31. " DMAPF_7_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 30. " DMAPF_6_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 29. " DMAPF_5_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 28. " DMAPF_4_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 27. " DMAPF_3_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 26. " DMAPF_2_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 25. " DMAPF_1_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 24. " DMAPF_0_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DMAADC_7_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 22. " DMAADC_6_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DMAADC_5_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 20. " DMAADC_4_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DMAADC_3_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 18. " DMAADC_2_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 17. " DMASDC_3_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 16. " DMASDC_2_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DMASDC_1_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 14. " DMASDC_0_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 13. " DMAIC_13_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 12. " DMAIC_12_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DMAIC_11_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 10. " DMAIC_10_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 9. " DMAIC_9_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 8. " DMAIC_8_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DMAIC_7_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 6. " DMAIC_6_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DMAIC_5_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 4. " DMAIC_4_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DMAIC_3_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 2. " DMAIC_2_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DMAIC_1_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x04 0. " DMAIC_0_BUF0_RDY ,Buffer 0 Is Ready" "Not ready,Ready"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "IPU_CHA_BUF1_RDY,CSPI Channels Buffer 1 Ready Register"
|
|
bitfld.long 0x08 31. " DMAPF_7_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 30. " DMAPF_6_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 29. " DMAPF_5_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 28. " DMAPF_4_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 27. " DMAPF_3_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 26. " DMAPF_2_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DMAPF_1_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 24. " DMAPF_0_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 23. " DMAADC_7_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 22. " DMAADC_6_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 21. " DMAADC_5_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 20. " DMAADC_4_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 19. " DMAADC_3_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 18. " DMAADC_2_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 17. " DMASDC_3_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 16. " DMASDC_2_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 15. " DMASDC_1_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 14. " DMASDC_0_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DMAIC_13_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 12. " DMAIC_12_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 11. " DMAIC_11_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 10. " DMAIC_10_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 9. " DMAIC_9_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 8. " DMAIC_8_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 7. " DMAIC_7_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 6. " DMAIC_6_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 5. " DMAIC_5_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 4. " DMAIC_4_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 3. " DMAIC_3_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 2. " DMAIC_2_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DMAIC_1_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
bitfld.long 0x08 0. " DMAIC_0_BUF1_RDY ,Buffer 1 Is Ready" "Not ready,Ready"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "IPU_CHA_DB_MODE_SEL,IPU Channel Double Buffer Mode Select Register"
|
|
bitfld.long 0x0C 29. " DMAPF_5_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 26. " DMAPF_2_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " DMAADC_3_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 18. " DMAADC_2_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " DMASDC_2_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 15. " DMASDC_1_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 14. " DMASDC_0_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 13. " DMAIC_13_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " DMAIC_12_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 11. " DMAIC_11_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " DMAIC_10_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 9. " DMAIC_9_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " DMAIC_8_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 7. " DMAIC_7_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " DMAIC_6_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 5. " DMAIC_5_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " DMAIC_4_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 3. " DMAIC_3_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " DMAIC_2_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
bitfld.long 0x0C 1. " DMAIC_1_DBMS ,Double Buffer Mode Select" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " DMAIC_0_DBMS ,Double Buffer Mode Select" "Not used,Used"
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|
;group 0x10++0x03
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|
line.long 0x10 "IPU_CHA_CUR_BUF,IPU Channel Current Buffer Register"
|
|
bitfld.long 0x10 31. " DMAPF_7_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
bitfld.long 0x10 30. " DMAPF_6_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 29. " DMAPF_5_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
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|
bitfld.long 0x10 28. " DMAPF_4_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 27. " DMAPF_3_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 26. " DMAPF_2_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 25. " DMAPF_1_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
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|
bitfld.long 0x10 24. " DMAPF_0_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 23. " DMAADC_7_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
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bitfld.long 0x10 22. " DMAADC_6_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 21. " DMAADC_5_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
bitfld.long 0x10 20. " DMAADC_4_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 19. " DMAADC_3_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
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bitfld.long 0x10 18. " DMAADC_2_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 17. " DMASDC_3_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
bitfld.long 0x10 16. " DMASDC_2_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 15. " DMASDC_1_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
bitfld.long 0x10 14. " DMASDC_0_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
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|
textline " "
|
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bitfld.long 0x10 13. " DMAIC_13_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 12. " DMAIC_12_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 11. " DMAIC_11_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 10. " DMAIC_10_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 9. " DMAIC_9_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 8. " DMAIC_8_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 7. " DMAIC_7_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
bitfld.long 0x10 6. " DMAIC_6_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 5. " DMAIC_5_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 4. " DMAIC_4_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
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bitfld.long 0x10 3. " DMAIC_3_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 2. " DMAIC_2_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
|
textline " "
|
|
bitfld.long 0x10 1. " DMAIC_1_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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bitfld.long 0x10 0. " DMAIC_0_CUR_BUF ,Current Buffer" "Buffer 0,Buffer 1"
|
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;group 0x14++0x03
|
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line.long 0x14 "IPU_FS_PROC_FLOW,IPU Frame Synchronization Processing Flow Register"
|
|
bitfld.long 0x14 28.--30. " PP_ROT_DEST_SEL ,Rotation For Post-Processing Destination Select" "MCU,Post-processing,ADC 1,ADC 2,SDC background,SDC foreground,RSV,RSV"
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|
textline " "
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bitfld.long 0x14 24.--26. " PP_DEST_SEL ,Post-Processing Destination Select" "MCU,Post-processing,ADC 1,ADC 2,SDC background,SDC foreground,ADC direct PP,RSV"
|
|
textline " "
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|
bitfld.long 0x14 20.--22. " PRPVF_ROT_DEST_SEL ,Rotation For View-Finder Destination Select" "MCU,RSV,ADC 1,ADC 2,SDC background,SDC foreground,RSV,RSV"
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|
textline " "
|
|
bitfld.long 0x14 16.--18. " PRPVF_DEST_SEL ,Pre-Processing For View-Finder Destination Select" "MCU,View-finder,ADC 1,ADC 2,SDC background,SDC foreground,ADC direct VF,RSV"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " PF_DEST_SEL ,Post-Filtering Destination Select" "MCU,Post-Processing,Rotation for post-processing,RSV"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " PP_ROT_SRC_SEL ,Rotation For Post Processing Source Select" "MCU,Post-processing,Post-filtering,RSV"
|
|
textline " "
|
|
bitfld.long 0x14 8.--9. " PP_SRC_SEL ,Post-Processing Source Select" "MCU,Post-filtering,Rotation for post-processing,RSV"
|
|
textline " "
|
|
bitfld.long 0x14 6. " PRPVF_ROT_SRC_SEL ,Rotation For View-Finder Source Select" "MCU,View-finder"
|
|
textline " "
|
|
bitfld.long 0x14 5. " PRPENC_ROT_SRC_SEL ,Rotation For Encoding Source Select" "MCU,Encoding"
|
|
textline " "
|
|
bitfld.long 0x14 4. " PRPENC_DEST_SEL ,Pre-Processing For Encoding Destination Select" "MCU,Encoding rotation"
|
|
textline " "
|
|
bitfld.long 0x14 1. " VF_IN_VALID ,View-Finder Input Valid" "Skip buffer,Use buffer"
|
|
textline " "
|
|
bitfld.long 0x14 0. " ENC_IN_VALID ,Encoding Input Valid" "Skip buffer,Use buffer"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "IPU_FS_DISP_FLOW,IPU Frame Synchronization Displaying Flow Register"
|
|
hexmask.long.word 0x18 16.--25. 1. " AUTO_REF_PER ,Autorefresh Period Minus 1"
|
|
textline " "
|
|
bitfld.long 0x18 12.--14. " ADC3_SRC_SEL ,ADC System Channel 2 Source Select" "MCU,Rotation for view-finder,Rotation for view-finder,View-finder,Post-processing,Snooping ch 2,Autorefresh,Autorefresh with snooping ch 2"
|
|
textline " "
|
|
bitfld.long 0x18 8.--10. " ADC2_SRC_SEL ,ADC System Channel 1 Source Select" "MCU,Rotation for view-finder,Rotation for post-processing,View-finder,Post-processing,Snooping ch1,Autorefresh,Autorefresh with snooping ch 1"
|
|
textline " "
|
|
bitfld.long 0x18 4.--6. " SDC1_SRC_SEL ,SDC Foreground Channel 1 Source Select" "MCU,Rotation for view-finder,Rotation for post-processing,Rotation for Post-processing,Post-processing,RSV,RSV,RSV"
|
|
textline " "
|
|
bitfld.long 0x18 0.--2. " SDC0_SRC_SEL ,SDC Background Channel 0 Source Select" "MCU,Rotation for view-finder,Rotation for post processing,View-finder,Post-processing,RSV,RSV,RSV"
|
|
rgroup 0x1c++0x03
|
|
line.long 0x00 "IPU_TASKS_STAT,IPU Tasks Status Register"
|
|
bitfld.long 0x00 31. " ADC_SYS2CHAN_LOCK ,ADC SYS2 Channel Locked" "Unlocked,Locked"
|
|
bitfld.long 0x00 30. " ADC_SYS1CHAN_LOCK ,ADC SYS1 Channel Locked" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ADC_PPCHAN_LOCK ,ADC Post-Processing Channel Locked" "Unlocked,Locked"
|
|
bitfld.long 0x00 28. " ADC_PRPCHAN_LOCK ,ADC Pre-Processing Channel Locked" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ADCSYS2_TSTAT ,ADC System Channel 2 Task Status" "Idle,Active,W4RDY,RSV"
|
|
bitfld.long 0x00 24.--25. " ADCSYS1_TSTAT ,ADC System Channel 1 Task Status" "Idle,Active,W4RDY,RSV"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " PF_TSTAT ,Post-Flittering Task Status" "Idle,Active,W4RDY,RSV"
|
|
bitfld.long 0x00 20.--21. " PP_ROT_TSTAT ,Rotation for post-Processing Task Status" "Idle,Active,W4RDY,RSV"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " VF_ROT_TSTAT ,Rotation For View-Finder Task Status" "Idle,Active,W4RDY,RSV"
|
|
bitfld.long 0x00 16.--17. " ENC_ROT_TSTAT ,Rotation For Encoding Task Status" "Idle,Active,W4RDY,RSV"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PF_H264_Y_PAUSE ,Status Bit Indicates Pause In The PF Operation" "Not paused,Paused"
|
|
bitfld.long 0x00 13. " SDC_PIX_SKIP ,Status Bit Indicates Skipping Pixels On Synchronous Display" "Not skipped,Skipped"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " PP_TSTAT ,Post-Processing Task Status" "Idle,Active,W4RDY,RSV"
|
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bitfld.long 0x00 9.--10. " VF_TSTAT ,Pre-Processing For View-Finder Task Status" "Idle,Active,W4RDY,RSV"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " ENC_TSTAT ,Encoding Directly From CSI Task Status" "Idle,Active,W4RDY,RSV"
|
|
bitfld.long 0x00 4.--6. " MEM2PRP_TSTAT ,Memory To PRP Task Status" "Idle,Both active,ENC active,VF active,Both pause,RSV,RSV,RSV"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " CSI2MEM_TSTAT ,CSI Directly To Memory Task Status" "Idle,Active,Pause,?..."
|
|
bitfld.long 0x00 0.--1. " CSI_SKIP_TSTAT ,Next VF And ENC Frames Skipping Status In The CSI" "ENC and VF skipped,ENC skipped VF valid,VF skiped ENC valid,ENC and VF valid"
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group 0x20--0x57
|
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line.long 0x00 "IPU_IMA_ADDR,IPU Internal Memory Access Address Register"
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bitfld.long 0x00 16.--19. " MEM_NU ,Memory Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 3.--15. 1. " ROW_NU ,Row Number"
|
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textline " "
|
|
bitfld.long 0x00 0.--2. " WORD_NU ,Word Number" "0,1,2,3,4,5,6,7"
|
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;group 0x24++0x03
|
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line.long 0x04 "IPU_IMA_DATA,IPU Internal Memory Access Data Register"
|
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hexmask.long.word 0x04 16.--31. 1. " IMA_DATA[31:16] ,16-Bit Data Word"
|
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hexmask.long.word 0x04 0.--15. 1. " IMA_DATA[15:0] ,16-Bit Data Word"
|
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;group 0x28++0x03
|
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line.long 0x08 "IPU_INT_CTRL_1,IPU Interrupt Control Register 1"
|
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bitfld.long 0x08 31. " DMAPF_7_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
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bitfld.long 0x08 30. " DMAPF_6_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 29. " DMAPF_5_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " DMAPF_4_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 27. " DMAPF_3_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " DMAPF_2_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DMAPF_1_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " DMAPF_0_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " DMAADC_7_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " DMAADC_6_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " DMAADC_5_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " DMAADC_4_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " DMAADC_3_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " DMAADC_2_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 17. " DMASDC_3_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " DMASDC_2_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " DMASDC_1_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " DMASDC_0_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DMAIC_13_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " DMAIC_12_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " DMAIC_11_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DMAIC_10_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 9. " DMAIC_9_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " DMAIC_8_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " DMAIC_7_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " DMAIC_6_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " DMAIC_5_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " DMAIC_4_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " DMAIC_3_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " DMAIC_2_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DMAIC_1_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " DMAIC_0_EOF_EN ,End Of Frame Of Channel Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x2c++0x03
|
|
line.long 0x0c "IPU_INT_CTRL_2,IPU Interrupt Control Register 2"
|
|
bitfld.long 0x0C 31. " DMAPF_7_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DMAPF_6_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 29. " DMAPF_5_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " DMAPF_4_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DMAPF_3_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " DMAPF_2_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " DMAPF_1_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " DMAPF_0_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " DMAADC_7_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " DMAADC_6_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " DMAADC_5_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " DMAADC_4_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " DMAADC_3_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " DMAADC_2_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " DMASDC_3_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " DMASDC_2_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " DMASDC_1_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " DMASDC_0_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " DMAIC_13_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " DMAIC_12_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " DMAIC_11_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10. " DMAIC_10_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " DMAIC_9_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " DMAIC_8_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " DMAIC_7_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " DMAIC_6_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " DMAIC_5_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " DMAIC_4_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " DMAIC_3_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " DMAIC_2_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " DMAIC_1_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DMAIC_0_NFACK_EN ,Enable New Frame And ACK Of Channel Interrupt" "Disabled,Enabled"
|
|
;group 0x30++0x03
|
|
line.long 0x10 "IPU_INT_CTRL_3,IPU Interrupt Control Register 3"
|
|
bitfld.long 0x10 23. " STOP_MODE_ACK_EN ,Control Of Stop Mode Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " ADC_SYS2_EOF_EN ,Control Of End-Of-Frame Interrupt For The ADC System 2 Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 21. " ADC_SYS1_EOF_EN ,Control Of End-Of-Frame Interrupt For The ADC System 1 Channel" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " ADC_PP_EOF_EN ,Control Of End-Of-Frame Interrupt For The ADC Postprocessing Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ADC_PRP_EOF_EN ,Control Of End-Of-Frame Interrupt For The ADC Preprocessing Channel" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " ADC_DISP12_VSYNC_EN ,Control Of VSYNC Interrupt For Displays 1 And 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " ADC_DISP0_VSYNC_EN ,Control Of VSYNC Interrupt For Display 0" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " SDC_DISP3_VSYNC_EN ,Control Of VSYNC Interrupt For Display 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " DMAADC_3_SBUF_END_EN ,Control Of DMAADC Channel 3 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " DMAADC_2_SBUF_END_EN ,Control Of DMAADC Channel 2 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " DMASDC_2_SBUF_END_EN ,Control Of DMASDC Channel 2 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " DMASDC_1_SBUF_END_EN ,Control Of DMASDC Channel 1 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11. " DMASDC_0_SBUF_END_EN ,Control Of DMASDC Channel 0 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " DMAIC_6_SBUF_END_EN ,Control Of DMAIC Channel 6 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " DMAIC_5_SBUF_END_EN ,Control Of DMAIC Channel 5 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " DMAIC_4_SBUF_END_EN ,Control Of DMAIC Channel 4 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " DMAIC_3_SBUF_END_EN ,Control Of DMAIC Channel 3 Scroll Buffer End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " CSI_EOF_EN ,Enable CSI_EOF Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 5. " CSI_NF_EN ,Enable CSI_NF Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " SERIAL_DATA_FINISH_EN ,Enable The DI Serial Data Finish Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " SDC_MSK_EOF_EN ,Enable SDC Mask EOF Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SDC_FG_EOF_EN ,Enable SDC Foreground EOF Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SDC_BG_EOF_EN ,Enable SDC Background EOF Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " BRK_RQ_STAT_EN ,Enable BRK_RQ Interrupt" "Disabled,Enabled"
|
|
;group 0x34++0x03
|
|
line.long 0x14 "IPU_INT_CTRL_4,IPU Interrupt Control Register 4"
|
|
bitfld.long 0x14 31. " DMAPF_7_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " DMAPF_6_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 29. " DMAPF_5_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 28. " DMAPF_4_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 27. " DMAPF_3_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 26. " DMAPF_2_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 25. " DMAPF_1_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " DMAPF_0_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 23. " DMAADC_7_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " DMAADC_6_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 21. " DMAADC_5_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " DMAADC_4_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 19. " DMAADC_3_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 18. " DMAADC_2_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 17. " DMASDC_3_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " DMASDC_2_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 15. " DMASDC_1_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " DMASDC_0_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 13. " DMAIC_13_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 12. " DMAIC_12_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 11. " DMAIC_11_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 10. " DMAIC_10_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 9. " DMAIC_9_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " DMAIC_8_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " DMAIC_7_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " DMAIC_6_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 5. " DMAIC_5_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " DMAIC_4_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " DMAIC_3_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " DMAIC_2_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " DMAIC_1_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " DMAIC_0_NFB4EOF_ERR_EN ,Control Of NFB4EOF Error Enable" "Disabled,Enabled"
|
|
;group 0x38++0x03
|
|
line.long 0x18 "IPU_INT_CTRL_5,IPU Interrupt Control Register 5"
|
|
bitfld.long 0x18 16. " SAHB_ADDR_ERR_EN ,Enable SAHB_ADDR_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 15. " DI_LLA_LOCK_ERR_EN ,Enable DI_LLA_LOCK_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 14. " DI_ADC_LOCK_ERR_EN ,Enable DI_ADC_LOCK_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 13. " VF_FRM_LOST_ERR_EN ,Enable VF_FRM_LOST_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 12. " ENC_FRM_LOST_ERR_EN ,Enable ENC_FRM_LOST_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " BAYER_FRM_LOST_ERR_EN ,Enable BAYER_FRM_LOST_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 10. " SDC_MSKD_ERR_EN ,Enable SDC_MSK_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " SDC_FGD_ERR_EN ,Enable SDC_FGD_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 8. " SDC_BGD_ERR_EN ,Enable SDC_BGD_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " AHB_M2_ERR_EN ,Enable AHB_M2_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 6. " AHB_M1_ERR_EN ,Enable AHB_M1_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " ADC_SYS2_TEARING_ERR_EN ,Enable ADC_SYS2_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ADC_SYS1_TEARING_ERR_EN ,Enable ADC_SYS1_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " ADC_PP_TEARING_ERR_EN ,Enable ADC_PP_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " VF_BUF_OVF_ERR_EN ,Enable VF_BUF_OVF_ERR Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " ENC_BUF_OVF_ERR_EN ,Enable ENC_BUF_OVF_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " BAYER_BUF_OVF_ERR_EN ,Enable BAYER_BUF_OVF_ERR Interrupt" "Disabled,Enabled"
|
|
;group 0x3c++0x03
|
|
line.long 0x1c "IPU_INT_STAT_1,IPU Interrupt Status Register 1"
|
|
eventfld.long 0x1C 31. " DMAPF_7_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 30. " DMAPF_6_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 29. " DMAPF_5_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 28. " DMAPF_4_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 27. " DMAPF_3_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 26. " DMAPF_2_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 25. " DMAPF_1_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 24. " DMAPF_0_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 23. " DMAADC_7_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 22. " DMAADC_6_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 21. " DMAADC_5_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 20. " DMAADC_4_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 19. " DMAADC_3_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 18. " DMAADC_2_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 17. " DMASDC_3_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 16. " DMASDC_2_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 15. " DMASDC_1_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 14. " DMASDC_0_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 13. " DMAIC_13_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 12. " DMAIC_12_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 11. " DMAIC_11_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 10. " DMAIC_10_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 9. " DMAIC_9_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 8. " DMAIC_8_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 7. " DMAIC_7_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 6. " DMAIC_6_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 5. " DMAIC_5_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 4. " DMAIC_4_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 3. " DMAIC_3_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 2. " DMAIC_2_EOF ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x1C 1. " DMAIC_1_EOF ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x1C 0. " DMAIC_0_EOF ,Interrupt Status" "Cleared,Requested"
|
|
;group 0x40++0x20
|
|
line.long 0x20 "IPU_INT_STAT_2,IPU Interrupt Status Register 2"
|
|
eventfld.long 0x20 31. " DMAPF_7_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 30. " DMAPF_6_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 29. " DMAPF_5_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 28. " DMAPF_4_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 27. " DMAPF_3_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 26. " DMAPF_2_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 25. " DMAPF_1_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 24. " DMAPF_0_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 23. " DMAADC_7_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 22. " DMAADC_6_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 21. " DMAADC_5_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 20. " DMAADC_4_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 19. " DMAADC_3_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 18. " DMAADC_2_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 17. " DMASDC_3_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 16. " DMASDC_2_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 15. " DMASDC_1_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 14. " DMASDC_0_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 13. " DMAIC_13_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 12. " DMAIC_12_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 11. " DMAIC_11_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 10. " DMAIC_10_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 9. " DMAIC_9_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 8. " DMAIC_8_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 7. " DMAIC_7_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 6. " DMAIC_6_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 5. " DMAIC_5_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 4. " DMAIC_4_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 3. " DMAIC_3_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 2. " DMAIC_2_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x20 1. " DMAIC_1_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x20 0. " DMAIC_0_NFACK ,Interrupt Status" "Cleared,Requested"
|
|
;group 0x44++0x03
|
|
line.long 0x24 "IPU_INT_STAT_3,IPU Interrupt Status Register 3"
|
|
eventfld.long 0x24 23. " STOP_MODE_ACK ,Control Of Stop Mode Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 22. " ADC_SYS2_EOF ,Status Of End-Of-Frame Interrupt For The ADC System 2 Channel" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 21. " ADC_SYS1_EOF ,Status Of End-Of-Frame Interrupt For The ADC System 1 Channel" "Cleared,Requested"
|
|
eventfld.long 0x24 20. " ADC_PP_EOF ,Status Of End-Of-Frame Interrupt For The ADC Postprocessing Channel" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 19. " ADC_PRP_EOF ,Status Of End-Of-Frame Interrupt For The ADC Preprocessing Channel" "Cleared,Requested"
|
|
eventfld.long 0x24 18. " ADC_DISP12_VSYNC ,Status Of VSYNC Interrupt For Displays 1 And 2" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 17. " ADC_DISP0_VSYNC ,Status Of VSYNC Interrupt For Display 0" "Cleared,Requested"
|
|
eventfld.long 0x24 16. " SDC_DISP3_VSYNC ,Status Of VSYNC Interrupt For Display 3" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 15. " DMAADC_3_SBUF_END ,Status Of DMASDC Channel 3 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 14. " DMAADC_2_SBUF_END ,Status Of DMAADC Channel 2 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 13. " DMASDC_2_SBUF_END ,Status Of DMASDC Channel 2 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 12. " DMASDC_1_SBUF_END ,Status Of DMASDC Channel 1 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 11. " DMASDC_0_SBUF_END ,Status Of DMASDC Channel 0 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 10. " DMAIC_6_SBUF_END ,Status Of DMAIC Channel 6 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 9. " DMAIC_5_SBUF_END ,Status Of DMAIC Channel 5 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 8. " DMAIC_4_SBUF_END ,Status Of DMAIC Channel 4 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 7. " DMAIC_3_SBUF_END ,Status Of DMAIC Channel 3 Scroll Buffer End Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 6. " CSI_EOF ,Status Of CSI_EOF Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 5. " CSI_NF ,Status Of CSI_NF Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 4. " SERIAL_DATA_FINISH ,Status The DI Serial Data Finish Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 3. " SDC_MSK_EOF ,Status Of SDC Mask EOF Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 2. " SDC_FG_EOF ,Status Of SDC Foreground EOF Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x24 1. " SDC_BG_EOF ,Status Of SDC Background EOF Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x24 0. " BRK_RQ_STAT ,Status Of BRK_RQ Interrupt" "Cleared,Requested"
|
|
;group 0x48++0x03
|
|
line.long 0x28 "IPU_INT_STAT_4,IPU Interrupt Status Register 4"
|
|
eventfld.long 0x28 31. " DMAPF_7_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 30. " DMAPF_6_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 29. " DMAPF_5_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 28. " DMAPF_4_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 27. " DMAPF_3_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 26. " DMAPF_2_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 25. " DMAPF_1_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 24. " DMAPF_0_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 23. " DMAADC_7_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 22. " DMAADC_6_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 21. " DMAADC_5_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 20. " DMAADC_4_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 19. " DMAADC_3_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 18. " DMAADC_2_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 17. " DMASDC_3_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 16. " DMASDC_2_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 15. " DMASDC_1_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 14. " DMASDC_0_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 13. " DMAIC_13_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 12. " DMAIC_12_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 11. " DMAIC_11_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 10. " DMAIC_10_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 9. " DMAIC_9_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 8. " DMAIC_8_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 7. " DMAIC_7_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 6. " DMAIC_6_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 5. " DMAIC_5_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 4. " DMAIC_4_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 3. " DMAIC_3_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 2. " DMAIC_2_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x28 1. " DMAIC_1_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
eventfld.long 0x28 0. " DMAIC_0_NFB4EOF_ERR ,Interrupt Status" "Cleared,Requested"
|
|
;group 0x4c++0x03
|
|
line.long 0x2c "IPU_INT_STAT_5,IPU Interrupt Status Register 5"
|
|
eventfld.long 0x2C 16. " SAHB_ADDR_ERR ,Status Of The SAHB_ADDR_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 15. " DI_LLA_LOCK_ERR ,Status Of The DI_LLA_LOCK_ERR Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x2C 14. " DI_ADC_LOCK_ERR ,Status Of DI_ADC_LOCK_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 13. " VF_FRM_LOST_ERR ,Status Of VF_FRM_LOST_ERR Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x2C 12. " ENC_FRM_LOST_ERR ,Status Of ENC_FRM_LOST_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 11. " BAYER_FRM_LOST_ERR ,Status Of BAYER_FRM_LOST_ERR Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x2C 10. " SDC_MSKD_ERR ,Status Of SDC_MSK_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 9. " SDC_FGD_ERR ,Status Of SDC_FGD_ERR Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x2C 8. " SDC_BGD_ERR ,Status Of SDC_BGD_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 7. " AHB_M2_ERR ,Status Of AHB_M2_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x2C 6. " AHB_M1_ERR ,Status Of AHB_M1_ERR Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x2C 5. " ADC_SYS1_TEARING_ERR ,Status Of ADC_SYS2_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x2C 4. " ADC_SYS1_TEARING_ERR ,Status Of ADC_SYS1_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x2C 3. " ADC_PP_TEARING_ERR ,Status Of ADC_PP_TEARING_ERR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x2C 2. " VF_BUF_OVF_ERR ,Status Of VF_BUF_OVF_ERR Interrupt" "Cleared,Requested"
|
|
eventfld.long 0x2C 1. " ENC_BUF_OVF_ERR ,Status Of ENC_BUF_OVF_ERR Interrupt" "Cleared,Requested"
|
|
textline " "
|
|
eventfld.long 0x2C 0. " BAYER_BUF_OVF_ERR ,Status Of BAYER_BUF_OVF_ERR Interrupt" "Cleared,Requested"
|
|
;group 0x50++0x03
|
|
line.long 0x30 "IPU_BRK_CTRL_1,IPU Break Control Register 1"
|
|
hexmask.long.byte 0x30 24.--31. 1. " BRK_EVNT_NUM ,Break Event Number Minus 1"
|
|
bitfld.long 0x30 21.--23. " BRK_GRP_SEL ,Break Group Select" "Group 0/IPU_INT_STAT_1,Group 1/IPU_INT_STAT_2,Group 2/IPU_INT_STAT_3,Group 3/IPU_INT_STAT_3,Group 4/IPU_INT_STAT_3,?..."
|
|
textline " "
|
|
bitfld.long 0x30 16.--20. " BRK_SIG_SEL ,Break Signal Select" "DMA stop,Freeze,Interrupt,RSV,?..."
|
|
bitfld.long 0x30 12. " SDC_DBG_MASK_DIS ,SDC Debug Mode Channel Mask Disable" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x30 11. " BRK_SIG_COND_EN ,Break On Signal Posedge Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 10. " BRK_COL_COND_EN ,Break On Column Number Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 9. " BRK_ROW_COND_EN ,Break On Row Number Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " BRK_CHA_COND_EN ,Break On Channel Number Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 6.--7. " BRK_RQ_MODE ,Break Request Mode" "DMA stop,Freeze,Interrupt,RSV"
|
|
bitfld.long 0x30 4.--5. " DBG_ENTER_MODE ,Debug Entering Mode" "Forced,Not forced,Forced,Not forced"
|
|
textline " "
|
|
bitfld.long 0x30 2. " DBG_EXIT ,Exit Debug Mode" "Stay,Exit"
|
|
bitfld.long 0x30 1. " FRC_DBG ,Force Entering Debug Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 0. " BRK_EN ,Break Enable" "Disabled,Enabled"
|
|
;group 0x54++0x03
|
|
line.long 0x34 "IPU_BRK_CTRL_2,IPU Break Control Register 2"
|
|
bitfld.long 0x34 31. " CSI_CHA_EN ,Enable CSI Break Condition" "Disabled,Enabled"
|
|
hexmask.long.byte 0x34 26.--30. 1. " BRK_CHA_NUM ,DMA Channel Number For Break Condition"
|
|
hexmask.long.word 0x34 13.--24. 1. " BRK_COL_NUM ,Frame Column Number For Break Condition"
|
|
textline " "
|
|
hexmask.long.word 0x34 0.--12. 1. " BRK_ROW_NUM ,Frame Row Number For Break Condition"
|
|
rgroup 0x58++0x03
|
|
line.long 0x00 "IPU_BRK_STAT,IPU Break Status Register"
|
|
bitfld.long 0x00 2. " BRK_SRC ,IPU Break Acknowledge" "No break,Break"
|
|
bitfld.long 0x00 1. " MCU_DBGRQ ,MCU Debug Request" "Negated,Asserted"
|
|
bitfld.long 0x00 0. " IPU_BREAK_ACK , Break Source" "External,Internal"
|
|
group 0x5c++0x03
|
|
line.long 0x00 "IPU_DIAGB_CTRL,IPU Diagnostic Bus Control Register"
|
|
hexmask.long.byte 0x00 0.--4. 1. " MON_GRP_SEL ,Select Group Of Signals To Be Output Via The Diagnostic Bus"
|
|
tree.end
|
|
width 20.
|
|
tree "CSI Registers"
|
|
group 0x60++0x27
|
|
line.long 0x00 "CSI_SENS_CONF,CSI Sensor Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DIV_RATIO ,Clock Division Ratio Minus 1"
|
|
bitfld.long 0x00 15. " EXT_VSYNC ,External VSYNC Enable" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATA_WIDTH ,Data Width" "Two 4-bit words,8 bits,10 bits,15 bits bayer or generic"
|
|
bitfld.long 0x00 8.--9. " SENS_DATA_FORMAT ,Data Format From The Sensor" "RGB or YUV444,Reserved,YUV422,Bayer or generic data"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SENS_CLK_SRC ,Sensor Clock Source" "SENSB_SENS_CLK,HSP_CLK"
|
|
bitfld.long 0x00 4.--5. " SENS_PRTCL ,Sensor Protocol" "Gated clock,Non-gated clock,CCIR progressive,CCIR interlaced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SENS_PIX_CLK_POL ,Invert Pixel Clock Input" "Not inverted,Inverted"
|
|
bitfld.long 0x00 2. " DATA_POL ,Invert Data Input" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HSYNC_POL ,Invert IPP_IND_SENSB_HSYNC Input" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " VSYNC_POL ,Invert IPP_IND_SENSB_VSYNC Input" "Not inverted,Inverted"
|
|
;group 0x64++0x03
|
|
line.long 0x04 "CSI_SENS_FRM_SIZE,CSI Sensor Frame Size Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " SENS_FRM_HEIGHT ,Sensor Frame Height Minus 1"
|
|
hexmask.long.word 0x04 0.--11. 1. " SENS_FRM_WIDTH ,Sensor Frame Width Winus 1"
|
|
;group 0x68++0x03
|
|
line.long 0x08 "CSI_ACT_FRM_SIZE,CSI Actual Frame Size Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " ACT_FRM_HEIGHT ,Actual Frame Height Minus 1"
|
|
hexmask.long.word 0x08 0.--11. 1. " ACT_FRM_WIDTH ,Actual Frame Width Minus 1"
|
|
;group 0x6c++0x03
|
|
line.long 0x0c "CSI_OUT_FRM_CTRL,CSI Output Frame Control Register"
|
|
bitfld.long 0x0c 29. " HORZ_DWNS ,Enable Horizontal Downsizing By 2" "Disabled,Enabled"
|
|
bitfld.long 0x0c 28. " VERT_DWNS ,Enable Vertical Downsizing By 2" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " IC_TV_MODE ,Convert Interlaced Frame Format" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SKIP_VF4 ,Skip Viewfinder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 24. " SKIP_VF3 ,Skip Viewfinder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 23. " SKIP_VF2 ,Skip Viewfinder Frame" "Valid,Skipped"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SKIP_VF1 ,Skip Viewfinder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 21. " SKIP_VF0 ,Skip Viewfinder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 20. " SKIP_ENC4 ,Skip Encoder Frame" "Valid,Skipped"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SKIP_ENC3 ,Skip Encoder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 18. " SKIP_ENC2 ,Skip Encoder Frame" "Valid,Skipped"
|
|
bitfld.long 0x0c 17. " SKIP_ENC1 ,Skip Encoder Frame" "Valid,Skipped"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SKIP_ENC0 ,Skip Encoder Frame" "Valid,Skipped"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " HSC ,Horizontal Skip"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " VSC ,Vertical Skip"
|
|
;group 0x70++0x03
|
|
line.long 0x10 "CSI_TST_CTRL,CSI Test Control Register"
|
|
bitfld.long 0x10 24. " TEST_GEN_MODE ,Test Generator Mode" "Inactive,Active"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PG_B_VALUE ,Pattern Generator B Value"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PG_G_VALUE ,Pattern Generator G Value"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " PG_R_VALUE ,Pattern Generator R Value"
|
|
;group 0x74++0x03
|
|
line.long 0x14 "CSI_CCIR_CODE_1,CSI CCIR Code Register 1"
|
|
bitfld.long 0x14 24. " CCIR_ERR_DET_EN ,Enable Error Detection And Correction For CCIR Interlaced Mode" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 19.--21. 1. " STRT_FLD0_ACTV ,Start Of Field 0 Active Line Command"
|
|
hexmask.long.byte 0x14 16.--18. 1. " END_FLD0_ACTV ,End Of Field 0 Active Line Command"
|
|
textline " "
|
|
hexmask.long.byte 0x14 9.--11. 1. " STRT_FLD0_BLNK_2ND ,Start Of Field 0 Second Blanking Line Command"
|
|
hexmask.long.byte 0x14 6.--8. 1. " END_FLD0_BLNK_2ND ,End Of Field 0 Second Blanking Line Command"
|
|
hexmask.long.byte 0x14 3.--5. 1. " STRT_FLD0_BLNK_1ST ,Start Of field 0 First Blanking Line Command"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--2. 1. " END_FLD0_BLNK_1ST ,End Of Field 0 First Blanking Line Command"
|
|
;group 0x78++0x03
|
|
line.long 0x18 "CSI_CCIR_CODE_2,CSI CCIR Code Register 2"
|
|
hexmask.long.byte 0x18 19.--21. 1. " STRT_FLD1_ACTV ,Start Of Field 1 Active Line Command"
|
|
hexmask.long.byte 0x18 16.--18. 1. " END_FLD1_ACTV ,End Of Field 1 Active Line Command"
|
|
hexmask.long.byte 0x18 9.--11. 1. " STRT_FLD1_BLNK_2ND ,Start of Field 1 Second Blanking Line Command"
|
|
textline " "
|
|
hexmask.long.byte 0x18 6.--8. 1. " END_FLD1_BLNK_2ND ,End Of Field 1 Second Blanking Line Command"
|
|
hexmask.long.byte 0x18 3.--5. 1. " STRT_FLD1_BLNK_1ST ,Start Of Field 1 First Blanking Line Command"
|
|
hexmask.long.byte 0x18 0.--2. 1. " END_FLD1_BLNK_1ST ,End Of Field 1 First Blanking Line Command"
|
|
;group 0x7c++0x03
|
|
line.long 0x1c "CSI_CCIR_CODE_3,CSI CCIR Code Register 3"
|
|
hexmask.long.tbyte 0x1c 0.--23. 1. " CCIR_PRECOM ,CCIR Pre Command"
|
|
;group 0x80++0x03
|
|
line.long 0x20 "CSI_FLASH_STROBE_1,CSI Flash Strobe Register 1"
|
|
hexmask.long.word 0x20 16.--31. 1. " SENS_ROW_DURATION ,Duration Of Sensor Row Minus 1"
|
|
bitfld.long 0x20 0. " CLOCK_SEL ,Select Clock For Sensor Row Duration Count" "SENSB_MCLK,SENSB_PIX_CLK"
|
|
;group 0x84++0x03
|
|
line.long 0x24 "CSI_FLASH_STROBE_2,CSI Flash Strobe Register 2"
|
|
hexmask.long.word 0x24 16.--31. 1. " STROBE_DURATION ,Strobe Duration Minus 1"
|
|
hexmask.long.word 0x24 3.--15. 1. " STROBE_START_TIME ,Strobe Start Time"
|
|
bitfld.long 0x24 1. " STROBE_POL ,Strobe Polarity Control Bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x24 0. " STROBE_EN ,Strobe Enable Control/Status Bit" "Disabled,Enabled"
|
|
tree.end
|
|
width 16.
|
|
tree "IC Registers"
|
|
group 0x88--0x9f
|
|
line.long 0x00 "IC_CONF,IC Configuration Register"
|
|
bitfld.long 0x00 31. " CSI_MEM_WR_EN ,CSI Direct Memory Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RWS_EN ,Raw Sensor Enable" "Not attached,Attached"
|
|
bitfld.long 0x00 29. " IC_KEY_COLOR_EN ,Key Color Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IC_GLB_LOC_A ,Global Alpha" "Local,Global"
|
|
bitfld.long 0x00 20. " PP_ROT_EN ,Post-Processing Rotation Task Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PP_CMB ,Post-Processing Task Combining Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PP_CSC2 ,Post-Processing Task Color Conversion RGB-->YUV Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PP_CSC1 ,Post-Processing Task Color Conversion YUV-->RGB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PP_EN ,Post-Processing Task Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PRPVF_ROT_EN ,Preprocessing Rotation Task For View-Finder Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PRPVF_CMB ,Preprocessing task for View-Finder Combining Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PRPVF_CSC2 ,Pre-Processing Task For View-Finder Second Color Conversion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PRPVF_CSC1 ,Pre-Processing Task For View-Finder First Color Conversion Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PRPVF_EN ,Pre-Processing Task For View-Finder Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PRPENC_ROT_EN ,Pre-Processing Rotation Task For Encoding Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRPENC_CSC1 ,Pre-Processing Task For Encoding Color Conversion Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PRPENC_EN ,Pre-Processing Task For Encoding Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x04 "IC_PRP_ENC_RSC,IC Preprocessing Encoder Resizing Coefficients Register"
|
|
bitfld.long 0x04 30.--31. " PRPENC_DS_R_V ,Preprocessing Task For Encoding Downsizing Vertical Ratio" "1,2,4,RSV"
|
|
hexmask.long.word 0x04 16.--31. 1. " PRPENC_RS_R_V ,Preprocessing Task For Encoding Resizing Vertical Ratio"
|
|
bitfld.long 0x04 14.--15. " PRPENC_DS_R_H ,Preprocessing Task For Encoding Downsizing Horizontal Ratio" "1,2,4,RSV"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--13. 1. " PRPENC_RS_R_H ,Preprocessing Task For Encoding Resizing Horizontal Ratio"
|
|
;group 0x90++0x03
|
|
line.long 0x08 "IC_PRP_VF_RSC,IC Preprocessing View-Finder Resizing Coefficients Register"
|
|
bitfld.long 0x08 30.--31. " PRPVF_DS_R_V ,Preprocessing Task For Encoding Downsizing Vertical Ratio" "1,2,4,RSV"
|
|
hexmask.long.word 0x08 16.--29. 1. " PRPVF_RS_R_V ,Preprocessing Task For Encoding Resizing Vertical Ratio"
|
|
bitfld.long 0x08 14.--15. " PRPVF_DS_R_H ,Preprocessing Task For Encoding Downsizing Horizontal Ratio" "1,2,4,RSV"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--13. 1. " PRPVF_RS_R_H ,Preprocessing Task For View-Finding Resizing Horizontal Ratio"
|
|
;group 0x94++0x03
|
|
line.long 0x0c "IC_PP_RSC,IC Post-Processing Resizing Coefficients Register"
|
|
bitfld.long 0x0c 30.--31. " PP_DS_R_V ,Post-Processing Task Downsizing Vertical Ratio" "1,2,4,RSV"
|
|
hexmask.long.word 0x0c 16.--29. 1. " PP_RS_R_V ,Post-Processing Task Resizing Vertical Ratio"
|
|
bitfld.long 0x0c 14.--15. " PP_DS_R_H ,Post-Processing Task Downsizing Horizontal Ratio" "1,2,4,RSV"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--13. 1. " PP_RS_R_H ,Post-Processing Task Resizing Horizontal Ratio"
|
|
;group 0x98++0x03
|
|
line.long 0x10 "IC_CMBP_1,IC Combining Parameters Register 1"
|
|
hexmask.long.byte 0x10 8.--15. 1. " IC_PP_ALPHA_V ,Post-Processing Task Global Alpha"
|
|
hexmask.long.byte 0x10 0.--7. 1. " IC_PRPVF_ALPHA_V ,Preprocessing Task For Encoding Global Alpha"
|
|
;group 0x9c++0x03
|
|
line.long 0x14 "IC_CMBP_2,IC Combining Parameters Register 2"
|
|
hexmask.long.byte 0x14 16.--23. 1. " IC_KEY_COLOR_R ,Key Color Red"
|
|
hexmask.long.byte 0x14 8.--15. 1. " IC_KEY_COLOR_G ,Key Color Green"
|
|
hexmask.long.byte 0x14 0.--7. 1. " IC_KEY_COLOR_B ,Key Color Blue"
|
|
tree.end
|
|
width 9.
|
|
tree "PF Registers"
|
|
group 0xa0++0x03
|
|
line.long 0x00 "PF_CONF,PF Configuration Register"
|
|
hexmask.long.word 0x00 16.--21. 1. " H264_Y_PAUSE_ROW ,Number Of The Last Row In The Y Input Frame"
|
|
bitfld.long 0x00 4. " H264_Y_PAUSE_EN ,Enable PF Pause In H264 Mode During Processing Y Component" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PF_TYPE ,Post Filtering Type" "All disabled,MPEG-4 deblocking only,MPEG-4 deringing only,MPEG-4 deblocking and deringing,H.264 deblocking,?..."
|
|
tree.end
|
|
width 16.
|
|
tree "IDMAC Registers"
|
|
group 0xa4++0x0b
|
|
line.long 0x00 "IDMAC_CONF,IDMAC Configuration Register"
|
|
bitfld.long 0x00 8. " SINGLE_AHB_M_EN ,Enable Single Master AHB" "Enabled,Disabled"
|
|
bitfld.long 0x00 4.--6. " SRCNT ,Service Request Counter" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--1. " PRYM ,Priority Mode" "Round robin,Random,Read after write,?..."
|
|
;group 0xa8++0x03
|
|
line.long 0x04 "IDMAC_CHA_EN,IDMAC Channel Enable Register"
|
|
bitfld.long 0x04 31. " DMAPF_7_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " DMAPF_6_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " DMAPF_5_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " DMAPF_4_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " DMAPF_3_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " DMAPF_2_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " DMAPF_1_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DMAPF_0_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " DMAADC_7_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " DMAADC_6_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " DMAADC_5_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " DMAADC_4_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DMAADC_3_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " DMAADC_2_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " DMASDC_3_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " DMASDC_2_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " DMASDC_1_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " DMASDC_0_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " DMAIC_13_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " DMAIC_12_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " DMAIC_11_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " DMAIC_10_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " DMAIC_9_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " DMAIC_8_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DMAIC_7_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " DMAIC_6_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " DMAIC_5_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " DMAIC_4_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " DMAIC_3_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " DMAIC_2_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DMAIC_1_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " DMAIC_0_CHAN_EN ,DMA Channel Enable" "Disabled,Enabled"
|
|
;group 0xac++0x03
|
|
line.long 0x08 "IDMAC_CHA_PRI,IDMAC Channel Priority Register"
|
|
bitfld.long 0x08 31. " DMAPF_7_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 30. " DMAPF_6_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 29. " DMAPF_5_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 28. " DMAPF_4_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 27. " DMAPF_3_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 26. " DMAPF_2_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DMAPF_1_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 24. " DMAPF_0_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 23. " DMAADC_7_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DMAADC_6_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 21. " DMAADC_5_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 20. " DMAADC_4_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " DMAADC_3_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 18. " DMAADC_2_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 17. " DMASDC_3_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 16. " DMASDC_2_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 15. " DMASDC_1_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 14. " DMASDC_0_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DMAIC_13_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 12. " DMAIC_12_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 11. " DMAIC_11_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 10. " DMAIC_10_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 9. " DMAIC_9_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 8. " DMAIC_8_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " DMAIC_7_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 6. " DMAIC_6_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 5. " DMAIC_5_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAIC_4_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 3. " DMAIC_3_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 2. " DMAIC_2_PRI ,DMA Channel Priority" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DMAIC_1_PRI ,DMA Channel Priority" "Low,High"
|
|
bitfld.long 0x08 0. " DMAIC_0_PRI ,DMA Channel Priority" "Low,High"
|
|
rgroup 0xb0++0x03
|
|
line.long 0x00 "IDMAC_CHA_BUSY,IDMAC Channel Busy Register"
|
|
bitfld.long 0x00 31. " DMAPF_7_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 30. " DMAPF_6_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 29. " DMAPF_5_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMAPF_4_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 27. " DMAPF_3_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 26. " DMAPF_2_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAPF_1_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 24. " DMAPF_0_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 23. " DMAADC_7_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMAADC_6_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " DMAADC_5_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 20. " DMAADC_4_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMAADC_3_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 18. " DMAADC_2_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 17. " DMASDC_3_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASDC_2_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 15. " DMASDC_1_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 14. " DMASDC_0_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMAIC_13_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 12. " DMAIC_12_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 11. " DMAIC_11_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMAIC_10_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 9. " DMAIC_9_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 8. " DMAIC_8_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMAIC_7_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 6. " DMAIC_6_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " DMAIC_5_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMAIC_4_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 3. " DMAIC_3_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " DMAIC_2_BUSY ,Channel Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMAIC_1_BUSY ,Channel Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " DMAIC_0_BUSY ,Channel Busy" "Not busy,Busy"
|
|
tree.end
|
|
width 23.
|
|
tree "SDC Registers"
|
|
if (((data.long(asd:0x53fc00b4)&0x3)==0x0))
|
|
group 0xb4++0x03
|
|
line.long 0x00 "SDC_COM_CONFM,SDC Common Configuration Register"
|
|
bitfld.long 0x00 16.--18. " COC ,Cursor Operation Control" "Disabled,Full cursor,Reversed,AND,Reserved,OR,XOR,?..."
|
|
bitfld.long 0x00 15. " DUAL_MODE ,Dual Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SAVE_REFR_EN ,Enable Saving Refresh Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SHARP ,Sharp Panel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " BG_EN ,Background Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MASK_EN ,Mask Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SDC_KEY_COLOR_EN ,Graphic Window Color Keying Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SDC_GLB_LOC_A ,Graphic Window Alpha Mode" "Local,Global"
|
|
bitfld.long 0x00 5. " GWSEL ,Graphic Window Select" "Background,Foreground"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FG_EN ,Foreground Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FG_MCP_FORM ,Foreground Monochrome Data Format" "8 bpp,16-bit"
|
|
bitfld.long 0x00 2. " BG_MCP_FORM ,Background Monochrome Data Format" "8 bpp,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDC_MODE ,SDC Mode" "TFT monochrome,TFT color,YUV progressive,YUV interlaced"
|
|
else
|
|
group 0xb4++0x03
|
|
line.long 0x00 "SDC_COM_CONFM,SDC Common Configuration Register"
|
|
bitfld.long 0x00 16.--18. " COC ,Cursor Operation Control" "Disabled,Full cursor,Reversed,AND,Reserved,OR,XOR,?..."
|
|
bitfld.long 0x00 15. " DUAL_MODE ,Dual Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SAVE_REFR_EN ,Enable Saving Refresh Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SHARP ,Sharp Panel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " BG_EN ,Background Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MASK_EN ,Mask Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SDC_KEY_COLOR_EN ,Graphic Window Color Keying Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SDC_GLB_LOC_A ,Graphic Window Alpha Mode" "Local,Global"
|
|
bitfld.long 0x00 5. " GWSEL ,Graphic Window Select" "Background,Foreground"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FG_EN ,Foreground Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDC_MODE ,SDC Mode" "TFT monochrome,TFT color,YUV progressive,YUV interlaced"
|
|
endif
|
|
group 0xb8--0xe0
|
|
line.long 0x00 "SDC_GRAPH_WIND_CTRL,SDC Graphic Window Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SDC_ALPHA_V ,Graphic Window Alpha Value"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SDC_KEY_COLOR_R ,Graphic Window Color Keying Red Component"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDC_KEY_COLOR_G ,Graphic Window Color Keying Green Component"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " SDC_KEY_COLOR_B ,Graphic Window Color Keying Blue Component"
|
|
;group 0xbc++0x03
|
|
line.long 0x04 "SDC_FG_POS,SDC Foreground Window Position Register"
|
|
hexmask.long.word 0x04 16.--25. 1. " FGXP ,Foreground Window X Position"
|
|
hexmask.long.word 0x04 0.--9. 1. " FGYP ,Foreground Window Y Position"
|
|
;group 0xc0++0x03
|
|
line.long 0x08 "SDC_BG_POS,SDC Background Window Position Register"
|
|
hexmask.long.word 0x08 16.--25. 1. " BGXP ,Background Window X Position"
|
|
hexmask.long.word 0x08 0.--9. 1. " BGYP ,Background Window Y Position"
|
|
;group 0xc4++0x03
|
|
line.long 0x0c "SDC_CUR_POS,SDC Cursor Position Register"
|
|
hexmask.long.byte 0x0c 26.--30. 1. " CXW ,Cursor Width Minus 1"
|
|
hexmask.long.word 0x0c 16.--25. 1. " CXP ,Cursor X Position"
|
|
hexmask.long.byte 0x0c 10.--14. 1. " CYH ,Cursor Height Minus 1"
|
|
hexmask.long.word 0x0c 0.--9. 1. " CYP ,Cursor Y Position"
|
|
;group 0xc8++0x03
|
|
line.long 0x10 "SDC_CUR_BLINK_PWM_CTRL,SDC Cursor Blinking and PWM Contrast Control Register"
|
|
bitfld.long 0x10 25.--26. " SCR ,Source Select" "HSYNC,Pixel clock,HSP_CLK clock,?..."
|
|
bitfld.long 0x10 24. " CC_EN ,Contrast Control Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PWM ,Pulse Width Minus 1"
|
|
bitfld.long 0x10 15. " BK_EN ,Blinking Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " BKDIV ,Blink Divisor Minus 1"
|
|
;group 0xcc++0x03
|
|
line.long 0x14 "SDC_CUR_MAP,SDC Color Cursor Mapping Register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " CUR_COL_R ,Cursor Red Field"
|
|
hexmask.long.byte 0x14 8.--18. 1. " CUR_COL_G ,Cursor Green Field"
|
|
hexmask.long.byte 0x14 0.--7. 1. " CUR_COL_B ,Cursor Blue Field"
|
|
;group 0xd0++0x03
|
|
line.long 0x18 "SDC_HOR_CONF,SDC Horizontal Configuration Register"
|
|
hexmask.long.byte 0x18 26.--31. 1. " H_SYNC_WIDTH ,Horizontal Synchronization Pulse Width Minus 1"
|
|
hexmask.long.word 0x18 16.--25. 1. " SCREEN_WIDTH ,Screen Width Minus 1"
|
|
hexmask.long.byte 0x18 0.--3. 1. " H_SYNC_DELAY ,Horizontal Synchronization Pulse Delay"
|
|
;group 0xd4++0x03
|
|
line.long 0x1c "SDC_VER_CONF,SDC Vertical Configuration Register"
|
|
hexmask.long.byte 0x1c 26.--31. 1. " V_SYNC_WIDTH ,Vertical Synchronization Pulse Width Minus 1"
|
|
hexmask.long.byte 0x1c 16.--25. 1. " SCREEN_HEIGHT ,Screen Height Minus 1"
|
|
bitfld.long 0x1c 0. " V_SYNC_WIDTH_L ,Vertical Synchronization Pulse Width Units" "Pixels,Rows"
|
|
;group 0xd8++0x03
|
|
line.long 0x20 "SDC_SHARP_CONF_1,SDC Sharp Configuration Register 1"
|
|
hexmask.long.word 0x20 16.--25. 1. " REV_TOGGLE_DELAY ,REV Toggle Delay"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PS_FALL_DELAY ,PS Fall Delay Relative To LP Rising Edge"
|
|
hexmask.long.byte 0x20 0.--7. 1. " CLS_RISE_DELAY ,CLS Rise Delay Relative To LP Rising Edge"
|
|
;group 0xdc++0x03
|
|
line.long 0x24 "SDC_SHARP_CONF_2,SDC Sharp Configuration Register 2"
|
|
hexmask.long.word 0x24 16.--25. 1. " PS_RISE_DELAY ,PS Rise Delay Relative To LP Rising Edge"
|
|
hexmask.long.word 0x24 0.--9. 1. " CLS_FALL_DELAY ,CLS Fall Delay Relative To LP Rising Edge"
|
|
tree.end
|
|
width 16.
|
|
tree "ADC Registers"
|
|
group 0xe0--0x123
|
|
line.long 0x00 "ADC_CONF,ADC Configuration Register"
|
|
bitfld.long 0x00 31. " SYS2_DATA_MAP ,Select Data Mapping Rule For The System Channel 2" "Data,Command"
|
|
bitfld.long 0x00 29.--30. " SYS2_ADDR_INC ,Address Increment For The System Channel 2" "Increment by 1,Increment by 2,Reserved,Increment by 4"
|
|
textline " "
|
|
bitfld.long 0x00 27.--28. " SYS2_DISP_NUM ,Display Number For System Channel 2" "0,1,2,?..."
|
|
bitfld.long 0x00 24.--26. " SYS2_MODE ,Control Sequence Generation Mode For System Channel 2" "Disabled,Write,Read,Write in template,Read in template,Write data buffer - RS=0,Write data buffer - RS=1,Write in command buffer"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYS1_DATA_MAP ,Select Data Mapping Rule For The System Channel 1" "Data,Command"
|
|
bitfld.long 0x00 21.--22. " SYS1_ADDR_INC ,Address Increment For The System Channel 1" "Increment by 1,Increment by 2,Reserved,Increment by 4"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " SYS1_DISP_NUM ,Display Number For System Channel 1" "0,1,2,?..."
|
|
bitfld.long 0x00 16.--18. " SYS1_MODE ,Control Sequence Generation Mode For System Channel 1" "Disabled,Write,Read,Write in template,Read in template,Write data buffer - RS=0,Write data buffer - RS=1,Write in command buffer"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SYS2_NO_TEARING ,System Channel 2 Display Synchronization Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SYS1_NO_TEARING ,System Channel 1 Display Synchronization Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PP_NO_TEARING ,The PP Channel Display Synchronization Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PP_DATA_MAP ,Select Data Mapping Rule For The Post-Processing Channel" "Data,Command"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " PP_ADDR_INC ,Post-Processing Channel Display Address Increment Per Display Access" "Increment by 1,Increment by 2,Reserved,Increment by 4"
|
|
bitfld.long 0x00 8.--9. " PP_DISP_NUM ,Post-Processing Channel Display Number" "0,1,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " PRP_DATA_MAP ,Select Data Mapping Rule For The Pre-Processing Channel" "Data,Command"
|
|
bitfld.long 0x00 5.--6. " PRP_ADDR_INC ,Pre-Processing Channel Display Address Increment Per Display Access" "Increment by 1,Increment by 2,Reserved,Increment by 4"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " PRP_DISP_NUM ,Pre-Processing Channel Display Number" "0,1,2,?..."
|
|
bitfld.long 0x00 2. " MCU_CHAN_EN ,MCU Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PP_CHAN_EN ,Enable Post-Processing Channel" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PRP_CHAN_EN ,Enable Pre-Processing Channel" "Disabled,Enabled"
|
|
;group 0xe4++0x03
|
|
line.long 0x04 "ADC_SYSCHA1_SA,ADC System Channel 1 Start Address Register"
|
|
hexmask.long.word 0x04 23.--31. 1. " SYS1_START_TIME ,Delay Between Display Vertical Synchronization Pulse And Start Time"
|
|
hexmask.long.tbyte 0x04 0.--22. 1. " SYS1_CHAN_SA ,System Channel 1 Start Address"
|
|
;group 0xe8++0x03
|
|
line.long 0x08 "ADC_SYSCHA2_SA,ADC System Channel 2 Start Address Register"
|
|
hexmask.long.word 0x08 23.--31. 1. " SYS2_START_TIME ,Delay Between Display Vertical Synchronization Pulse And Start Time"
|
|
hexmask.long.tbyte 0x08 0.--22. 1. " SYS2_CHAN_SA ,Channel 2 Start Address"
|
|
;group 0xec++0x03
|
|
line.long 0x0c "ADC_PRPCHAN_SA,ADC Preprocessing Channel Start Address Register"
|
|
hexmask.long.tbyte 0x0c 0.--22. 1. " PRP_CHAN_SA ,PRP Start Address"
|
|
;group 0xf0++0x03
|
|
line.long 0x10 "ADC_PPCHAN_SA,ADC Post-Processing Channel Start Address Register"
|
|
hexmask.long.word 0x10 23.--31. 1. " PP_START_TIME ,Delay Between Display Vertical Synchronization Pulse And Start Time"
|
|
hexmask.long.tbyte 0x10 0.--22. 1. " PP_CHAN_SA ,PP Start Address"
|
|
;group 0xf4++0x03
|
|
line.long 0x14 "ADC_DISP0_CONF,ADC Display 0 Configuration Register"
|
|
bitfld.long 0x14 15. " MCU_DISP0_DATA_MAP ,Select Data Mapping Rule Used When The MCU Accesses The Display 0" "Data,Command"
|
|
bitfld.long 0x14 14. " MCU_DISP0_DATA_WIDTH ,Generic Data Word Width For Display 0 Access By The MCU" "16 bits,24 bits"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " DISP0_TYPE ,Display 0 Addressing Format" "Full addressing without byte enable,Full addressing with byte enable,XY addressing,?..."
|
|
hexmask.long.word 0x14 0.--11. 1. " DISP0_SL ,Display 0 Stride Line Length Minus 1"
|
|
;group 0xf8++0x03
|
|
line.long 0x18 "ADC_DISP0_RD_AP,ADC Display 0 Read Acknowledge Pattern Register"
|
|
bitfld.long 0x18 24. " DISP0_ACK_MAP ,Select Data Mapping Rule for the Acknowledge Word" "Data,Command"
|
|
hexmask.long.tbyte 0x18 0.--23. 1. " DISP0_ACK_PTRN ,Acknowledge Pattern For The Display 0"
|
|
;group 0xfc++0x03
|
|
line.long 0x1c "ADC_DISP0_RDM,ADC Display 0 Read Mask Register"
|
|
hexmask.long.tbyte 0x1c 0.--23. 1. " DISP0_MASK_ACK_DATA ,The Mask For Display 0 Read Data"
|
|
;group 0x100++0x03
|
|
line.long 0x20 "ADC_DISP0_SS,ADC Display 0 Screen Size Register"
|
|
hexmask.long.word 0x20 16.--25. 1. " SCREEN0_HEIGHT ,Display 0 Screen Height Minus 1"
|
|
hexmask.long.word 0x20 0.--9. 1. " SCREEN0_WIDTH ,Display 0 Screen Width Minus 1"
|
|
;group 0x104++0x03
|
|
line.long 0x24 "ADC_DISP1_CONF,ADC Display 1 Configuration Register"
|
|
bitfld.long 0x24 15. " MCU_DISP1_DATA_MAP ,Select Data Mapping Rule" "Data,Command"
|
|
bitfld.long 0x24 14. " MCU_DISP1_DATA_WIDTH ,Data Word Width For Display 1 Access By The MCU" "16 bits,24 bits"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " DISP1_TYPE ,Display 1 Addressing Format" "Full addressing without byte enable,Full addressing with byte enable,XY addressing,?..."
|
|
hexmask.long.word 0x24 0.--1. 1. " DISP1_SL ,Display 1 Stride Line Length Minus 1"
|
|
;group 0x108++0x03
|
|
line.long 0x28 "ADC_DISP1_RD_AP,ADC Display 1 Read Acknowledge Pattern Register"
|
|
bitfld.long 0x28 24. " DISP1_ACK_MAP ,Select Data Mapping Rule for the Acknowledge Word" "Data,Command"
|
|
hexmask.long.tbyte 0x28 0.--23. 1. " DISP1_ACK_PTRN ,Acknowledge Pattern For The Display 1"
|
|
;group 0x10c++0x03
|
|
line.long 0x2c "ADC_DISP1_RDM,ADC Display 1 Read Mask Register"
|
|
hexmask.long.tbyte 0x2c 0.--23. 1. " DISP1_MASK_ACK_DATA ,Mask For Display 1 Read Data"
|
|
;group 0x110++0x03
|
|
line.long 0x30 "ADC_DISP12_SS,ADC Displays 1 Or 2 Screen Size Register"
|
|
hexmask.long.word 0x30 16.--25. 1. " SCREEN12_HEIGHT ,Display 1 Or 2 Screen Height Minus 1"
|
|
hexmask.long.word 0x30 0.--9. 1. " SCREEN12_WIDTH ,Display 1 Or 2 Screen Width Minus 1"
|
|
;group 0x114++0x03
|
|
line.long 0x34 "ADC_DISP2_CONF,ADC Display 2 Configuration Register"
|
|
bitfld.long 0x34 15. " MCU_DISP2_DATA_MAP ,Select Data Mapping Rule" "Data,Command"
|
|
bitfld.long 0x34 14. " MCU_DISP2_DATA_WIDTH ,Data Word Width For Display 2 Access By The MCU" "16 bits,24 bits"
|
|
textline " "
|
|
bitfld.long 0x34 12.--13. " DISP2_TYPE ,Display 2 Addressing Format" "Full addressing without byte enable,Full addressing with byte enable,XY addressing,?..."
|
|
hexmask.long.word 0x34 0.--11. 1. " DISP2_SL ,Display 2 Stride Line Length Minus 1"
|
|
;group 0x118++0x03
|
|
line.long 0x38 "ADC_DISP2_RD_AP,ADC Display 2 Read Acknowledge Pattern Register"
|
|
bitfld.long 0x38 24. " DISP2_ACK_MAP ,Select Data Mapping Rule for the Acknowledge Word" "Data,Command"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " DISP2_ACK_PTRN ,Acknowledge Pattern For The Display 2"
|
|
;group 0x11c++0x03
|
|
line.long 0x3c "ADC_DISP2_RDM,ADC Display 2 Read Mask Register"
|
|
hexmask.long.tbyte 0x3c 0.--23. 1. " DISP2_MASK_ACK_DATA ,Mask For Display 2 Read Data"
|
|
;group 0x120++0x03
|
|
line.long 0x40 "ADC_DISP_VSYNC,ADC Displays Vertical Synchronization Register"
|
|
bitfld.long 0x40 30. " DISP12_VSYNC_WIDTH_L ,Resolution Of DISP0_VSYNC_WIDTH For Fhe Displays 1 Or 2" "Pixels,Lines"
|
|
hexmask.long.byte 0x40 24.--29. 1. " DISP12_VSYNC_WIDTH ,VSYNC Pulse Width Minus 1"
|
|
bitfld.long 0x40 22. " DISP0_VSYNC_WIDTH_L ,Resolution Of DISP0_VSYNC_WIDTH For The Display 0" "Pixels,Lines"
|
|
textline " "
|
|
hexmask.long.byte 0x40 16.--21. 1. " DISP0_VSYNC_WIDTH ,VSYNC Pulse Width Minus 1 Of The Display 0"
|
|
hexmask.long.word 0x40 6.--15. 1. " DISP_LN_WT ,Delay Between The Start Point Of The First Sensor Row And The VSYNC Pulse"
|
|
bitfld.long 0x40 4. " DISP12_VSYNC_SEL ,Selection Of The Displays 1 Or 2" "1,2"
|
|
textline " "
|
|
bitfld.long 0x40 2.--3. " DISP12_VSYNC_MODE ,Displays 1 Or 2 Vertical Synchronization Mode" "Disabled,ADC internal VSYNC,ADC internal VSYNC and synchronization,External VSYNC"
|
|
textline " "
|
|
bitfld.long 0x40 0.--1. " DISPL0_VSYNC_MODE ,Display 0 Vertical Synchronization Mode" "Disabled,ADC internal VSYNC,ADC internal VSYNC and synchronization,External VSYNC"
|
|
tree.end
|
|
width 23.
|
|
tree "DI Registers"
|
|
group 0x124++0x97
|
|
line.long 0x00 "DI_DISP_IF_CONF,DI Display Interface Configuration Register"
|
|
bitfld.long 0x00 27.--30. " DISP012_DEAD_CLK_NUM ,Number Of Dead Clock Cycles" "4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19"
|
|
textline " "
|
|
bitfld.long 0x00 26. " DISP3_CLK_IDLE ,Display 3 Interface Clock Idle Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DISP3_CLK_SEL ,Select Display 3 Interface Clock" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DISP3_DATAMSK ,Data Mask For The Display 3" "Normal,Equals 0"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " DISP2_PAR_BURST_MODE ,Display 2 Parallel Interface Burst Mode" "Burst access ,Burst access with separate BCLK,Single access,?..."
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " DISP2_IF_MODE ,Display 2 Interface Mode" "System 80 (type 1),System 80 (type 2),System 68k (type 1),System 68k (type 2),Serial 3-wire,Serial 4-wire,Serial 5-wire with serial clock,Serial 5-wire with CS signal"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DISP2_EN ,Display 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DISP1_PAR_BURST_MODE ,Display 1 Parallel Interface Burst Mode" "Burst access,Burst access with separate BCL,Single access,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " DISP1_IF_MODE ,Display 1 Interface Mode" "System 80 (type 1),System 80 (type 2),System 68k (type 1),System 68k (type 2),Serial 3-wire,Serial 4-wire,Serial 5-wire with serial clock,Serial 5-wire with CS signal"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DISP1_EN ,Display 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " DISP0_PAR_BURST_MODE ,Display 0 Parallel Interface Burst Mode" "Burst access,Burst access with separate BCL,Single access,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DISP0_IF_MODE ,Display 0 Interface Mode" "System 80 (type 1),System 80 (type 2),System 68k (type 1),System 68k (type 2)"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DISP0_EN ,Display 0 Enable" "Disabled,Enabled"
|
|
;group 0x128++0x03
|
|
line.long 0x04 "DI_DISP_SIG_POL,DI Display Signals Polarity Register"
|
|
bitfld.long 0x04 31. " D2_BCLK_POL ,Display Parallel Interface Burst Clock Polarity For The Display 2" "Straight,Inverse"
|
|
bitfld.long 0x04 30. " D1_BCLK_POL ,Display Parallel Interface Burst Clock Polarity For The Display 1" "Straight,Inverse"
|
|
bitfld.long 0x04 29. " D0_BCLK_POL ,Display Parallel Interface Burst Clock Polarity For The Display 0" "Straight,Inverse"
|
|
textline " "
|
|
bitfld.long 0x04 28. " D3_VSYNC_POL ,Vertical Synchronization Signal Polarity For The Display 3" "Low,High"
|
|
bitfld.long 0x04 27. " D3_HSYNC_POL ,Horizontal Synchronization Signal Polarity For The Display 3" "Low,High"
|
|
bitfld.long 0x04 26. " D3_DRDY_SHARP_POL ,Output Enable Polarity Or Sharp Signals Polarity For Display 3" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 25. " D3_CLK_POL ,Display Interface Clock Polarity For The Display 3" "Straight,Inverse"
|
|
bitfld.long 0x04 24. " D3_DATA_POL ,Data Polarity For The Display 3" "Straight,Inverse"
|
|
bitfld.long 0x04 23. " D2_SER_RS_POL ,Address Bit Polarity For The Display 2 Serial Interface" "Straight,Inverse"
|
|
textline " "
|
|
bitfld.long 0x04 22. " D2_SD_CLK_POL ,Serial Interface Clock Polarity For The Display 2" "Straight,Inverse"
|
|
bitfld.long 0x04 21. " D2_SD_D_POL ,Serial Data Polarity For The Display 2" "Straight,Inverse"
|
|
bitfld.long 0x04 20. " D2_RD_POL ,Write Signal Polarity For The Display 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " D2_WR_POL ,Write Signal Polarity For The Display 2" "Low,High"
|
|
bitfld.long 0x04 18. " D2_PAR_RS_POL ,Address Bit Polarity For The Display 2 Parallel Interface" "Straight,Inverse"
|
|
bitfld.long 0x04 17. " D2_CS_POL ,Chip Select Signal Polarity For The Display 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 16. " D2_DATA_POL ,Data Polarity For The Display 2" "Straight,Inverse"
|
|
bitfld.long 0x04 15. " D1_SER_RS_PO ,Address Bit Polarity For The Display 1" "Straight,Inverse"
|
|
bitfld.long 0x04 14. " D1_SD_CLK_POL ,Serial Interface Clock Polarity For The Display 1" "Straight,Inverse"
|
|
textline " "
|
|
bitfld.long 0x04 13. " D1_SD_D_POL ,Serial Data Polarity For The Display 1" "Straight,Inverse"
|
|
bitfld.long 0x04 12. " D1_RD_POL ,Write Signal Polarity For The Display 1" "Low,High"
|
|
bitfld.long 0x04 11. " D1_WR_POL ,Write Signal Polarity For The Display 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 10. " D1_PAR_RS_POL ,Address Bit Polarity For The Display 1 Parallel Interface" "Straight,Inverse"
|
|
bitfld.long 0x04 9. " D1_CS_POL ,Chip Select Signal Polarity For The Display 1" "Low,High"
|
|
bitfld.long 0x04 8. " D1_DATA_POL ,Data Polarity For The Display 1" "Straight,Inverse"
|
|
textline " "
|
|
bitfld.long 0x04 6. " D12_VSYNC_POL ,Vertical Synchronization Signal Polarity For The Displays 1 And 2" "Low,High"
|
|
bitfld.long 0x04 5. " D0_VSYNC_POL ,Vertical Synchronization Signal Polarity For The Display 0" "Low,High"
|
|
bitfld.long 0x04 4. " D0_RD_POL ,Write Signal Polarity For The Display 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " D0_WR_POL ,Write Signal Polarity For The Display 0" "Low,High"
|
|
bitfld.long 0x04 2. " D0_PAR_RS_POL ,Address Bit Polarity For The Display 0 Parallel Interface" "Straight,Inverse"
|
|
bitfld.long 0x04 1. " D0_CS_POL ,Chip Select Signal Polarity For The Display 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 0. " D0_DATA_POL ,Data Polarity For The Display 0" "Straight,Inverse"
|
|
;group 0x12c++0x03
|
|
line.long 0x08 "DI_SER_DISP1_CONF,DI Serial Display 1 Configuration Register"
|
|
bitfld.long 0x08 24. " DISP1_SER_BURST_MODE ,Burst Mode Enable" "Single,Burst"
|
|
hexmask.long.byte 0x08 16.--20. 1. " DISP1_SER_BIT_NUM ,Output/Input Data Bit Number Minus 1"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " DISP1_PREAMBLE ,Preamble Contents"
|
|
bitfld.long 0x08 4.--6. " DISP1_PREAMBLE_LENGTH ,Preamble Length Minus 1 In Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
textline " "
|
|
bitfld.long 0x08 1.--2. " DISP1_RW_CONFIG ,Configuration Of Read/Write (RW) Control Bit" "No RW bit,RW bit is sent before RS,RW bit is sent after RS,?..."
|
|
bitfld.long 0x08 0. " DISP1_PREAMBLE_EN ,Preamble Enable" "Disabled,Enabled"
|
|
;group 0x130++0x03
|
|
line.long 0x0c "DI_SER_DISP2_CONF,DI Serial Display 2 Configuration Register"
|
|
bitfld.long 0x0c 24. " DISP2_SER_BURST_MODE ,Burst Mode Enable" "Single,Burst"
|
|
hexmask.long.byte 0x0c 16.--20. 1. " DISP2_SER_BIT_NUM ,Output/Input Data Bit Number Minus 1"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--15. 1. " DISP2_PREAMBLE ,Preamble Contents"
|
|
bitfld.long 0x0c 4.--6. " DISP2_PREAMBLE_LENGTH ,Preamble Length Minus 1 In Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
textline " "
|
|
bitfld.long 0x0c 1.--2. " DISP2_RW_CONFIG ,Configuration Of Read/Write (RW) Control Bit" "No RW bit,RW bit is sent before RS,RW bit is sent after RS,?..."
|
|
bitfld.long 0x0c 0. " DISP2_PREAMBLE_EN ,Preamble Enable" "Disabled,Enabled"
|
|
;group 0x134++0x03
|
|
line.long 0x10 "DI_HSP_CLK_PER,DI HSP_CLK Period Register"
|
|
hexmask.long.byte 0x10 16.--22. 1. " HSP_CLK_PERIOD_2 ,HSP_CLK Period Option 2"
|
|
hexmask.long.byte 0x10 0.--6. 1. " HSP_CLK_PERIOD_1 ,HSP_CLK Period Option 1"
|
|
;group 0x138++0x03
|
|
line.long 0x14 "DI_DISP0_TIME_CONF_1,DI Display 0 Time Configuration Register 1"
|
|
hexmask.long.word 0x14 22.--31. 1. " DISP0_IF_CLK_DOWN_WR ,Display 0 Interface Clock Falling Edge Position For Display Write Access"
|
|
hexmask.long.word 0x14 12.--21. 1. " DISP0_IF_CLK_UP_WR ,Display 0 Interface Clock Falling Edge Position For Display Write Access"
|
|
hexmask.long.word 0x14 0.--11. 1. " DISP0_IF_CLK_PER_WR ,Display 0 Interface Clock Period For Display Write Access"
|
|
;group 0x13c++0x03
|
|
line.long 0x18 "DI_DISP0_TIME_CONF_2,DI Display 0 Time Configuration Register 2"
|
|
hexmask.long.word 0x18 22.--31. 1. " DISP0_IF_CLK_DOWN_RD ,Display 0 Interface Clock Falling Edge Position For Display Read Access"
|
|
hexmask.long.word 0x18 12.--21. 1. " DISP0_IF_CLK_UP_RD ,Display 0 Interface Clock rising Edge Position For Display Read Access"
|
|
hexmask.long.word 0x18 0.--11. 1. " DISP0_IF_CLK_PER_RD ,Display 0 Interface Clock Period For Display Read Access"
|
|
;group 0x140++0x03
|
|
line.long 0x1c "DI_DISP0_TIME_CONF_3,DI Display 0 Time Configuration Register 3"
|
|
bitfld.long 0x1c 28.--29. " DISP0_RD_WAIT_ST ,Contains The Number Of Wait States Required To Read Data From The Display" "0,1,2,3"
|
|
hexmask.long.word 0x1c 16.--25. 1. " DISP0_READ_EN ,Display 0 Read Point Position"
|
|
hexmask.long.word 0x1c 0.--11. 1. " DISP0_PIX_CLK_PER ,Display 0 Pixel Clock Period"
|
|
;group 0x144++0x03
|
|
line.long 0x20 "DI_DISP1_TIME_CONF_1,DI Display 1 Time Configuration Register 1"
|
|
hexmask.long.word 0x20 22.--31. 1. " DISP1_IF_CLK_DOWN_WR ,Display 1 Interface Clock Falling Edge Position For Display Write Access"
|
|
hexmask.long.word 0x20 12.--21. 1. " DISP1_IF_CLK_UP_WR ,Display 1 Interface Clock Rising Edge Position For Display Write Access"
|
|
hexmask.long.word 0x20 0.--11. 1. " DISP1_IF_CLK_PER_WR ,Display 1 Interface Clock Period For Display Write Access"
|
|
;group 0x148++0x03
|
|
line.long 0x24 "DI_DISP1_TIME_CONF_2,DI Display 1 Time Configuration Register 2"
|
|
hexmask.long.word 0x24 22.--31. 1. " DISP1_IF_CLK_DOWN_RD ,Display 1 Interface Clock Falling Edge Position For Display Read Access"
|
|
hexmask.long.word 0x24 12.--21. 1. " DISP1_IF_CLK_UP_RD ,Display 1 Interface Clock Rising Edge Position For Display Read Access"
|
|
hexmask.long.word 0x24 0.--11. 1. " DISP1_IF_CLK_PER_RD ,Display 1 Interface Clock Period For Display Read Access"
|
|
;group 0x14c++0x03
|
|
line.long 0x28 "DI_DISP1_TIME_CONF_3,DI Display 1 Time Configuration Register 3"
|
|
bitfld.long 0x28 28.--29. " DISP1_RD_WAIT_ST ,Contains The Number Of Wait States Required To Read Data From The Display" "0,1,2,3"
|
|
hexmask.long.word 0x28 16.--25. 1. " DISP1_READ_EN ,Display 1 Read Point Position"
|
|
hexmask.long.word 0x28 0.--11. 1. " DISP12_PIX_CLK_PER ,Displays 1 And 2 Pixel Clock Period"
|
|
;group 0x150++0x03
|
|
line.long 0x2c "DI_DISP2_TIME_CONF_1,DI Display 2 Time Configuration Register 1"
|
|
hexmask.long.word 0x2c 22.--31. 1. " DISP2_IF_CLK_DOWN_WR ,Display 2 Interface Clock Falling Edge Position For Display Write Access"
|
|
hexmask.long.word 0x2c 12.--21. 1. " DISP2_IF_CLK_UP_WR ,Display 2 Interface Clock Rising Edge Position For Display Write Access"
|
|
hexmask.long.word 0x2c 0.--11. 1. " DISP2_IF_CLK_PER_WR ,Display 2 Interface Clock Period For Display Write Access"
|
|
;group 0x154++0x03
|
|
line.long 0x30 "DI_DISP2_TIME_CONF_2,DI Display 2 Time Configuration Register 2"
|
|
hexmask.long.word 0x30 22.--31. 1. " DISP2_IF_CLK_DOWN_RD ,Display 2 Interface Clock Falling Edge Position For Display Read Access"
|
|
hexmask.long.word 0x30 12.--21. 1. " DISP2_IF_CLK_UP_RD ,Display 2 Interface Clock Rising Edge Position For Display Read Access"
|
|
hexmask.long.word 0x30 0.--11. 1. " DISP2_IF_CLK_PER_RD ,Display 2 Interface Clock Period For Display Read Access"
|
|
;group 0x158++0x03
|
|
line.long 0x34 "DI_DISP2_TIME_CONF_3,DI Display 2 Time Configuration Register 3"
|
|
bitfld.long 0x34 28.--29. " DISP2_RD_WAIT_ST ,Contains The Number Of Wait States Required To Read Data From The Display" "0,1,2,3"
|
|
hexmask.long.word 0x34 16.--25. 1. " DISP2_READ_EN ,Display 2 Read Point Position"
|
|
;group 0x15c++0x03
|
|
line.long 0x38 "DI_DISP3_TIME_CONF,DI Display 3 Time Configuration Register"
|
|
hexmask.long.word 0x38 22.--31. 1. " DISP3_IF_CLK_DOWN_WR ,Display 3 Interface Clock Falling Edge Position For Display Write Access"
|
|
hexmask.long.word 0x38 12.--21. 1. " DISP3_IF_CLK_UP_WR ,Display 3 Interface Clock Rising Edge Position For Display Write Access"
|
|
hexmask.long.word 0x38 0.--11. 1. " DISP3_IF_CLK_PER_WR ,Display 3 Interface Clock Period For Display Write Access"
|
|
;group 0x160++0x03
|
|
line.long 0x3c "DI_DISP0_DB0_MAP,DI Display 0 Data Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x3c 26.--30. 1. " MD00_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x3c 21.--25. 1. " MD00_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x3c 16.--20. 1. " MD00_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x3c 14.--15. " MD00_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x3c 12.--13. " MD00_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x3c 10.--11. " MD00_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x3c 8.--9. " MD00_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x3c 6.--7. " MD00_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x3c 4.--5. " MD00_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x3c 2.--3. " MD00_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x3c 0.--1. " MD00_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x164++0x03
|
|
line.long 0x40 "DI_DISP0_DB1_MAP,DI Display 0 Data Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x40 26.--30. 1. " MD01_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x40 21.--25. 1. " MD01_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x40 16.--20. 1. " MD01_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x40 14.--15. " MD01_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x40 12.--13. " MD01_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x40 10.--11. " MD01_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x40 8.--9. " MD01_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x40 6.--7. " MD01_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x40 4.--5. " MD01_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x40 2.--3. " MD01_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x40 0.--1. " MD01_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x168++0x03
|
|
line.long 0x44 "DI_DISP0_DB2_MAP,DI Display 0 Data Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x44 26.--30. 1. " MD02_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x44 21.--25. 1. " MD02_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x44 16.--20. 1. " MD02_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x44 14.--15. " MD02_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x44 12.--13. " MD02_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x44 10.--11. " MD02_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x44 8.--9. " MD02_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x44 6.--7. " MD02_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x44 4.--5. " MD02_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x44 2.--3. " MD02_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x44 0.--1. " MD02_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x16c++0x03
|
|
line.long 0x48 "DI_DISP0_CB0_MAP,DI Display 0 Command Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x48 26.--30. 1. " MC00_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x48 21.--25. 1. " MC00_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x48 16.--20. 1. " MC00_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x48 14.--15. " MC00_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x48 12.--13. " MC00_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x48 10.--11. " MC00_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x48 8.--9. " MC00_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x48 6.--7. " MC00_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x48 4.--5. " MC00_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x48 2.--3. " MC00_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x48 0.--1. " MC00_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x170++0x03
|
|
line.long 0x4c "DI_DISP0_CB1_MAP,DI Display 0 Command Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x4c 26.--30. 1. " MC01_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x4c 21.--25. 1. " MC01_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x4c 16.--20. 1. " MC01_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x4c 14.--15. " MC01_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x4c 12.--13. " MC01_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x4c 10.--11. " MC01_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x4c 8.--9. " MC01_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x4c 6.--7. " MC01_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x4c 4.--5. " MC01_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x4c 2.--3. " MC01_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x4c 0.--1. " MC01_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x174++0x03
|
|
line.long 0x50 "DI_DISP0_CB2_MAP,DI Display 0 Command Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x50 26.--30. 1. " MC02_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x50 21.--25. 1. " MC02_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x50 16.--20. 1. " MC02_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x50 14.--15. " MC02_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x50 12.--13. " MC02_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x50 10.--11. " MC02_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x50 8.--9. " MC02_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x50 6.--7. " MC02_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x50 4.--5. " MC02_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x50 2.--3. " MC02_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x50 0.--1. " MC02_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x178++0x03
|
|
line.long 0x54 "DI_DISP1_DB0_MAP,DI Display 1 Data Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x54 26.--30. 1. " MD10_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x54 21.--25. 1. " MD10_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x54 16.--20. 1. " MD10_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x54 14.--15. " MD10_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x54 12.--13. " MD10_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x54 10.--11. " MD10_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x54 8.--9. " MD10_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x54 6.--7. " MD10_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x54 4.--5. " MD10_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x54 2.--3. " MD10_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x54 0.--1. " MD10_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x17c++0x03
|
|
line.long 0x58 "DI_DISP1_DB1_MAP,DI Display 1 Data Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x58 26.--30. 1. " MD11_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x58 21.--25. 1. " MD11_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x58 16.--20. 1. " MD11_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x58 14.--15. " MD11_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x58 12.--13. " MD11_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x58 10.--11. " MD11_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x58 8.--9. " MD11_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x58 6.--7. " MD11_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x58 4.--5. " MD11_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x58 2.--3. " MD11_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x58 0.--1. " MD11_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x180++0x03
|
|
line.long 0x5c "DI_DISP1_DB2_MAP,DI Display 1 Data Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x5c 26.--30. 1. " MD12_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x5c 21.--25. 1. " MD12_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x5c 16.--20. 1. " MD12_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x5c 14.--15. " MD12_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x5c 12.--13. " MD12_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x5c 10.--11. " MD12_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x5c 8.--9. " MD12_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x5c 6.--7. " MD12_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x5c 4.--5. " MD12_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x5c 2.--3. " MD12_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x5c 0.--1. " MD12_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x184++0x03
|
|
line.long 0x60 "DI_DISP1_CB0_MAP,DI Display 1 Command Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x60 26.--30. 1. " MC10_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x60 21.--25. 1. " MC10_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x60 16.--20. 1. " MC10_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x60 14.--15. " MC10_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x60 12.--13. " MC10_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x60 10.--11. " MC10_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x60 8.--9. " MC10_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x60 6.--7. " MC10_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x60 4.--5. " MC10_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x60 2.--3. " MC10_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x60 0.--1. " MC10_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x188++0x03
|
|
line.long 0x64 "DI_DISP1_CB1_MAP,DI Display 1 Command Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x64 26.--30. 1. " MC11_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x64 21.--25. 1. " MC11_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x64 16.--20. 1. " MC11_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x64 14.--15. " MC11_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x64 12.--13. " MC11_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x64 10.--11. " MC11_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x64 8.--9. " MC11_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x64 6.--7. " MC11_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x64 4.--5. " MC11_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x64 2.--3. " MC11_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x64 0.--1. " MC11_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x18c++0x03
|
|
line.long 0x68 "DI_DISP1_CB2_MAP,DI Display 1 Command Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x68 26.--30. 1. " MC12_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x68 21.--25. 1. " MC12_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x68 16.--20. 1. " MC12_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x68 14.--15. " MC12_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x68 12.--13. " MC12_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x68 10.--11. " MC12_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x68 8.--9. " MC12_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x68 6.--7. " MC12_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x68 4.--5. " MC12_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x68 2.--3. " MC12_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x68 0.--1. " MC12_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x190++0x03
|
|
line.long 0x6c "DI_DISP2_DB0_MAP,DI Display 2 Data Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x6c 26.--30. 1. " MD20_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x6c 21.--25. 1. " MD20_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x6c 16.--20. 1. " MD20_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x6c 14.--15. " MD20_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x6c 12.--13. " MD20_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x6c 10.--11. " MD20_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x6c 8.--9. " MD20_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x6c 6.--7. " MD20_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x6c 4.--5. " MD20_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x6c 2.--3. " MD20_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x6c 0.--1. " MD20_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x194++0x03
|
|
line.long 0x70 "DI_DISP2_DB1_MAP,DI Display 2 Data Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x70 26.--30. 1. " MD21_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x70 21.--25. 1. " MD21_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x70 16.--20. 1. " MD21_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x70 14.--15. " MD21_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x70 12.--13. " MD21_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x70 10.--11. " MD21_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x70 8.--9. " MD21_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x70 6.--7. " MD21_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x70 4.--5. " MD21_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x70 2.--3. " MD21_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x70 0.--1. " MD21_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x198++0x03
|
|
line.long 0x74 "DI_DISP2_DB2_MAP,DI Display 2 Data Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x74 26.--30. 1. " MD22_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x74 21.--25. 1. " MD22_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x74 16.--20. 1. " MD22_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x74 14.--15. " MD22_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x74 12.--13. " MD22_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x74 10.--11. " MD22_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x74 8.--9. " MD22_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x74 6.--7. " MD22_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x74 4.--5. " MD22_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x74 2.--3. " MD22_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x74 0.--1. " MD22_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x19c++0x03
|
|
line.long 0x78 "DI_DISP2_CB0_MAP,DI Display 2 Command Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x78 26.--30. 1. " MC20_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x78 21.--25. 1. " MC20_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x78 16.--20. 1. " MC20_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x78 14.--15. " MC20_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x78 12.--13. " MC20_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x78 10.--11. " MC20_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x78 8.--9. " MC20_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x78 6.--7. " MC20_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x78 4.--5. " MC20_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x78 2.--3. " MC20_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x78 0.--1. " MC20_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1a0++0x03
|
|
line.long 0x7c "DI_DISP2_CB1_MAP,DI Display 2 Command Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x7c 26.--30. 1. " MC21_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x7c 21.--25. 1. " MC21_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x7c 16.--20. 1. " MC21_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x7c 14.--15. " MC21_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x7c 12.--13. " MC21_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x7c 10.--11. " MC21_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x7c 8.--9. " MC21_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x7c 6.--7. " MC21_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x7c 4.--5. " MC21_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x7c 2.--3. " MC21_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x7c 0.--1. " MC21_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1a4++0x03
|
|
line.long 0x80 "DI_DISP2_CB2_MAP,DI Display 2 Command Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x80 26.--30. 1. " MC22_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x80 21.--25. 1. " MC22_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x80 16.--20. 1. " MC22_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x80 14.--15. " MC22_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x80 12.--13. " MC22_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x80 10.--11. " MC22_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x80 8.--9. " MC22_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x80 6.--7. " MC22_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x80 4.--5. " MC22_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x80 2.--3. " MC22_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x80 0.--1. " MC22_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1a8++0x03
|
|
line.long 0x84 "DI_DISP3_B0_MAP,MDI Display 3 Byte 0 Mapping Register"
|
|
hexmask.long.byte 0x84 26.--30. 1. " M30_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x84 21.--25. 1. " M30_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x84 16.--20. 1. " M30_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x84 14.--15. " M30_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x84 12.--13. " M30_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x84 10.--11. " M30_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x84 8.--9. " M30_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x84 6.--7. " M30_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x84 4.--5. " M30_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x84 2.--3. " M30_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x84 0.--1. " M30_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1ac++0c03
|
|
line.long 0x88 "DI_DISP3_B1_MAP,DI Display 3 Byte 1 Mapping Register"
|
|
hexmask.long.byte 0x88 26.--30. 1. " M31_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x88 21.--25. 1. " M31_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x88 16.--20. 1. " M31_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x88 14.--15. " M31_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x88 12.--13. " M31_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x88 10.--11. " M31_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x88 8.--9. " M31_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x88 6.--7. " M31_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x88 4.--5. " M31_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x88 2.--3. " M31_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x88 0.--1. " M31_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1b0++0x03
|
|
line.long 0x8c "DI_DISP3_B2_MAP,DI Display 3 Byte 2 Mapping Register"
|
|
hexmask.long.byte 0x8c 26.--30. 1. " M32_OFFS2 ,Offset In Third Clock Cycle"
|
|
hexmask.long.byte 0x8c 21.--25. 1. " M32_OFFS1 ,Offset In Second Clock Cycle"
|
|
hexmask.long.byte 0x8c 16.--20. 1. " M32_OFFS0 ,Offset In First Clock Cycle"
|
|
bitfld.long 0x8c 14.--15. " M32_M7 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x8c 12.--13. " M32_M6 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x8c 10.--11. " M32_M5 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x8c 8.--9. " M32_M4 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x8c 6.--7. " M32_M3 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
textline " "
|
|
bitfld.long 0x8c 4.--5. " M32_M2 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x8c 2.--3. " M32_M1 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
bitfld.long 0x8c 0.--1. " M32_M0 ,Masks For Bit 0" "First,Second,Third,Masked"
|
|
;group 0x1b4++0x03
|
|
line.long 0x90 "DI_DISP_ACC_CC,DI Display Access Cycles Count Register"
|
|
bitfld.long 0x90 12.--13. " 2DISP3_IF_CLK_CNT_D ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
bitfld.long 0x90 10.--11. " DISP2_IF_CLK_CNT_C ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
bitfld.long 0x90 8.--9. " DISP2_IF_CLK_CNT_D ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x90 6.--7. " DISP1_IF_CLK_CNT_C ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
bitfld.long 0x90 4.--5. " DISP1_IF_CLK_CNT_D ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
bitfld.long 0x90 2.--3. " DISP0_IF_CLK_CNT_C ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x90 0.--1. " DISP0_IF_CLK_CNT_D ,Display Clock Cycles Number Minus 1" "1,2,3,4"
|
|
;group 0x1b8++0x03
|
|
line.long 0x94 "DI_DISP_LLA_CONF,DI Display Low Level Access Configuration Register"
|
|
bitfld.long 0x94 5. " DRCT_BE_MODE ,Set Byte Enable Mode For MCU Low Level Access Of The Display" "Off,On"
|
|
bitfld.long 0x94 4. " DRCT_MAP_DC ,Display Mapping Select" "Data,Command"
|
|
bitfld.long 0x94 3. " DRCT_LOCK ,Lock Bit" "Unlock,Lock"
|
|
textline " "
|
|
bitfld.long 0x94 1.--2. " DRCT_DISP_NUM ,The Accessed Display Number" "0,1,2,?..."
|
|
bitfld.long 0x94 0. " DRCT_RS ,Command/Data Address Signal To Display" "RS=0,RS=1"
|
|
hgroup.long 0x1bc++0x03
|
|
hide.long 0x00 "DI_DISP_LLA_DATA,DI Display Low Level Access Data Register"
|
|
in
|
|
tree.end
|
|
tree.end
|
|
tree "KPP (Keypad Port)"
|
|
base asd:0x43fa8000
|
|
width 0x6
|
|
group 0x00--0x08
|
|
line.word 0x00 "KPCR,Keypad Control Register"
|
|
bitfld.word 0x00 15. " KCO7 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 14. " KCO6 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 13. " KCO5 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 12. " KCO4 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
textline " "
|
|
bitfld.word 0x00 11. " KCO3 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 10. " KCO2 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 9. " KCO1 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 8. " KCO0 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
textline " "
|
|
bitfld.word 0x00 7. " KRE7 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 6. " KRE6 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 5. " KRE5 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 4. " KRE4 ,Keypad Row Enable" "Not included,Included"
|
|
textline " "
|
|
bitfld.word 0x00 3. " KRE3 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 2. " KRE2 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 1. " KRE1 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 0. " KRE0 ,Keypad Row Enable" "Not included,Included"
|
|
;group 0x02++0x1
|
|
line.word 0x02 "KPSR,Keypad Status Register"
|
|
bitfld.word 0x02 9. " KRIE ,Keypad Release Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " KDIE ,Keypad Key Depress Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " KRSS ,Key Depress Sunchronizer Set" "No effect,Set chain"
|
|
textline " "
|
|
bitfld.word 0x02 2. " KDSC ,Key Depress Synchronizer Clear" "No effect,Cleared"
|
|
eventfld.word 0x02 1. " KPKR ,Keypad Key Release" "Not released,All released"
|
|
eventfld.word 0x02 0. " KPKD ,Keypad Key Depress" "Not depressed,Depressed"
|
|
;group 0x04++0x01
|
|
line.word 0x04 "KDDR,Keypad Data Direction Register"
|
|
bitfld.word 0x04 15. " KCDD7 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 14. " KCDD6 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 13. " KCDD5 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 12. " KCDD4 ,Keypad Column Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 11. " KCDD3 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 10. " KCDD2 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 9. " KCDD1 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 8. " KCDD0 ,Keypad Column Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 7. " KRDD7 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 6. " KRDD6 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 5. " KRDD5 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 4. " KRDD4 ,Keypad Row Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 3. " KRDD3 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 2. " KRDD2 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 1. " KRDD1 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 0. " KRDD0 ,Keypad Row Data Direction" "Input,Output"
|
|
;group 0x04++0x03
|
|
line.word 0x06 "KPDR,Keypad Data Register"
|
|
bitfld.word 0x06 15. " KCD7 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 14. " KCD6 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 13. " KCD5 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 12. " KCD4 ,Keypad Column Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 11. " KCD3 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 10. " KCD2 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 9. " KCD1 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 8. " KCD0 ,Keypad Column Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 7. " KRD7 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 6. " KRD6 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 5. " KRD5 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 4. " KRD4 ,Keypad Row Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 3. " KRD3 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 2. " KRD2 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 1. " KRD1 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 0. " KRD0 ,Keypad Row Data" "Low,High"
|
|
width 0xf
|
|
tree.end
|
|
tree "MSHC (Memory Stick Host Controller)"
|
|
base asd:0x50024000
|
|
width 19.
|
|
group 0x00++0x00
|
|
line.byte 0x00 "TIMEOUT1,Gasket Timeout Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TOVW[7:0] ,Timeout Value For Wait"
|
|
group 0x14++0x00
|
|
line.byte 0x00 "INTERRUPT_STATUS1,Gasket Interrupt Status/Clear Register"
|
|
bitfld.byte 0x00 7. " IDA ,Illegal Data Access" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 6. " IXFR , Illegal Transfer" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 3. " WFUL ,Write To FIFO When Full" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " REMP ,Read From FIFO When Empty" "Not asserted,Asserted"
|
|
group 0x1C++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE1,Gasket Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " INTEN_IDA ,Illegal Data Access Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " INTEN_IXFR ,Illegal Transfer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " INTEN_WFUL ,Interrupt Enable Bit For A Write Transfer To FIFO With Full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " INTEN_REMP ,Interrupt Enable Bit For A Read Transfer From FIFO With Empty" "Disabled,Enabled"
|
|
base asd:0x50028000
|
|
width 19.
|
|
group 0x00++0x00
|
|
line.byte 0x00 "TIMEOUT2,Gasket Timeout Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TOVW[7:0] ,Timeout Value For Wait"
|
|
group 0x14++0x00
|
|
line.byte 0x00 "INTERRUPT_STATUS2,Gasket Interrupt Status/Clear Register"
|
|
bitfld.byte 0x00 7. " IDA ,Illegal Data Access" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 6. " IXFR , Illegal Transfer" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 3. " WFUL ,Write To FIFO When Full" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " REMP ,Read From FIFO When Empty" "Not asserted,Asserted"
|
|
group 0x1C++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE2,Gasket Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " INTEN_IDA ,Illegal Data Access Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " INTEN_IXFR ,Illegal Transfer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " INTEN_WFUL ,Interrupt Enable Bit For A Write Transfer To FIFO With Full" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " INTEN_REMP ,Interrupt Enable Bit For A Read Transfer From FIFO With Empty" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PWM (Pulse-Width Modulator)"
|
|
base asd:0x53fe0000
|
|
width 8.
|
|
group 0x00--0x13
|
|
line.long 0x00 "PWMCR,PWM Control Register"
|
|
bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" "More or equal to 1,More or equal to 2,More or equal to 3,More or equal to 4"
|
|
bitfld.long 0x00 25. " STOPEN ,Stop Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Normal,Reversed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " HCTR ,Half-Word Data Swap Control" "Not swapped,Swapped"
|
|
bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set,Output cleared,Disconnected,Disconnected"
|
|
bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Disabled,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "PWMSR,PWM Status Register"
|
|
eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "No error,Error"
|
|
eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 4. " ROV ,Roll-Over Status" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x04 3. " FE ,FIFO Empty Status Bit" "Above,Below"
|
|
bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "Not available,1 word,2 words,3 words,4 words,?..."
|
|
;group 0x08++0x03
|
|
line.long 0x08 "PWMIR,PWM Interrupt Register"
|
|
bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RIE ,Roll-Over Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "PWMSAR,PWM Sample Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SAMPLE ,Sample Value"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "PWMPR,PWM Period Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " PERIOD ,Period Value"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "PWMCNR,PWM Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value"
|
|
width 15.
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base asd:0x53fd8000
|
|
width 10.
|
|
group 0x00--0x28
|
|
line.long 0x00 "HOURMIN,RTC Hours And Minutes Counter Register"
|
|
bitfld.long 0x00 8.--12. " HOUR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 0.--5. " MINUTES ,Minutes Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
;group 0x04++0x03
|
|
line.long 0x04 "SECONDS,RTC Seconds Counter Register"
|
|
bitfld.long 0x04 0.--5. " SECONDS ,Seconds Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
;group 0x08++0x03
|
|
line.long 0x08 "ALRM_HM,RTC Hours And Minutes Alarm Register"
|
|
bitfld.long 0x08 8.--12. " HOUR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x08 0.--5. " MINUTES ,Minutes Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "ALRM_SEC,RTC Seconds Alarm Register"
|
|
bitfld.long 0x0c 0.--5. " SECONDS ,Seconds Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
;group 0x10++0x03
|
|
line.long 0x10 "RTCCTL,RTC Control Register"
|
|
bitfld.long 0x10 7. " EN ,Enables/Disables The Real-Time Clock" "Disabled,Enabled"
|
|
bitfld.long 0x10 5.--6. " XTL ,Crystal Selection" "32.768 kHz,32 kHz,38.4 kHz,32.768 kHz"
|
|
bitfld.long 0x10 1. " GEN ,IPG_CLK Gating Enable" "Enabled,Disabled"
|
|
bitfld.long 0x10 0. " SWR ,Software Reset" "No effect,Reset"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "RTCISR,RTC Interrupt Status Register"
|
|
bitfld.long 0x14 15. " SAM7 ,Sampling Timer Interrupt Flag At SAM7 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 14. " SAM6 ,Sampling Timer Interrupt Flag At SAM6 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 13. " SAM5 ,Sampling Timer Interrupt Flag At SAM5 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 12. " SAM4 ,Sampling Timer Interrupt Flag At SAM4 Frequency" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 11. " SAM3 ,Sampling Timer Interrupt Flag At SAM3 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 10. " SAM2 ,Sampling Timer Interrupt Flag At SAM2 frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 9. " SAM1 ,Sampling Timer Interrupt Flag At SAM1 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 8. " SAM0 ,Sampling Timer Interrupt Flag At SAM0 Frequency" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 7. " 2HZ ,2 Hz Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 5. " HR ,Hour Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 4. " 1HZ ,1 Hz Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 3. " DAY ,Day Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 2. " ALM ,Alarm Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 1. " MIN ,Minute Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " SW ,Stopwatch Flag" "Not time out,Timed out"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "RTCIENR,RTC Interrupt Enable Register"
|
|
bitfld.long 0x18 15. " SAM7 ,SAM7 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " SAM6 ,SAM6 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 13. " SAM5 ,SAM5 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 12. " SAM4 ,SAM4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 11. " SAM3 ,SAM3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 10. " SAM2 ,SAM2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " SAM1 ,SAM1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " SAM0 ,SAM0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " 2HZ ,2HZ Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " HR ,Hour Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " 1HZ ,1HZ Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " DAY ,DAY Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " ALM ,Alarm Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " MIN ,Minute Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " SW ,Stopwatch Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x1c++0x03
|
|
line.long 0x1c "STPWCH,RTC Stopwatch Minutes Register"
|
|
bitfld.long 0x1c 0.--5. " CNT ,Stopwatch Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
;group 0x20++0x03
|
|
line.long 0x20 "DAYR,RTC Days Counter Register"
|
|
hexmask.long.word 0x20 0.--15. 1. " DAYS ,Day Setting"
|
|
;group 0x24++0x03
|
|
line.long 0x24 "DAYALARM,RTC Day Alarm Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " DAYSAL ,Day Setting Of The Alarm"
|
|
width 14.
|
|
tree.end
|
|
tree.open "SDHC (Secured Digital Host Controller)"
|
|
tree "SDHC 1 (Secured Digital Host Controller)"
|
|
base asd:0x50004000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "STR_STP_CLK,SDHC Clock Control Register"
|
|
bitfld.long 0x00 3. " SDHCRESET ,SDHC Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " START_CLK ,Start Clock" "No effect,Start"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop Clock" "No effect,Stop"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "STATUS,SDHC Status Register"
|
|
eventfld.long 0x00 31. " CARD_INSERTION ,Card Insertion" "Not inserted,Inserted"
|
|
eventfld.long 0x00 30. " CARD_REMOVAL ,Card Removal" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 29. " YBUF_EMPTY ,Y Data Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 28. " XBUF_EMPTY ,X Data Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 27. " YBUF_FULL ,Y Data Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 26. " XBUF_FULL ,X Data Buffer Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 25. " BUF_UND_RUN ,Buffer Underrun" "Not underrun,Underrun"
|
|
bitfld.long 0x00 24. " BUF_OVFL ,Buffer Overflow" "Not overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SDIO_INT_ACTIVE ,SDIO Interrupt Active" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " END_CMD_RESP ,End Command Response" "Not successfull,Successfull"
|
|
textline " "
|
|
eventfld.long 0x00 12. " WRITE_OP_DONE ,Write Operation Done" "Not completed,Completed"
|
|
eventfld.long 0x00 11. " READ_OP_DONE ,Read Operation Done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " WR_CRC_ERROR_CODE ,Write CRC Error Code" "No error,Error,No CRC,?..."
|
|
bitfld.long 0x00 8. " CARD_BUS_CLK_RUN ,Card Bus Clock Run" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BUF_READ_READY ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " BUF_WRITE_READY ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 5. " RESP_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
eventfld.long 0x00 3. " READ_CRC_ERR ,Read CRC Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WRITE_CRC_ERR ,Write CRC Error" "No error,Error"
|
|
eventfld.long 0x00 1. " TIME_OUT_RESP ,Time Out Response" "No error,Time out"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No error,Time out"
|
|
group 0x08--0x20
|
|
line.long 0x00 "CLK_RATE,SDHC Clock Rate Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " CLK_PRESCALER ,Clock Prescaler"
|
|
bitfld.long 0x00 0.--3. " CLK_DIVIDER ,Clock Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
;group 0x0c++0x03
|
|
line.long 0x04 "CMD_DAT_CONT,SDHC Command And Data Control Register"
|
|
bitfld.long 0x04 15. " CMD_RESUME ,Command Resume" "Not resume,Resume"
|
|
bitfld.long 0x04 12. " CMD_RESP_LONG_OFF ,Command Response Long Off" "Not cleared,Cleared"
|
|
bitfld.long 0x04 11. " STOP_READWAIT ,Stop Read/Wait" "No effect,End cycle"
|
|
textline " "
|
|
bitfld.long 0x04 10. " START_READWAIT ,Start Read/Wait" "No effect,Started"
|
|
bitfld.long 0x04 8.--9. " BUS_WIDTH ,Bus Width" "1-bit,Reserved,4-bit,?..."
|
|
bitfld.long 0x04 7. " INIT ,Initialize" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WRITE_READ ,Write/Read" "Read,Write"
|
|
bitfld.long 0x04 3. " DATA_ENABLE ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " FORMAT_OF_RESPONSE ,Format of Response" "No response,48-bit,136-bit,48-bit,?..."
|
|
;group 0x10++0x03
|
|
line.long 0x08 "RES_TO,SDHC Response Time Out Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RESPONSE_TIME_OUT ,Response Time Out"
|
|
;group 0x14++0x03
|
|
line.long 0x0c "READ_TO,SDHC Read Time Out Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " DATA_READ_TIME_OUT[15:0] ,Data Read Time Out"
|
|
;group 0x18++0x03
|
|
line.long 0x10 "BLK_LEN,SDHC Block Length Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " BLOCK_LENGTH[11:0] ,Block Length"
|
|
;group 0x1c++0x03
|
|
line.long 0x14 "NOB,SDHC Number of Blocks Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " NOB ,Specifies the Number of Blocks in a Block Transfer"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "REV_NO,SDHC Revision Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVISION_NUMBER ,Revision Number"
|
|
group 0x24--0x34
|
|
line.long 0x00 "INT_CNTR,SDHC Interrupt Control Register"
|
|
bitfld.long 0x00 18. " SDIO_INT_WKP_EN ,SDIO Interrupt Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CARD_INSERTION_WKP_EN ,Card Insertion Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CARD_REMOVAL_WKP_EN ,Card Removal Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 15. " CARD_INSERTION_EN ,Card Insertion Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CARD_REMOVAL_EN ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DAT0_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUF_READ_EN ,Bus Read Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " BUF_WRITE_EN ,Bus Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRITE_OP_DONE ,Write Operation Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_OP_DONE ,Read Operation Done" "Disabled,Enabled"
|
|
;group 0x28++0x03
|
|
line.long 0x04 "CMD,SDHC Command Number Register"
|
|
bitfld.long 0x04 0.--5. " COMMAND_NUMBER , Command Number" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
|
|
;group 0x2c++0x03
|
|
line.long 0x08 "ARG,SDHC CMD Argument Register"
|
|
hexmask.long 0x08 0.--31. 1. " ARG ,Command Argument"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "RES_FIFO,SDHC Response FIFO Access Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RESPONSE_CONTENT ,Response Content FIFO Access Register"
|
|
hgroup 0x38++0x03
|
|
hide.long 0x00 "BUFFER_ACCESS,SDHC Data Buffer Access Register"
|
|
in
|
|
width 14.
|
|
tree.end
|
|
tree "SDHC 2 (Secured Digital Host Controller)"
|
|
base asd:0x50008000
|
|
width 15.
|
|
group 0x00++0x03
|
|
line.long 0x00 "STR_STP_CLK,SDHC Clock Control Register"
|
|
bitfld.long 0x00 3. " SDHCRESET ,SDHC Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " START_CLK ,Start Clock" "No effect,Start"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop Clock" "No effect,Stop"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "STATUS,SDHC Status Register"
|
|
eventfld.long 0x00 31. " CARD_INSERTION ,Card Insertion" "Not inserted,Inserted"
|
|
eventfld.long 0x00 30. " CARD_REMOVAL ,Card Removal" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 29. " YBUF_EMPTY ,Y Data Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 28. " XBUF_EMPTY ,X Data Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 27. " YBUF_FULL ,Y Data Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 26. " XBUF_FULL ,X Data Buffer Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 25. " BUF_UND_RUN ,Buffer Underrun" "Not underrun,Underrun"
|
|
bitfld.long 0x00 24. " BUF_OVFL ,Buffer Overflow" "Not overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SDIO_INT_ACTIVE ,SDIO Interrupt Active" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " END_CMD_RESP ,End Command Response" "Not successfull,Successfull"
|
|
textline " "
|
|
eventfld.long 0x00 12. " WRITE_OP_DONE ,Write Operation Done" "Not completed,Completed"
|
|
eventfld.long 0x00 11. " READ_OP_DONE ,Read Operation Done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " WR_CRC_ERROR_CODE ,Write CRC Error Code" "No error,Error,No CRC,?..."
|
|
bitfld.long 0x00 8. " CARD_BUS_CLK_RUN ,Card Bus Clock Run" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BUF_READ_READY ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " BUF_WRITE_READY ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 5. " RESP_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
eventfld.long 0x00 3. " READ_CRC_ERR ,Read CRC Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WRITE_CRC_ERR ,Write CRC Error" "No error,Error"
|
|
eventfld.long 0x00 1. " TIME_OUT_RESP ,Time Out Response" "No error,Time out"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No error,Time out"
|
|
group 0x08--0x20
|
|
line.long 0x00 "CLK_RATE,SDHC Clock Rate Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " CLK_PRESCALER ,Clock Prescaler"
|
|
bitfld.long 0x00 0.--3. " CLK_DIVIDER ,Clock Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
;group 0x0c++0x03
|
|
line.long 0x04 "CMD_DAT_CONT,SDHC Command And Data Control Register"
|
|
bitfld.long 0x04 15. " CMD_RESUME ,Command Resume" "Not resume,Resume"
|
|
bitfld.long 0x04 12. " CMD_RESP_LONG_OFF ,Command Response Long Off" "Not cleared,Cleared"
|
|
bitfld.long 0x04 11. " STOP_READWAIT ,Stop Read/Wait" "No effect,End cycle"
|
|
textline " "
|
|
bitfld.long 0x04 10. " START_READWAIT ,Start Read/Wait" "No effect,Started"
|
|
bitfld.long 0x04 8.--9. " BUS_WIDTH ,Bus Width" "1-bit,Reserved,4-bit,?..."
|
|
bitfld.long 0x04 7. " INIT ,Initialize" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WRITE_READ ,Write/Read" "Read,Write"
|
|
bitfld.long 0x04 3. " DATA_ENABLE ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " FORMAT_OF_RESPONSE ,Format of Response" "No response,48-bit,136-bit,48-bit,?..."
|
|
;group 0x10++0x03
|
|
line.long 0x08 "RES_TO,SDHC Response Time Out Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RESPONSE_TIME_OUT ,Response Time Out"
|
|
;group 0x14++0x03
|
|
line.long 0x0c "READ_TO,SDHC Read Time Out Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " DATA_READ_TIME_OUT[15:0] ,Data Read Time Out"
|
|
;group 0x18++0x03
|
|
line.long 0x10 "BLK_LEN,SDHC Block Length Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " BLOCK_LENGTH[11:0] ,Block Length"
|
|
;group 0x1c++0x03
|
|
line.long 0x14 "NOB,SDHC Number of Blocks Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " NOB ,Specifies the Number of Blocks in a Block Transfer"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "REV_NO,SDHC Revision Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVISION_NUMBER ,Revision Number"
|
|
group 0x24--0x34
|
|
line.long 0x00 "INT_CNTR,SDHC Interrupt Control Register"
|
|
bitfld.long 0x00 18. " SDIO_INT_WKP_EN ,SDIO Interrupt Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CARD_INSERTION_WKP_EN ,Card Insertion Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CARD_REMOVAL_WKP_EN ,Card Removal Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 15. " CARD_INSERTION_EN ,Card Insertion Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CARD_REMOVAL_EN ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DAT0_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUF_READ_EN ,Bus Read Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " BUF_WRITE_EN ,Bus Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRITE_OP_DONE ,Write Operation Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_OP_DONE ,Read Operation Done" "Disabled,Enabled"
|
|
;group 0x28++0x03
|
|
line.long 0x04 "CMD,SDHC Command Number Register"
|
|
bitfld.long 0x04 0.--5. " COMMAND_NUMBER , Command Number" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
|
|
;group 0x2c++0x03
|
|
line.long 0x08 "ARG,SDHC CMD Argument Register"
|
|
hexmask.long 0x08 0.--31. 1. " ARG ,Command Argument"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "RES_FIFO,SDHC Response FIFO Access Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RESPONSE_CONTENT ,Response Content FIFO Access Register"
|
|
hgroup 0x38++0x03
|
|
hide.long 0x00 "BUFFER_ACCESS,SDHC Data Buffer Access Register"
|
|
in
|
|
width 14.
|
|
tree.end
|
|
tree.end
|
|
tree "SDMA (Smart Direct Memory Access)"
|
|
base asd:0x53fd4000
|
|
width 13.
|
|
group 0x00--0x07
|
|
line.long 0x00 "MC0PTR,AP Channel 0 Pointer Register"
|
|
hexmask.long 0x00 0.--31. 1. " MC0PTR ,AP Channel 0 Pointer"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "INTR,Channel Interrupts Register"
|
|
eventfld.long 0x04 31. " HI[31] ,AP HI[31] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 30. " HI[30] ,AP HI[30] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 29. " HI[29] ,AP HI[29] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 28. " HI[28] ,AP HI[28] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 27. " HI[27] ,AP HI[27] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 26. " HI[26] ,AP HI[26] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 25. " HI[25] ,AP HI[25] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 24. " HI[24] ,AP HI[24] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 23. " HI[23] ,AP HI[23] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 22. " HI[22] ,AP HI[22] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 21. " HI[21] ,AP HI[21] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 20. " HI[20] ,AP HI[20] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 19. " HI[19] ,AP HI[19] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 18. " HI[18] ,AP HI[18] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 17. " HI[17] ,AP HI[17] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 16. " HI[16] ,AP HI[16] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 15. " HI[15] ,AP HI[15] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 14. " HI[14] ,AP HI[14] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 13. " HI[13] ,AP HI[13] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 12. " HI[12] ,AP HI[12] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 11. " HI[11] ,AP HI[11] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 10. " HI[10] ,AP HI[10] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 9. " HI[9] ,AP HI[9] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " HI[8] ,AP HI[8] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 7. " HI[7] ,AP HI[7] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 6. " HI[6] ,AP HI[6] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 5. " HI[5] ,AP HI[5] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 4. " HI[4] ,AP HI[4] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 3. " HI[3] ,AP HI[3] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 2. " HI[2] ,AP HI[2] Interrupt " "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 1. " HI[1] ,AP HI[1] Interrupt " "No interrupt,Interrupt"
|
|
eventfld.long 0x04 0. " HI[0] ,AP HI[0] Interrupt " "No interrupt,Interrupt"
|
|
group 0x08++0x03
|
|
line.long 0x00 "STOP_STAT,Channel Stop/Channel Status Register"
|
|
eventfld.long 0x00 31. " HE[31] ,HE[31] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 30. " HE[30] ,HE[30] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 29. " HE[29] ,HE[29] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 28. " HE[28] ,HE[28] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 27. " HE[27] ,HE[27] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 26. " HE[26] ,HE[26] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 25. " HE[25] ,HE[25] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 24. " HE[24] ,HE[24] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 23. " HE[23] ,HE[23] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 22. " HE[22] ,HE[22] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 21. " HE[21] ,HE[21] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 20. " HE[20] ,HE[20] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 19. " HE[19] ,HE[19] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 18. " HE[18] ,HE[18] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 17. " HE[17] ,HE[17] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 16. " HE[16] ,HE[16] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 15. " HE[15] ,HE[15] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 14. " HE[14] ,HE[14] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 13. " HE[13] ,HE[13] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 12. " HE[12] ,HE[12] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 11. " HE[11] ,HE[11] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 10. " HE[10] ,HE[10] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 9. " HE[9] ,HE[9] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 8. " HE[8] ,HE[8] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 7. " HE[7] ,HE[7] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 6. " HE[6] ,HE[6] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 5. " HE[5] ,HE[5] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 4. " HE[4] ,HE[4] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 3. " HE[3] ,HE[3] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 2. " HE[2] ,HE[2] Stop/Status" "No access,Access"
|
|
textline " "
|
|
eventfld.long 0x00 1. " HE[1] ,HE[1] Stop/Status" "No access,Access"
|
|
eventfld.long 0x00 0. " HE[0] ,HE[0] Stop/Status" "No access,Access"
|
|
group 0x0c--0x1b
|
|
line.long 0x00 "HSTART,Channel Start Register"
|
|
bitfld.long 0x00 31. " HSTART[31] ,Channel 31 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " HSTART[30] ,Channel 30 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " HSTART[29] ,Channel 29 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HSTART[28] ,Channel 28 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " HSTART[27] ,Channel 27 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " HSTART[26] ,Channel 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HSTART[25] ,Channel 25 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " HSTART[24] ,Channel 24 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HSTART[23] ,Channel 23 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " HSTART[22] ,Channel 22 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " HSTART[21] ,Channel 21 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " HSTART[20] ,Channel 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HSTART[19] ,Channel 19 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HSTART[18] ,Channel 18 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " HSTART[17] ,Channel 17 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HSTART[16] ,Channel 16 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " HSTART[15] ,Channel 15 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " HSTART[14] ,Channel 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HSTART[13] ,Channel 13 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " HSTART[12] ,Channel 12 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " HSTART[11] ,Channel 11 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HSTART[10] ,Channel 10 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " HSTART[9] ,Channel 9 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " HSTART[8] ,Channel 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HSTART[7] ,Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " HSTART[6] ,Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " HSTART[5] ,Channel 5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HSTART[4] ,Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HSTART[3] ,Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HSTART[2] ,Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HSTART[1] ,Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HSTART[0] ,Channel 0 Enable" "Disabled,Enabled"
|
|
;group 0x10++0x03
|
|
line.long 0x04 "EVTOVR,Channel Event Override Register"
|
|
bitfld.long 0x04 31. " EO[31] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 30. " EO[30] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 29. " EO[29] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 28. " EO[28] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 27. " EO[27] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 26. " EO[26] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EO[25] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 24. " EO[24] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 23. " EO[23] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 22. " EO[22] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 21. " EO[21] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 20. " EO[20] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EO[19] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 18. " EO[18] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 17. " EO[17] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 16. " EO[16] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 15. " EO[15] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 14. " EO[14] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EO[13] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 12. " EO[12] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 11. " EO[11] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 10. " EO[10] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 9. " EO[9] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 8. " EO[8] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EO[7] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 6. " EO[6] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 5. " EO[5] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EO[4] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 3. " EO[3] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 2. " EO[2] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EO[1] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x04 0. " EO[0] ,DMA Request Ignored by SDMA" "Not ignored,Ignored"
|
|
;group 0x14++0x03
|
|
line.long 0x08 "DSPOVR,Channel DSP Override Register"
|
|
bitfld.long 0x08 31. " DO[31] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 30. " DO[30] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 29. " DO[29] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 28. " DO[28] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 27. " DO[27] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 26. " DO[26] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DO[25] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 24. " DO[24] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 23. " DO[23] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DO[22] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 21. " DO[21] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 20. " DO[20] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 19. " DO[19] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 18. " DO[18] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 17. " DO[17] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 16. " DO[16] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 15. " DO[15] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 14. " DO[14] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DO[13] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 12. " DO[12] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 11. " DO[11] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 10. " DO[10] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 9. " DO[9] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 8. " DO[8] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 7. " DO[7] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 6. " DO[6] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 5. " DO[5] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DO[4] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 3. " DO[3] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 2. " DO[2] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DO[1] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x08 0. " DO[0] ,BP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
;group 0x18++0x03
|
|
line.long 0x0c "HOSTOVR,Channel AP Override Register"
|
|
bitfld.long 0x0c 31. " HO[31] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 30. " HO[30] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 29. " HO[29] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " HO[28] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 27. " HO[27] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 26. " HO[26] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " HO[25] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 24. " HO[24] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 23. " HO[23] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " HO[22] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 21. " HO[21] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 20. " HO[20] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " HO[19] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 18. " HO[18] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 17. " HO[17] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " HO[16] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 15. " HO[15] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 14. " HO[14] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " HO[13] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 12. " HO[12] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 11. " HO[11] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " HO[10] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 9. " HO[9] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 8. " HO[8] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " HO[7] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 6. " HO[6] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 5. " HO[5] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " HO[4] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 3. " HO[3] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 2. " HO[2] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " HO[1] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
bitfld.long 0x0c 0. " HO[0] ,AP Enable Ignored by SDMA" "Not ignored,Ignored"
|
|
rgroup 0x1c--0x2b
|
|
line.long 0x00 "EVTPEND,Channel Event Pending Register"
|
|
bitfld.long 0x00 31. " EP[31] ,Channel 31 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " EP[30] ,Channel 30 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " EP[29] ,Channel 29 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EP[28] ,Channel 28 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " EP[27] ,Channel 27 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " EP[26] ,Channel 26 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EP[25] ,Channel 25 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EP[24] ,Channel 24 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " EP[23] ,Channel 23 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EP[22] ,Channel 22 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " EP[21] ,Channel 21 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " EP[20] ,Channel 20 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EP[19] ,Channel 19 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " EP[18] ,Channel 18 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " EP[17] ,Channel 17 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EP[16] ,Channel 16 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " EP[15] ,Channel 15 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " EP[14] ,Channel 14 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EP[13] ,Channel 13 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " EP[12] ,Channel 12 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " EP[11] ,Channel 11 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EP[10] ,Channel 10 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " EP[9] ,Channel 9 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " EP[8] ,Channel 8 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EP[7] ,Channel 7 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " EP[6] ,Channel 6 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " EP[5] ,Channel 5 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EP[4] ,Channel 4 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " EP[3] ,Channel 3 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " EP[2] ,Channel 2 Event Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP[1] ,Channel 1 Event Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " EP[0] ,Channel 0 Event Pending" "Not pending,Pending"
|
|
;rgroup 0x20++0x03
|
|
; line.long 0x04 "DSPENBL,DSP Channel Enable Register"
|
|
; bitfld.long 0x04 31. " DE[31] ,Channel 31 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 30. " DE[30] ,Channel 30 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 29. " DE[29] ,Channel 29 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 28. " DE[28] ,Channel 28 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 27. " DE[27] ,Channel 27 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 26. " DE[26] ,Channel 26 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 25. " DE[25] ,Channel 25 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 24. " DE[24] ,Channel 24 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 23. " DE[23] ,Channel 23 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 22. " DE[22] ,Channel 22 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 21. " DE[21] ,Channel 21 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 20. " DE[20] ,Channel 20 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 19. " DE[19] ,Channel 19 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 18. " DE[18] ,Channel 18 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 17. " DE[17] ,Channel 17 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 16. " DE[16] ,Channel 16 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 15. " DE[15] ,Channel 15 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 14. " DE[14] ,Channel 14 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 13. " DE[13] ,Channel 13 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 12. " DE[12] ,Channel 12 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 11. " DE[11] ,Channel 11 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 10. " DE[10] ,Channel 10 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 9. " DE[9] ,Channel 9 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 8. " DE[8] ,Channel 8 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 7. " DE[7] ,Channel 7 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 6. " DE[6] ,Channel 6 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 5. " DE[5] ,Channel 5 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 4. " DE[4] ,Channel 4 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 3. " DE[3] ,Channel 3 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 2. " DE[2] ,Channel 2 Enable" "Disabled,Enabled"
|
|
; textline " "
|
|
; bitfld.long 0x04 1. " DE[1] ,Channel 1 Enable" "Disabled,Enabled"
|
|
; bitfld.long 0x04 0. " DE[0] ,Channel 0 Enable" "Disabled,Enabled"
|
|
;rgroup 0x24++0x03
|
|
line.long 0x08 "RESET,Reset Register"
|
|
bitfld.long 0x08 1. " RESCHED ,SDMA Reschedule as If a Script had Executed a Done Instruction" "Off,On"
|
|
bitfld.long 0x08 0. " Reset ,Software Reset" "No effect,Reset"
|
|
;rgroup 0x28++0x03
|
|
line.long 0x0c "EVTERR,DMA Request Error Register"
|
|
bitfld.long 0x0c 31. " CHNERR[31] ,Channel 31 Error" "No error,Error"
|
|
bitfld.long 0x0c 30. " CHNERR[30] ,Channel 30 Error" "No error,Error"
|
|
bitfld.long 0x0c 29. " CHNERR[29] ,Channel 29 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " CHNERR[28] ,Channel 28 Error" "No error,Error"
|
|
bitfld.long 0x0c 27. " CHNERR[27] ,Channel 27 Error" "No error,Error"
|
|
bitfld.long 0x0c 26. " CHNERR[26] ,Channel 26 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " CHNERR[25] ,Channel 25 Error" "No error,Error"
|
|
bitfld.long 0x0c 24. " CHNERR[24] ,Channel 24 Error" "No error,Error"
|
|
bitfld.long 0x0c 23. " CHNERR[23] ,Channel 23 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " CHNERR[22] ,Channel 22 Error" "No error,Error"
|
|
bitfld.long 0x0c 21. " CHNERR[21] ,Channel 21 Error" "No error,Error"
|
|
bitfld.long 0x0c 20. " CHNERR[20] ,Channel 20 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " CHNERR[19] ,Channel 19 Error" "No error,Error"
|
|
bitfld.long 0x0c 18. " CHNERR[18] ,Channel 18 Error" "No error,Error"
|
|
bitfld.long 0x0c 17. " CHNERR[17] ,Channel 17 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " CHNERR[16] ,Channel 16 Error" "No error,Error"
|
|
bitfld.long 0x0c 15. " CHNERR[15] ,Channel 15 Error" "No error,Error"
|
|
bitfld.long 0x0c 14. " CHNERR[14] ,Channel 14 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " CHNERR[13] ,Channel 13 Error" "No error,Error"
|
|
bitfld.long 0x0c 12. " CHNERR[12] ,Channel 12 Error" "No error,Error"
|
|
bitfld.long 0x0c 11. " CHNERR[11] ,Channel 11 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " CHNERR[10] ,Channel 10 Error" "No error,Error"
|
|
bitfld.long 0x0c 9. " CHNERR[9] ,Channel 9 Error" "No error,Error"
|
|
bitfld.long 0x0c 8. " CHNERR[8] ,Channel 8 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " CHNERR[7] ,Channel 7 Error" "No error,Error"
|
|
bitfld.long 0x0c 6. " CHNERR[6] ,Channel 6 Error" "No error,Error"
|
|
bitfld.long 0x0c 5. " CHNERR[5] ,Channel 5 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CHNERR[4] ,Channel 4 Error" "No error,Error"
|
|
bitfld.long 0x0c 3. " CHNERR[3] ,Channel 3 Error" "No error,Error"
|
|
bitfld.long 0x0c 2. " CHNERR[2] ,Channel 2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CHNERR[1] ,Channel 1 Error" "No error,Error"
|
|
bitfld.long 0x0c 0. " CHNERR[0] ,Channel 0 Error" "No error,Error"
|
|
group 0x2c++0x03
|
|
line.long 0x00 "INTRMASK,Channel AP Interrupt Mask Flags Register"
|
|
bitfld.long 0x00 31. " HIMASK[31] ,Channel 31 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " HIMASK[30] ,Channel 30 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " HIMASK[29] ,Channel 29 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HIMASK[28] ,Channel 28 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " HIMASK[27] ,Channel 27 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " HIMASK[26] ,Channel 26 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HIMASK[25] ,Channel 25 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " HIMASK[24] ,Channel 24 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " HIMASK[23] ,Channel 23 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " HIMASK[22] ,Channel 22 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " HIMASK[21] ,Channel 21 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " HIMASK[20] ,Channel 20 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HIMASK[19] ,Channel 19 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " HIMASK[18] ,Channel 18 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " HIMASK[17] ,Channel 17 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HIMASK[16] ,Channel 16 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " HIMASK[15] ,Channel 15 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " HIMASK[14] ,Channel 14 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HIMASK[13] ,Channel 13 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " HIMASK[12] ,Channel 12 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " HIMASK[11] ,Channel 11 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HIMASK[10] ,Channel 10 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " HIMASK[9] ,Channel 9 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " HIMASK[8] ,Channel 8 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HIMASK[7] ,Channel 7 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " HIMASK[6] ,Channel 6 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " HIMASK[5] ,Channel 5 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HIMASK[4] ,Channel 4 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " HIMASK[3] ,Channel 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " HIMASK[2] ,Channel 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HIMASK[1] ,Channel 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " HIMASK[0] ,Channel 0 Interrupt Mask" "Masked,Not masked"
|
|
rgroup 0x30--0x37
|
|
line.long 0x00 "PSW,Schedule Status Register"
|
|
bitfld.long 0x00 13.--15. " NCP[2:0] ,Next Channel Priority" "No running channel,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--12. " NCR[4:0] ,Next Channel Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " CCP[2:0] ,Current Channel Priority" "No running channel,1,2,3,4,5,6,7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CCR[4:0] ,Current Channel Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
;rgroup 0x34++0x03
|
|
line.long 0x04 "EVTERRDBG,DMA Request Error Register for Debug"
|
|
bitfld.long 0x04 31. " CHNERR[31] ,Channel 31 Error" "No error,Error"
|
|
bitfld.long 0x04 30. " CHNERR[30] ,Channel 30 Error" "No error,Error"
|
|
bitfld.long 0x04 29. " CHNERR[29] ,Channel 29 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 28. " CHNERR[28] ,Channel 28 Error" "No error,Error"
|
|
bitfld.long 0x04 27. " CHNERR[27] ,Channel 27 Error" "No error,Error"
|
|
bitfld.long 0x04 26. " CHNERR[26] ,Channel 26 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 25. " CHNERR[25] ,Channel 25 Error" "No error,Error"
|
|
bitfld.long 0x04 24. " CHNERR[24] ,Channel 24 Error" "No error,Error"
|
|
bitfld.long 0x04 23. " CHNERR[23] ,Channel 23 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 22. " CHNERR[22] ,Channel 22 Error" "No error,Error"
|
|
bitfld.long 0x04 21. " CHNERR[21] ,Channel 21 Error" "No error,Error"
|
|
bitfld.long 0x04 20. " CHNERR[20] ,Channel 20 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 19. " CHNERR[19] ,Channel 19 Error" "No error,Error"
|
|
bitfld.long 0x04 18. " CHNERR[18] ,Channel 18 Error" "No error,Error"
|
|
bitfld.long 0x04 17. " CHNERR[17] ,Channel 17 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 16. " CHNERR[16] ,Channel 16 Error" "No error,Error"
|
|
bitfld.long 0x04 15. " CHNERR[15] ,Channel 15 Error" "No error,Error"
|
|
bitfld.long 0x04 14. " CHNERR[14] ,Channel 14 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 13. " CHNERR[13] ,Channel 13 Error" "No error,Error"
|
|
bitfld.long 0x04 12. " CHNERR[12] ,Channel 12 Error" "No error,Error"
|
|
bitfld.long 0x04 11. " CHNERR[11] ,Channel 11 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 10. " CHNERR[10] ,Channel 10 Error" "No error,Error"
|
|
bitfld.long 0x04 9. " CHNERR[9] ,Channel 9 Error" "No error,Error"
|
|
bitfld.long 0x04 8. " CHNERR[8] ,Channel 8 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CHNERR[7] ,Channel 7 Error" "No error,Error"
|
|
bitfld.long 0x04 6. " CHNERR[6] ,Channel 6 Error" "No error,Error"
|
|
bitfld.long 0x04 5. " CHNERR[5] ,Channel 5 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CHNERR[4] ,Channel 4 Error" "No error,Error"
|
|
bitfld.long 0x04 3. " CHNERR[3] ,Channel 3 Error" "No error,Error"
|
|
bitfld.long 0x04 2. " CHNERR[2] ,Channel 2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHNERR[1] ,Channel 1 Error" "No error,Error"
|
|
bitfld.long 0x04 0. " CHNERR[0] ,Channel 0 Error" "No error,Error"
|
|
group 0x38--0x4b
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 12. " DSPDMA ,BP DMA is Used" "Not used,Used"
|
|
bitfld.long 0x00 11. " RTDOBS ,Real-Time Debug Pins are Used" "Not used,Used"
|
|
bitfld.long 0x00 4. " ACR ,AHB/SDMA Core Clock Ratio" "2x core freq,Core freq"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CSM ,Selects the Context Switch Mode" "Static,Dynamic low power,Dynamic with no loop,Dynamic"
|
|
;group 0x40++0x03
|
|
line.long 0x08 "ONCE_ENB,OnCE Enable Register"
|
|
bitfld.long 0x08 0. " ENB ,OnCE Enable" "Disabled,Enabled"
|
|
;group 0x44++0x03
|
|
line.long 0x0c "ONCE_DATA,OnCE Data Register"
|
|
hexmask.long 0x0c 0.--31. 1. " DATA ,Data Register of the OnCE JTAG Controller"
|
|
;group 0x48++0x03
|
|
line.long 0x10 "ONCE_INSTR,OnCE Instruction Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " INSTR ,Instruction Register of the OnCE JTAG Controller"
|
|
rgroup 0x4c++0x03
|
|
line.long 0x00 "ONCE_STAT,OnCE Status Register"
|
|
bitfld.long 0x00 12.--15. " PST[3:0] ,Processor Status" "Program,Data,Change of flow,Change of flow in loop,Debug,Functional unit,Sleep,Save,Program in sleep,Data in sleep,Change of flow in sleep,Change flow in loop in sleep,Debug in sleep,Functional unit in sleep,Sleep after reset,Restore"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCV ,RCV Flag" "Cleared,Set"
|
|
bitfld.long 0x00 10. " EDR ,SDMA has Entered Debug Mode After an External Debug Request" "Normal,Debug"
|
|
bitfld.long 0x00 9. " ODR ,SDMA has Entered Debug Mode After a OnCE Debug Request" "Normal,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SWB ,SDMA has Entered Debug Mode After a Software Breakpoint" "Normal,Degug"
|
|
bitfld.long 0x00 7. " MST ,OnCE is Controlled from the AP Peripheral Interface" "JTAG,AP"
|
|
bitfld.long 0x00 2. " EDR[2] ,Event Cell Debug Request from data_cond" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDR[1] ,Event Cell Debug Request from addrb_cond" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EDR[0] ,Event Cell Debug Request from addra_cond" "Not requested,Requested"
|
|
group 0x50++0x03
|
|
line.long 0x00 "ONCE_CMD,OnCE Command Register"
|
|
bitfld.long 0x00 0.--3. " CMD ,Command" "rstatus,dmov,exec_once,run_core,exec_core,debug_rqst,rbuffer,?..."
|
|
rgroup 0x54++0x03
|
|
line.long 0x00 "EVT_MIRROR,DMA Requests Register"
|
|
bitfld.long 0x00 31. " EVENTS[31] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " EVENTS[30] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " EVENTS[29] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENTS[28] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " EVENTS[27] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " EVENTS[26] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENTS[25] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " EVENTS[24] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " EVENTS[23] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENTS[22] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " EVENTS[21] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " EVENTS[20] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENTS[19] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " EVENTS[18] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " EVENTS[17] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENTS[16] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " EVENTS[15] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " EVENTS[14] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENTS[13] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " EVENTS[12] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " EVENTS[11] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENTS[10] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " EVENTS[9] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " EVENTS[8] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENTS[7] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " EVENTS[6] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " EVENTS[5] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENTS[4] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " EVENTS[3] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " EVENTS[2] ,DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENTS[1] ,DMA Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EVENTS[0] ,DMA Request" "Not requested,Requested"
|
|
group 0x58--0x5f
|
|
line.long 0x00 "ILLINSTADDR,Illegal Instruction Trap Address Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " ILLINSTADDR ,Illegal Instruction Trap Address"
|
|
;group 0x5c++0x03
|
|
line.long 0x04 "CHN0ADDR,Channel 0 Boot Address Register"
|
|
bitfld.long 0x04 14. " SMSZ ,Scratch Memory Size" "24,32"
|
|
hexmask.long.word 0x04 0.--13. 1. " CHN0ADDR ,Channel 0 Boot Address"
|
|
group 0x70--0x77
|
|
line.long 0x00 "XTRIG_CONF1,Cross-Trigger Events Configuration Register 1"
|
|
bitfld.long 0x00 30. " CNF3 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x00 24.--28. " NUM3[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 22. " CNF2 ,Configuration of the SDMA" "Channel,DMA request"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " NUM2[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 14. " CNF1 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x00 8.--12. " NUM1[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CNF0 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x00 0.--4. " NUM0[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
;group 0x74++0x03
|
|
line.long 0x04 "XTRIG_CONF2,Cross-Trigger Events Configuration Register 2"
|
|
bitfld.long 0x04 30. " CNF7 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x04 24.--28. " NUM7[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 22. " CNF6 ,Configuration of the SDMA" "Channel,DMA request"
|
|
textline " "
|
|
bitfld.long 0x04 16.--20. " NUM6[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 14. " CNF5 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x04 8.--12. " NUM5[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x04 6. " CNF4 ,Configuration of the SDMA" "Channel,DMA request"
|
|
bitfld.long 0x04 0.--4. " NUM4[4:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 11.
|
|
tree "Channel Enable RAM Registers"
|
|
group 0x80--0xff
|
|
line.long 0x0 "CHNENBL0 ,Channel 0 Enable RAM"
|
|
hexmask.long 0x0 0.--31. 1. " ENBL0 ,Channel 0 Enable Value"
|
|
line.long 0x4 "CHNENBL1 ,Channel 1 Enable RAM"
|
|
hexmask.long 0x4 0.--31. 1. " ENBL1 ,Channel 1 Enable Value"
|
|
line.long 0x8 "CHNENBL2 ,Channel 2 Enable RAM"
|
|
hexmask.long 0x8 0.--31. 1. " ENBL2 ,Channel 2 Enable Value"
|
|
line.long 0xC "CHNENBL3 ,Channel 3 Enable RAM"
|
|
hexmask.long 0xC 0.--31. 1. " ENBL3 ,Channel 3 Enable Value"
|
|
line.long 0x10 "CHNENBL4 ,Channel 4 Enable RAM"
|
|
hexmask.long 0x10 0.--31. 1. " ENBL4 ,Channel 4 Enable Value"
|
|
line.long 0x14 "CHNENBL5 ,Channel 5 Enable RAM"
|
|
hexmask.long 0x14 0.--31. 1. " ENBL5 ,Channel 5 Enable Value"
|
|
line.long 0x18 "CHNENBL6 ,Channel 6 Enable RAM"
|
|
hexmask.long 0x18 0.--31. 1. " ENBL6 ,Channel 6 Enable Value"
|
|
line.long 0x1C "CHNENBL7 ,Channel 7 Enable RAM"
|
|
hexmask.long 0x1C 0.--31. 1. " ENBL7 ,Channel 7 Enable Value"
|
|
line.long 0x20 "CHNENBL8 ,Channel 8 Enable RAM"
|
|
hexmask.long 0x20 0.--31. 1. " ENBL8 ,Channel 8 Enable Value"
|
|
line.long 0x24 "CHNENBL9 ,Channel 9 Enable RAM"
|
|
hexmask.long 0x24 0.--31. 1. " ENBL9 ,Channel 9 Enable Value"
|
|
line.long 0x28 "CHNENBL10,Channel 10 Enable RAM"
|
|
hexmask.long 0x28 0.--31. 1. " ENBL10 ,Channel 10 Enable Value"
|
|
line.long 0x2C "CHNENBL11,Channel 11 Enable RAM"
|
|
hexmask.long 0x2C 0.--31. 1. " ENBL11 ,Channel 11 Enable Value"
|
|
line.long 0x30 "CHNENBL12,Channel 12 Enable RAM"
|
|
hexmask.long 0x30 0.--31. 1. " ENBL12 ,Channel 12 Enable Value"
|
|
line.long 0x34 "CHNENBL13,Channel 13 Enable RAM"
|
|
hexmask.long 0x34 0.--31. 1. " ENBL13 ,Channel 13 Enable Value"
|
|
line.long 0x38 "CHNENBL14,Channel 14 Enable RAM"
|
|
hexmask.long 0x38 0.--31. 1. " ENBL14 ,Channel 14 Enable Value"
|
|
line.long 0x3C "CHNENBL15,Channel 15 Enable RAM"
|
|
hexmask.long 0x3C 0.--31. 1. " ENBL15 ,Channel 15 Enable Value"
|
|
line.long 0x40 "CHNENBL16,Channel 16 Enable RAM"
|
|
hexmask.long 0x40 0.--31. 1. " ENBL16 ,Channel 16 Enable Value"
|
|
line.long 0x44 "CHNENBL17,Channel 17 Enable RAM"
|
|
hexmask.long 0x44 0.--31. 1. " ENBL17 ,Channel 17 Enable Value"
|
|
line.long 0x48 "CHNENBL18,Channel 18 Enable RAM"
|
|
hexmask.long 0x48 0.--31. 1. " ENBL18 ,Channel 18 Enable Value"
|
|
line.long 0x4C "CHNENBL19,Channel 19 Enable RAM"
|
|
hexmask.long 0x4C 0.--31. 1. " ENBL19 ,Channel 19 Enable Value"
|
|
line.long 0x50 "CHNENBL20,Channel 20 Enable RAM"
|
|
hexmask.long 0x50 0.--31. 1. " ENBL20 ,Channel 20 Enable Value"
|
|
line.long 0x54 "CHNENBL21,Channel 21 Enable RAM"
|
|
hexmask.long 0x54 0.--31. 1. " ENBL21 ,Channel 21 Enable Value"
|
|
line.long 0x58 "CHNENBL22,Channel 22 Enable RAM"
|
|
hexmask.long 0x58 0.--31. 1. " ENBL22 ,Channel 22 Enable Value"
|
|
line.long 0x5C "CHNENBL23,Channel 23 Enable RAM"
|
|
hexmask.long 0x5C 0.--31. 1. " ENBL23 ,Channel 23 Enable Value"
|
|
line.long 0x60 "CHNENBL24,Channel 24 Enable RAM"
|
|
hexmask.long 0x60 0.--31. 1. " ENBL24 ,Channel 24 Enable Value"
|
|
line.long 0x64 "CHNENBL25,Channel 25 Enable RAM"
|
|
hexmask.long 0x64 0.--31. 1. " ENBL25 ,Channel 25 Enable Value"
|
|
line.long 0x68 "CHNENBL26,Channel 26 Enable RAM"
|
|
hexmask.long 0x68 0.--31. 1. " ENBL26 ,Channel 26 Enable Value"
|
|
line.long 0x6C "CHNENBL27,Channel 27 Enable RAM"
|
|
hexmask.long 0x6C 0.--31. 1. " ENBL27 ,Channel 27 Enable Value"
|
|
line.long 0x70 "CHNENBL28,Channel 28 Enable RAM"
|
|
hexmask.long 0x70 0.--31. 1. " ENBL28 ,Channel 28 Enable Value"
|
|
line.long 0x74 "CHNENBL29,Channel 29 Enable RAM"
|
|
hexmask.long 0x74 0.--31. 1. " ENBL29 ,Channel 29 Enable Value"
|
|
line.long 0x78 "CHNENBL30,Channel 30 Enable RAM"
|
|
hexmask.long 0x78 0.--31. 1. " ENBL30 ,Channel 30 Enable Value"
|
|
line.long 0x7C "CHNENBL31,Channel 31 Enable RAM"
|
|
hexmask.long 0x7C 0.--31. 1. " ENBL31 ,Channel 31 Enable Value"
|
|
tree.end
|
|
width 10.
|
|
tree "Channel Priority Registers"
|
|
group 0x100--0x17f
|
|
line.long 0x0 "CHNPRI0 ,Channel 0 Priority Register"
|
|
bitfld.long 0x0 0.--2. " CHNPRI0 ,Priority of Channel Number 0 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CHNPRI1 ,Channel 1 Priority Register"
|
|
bitfld.long 0x4 0.--2. " CHNPRI1 ,Priority of Channel Number 1 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CHNPRI2 ,Channel 2 Priority Register"
|
|
bitfld.long 0x8 0.--2. " CHNPRI2 ,Priority of Channel Number 2 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0xC "CHNPRI3 ,Channel 3 Priority Register"
|
|
bitfld.long 0xC 0.--2. " CHNPRI3 ,Priority of Channel Number 3 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CHNPRI4 ,Channel 4 Priority Register"
|
|
bitfld.long 0x10 0.--2. " CHNPRI4 ,Priority of Channel Number 4 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x14 "CHNPRI5 ,Channel 5 Priority Register"
|
|
bitfld.long 0x14 0.--2. " CHNPRI5 ,Priority of Channel Number 5 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x18 "CHNPRI6 ,Channel 6 Priority Register"
|
|
bitfld.long 0x18 0.--2. " CHNPRI6 ,Priority of Channel Number 6 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x1C "CHNPRI7 ,Channel 7 Priority Register"
|
|
bitfld.long 0x1C 0.--2. " CHNPRI7 ,Priority of Channel Number 7 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x20 "CHNPRI8 ,Channel 8 Priority Register"
|
|
bitfld.long 0x20 0.--2. " CHNPRI8 ,Priority of Channel Number 8 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x24 "CHNPRI9 ,Channel 9 Priority Register"
|
|
bitfld.long 0x24 0.--2. " CHNPRI9 ,Priority of Channel Number 9 " "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x28 "CHNPRI10,Channel 10 Priority Register"
|
|
bitfld.long 0x28 0.--2. " CHNPRI10 ,Priority of Channel Number 10" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x2C "CHNPRI11,Channel 11 Priority Register"
|
|
bitfld.long 0x2C 0.--2. " CHNPRI11 ,Priority of Channel Number 11" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x30 "CHNPRI12,Channel 12 Priority Register"
|
|
bitfld.long 0x30 0.--2. " CHNPRI12 ,Priority of Channel Number 12" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x34 "CHNPRI13,Channel 13 Priority Register"
|
|
bitfld.long 0x34 0.--2. " CHNPRI13 ,Priority of Channel Number 13" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x38 "CHNPRI14,Channel 14 Priority Register"
|
|
bitfld.long 0x38 0.--2. " CHNPRI14 ,Priority of Channel Number 14" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x3C "CHNPRI15,Channel 15 Priority Register"
|
|
bitfld.long 0x3C 0.--2. " CHNPRI15 ,Priority of Channel Number 15" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x40 "CHNPRI16,Channel 16 Priority Register"
|
|
bitfld.long 0x40 0.--2. " CHNPRI16 ,Priority of Channel Number 16" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x44 "CHNPRI17,Channel 17 Priority Register"
|
|
bitfld.long 0x44 0.--2. " CHNPRI17 ,Priority of Channel Number 17" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x48 "CHNPRI18,Channel 18 Priority Register"
|
|
bitfld.long 0x48 0.--2. " CHNPRI18 ,Priority of Channel Number 18" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x4C "CHNPRI19,Channel 19 Priority Register"
|
|
bitfld.long 0x4C 0.--2. " CHNPRI19 ,Priority of Channel Number 19" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x50 "CHNPRI20,Channel 20 Priority Register"
|
|
bitfld.long 0x50 0.--2. " CHNPRI20 ,Priority of Channel Number 20" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x54 "CHNPRI21,Channel 21 Priority Register"
|
|
bitfld.long 0x54 0.--2. " CHNPRI21 ,Priority of Channel Number 21" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x58 "CHNPRI22,Channel 22 Priority Register"
|
|
bitfld.long 0x58 0.--2. " CHNPRI22 ,Priority of Channel Number 22" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x5C "CHNPRI23,Channel 23 Priority Register"
|
|
bitfld.long 0x5C 0.--2. " CHNPRI23 ,Priority of Channel Number 23" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x60 "CHNPRI24,Channel 24 Priority Register"
|
|
bitfld.long 0x60 0.--2. " CHNPRI24 ,Priority of Channel Number 24" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x64 "CHNPRI25,Channel 25 Priority Register"
|
|
bitfld.long 0x64 0.--2. " CHNPRI25 ,Priority of Channel Number 25" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x68 "CHNPRI26,Channel 26 Priority Register"
|
|
bitfld.long 0x68 0.--2. " CHNPRI26 ,Priority of Channel Number 26" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x6C "CHNPRI27,Channel 27 Priority Register"
|
|
bitfld.long 0x6C 0.--2. " CHNPRI27 ,Priority of Channel Number 27" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x70 "CHNPRI28,Channel 28 Priority Register"
|
|
bitfld.long 0x70 0.--2. " CHNPRI28 ,Priority of Channel Number 28" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x74 "CHNPRI29,Channel 29 Priority Register"
|
|
bitfld.long 0x74 0.--2. " CHNPRI29 ,Priority of Channel Number 29" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x78 "CHNPRI30,Channel 30 Priority Register"
|
|
bitfld.long 0x78 0.--2. " CHNPRI30 ,Priority of Channel Number 30" "No running channel,1,2,3,4,5,6,7"
|
|
line.long 0x7C "CHNPRI31,Channel 31 Priority Register"
|
|
bitfld.long 0x7C 0.--2. " CHNPRI31 ,Priority of Channel Number 31" "No running channel,1,2,3,4,5,6,7"
|
|
tree.end
|
|
width 14.
|
|
tree.end
|
|
tree "SIM (Subscriber Identification Module)"
|
|
base asd:0x50018000
|
|
width 15.
|
|
group 0x00--0x0f
|
|
line.long 0x00 "PORT1_CNTL,SIM Port1 Control Register"
|
|
bitfld.long 0x00 7. " SFPD1 ,Auto Power Down Port1" "No effect,Started"
|
|
bitfld.long 0x00 6. " 3VOLT1 ,3-Volt SIM Card Port1" "RCV and XMT,XMT"
|
|
bitfld.long 0x00 5. " SCSP1 ,SIM Card Clock Stop Polarity Port1" "Logic 0,Logic 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SCEN1 ,SIM Card Clock Enable Port1" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SRST1 ,SIM Card Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STEN1 ,SIM Card Transmit Enable Port1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SVEN1 ,SIM Card Vcc Enable Port1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SAPD1 ,SIM Card Auto Power Down Port1" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "SETUP,SIM Setup Register"
|
|
bitfld.long 0x04 1. " SPS ,SIM Card Port Select" "Port0,Port1"
|
|
bitfld.long 0x04 0. " AMODE ,Alternate SIM Card Mode Enable" "Disabled,Enabled"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "PORT1_DETECT,SIM Port1 Detect Register"
|
|
bitfld.long 0x08 3. " SPDS1 ,SIM Presence Detect Select Port1" "Falling edge,Rising edge"
|
|
bitfld.long 0x08 2. " SPDP1 ,SIMPD1 Input Pin Status" "Low,High"
|
|
eventfld.long 0x08 1. " SDI1 ,SIM Detect Interrupt Flag Port1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " SDIM1 ,SIM Detect Interrupt Mask Port1" "Enabled,Masked"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "PORT1_XMT_BUF,SIM Port1 Transmit Buffer Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PORT1_XMT ,Port1 Transmit Buffer"
|
|
rgroup 0x10++0x03
|
|
line.long 0x00 "PORT1_RCV_BUF,SIM Port1 Receive Buffer Register"
|
|
bitfld.long 0x00 10. " CWT ,Port1 CWT Flag" "On time,Late"
|
|
bitfld.long 0x00 9. " FE ,Port1 Frame Error Flag" "No error,Error"
|
|
bitfld.long 0x00 8. " PE ,Port1 Parity Error Flag" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PORT1_RCV ,Port1 Receive Buffer"
|
|
group 0x14--0x37
|
|
line.long 0x00 "PORT0_CNTL,SIM Port0 Control Register"
|
|
bitfld.long 0x00 7. " SFPD0 ,Auto Power Down Port0" "No effect,Started"
|
|
bitfld.long 0x00 6. " 3VOLT0 ,3-Volt SIM Card Port0" "RCV and XMT,XMT"
|
|
bitfld.long 0x00 5. " SCSP0 ,SIM Card Clock Stop Polarity Port0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SCEN0 ,SIM Card Clock Enable Port0" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SRST0 ,SIM Card Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STEN0 ,SIM card Transmit Enable Port0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SVEN0 ,SIM Card Vcc Enable Port0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SAPD0 ,SIM Card Auto Power Down Port0" "Disabled,Enabled"
|
|
;group 0x18++0x03
|
|
line.long 0x04 "CNTL,SIM Control Register"
|
|
bitfld.long 0x04 15. " BWTEN ,Block Wait Time Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " XMT_CRC_LRC ,Transmit CRC or LRC" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CRCEN ,CRC Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " LRCEN ,LRC Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " CWTEN ,Character Wait Time Counter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " GPCNT_CLK_SEL[1:0] ,General Purpose Counter Clock Select" "Disabled/Reset,Card clock,Receive clock,ETU clock"
|
|
textline " "
|
|
bitfld.long 0x04 6.--8. " BAUD_SEL[2:0] ,SIM Baud Rate Select" "31,32,16,8,4,2,1,DIVISOR Reg"
|
|
bitfld.long 0x04 4. " SAMPLE12 ,Set the Third Stage Divider" "Div by 8,Div by 12"
|
|
bitfld.long 0x04 3. " ONACK ,Overrun NACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ANACK ,Automatic NACK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " ICM ,Initial Character Mode" "Disabled,Enabled"
|
|
;group 0x1c++0x03
|
|
line.long 0x08 "CLOCK_SELECT,SIM Clock Select Register"
|
|
bitfld.long 0x08 0.--3. " CLOCK_SELECT ,Clock Select" "Ref/2,Ref/4,Ref/6,Ref/8,Ref/10,Ref/12,Ref/14,Ref/16,Ref/18,Ref/20,Ref/22,Ref/26,Ref/32,Ref/38,Ref/46,Ref/56"
|
|
;group 0x20++0x03
|
|
line.long 0x0c "RCV_THRESHOLD,SIM Receive Threshold Register"
|
|
hexmask.long.byte 0x0c 5.--8. 1. " RTH[3:0] ,Receive Nack Threshold"
|
|
hexmask.long.byte 0x0c 0.--4. 1. " RDT[4:0] ,Receive Data Threshold"
|
|
;group 0x24++0x03
|
|
line.long 0x10 "ENABLE,SIM Enable Register"
|
|
bitfld.long 0x10 1. " XMT_EN ,SIM Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " RCV_EN ,SIM Receiver Enable" "Disabled,Enabled"
|
|
;ssection
|
|
;group 0x28++0x03
|
|
line.long 0x14 "XMT_STATUS,SIM Transmit Status Register"
|
|
eventfld.long 0x14 8. " GPCNT ,General Purpose Counter Flag" "GPCNT not reached,GPCNT reached"
|
|
eventfld.long 0x14 7. " TDTF ,Transmit Data Threshold Flag" "FIFO greater than TFT[3:0], FIFO less or equal to TFT[3:0]"
|
|
bitfld.long 0x14 6. " TFO ,Transmit FIFO Overfill Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 5. " TC ,Transmit Complete" "Not completed,Completed"
|
|
eventfld.long 0x14 4. " ETC ,Early Transmit Complete" "Not completed,Completed"
|
|
eventfld.long 0x14 3. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x14 0. " XTE ,Transmit Threshold Error" "No error,Error"
|
|
;group 0x2c++0x03
|
|
line.long 0x18 "RCV_STATUS,SIM Receive Status Register"
|
|
eventfld.long 0x18 11. " BGT ,Block Guard Time Error Flag" "Sufficient,Too small"
|
|
eventfld.long 0x18 10. " BWT ,Block Wait Time Error flag" "Not exceeded,Exceeded"
|
|
eventfld.long 0x18 9. " RTE ,Receive NACK Threshold Error Flag" "Less than RTH[3:0],Equal RTH[3:0]"
|
|
textline " "
|
|
eventfld.long 0x18 8. " CWT ,Character Wait Time Counter Flag" "No violation,CHAR_WAIT exceeded"
|
|
bitfld.long 0x18 7. " CRCOK ,Cyclic Redundancy Check Okay Flag" "Not OK,OK"
|
|
bitfld.long 0x18 6. " LRCOK ,Linear Redundancy Check Okay Flag" "Not OK,OK"
|
|
textline " "
|
|
bitfld.long 0x18 5. " RDRF ,Receive Data Register Full" "Less than RTH[3:0],More or equal RTH[3:0]"
|
|
bitfld.long 0x18 4. " RFD ,Receive FIFO has Unread Data" "No unread bytes,At least one unread byte"
|
|
eventfld.long 0x18 0. " OEF ,Overrun Error Flag" "No error,Error"
|
|
;group 0x30++0x03
|
|
line.long 0x1c "INT_MASK,SIM Interrupt Mask Register"
|
|
bitfld.long 0x1c 12. " BGTM ,Block Guard Time Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 11. " BWTM ,Block Wait Time Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 10. " RTM ,Receive NACK Threshold Interrupt Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " CWTM ,Character Wait Time Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 8. " GPCNTM ,General Purpose Counter Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 7. " TDTFM ,Transmit Data Threshold Interrupt Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " TFOM ,Transmit FIFO Overfill Error Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 5. " XTM ,Transmit Threshold Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 4. " TFEIM ,Transmit FIFO Empty Interrupt Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ETCIM ,Early Transmit Complete Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 2. " OIM ,Overrun Interrupt Mask" "Enabled,Masked"
|
|
bitfld.long 0x1c 1. " TCIM ,Transmit Complete Interrupt Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x1c 0. " RIM ,Receive Interrupt Mask" "Enabled,Masked"
|
|
;group 0x34++0x03
|
|
line.long 0x20 "PORT0_XMT_BUF,SIM Port0 Transmit Buffer Register"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PORT0_XMT ,Port0 Transmit Buffer"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "PORT0_RCV_BUF,SIM Port0 Receive Buffer Register"
|
|
bitfld.long 0x00 10. " CWT , Port0 CWT Flag" "On time,Late"
|
|
bitfld.long 0x00 9. " FE ,Port0 Frame Error Flag" "No error,Error"
|
|
bitfld.long 0x00 8. " PE ,Port0 Parity Error Flag" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PORT0_RCV ,Port0 Receive Buffer"
|
|
group 0x3c--0x6b
|
|
line.long 0x00 "PORT0_DETECT,SIM Port0 Detect Register"
|
|
bitfld.long 0x00 3. " SPDS0 ,SIM Presence Detect Select Port0" "Falling edge,Rising edge"
|
|
bitfld.long 0x00 2. " SPDP0 ,SIMPD0 Input Pin Status" "Low,High"
|
|
eventfld.long 0x00 1. " SDI0 ,SIM Detect Interrupt Flag Port0" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SDIM0 ,SIM Detect Interrupt Mask Port0" "Enabled,Masked"
|
|
;group 0x40++0x03
|
|
line.long 0x04 "DATA_FORMAT,SIM Data Format Register"
|
|
bitfld.long 0x04 0. " IC ,Inverse Convention" "Direction,Inverse"
|
|
;group 0x44++0x03
|
|
line.long 0x08 "XMT_THRESHOLD,SIM Transmit Threshold Register"
|
|
bitfld.long 0x08 4.--7. " XTH[3:0] ,Transmit NACK Threshold" "Never set,Set after 1 NACK,Set after 2 NACK,Set after 3 NACK,Set after 4 NACK,Set after 5 NACK,Set after 6 NACK,Set after 7 NACK,Set after 8 NACK,Set after 9 NACK,Set after 10 NACK,Set after 11 NACK,Set after 12 NACK,Set after 13 NACK,Set after 14 NACK,Set after 15 NACK"
|
|
hexmask.long.byte 0x08 0.--3. 1. " TDT ,Transmit Data Threshold"
|
|
;group 0x48++0x03
|
|
line.long 0x0c "GUARD_CNTL,SIM Transmit Guard Control Register"
|
|
bitfld.long 0x0c 8. " RCVR11 ,Receiver Use 11 Elementary Time Units" "12 ETU,11 ETU"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GETU ,Transmit Guard ETUs"
|
|
;group 0x4c++0x03
|
|
line.long 0x10 "OD_CONFIG,SIM Open Drain Configuration Control Register"
|
|
bitfld.long 0x10 1. " OD_P1 ,Open Drain Control for Port1" "Push-pull,Open-drain"
|
|
bitfld.long 0x10 0. " OD_P0 ,Open Drain control for Port0" "Push-pull,Open-drain"
|
|
;group 0x50++0x03
|
|
line.long 0x14 "RESET_CNTL,SIM Reset Control Register"
|
|
bitfld.long 0x14 6. " DBUG ,Debug" "No event,Event"
|
|
bitfld.long 0x14 5. " STOP ,Stop" "All SIM,All Clocks"
|
|
bitfld.long 0x14 4. " DOZE ,DOZE" "No event,Event"
|
|
textline " "
|
|
bitfld.long 0x14 3. " KILL_CLK ,Kill SIM Clock" "Enabled,Disabled"
|
|
bitfld.long 0x14 2. " SOFT_REST ,Software Reset" "Normal,Reset"
|
|
bitfld.long 0x14 1. " FLUSH_XMT ,Flush Transmitter" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x14 0. " FLUSH_RCV ,Flush Receiver" "Normal,Reset"
|
|
;group 0x54++0x03
|
|
line.long 0x18 "CHAR_WAIT,SIM Character Wait Time Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " CWT ,Character Wait Time"
|
|
;group 0x58+0x03
|
|
line.long 0x1c "GPCNT,SIM General Purpose Counter Register"
|
|
hexmask.long.word 0x1c 0.--15. 1. " GPCNT ,General Purpose Counter"
|
|
;group 0x5c++0x03
|
|
line.long 0x20 "DIVISOR,SIM Divisor Register"
|
|
hexmask.long.byte 0x20 0.--6. 1. " DIVISOR , DIVISOR Value"
|
|
;group 0x60++0x03
|
|
line.long 0x24 "BWT,SIM Block Wait Time Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " BWT ,BWT Register 16 LSB"
|
|
;group 0x64++0x03
|
|
line.long 0x28 "BGT,SIM Block Guard Time Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " BGT ,BGT Value"
|
|
;group 0x68++0x03
|
|
line.long 0x2c "BWT_H,SIM Block Wait Time Register HIGH"
|
|
hexmask.long.word 0x2c 0.--15. 1. " BWT_H ,BWT Register 16 MSB"
|
|
;rgroup 0x6c--0x7b
|
|
; line.long 0x00 "XMT_FIFO_STAT,SIM Transmit FIFO Status Register"
|
|
; bitfld.long 0x00 8.--11. " XMT_CNT ,Number of Bytes that Can be Written into the Transmit FIFO" "Empty or full,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
; hexmask.long.byte 0x00 4.--7. 1. " XMT_WPTR ,These Bits Indicate the Transmit FIFO Write Pointer"
|
|
; hexmask.long.byte 0x00 0.--3. 1. " XMT_RPTR ,These Bits Indicate the Transmit FIFO Read Pointer"
|
|
;rgroup 0x70++0x03
|
|
; line.long 0x04 "RCV_FIFO_CNT,SIM Receive FIFO Counter Register"
|
|
; hexmask.long.byte 0x04 0.--4. 1. " RCV_CNT ,Number of Bytes that can be Written into the Receive FIFO"
|
|
;rgroup 0x74++0x03
|
|
; line.long 0x08 "RCV_FIFO_WPTR,SIM Receive FIFO Write Pointer Register"
|
|
; hexmask.long.byte 0x08 0.--4. 1. " RCV_WPTR ,Bits Indicate the Receive FIFO Write Pointer"
|
|
;group 0x78++0x03
|
|
; line.long 0x0c "RCV_FIFO_RPTR,SIM Receive FIFO Read Pointer Register"
|
|
; hexmask.long.byte 0x0c 0.--4. 1. " RCV_RPTR ,Bits Indicate the Receiver FIFO Read Pointer"
|
|
width 14.
|
|
tree.end
|
|
tree "SSI (Synchronous Serial Interface)"
|
|
tree "SSI 1"
|
|
base asd:0x43fa0000
|
|
width 9.
|
|
group 0x00--0x07
|
|
line.long 0x00 "STX0_1,SSI Transmit Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " STX0 ,SSI Transmit Data"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "STX1_1,SSI Transmit Data Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " STX1 ,SSI Transmit Data"
|
|
rgroup 0x08--0x0f
|
|
line.long 0x00 "SRX0_1,SSI Receive Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " SRX0 ,SSI Receive Data"
|
|
;rgroup 0x0c++0x03
|
|
line.long 0x04 "SRX1_1,SSI Receive Data Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " SRX1 ,SSI Receive Data"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SCR1,SSI Control Register"
|
|
bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "0,1"
|
|
bitfld.long 0x00 8. " TCH_EN ,Two-Channel Operation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SYS_CLK_EN ,System Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " I2SMODE[1:0] ,I2S Mode Select" "Normal,Master,Slave,Normal"
|
|
bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "SISR1,SSI Interrupt Status Register"
|
|
bitfld.long 0x00 18. " CMDAU ,Command Address Register Updated" "Not changed,Changed"
|
|
bitfld.long 0x00 17. " CMDDU ,Command Data Register Updated" "Not changed,Changed"
|
|
bitfld.long 0x00 16. " RXT ,Receive Tag Updated" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RDR1 ,Receive Data Ready 1" "No new data,New data"
|
|
bitfld.long 0x00 14. " RDR0 ,Receive Data Ready 0" "No new data,New data"
|
|
bitfld.long 0x00 13. " TDE1 ,Transmit Data Register Empty 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TDE0 ,Transmit Data Register Empty 0" "Not empty,Empty"
|
|
bitfld.long 0x00 11. " ROE1 ,Receiver Overrun Error 1" "No error,Error"
|
|
bitfld.long 0x00 10. " ROE0 ,Receiver overrun error 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TUE1 ,Transmitter Underrun Error 1" "No error,Error"
|
|
bitfld.long 0x00 8. " TUE0 ,Transmitter Underrun Error 0" "No error,Error"
|
|
bitfld.long 0x00 7. " TFS ,Transmit Frame Sync" "No sync,Sync"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive Frame Sync" "No sync,Sync"
|
|
bitfld.long 0x00 5. " TLS ,Transmit Last Time Slot" "Not last,Last"
|
|
bitfld.long 0x00 4. " RLS ,Receive Last Time Slot" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFF1 ,Receive FIFO Full 1" "Not full,Full"
|
|
bitfld.long 0x00 2. " RFF0 ,Receive FIFO Full 0" "Not full,Full"
|
|
bitfld.long 0x00 1. " TFE1 ,Transmit FIFO Empty 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE0 ,Transmit FIFO Empty 0" "Not empty,Empty"
|
|
group 0x18--0x4f
|
|
line.long 0x00 "SIER1,SSI Interrupt Enable Register"
|
|
bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE , Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " CMDAU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CMDDU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXTW_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RDR1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RDR0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TDE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TDE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ROE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ROE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TUE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TUE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RFF1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RFF0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TFE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TFE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x1c++0x03
|
|
line.long 0x04 "STCR1,SSI Transmit Configuration Register"
|
|
bitfld.long 0x04 9. " TXBIT0 ,Transmit bit 0" "MSB,LSB"
|
|
bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal"
|
|
bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal"
|
|
bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "High,Low"
|
|
bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One bit before"
|
|
;group 0x20++0x03
|
|
line.long 0x08 "SRCR1,SSI Receive Configuration Register"
|
|
bitfld.long 0x08 10. " RXEXT ,Receive Data Extension" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "MSB,LSB"
|
|
bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal"
|
|
bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB,LSB"
|
|
bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit"
|
|
bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "One bit before,First bit"
|
|
;group 0x24++0x03
|
|
line.long 0x0c "STCCR1,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x0c 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
bitfld.long 0x0c 13.--16. " WL3-WL0 ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--12. 1. " DC4-DC0 ,Frame Rate Divider Control"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PM7-PM0 ,Prescaler Modulus Select"
|
|
;group 0x28++0x03
|
|
line.long 0x10 "STCCR1,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x10 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
bitfld.long 0x10 13.--16. " WL3-WL0 ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--12. 1. " DC4-DC0 ,Frame Rate Divider Control"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PM7-PM0 ,Prescaler Modulus Select"
|
|
;group 0x2c++0x03
|
|
line.long 0x14 "SFCSR1,SSI FIFO Control/Status Register"
|
|
bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full Watermark 1" "Reserved,At least 1,At least 2,At least 3,At least 4,At least 5,At least 6,At least 7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty Watermark 1" "Reserved,At least 1,At least 2,At least 3,At least 4,At least 5,At least 6,At least 7,8,?..."
|
|
hexmask.long.byte 0x14 12.--15. 1. " RFCNT0[3:0] ,Receive FIFO Counter 0"
|
|
hexmask.long.byte 0x14 8.--11. 1. " TFCNT0[3:0] ,Transmit FIFO Counter 0"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--7. 1. " RFWM0[3:0] ,Receive FIFO Full Watermark 0"
|
|
hexmask.long.byte 0x14 0.--3. 1. " TFWM0[3:0] ,Transmit FIFO Empty Watermark 0"
|
|
;group 0x38++0x03
|
|
line.long 0x20 "SACNT1,SSI AC97 Control Register"
|
|
hexmask.long.byte 0x20 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider"
|
|
bitfld.long 0x20 4. " WR ,Write Command" "Not wrote,Wrote"
|
|
bitfld.long 0x20 3. " RD ,Read Command" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x20 2. " TIF ,Tag in FIFO " "SATAG,FIFO 0"
|
|
bitfld.long 0x20 1. " FV ,Fixed/Variable Operation" "Fixed,Variable"
|
|
bitfld.long 0x20 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled"
|
|
;group 0x3c++0x03
|
|
line.long 0x24 "SACADD1,SSI AC97 Command Address Register"
|
|
hexmask.long.tbyte 0x24 0.--18. 1. " SACADD ,AC97 Command Address"
|
|
;group 0x40++0x03
|
|
line.long 0x28 "SACDAT1,SSI AC97 Command Data Register"
|
|
hexmask.long.tbyte 0x28 0.--19. 1. " SACDAT ,AC97 Command Data"
|
|
;group 0x44++0x03
|
|
line.long 0x2c "SATAG1,SSI AC97 Tag Register"
|
|
hexmask.long.word 0x2c 0.--15. 1. " SATAG ,AC97 Tag"
|
|
;group 0x48++0x03
|
|
line.long 0x30 "STMSK1,SSI Transmit Time Slot Mask Register"
|
|
bitfld.long 0x30 31. " STMSK[31] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 30. " STMSK[30] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 29. " STMSK[29] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 28. " STMSK[28] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 27. " STMSK[27] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 26. " STMSK[26] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 25. " STMSK[25] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 24. " STMSK[24] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 23. " STMSK[23] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 22. " STMSK[22] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 21. " STMSK[21] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 20. " STMSK[20] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 19. " STMSK[19] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 18. " STMSK[18] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 17. " STMSK[17] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 16. " STMSK[16] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 15. " STMSK[15] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 14. " STMSK[14] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 13. " STMSK[13] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 12. " STMSK[12] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 11. " STMSK[11] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 10. " STMSK[10] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 9. " STMSK[9] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 8. " STMSK[8] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 7. " STMSK[7] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 6. " STMSK[6] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 5. " STMSK[5] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 4. " STMSK[4] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 3. " STMSK[3] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 2. " STMSK[2] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 1. " STMSK[1] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 0. " STMSK[0] ,Transmit Mask" "Valid,Masked"
|
|
;group 0x4c++0x03
|
|
line.long 0x34 "SRMSK1,SSI Receive Time Slot Mask Register"
|
|
bitfld.long 0x34 31. " SRMSK[31] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 30. " SRMSK[30] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 29. " SRMSK[29] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 28. " SRMSK[28] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 27. " SRMSK[27] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 26. " SRMSK[26] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 25. " SRMSK[25] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 24. " SRMSK[24] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 23. " SRMSK[23] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 22. " SRMSK[22] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 21. " SRMSK[21] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 20. " SRMSK[20] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 19. " SRMSK[19] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 18. " SRMSK[18] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 17. " SRMSK[17] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 16. " SRMSK[16] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 15. " SRMSK[15] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 14. " SRMSK[14] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 13. " SRMSK[13] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 12. " SRMSK[12] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 11. " SRMSK[11] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 10. " SRMSK[10] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 9. " SRMSK[9] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 8. " SRMSK[8] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 7. " SRMSK[7] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 6. " SRMSK[6] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 5. " SRMSK[5] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 4. " SRMSK[4] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 3. " SRMSK[3] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 2. " SRMSK[2] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 1. " SRMSK[1] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 0. " SRMSK[0] ,Receive Mask" "Valid,Masked"
|
|
width 14.
|
|
tree.end
|
|
tree "SSI 2"
|
|
base asd:0x50014000
|
|
width 9.
|
|
group 0x00--0x07
|
|
line.long 0x00 "STX0_2,SSI Transmit Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " STX0 ,SSI Transmit Data"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "STX1_2,SSI Transmit Data Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " STX1 ,SSI Transmit Data"
|
|
rgroup 0x08--0x0f
|
|
line.long 0x00 "SRX0_2,SSI Receive Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " SRX0 ,SSI Receive Data"
|
|
;rgroup 0x0c++0x03
|
|
line.long 0x04 "SRX1_2,SSI Receive Data Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " SRX1 ,SSI Receive Data"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SCR2,SSI Control Register"
|
|
bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "0,1"
|
|
bitfld.long 0x00 8. " TCH_EN ,Two-Channel Operation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SYS_CLK_EN ,System Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " I2SMODE[1:0] ,I2S Mode Select" "Normal,Master,Slave,Normal"
|
|
bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "SISR2,SSI Interrupt Status Register"
|
|
bitfld.long 0x00 18. " CMDAU ,Command Address Register Updated" "Not changed,Changed"
|
|
bitfld.long 0x00 17. " CMDDU ,Command Data Register Updated" "Not changed,Changed"
|
|
bitfld.long 0x00 16. " RXT ,Receive Tag Updated" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RDR1 ,Receive Data Ready 1" "No new data,New data"
|
|
bitfld.long 0x00 14. " RDR0 ,Receive Data Ready 0" "No new data,New data"
|
|
bitfld.long 0x00 13. " TDE1 ,Transmit Data Register Empty 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TDE0 ,Transmit Data Register Empty 0" "Not empty,Empty"
|
|
bitfld.long 0x00 11. " ROE1 ,Receiver Overrun Error 1" "No error,Error"
|
|
bitfld.long 0x00 10. " ROE0 ,Receiver overrun error 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TUE1 ,Transmitter Underrun Error 1" "No error,Error"
|
|
bitfld.long 0x00 8. " TUE0 ,Transmitter Underrun Error 0" "No error,Error"
|
|
bitfld.long 0x00 7. " TFS ,Transmit Frame Sync" "No sync,Sync"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive Frame Sync" "No sync,Sync"
|
|
bitfld.long 0x00 5. " TLS ,Transmit Last Time Slot" "Not last,Last"
|
|
bitfld.long 0x00 4. " RLS ,Receive Last Time Slot" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFF1 ,Receive FIFO Full 1" "Not full,Full"
|
|
bitfld.long 0x00 2. " RFF0 ,Receive FIFO Full 0" "Not full,Full"
|
|
bitfld.long 0x00 1. " TFE1 ,Transmit FIFO Empty 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE0 ,Transmit FIFO Empty 0" "Not empty,Empty"
|
|
group 0x18--0x4f
|
|
line.long 0x00 "SIER2,SSI Interrupt Enable Register"
|
|
bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE , Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " CMDAU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CMDDU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXTW_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RDR1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RDR0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TDE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TDE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ROE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ROE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TUE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TUE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RFF1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RFF0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TFE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TFE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x1c++0x03
|
|
line.long 0x04 "STCR2,SSI Transmit Configuration Register"
|
|
bitfld.long 0x04 9. " TXBIT0 ,Transmit bit 0" "MSB,LSB"
|
|
bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal"
|
|
bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal"
|
|
bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "High,Low"
|
|
bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One bit before"
|
|
;group 0x20++0x03
|
|
line.long 0x08 "SRCR2,SSI Receive Configuration Register"
|
|
bitfld.long 0x08 10. " RXEXT ,Receive Data Extension" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "MSB,LSB"
|
|
bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal"
|
|
bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB,LSB"
|
|
bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit"
|
|
bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "One bit before,First bit"
|
|
;group 0x24++0x03
|
|
line.long 0x0c "STCCR2,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x0c 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
bitfld.long 0x0c 13.--16. " WL3-WL0 ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--12. 1. " DC4-DC0 ,Frame Rate Divider Control"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PM7-PM0 ,Prescaler Modulus Select"
|
|
;group 0x28++0x03
|
|
line.long 0x10 "STCCR2,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x10 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
bitfld.long 0x10 13.--16. " WL3-WL0 ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--12. 1. " DC4-DC0 ,Frame Rate Divider Control"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PM7-PM0 ,Prescaler Modulus Select"
|
|
;group 0x2c++0x03
|
|
line.long 0x14 "SFCSR2,SSI FIFO Control/Status Register"
|
|
bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full Watermark 1" "Reserved,At least 1,At least 2,At least 3,At least 4,At least 5,At least 6,At least 7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty Watermark 1" "Reserved,At least 1,At least 2,At least 3,At least 4,At least 5,At least 6,At least 7,8,?..."
|
|
hexmask.long.byte 0x14 12.--15. 1. " RFCNT0[3:0] ,Receive FIFO Counter 0"
|
|
hexmask.long.byte 0x14 8.--11. 1. " TFCNT0[3:0] ,Transmit FIFO Counter 0"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--7. 1. " RFWM0[3:0] ,Receive FIFO Full Watermark 0"
|
|
hexmask.long.byte 0x14 0.--3. 1. " TFWM0[3:0] ,Transmit FIFO Empty Watermark 0"
|
|
;group 0x38++0x03
|
|
line.long 0x20 "SACNT2,SSI AC97 Control Register"
|
|
hexmask.long.byte 0x20 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider"
|
|
bitfld.long 0x20 4. " WR ,Write Command" "Not wrote,Wrote"
|
|
bitfld.long 0x20 3. " RD ,Read Command" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x20 2. " TIF ,Tag in FIFO " "SATAG,FIFO 0"
|
|
bitfld.long 0x20 1. " FV ,Fixed/Variable Operation" "Fixed,Variable"
|
|
bitfld.long 0x20 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled"
|
|
;group 0x3c++0x03
|
|
line.long 0x24 "SACADD2,SSI AC97 Command Address Register"
|
|
hexmask.long.tbyte 0x24 0.--18. 1. " SACADD ,AC97 Command Address"
|
|
;group 0x40++0x03
|
|
line.long 0x28 "SACDAT2,SSI AC97 Command Data Register"
|
|
hexmask.long.tbyte 0x28 0.--19. 1. " SACDAT ,AC97 Command Data"
|
|
;group 0x44++0x03
|
|
line.long 0x2c "SATAG2,SSI AC97 Tag Register"
|
|
hexmask.long.word 0x2c 0.--15. 1. " SATAG ,AC97 Tag"
|
|
;group 0x48++0x03
|
|
line.long 0x30 "STMSK2,SSI Transmit Time Slot Mask Register"
|
|
bitfld.long 0x30 31. " STMSK[31] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 30. " STMSK[30] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 29. " STMSK[29] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 28. " STMSK[28] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 27. " STMSK[27] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 26. " STMSK[26] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 25. " STMSK[25] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 24. " STMSK[24] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 23. " STMSK[23] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 22. " STMSK[22] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 21. " STMSK[21] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 20. " STMSK[20] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 19. " STMSK[19] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 18. " STMSK[18] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 17. " STMSK[17] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 16. " STMSK[16] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 15. " STMSK[15] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 14. " STMSK[14] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 13. " STMSK[13] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 12. " STMSK[12] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 11. " STMSK[11] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 10. " STMSK[10] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 9. " STMSK[9] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 8. " STMSK[8] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 7. " STMSK[7] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 6. " STMSK[6] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 5. " STMSK[5] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 4. " STMSK[4] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 3. " STMSK[3] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 2. " STMSK[2] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 1. " STMSK[1] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x30 0. " STMSK[0] ,Transmit Mask" "Valid,Masked"
|
|
;group 0x4c++0x03
|
|
line.long 0x34 "SRMSK2,SSI Receive Time Slot Mask Register"
|
|
bitfld.long 0x34 31. " SRMSK[31] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 30. " SRMSK[30] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 29. " SRMSK[29] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 28. " SRMSK[28] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 27. " SRMSK[27] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 26. " SRMSK[26] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 25. " SRMSK[25] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 24. " SRMSK[24] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 23. " SRMSK[23] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 22. " SRMSK[22] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 21. " SRMSK[21] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 20. " SRMSK[20] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 19. " SRMSK[19] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 18. " SRMSK[18] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 17. " SRMSK[17] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 16. " SRMSK[16] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 15. " SRMSK[15] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 14. " SRMSK[14] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 13. " SRMSK[13] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 12. " SRMSK[12] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 11. " SRMSK[11] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 10. " SRMSK[10] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 9. " SRMSK[9] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 8. " SRMSK[8] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 7. " SRMSK[7] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 6. " SRMSK[6] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 5. " SRMSK[5] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 4. " SRMSK[4] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 3. " SRMSK[3] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 2. " SRMSK[2] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 1. " SRMSK[1] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x34 0. " SRMSK[0] ,Receive Mask" "Valid,Masked"
|
|
width 14.
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
tree "UART 1"
|
|
base asd:0x43f90000
|
|
width 0x8
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "URXD1,UART1 Receiver Register"
|
|
bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Ready"
|
|
bitfld.long 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not BREAK,BREAK"
|
|
bitfld.long 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup 0x40++0x03
|
|
line.long 0x00 "UTXD1,UART1 Transmitter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group 0x80--0xab
|
|
line.long 0x00 "UCR1_1,UART1 Control Register 1"
|
|
bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
;group 0x84++0x03
|
|
line.long 0x04 "UCR2_1,UART1 Control Register 2"
|
|
bitfld.long 0x04 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IRTS ,Ignore /UART1_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.long 0x04 13. " CTSC ,/UART1_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.long 0x04 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.long 0x04 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.long 0x04 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.long 0x04 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " /SRST ,Software Reset" "Reset,No reset"
|
|
;group 0x88++0x03
|
|
line.long 0x08 "UCR3_1,UART1 Control Register 3"
|
|
bitfld.long 0x08 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising edge,Falling edge,Either edge,Either edge"
|
|
bitfld.long 0x08 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DSR ,Data Set Ready" "Zero,One"
|
|
bitfld.long 0x08 9. " DCD ,Data Carrier Detect" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RI ,Ring Indicator" "Zero,One"
|
|
bitfld.long 0x08 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
bitfld.long 0x08 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.long 0x08 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x0C "UCR4_1,UART1 Control Register 4"
|
|
bitfld.long 0x0C 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.long 0x0C 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.long 0x0C 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.long 0x0C 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x90++0x03
|
|
line.long 0x10 "UFCR1,UART1 FIFO Control Register"
|
|
hexmask.long.byte 0x10 10.--15. 1. " TXTL ,Transmitter Trigger Level"
|
|
bitfld.long 0x10 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Divide by 1,Div by 7,?..."
|
|
bitfld.long 0x10 6. " DCEDTE ,DCE/DTE Mode Select" "DCE,DTE"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " RXTL ,Receiver Trigger Level"
|
|
;group 0x94++0x03
|
|
line.long 0x14 "USR11,UART1 Status Register 1"
|
|
eventfld.long 0x14 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x14 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.long 0x14 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Require"
|
|
textline " "
|
|
eventfld.long 0x14 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.long 0x14 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x14 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.long 0x14 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.long 0x14 7. " DTRD , DTR Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
eventfld.long 0x14 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x14 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
;group 0x98++0x03
|
|
line.long 0x18 "USR21,UART1 Status Register 2"
|
|
eventfld.long 0x18 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.long 0x18 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x18 13. " DTRF ,DTR Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x18 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
bitfld.long 0x18 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.long 0x18 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " RIIN ,Ring Indicator Input" "Detected,Not detected"
|
|
bitfld.long 0x18 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x18 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed"
|
|
bitfld.long 0x18 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected"
|
|
eventfld.long 0x18 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.long 0x18 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
eventfld.long 0x18 1. " ORE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x18 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
;group 0x9c++0x03
|
|
line.long 0x1C "UESC1,UART1 Escape Character Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
;group 0xa0++0x03
|
|
line.long 0x20 "UTIM1,UART1 Escape Timer Register"
|
|
hexmask.long.word 0x20 0.--11. 1. " TIM ,UART Escape Timer"
|
|
;group 0xa4++0x03
|
|
line.long 0x24 "UBIR1,UART1 BRM Incremental Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " INC ,Incremental Numerator"
|
|
;group 0xa8++0x03
|
|
line.long 0x28 "UBMR1,UART1 BRM Modulator Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup 0xac++0x03
|
|
line.long 0x00 "UBRC1,UART1 Baud Rate Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group 0xb0--0xb7
|
|
line.long 0x00 "ONEMS1,UART1 One Millisecond Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
;group 0xb4++0x03
|
|
line.long 0x04 "UTS1,UART1 Test Register 1"
|
|
bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.long 0x04 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.long 0x04 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.long 0x04 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xf
|
|
tree.end
|
|
tree "UART 2"
|
|
base asd:0x43f94000
|
|
width 0x8
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "URXD2,UART2 Receiver Register"
|
|
bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Ready"
|
|
bitfld.long 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not BREAK,BREAK"
|
|
bitfld.long 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup 0x40++0x03
|
|
line.long 0x00 "UTXD2,UART2 Transmitter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group 0x80--0xab
|
|
line.long 0x00 "UCR1_2,UART2 Control Register 1"
|
|
bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
;group 0x84++0x03
|
|
line.long 0x04 "UCR2_2,UART2 Control Register 2"
|
|
bitfld.long 0x04 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IRTS ,Ignore /UART2_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.long 0x04 13. " CTSC ,/UART2_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.long 0x04 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.long 0x04 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.long 0x04 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.long 0x04 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " /SRST ,Software Reset" "Reset,No reset"
|
|
;group 0x88++0x03
|
|
line.long 0x08 "UCR3_2,UART2 Control Register 3"
|
|
bitfld.long 0x08 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising edge,Falling edge,Either edge,Either edge"
|
|
bitfld.long 0x08 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DSR ,Data Set Ready" "Zero,One"
|
|
bitfld.long 0x08 9. " DCD ,Data Carrier Detect" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RI ,Ring Indicator" "Zero,One"
|
|
bitfld.long 0x08 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
bitfld.long 0x08 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.long 0x08 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x0C "UCR4_2,UART2 Control Register 4"
|
|
bitfld.long 0x0C 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.long 0x0C 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.long 0x0C 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.long 0x0C 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x90++0x03
|
|
line.long 0x10 "UFCR2,UART2 FIFO Control Register"
|
|
hexmask.long.byte 0x10 10.--15. 1. " TXTL ,Transmitter Trigger Level"
|
|
bitfld.long 0x10 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Divide by 1,Div by 7,?..."
|
|
bitfld.long 0x10 6. " DCEDTE ,DCE/DTE Mode Select" "DCE,DTE"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " RXTL ,Receiver Trigger Level"
|
|
;group 0x94++0x03
|
|
line.long 0x14 "USR12,UART2 Status Register 1"
|
|
eventfld.long 0x14 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x14 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.long 0x14 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Require"
|
|
textline " "
|
|
eventfld.long 0x14 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.long 0x14 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x14 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.long 0x14 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.long 0x14 7. " DTRD , DTR Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
eventfld.long 0x14 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x14 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
;group 0x98++0x03
|
|
line.long 0x18 "USR22,UART2 Status Register 2"
|
|
eventfld.long 0x18 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.long 0x18 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x18 13. " DTRF ,DTR Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x18 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
bitfld.long 0x18 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.long 0x18 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " RIIN ,Ring Indicator Input" "Detected,Not detected"
|
|
bitfld.long 0x18 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x18 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed"
|
|
bitfld.long 0x18 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected"
|
|
eventfld.long 0x18 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.long 0x18 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
eventfld.long 0x18 1. " ORE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x18 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
;group 0x9c++0x03
|
|
line.long 0x1C "UESC2,UART2 Escape Character Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
;group 0xa0++0x03
|
|
line.long 0x20 "UTIM2,UART2 Escape Timer Register"
|
|
hexmask.long.word 0x20 0.--11. 1. " TIM ,UART Escape Timer"
|
|
;group 0xa4++0x03
|
|
line.long 0x24 "UBIR2,UART2 BRM Incremental Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " INC ,Incremental Numerator"
|
|
;group 0xa8++0x03
|
|
line.long 0x28 "UBMR2,UART2 BRM Modulator Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup 0xac++0x03
|
|
line.long 0x00 "UBRC2,UART2 Baud Rate Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group 0xb0--0xb7
|
|
line.long 0x00 "ONEMS2,UART2 One Millisecond Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
;group 0xb4++0x03
|
|
line.long 0x04 "UTS2,UART2 Test Register 1"
|
|
bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.long 0x04 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.long 0x04 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.long 0x04 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xf
|
|
tree.end
|
|
tree "UART 3"
|
|
base asd:0x5000c000
|
|
width 0x8
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "URXD3,UART3 Receiver Register"
|
|
bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Ready"
|
|
bitfld.long 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not BREAK,BREAK"
|
|
bitfld.long 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup 0x40++0x03
|
|
line.long 0x00 "UTXD3,UART3 Transmitter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group 0x80--0xab
|
|
line.long 0x00 "UCR1_3,UART3 Control Register 1"
|
|
bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
;group 0x84++0x03
|
|
line.long 0x04 "UCR2_3,UART3 Control Register 2"
|
|
bitfld.long 0x04 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IRTS ,Ignore /UART3_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.long 0x04 13. " CTSC ,/UART3_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.long 0x04 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.long 0x04 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.long 0x04 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.long 0x04 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " /SRST ,Software Reset" "Reset,No reset"
|
|
;group 0x88++0x03
|
|
line.long 0x08 "UCR3_3,UART3 Control Register 3"
|
|
bitfld.long 0x08 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising edge,Falling edge,Either edge,Either edge"
|
|
bitfld.long 0x08 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DSR ,Data Set Ready" "Zero,One"
|
|
bitfld.long 0x08 9. " DCD ,Data Carrier Detect" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RI ,Ring Indicator" "Zero,One"
|
|
bitfld.long 0x08 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
bitfld.long 0x08 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.long 0x08 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x0C "UCR4_3,UART3 Control Register 4"
|
|
bitfld.long 0x0C 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.long 0x0C 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.long 0x0C 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.long 0x0C 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x90++0x03
|
|
line.long 0x10 "UFCR3,UART3 FIFO Control Register"
|
|
hexmask.long.byte 0x10 10.--15. 1. " TXTL ,Transmitter Trigger Level"
|
|
bitfld.long 0x10 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Divide by 1,Div by 7,?..."
|
|
bitfld.long 0x10 6. " DCEDTE ,DCE/DTE Mode Select" "DCE,DTE"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " RXTL ,Receiver Trigger Level"
|
|
;group 0x94++0x03
|
|
line.long 0x14 "USR13,UART3 Status Register 1"
|
|
eventfld.long 0x14 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x14 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.long 0x14 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Require"
|
|
textline " "
|
|
eventfld.long 0x14 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.long 0x14 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x14 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.long 0x14 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.long 0x14 7. " DTRD , DTR Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
eventfld.long 0x14 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x14 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
;group 0x98++0x03
|
|
line.long 0x18 "USR23,UART3 Status Register 2"
|
|
eventfld.long 0x18 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.long 0x18 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x18 13. " DTRF ,DTR Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x18 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
bitfld.long 0x18 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.long 0x18 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " RIIN ,Ring Indicator Input" "Detected,Not detected"
|
|
bitfld.long 0x18 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x18 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed"
|
|
bitfld.long 0x18 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected"
|
|
eventfld.long 0x18 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.long 0x18 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
eventfld.long 0x18 1. " ORE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x18 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
;group 0x9c++0x03
|
|
line.long 0x1C "UESC3,UART3 Escape Character Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
;group 0xa0++0x03
|
|
line.long 0x20 "UTIM3,UART3 Escape Timer Register"
|
|
hexmask.long.word 0x20 0.--11. 1. " TIM ,UART Escape Timer"
|
|
;group 0xa4++0x03
|
|
line.long 0x24 "UBIR3,UART3 BRM Incremental Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " INC ,Incremental Numerator"
|
|
;group 0xa8++0x03
|
|
line.long 0x28 "UBMR3,UART3 BRM Modulator Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup 0xac++0x03
|
|
line.long 0x00 "UBRC3,UART3 Baud Rate Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group 0xb0--0xb7
|
|
line.long 0x00 "ONEMS3,UART3 One Millisecond Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
;group 0xb4++0x03
|
|
line.long 0x04 "UTS3,UART3 Test Register 1"
|
|
bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.long 0x04 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.long 0x04 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.long 0x04 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xf
|
|
tree.end
|
|
tree "UART 4"
|
|
base asd:0x43fb0000
|
|
width 0x8
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "URXD4,UART4 Receiver Register"
|
|
bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Ready"
|
|
bitfld.long 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not BREAK,BREAK"
|
|
bitfld.long 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup 0x40++0x03
|
|
line.long 0x00 "UTXD4,UART4 Transmitter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group 0x80--0xab
|
|
line.long 0x00 "UCR1_4,UART4 Control Register 1"
|
|
bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
;group 0x84++0x03
|
|
line.long 0x04 "UCR2_4,UART4 Control Register 2"
|
|
bitfld.long 0x04 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IRTS ,Ignore /UART4_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.long 0x04 13. " CTSC ,/UART4_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.long 0x04 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.long 0x04 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.long 0x04 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.long 0x04 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " /SRST ,Software Reset" "Reset,No reset"
|
|
;group 0x88++0x03
|
|
line.long 0x08 "UCR3_4,UART4 Control Register 3"
|
|
bitfld.long 0x08 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising edge,Falling edge,Either edge,Either edge"
|
|
bitfld.long 0x08 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DSR ,Data Set Ready" "Zero,One"
|
|
bitfld.long 0x08 9. " DCD ,Data Carrier Detect" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RI ,Ring Indicator" "Zero,One"
|
|
bitfld.long 0x08 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
bitfld.long 0x08 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.long 0x08 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x0C "UCR4_4,UART4 Control Register 4"
|
|
bitfld.long 0x0C 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.long 0x0C 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.long 0x0C 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.long 0x0C 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x90++0x03
|
|
line.long 0x10 "UFCR4,UART4 FIFO Control Register"
|
|
hexmask.long.byte 0x10 10.--15. 1. " TXTL ,Transmitter Trigger Level"
|
|
bitfld.long 0x10 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Divide by 1,Div by 7,?..."
|
|
bitfld.long 0x10 6. " DCEDTE ,DCE/DTE Mode Select" "DCE,DTE"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " RXTL ,Receiver Trigger Level"
|
|
;group 0x94++0x03
|
|
line.long 0x14 "USR14,UART4 Status Register 1"
|
|
eventfld.long 0x14 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x14 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.long 0x14 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Require"
|
|
textline " "
|
|
eventfld.long 0x14 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.long 0x14 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x14 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.long 0x14 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.long 0x14 7. " DTRD , DTR Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
eventfld.long 0x14 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x14 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
;group 0x98++0x03
|
|
line.long 0x18 "USR24,UART4 Status Register 2"
|
|
eventfld.long 0x18 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.long 0x18 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x18 13. " DTRF ,DTR Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x18 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
bitfld.long 0x18 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.long 0x18 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " RIIN ,Ring Indicator Input" "Detected,Not detected"
|
|
bitfld.long 0x18 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x18 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed"
|
|
bitfld.long 0x18 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected"
|
|
eventfld.long 0x18 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.long 0x18 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
eventfld.long 0x18 1. " ORE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x18 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
;group 0x9c++0x03
|
|
line.long 0x1C "UESC4,UART4 Escape Character Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
;group 0xa0++0x03
|
|
line.long 0x20 "UTIM4,UART4 Escape Timer Register"
|
|
hexmask.long.word 0x20 0.--11. 1. " TIM ,UART Escape Timer"
|
|
;group 0xa4++0x03
|
|
line.long 0x24 "UBIR4,UART4 BRM Incremental Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " INC ,Incremental Numerator"
|
|
;group 0xa8++0x03
|
|
line.long 0x28 "UBMR4,UART4 BRM Modulator Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup 0xac++0x03
|
|
line.long 0x00 "UBRC4,UART4 Baud Rate Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group 0xb0--0xb7
|
|
line.long 0x00 "ONEMS4,UART4 One Millisecond Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
;group 0xb4++0x03
|
|
line.long 0x04 "UTS4,UART4 Test Register 1"
|
|
bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.long 0x04 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.long 0x04 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.long 0x04 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xf
|
|
tree.end
|
|
tree "UART 5"
|
|
base asd:0x43fb4000
|
|
width 0x8
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "URXD5,UART5 Receiver Register"
|
|
bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Ready"
|
|
bitfld.long 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not BREAK,BREAK"
|
|
bitfld.long 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup 0x40++0x03
|
|
line.long 0x00 "UTXD5,UART5 Transmitter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group 0x80--0xab
|
|
line.long 0x00 "UCR1_5,UART5 Control Register 1"
|
|
bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
;group 0x84++0x03
|
|
line.long 0x04 "UCR2_5,UART5 Control Register 2"
|
|
bitfld.long 0x04 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IRTS ,Ignore /UART5_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.long 0x04 13. " CTSC ,/UART5_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.long 0x04 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.long 0x04 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.long 0x04 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.long 0x04 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " /SRST ,Software Reset" "Reset,No reset"
|
|
;group 0x88++0x03
|
|
line.long 0x08 "UCR3_5,UART5 Control Register 3"
|
|
bitfld.long 0x08 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising edge,Falling edge,Either edge,Either edge"
|
|
bitfld.long 0x08 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " DSR ,Data Set Ready" "Zero,One"
|
|
bitfld.long 0x08 9. " DCD ,Data Carrier Detect" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RI ,Ring Indicator" "Zero,One"
|
|
bitfld.long 0x08 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
bitfld.long 0x08 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.long 0x08 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x8c++0x03
|
|
line.long 0x0C "UCR4_5,UART5 Control Register 4"
|
|
bitfld.long 0x0C 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.long 0x0C 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.long 0x0C 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.long 0x0C 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x90++0x03
|
|
line.long 0x10 "UFCR5,UART5 FIFO Control Register"
|
|
hexmask.long.byte 0x10 10.--15. 1. " TXTL ,Transmitter Trigger Level"
|
|
bitfld.long 0x10 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Divide by 1,Div by 7,?..."
|
|
bitfld.long 0x10 6. " DCEDTE ,DCE/DTE Mode Select" "DCE,DTE"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " RXTL ,Receiver Trigger Level"
|
|
;group 0x94++0x03
|
|
line.long 0x14 "USR15,UART5 Status Register 1"
|
|
eventfld.long 0x14 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x14 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.long 0x14 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Require"
|
|
textline " "
|
|
eventfld.long 0x14 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.long 0x14 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x14 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.long 0x14 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.long 0x14 7. " DTRD , DTR Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
eventfld.long 0x14 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x14 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
;group 0x98++0x03
|
|
line.long 0x18 "USR25,UART5 Status Register 2"
|
|
eventfld.long 0x18 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.long 0x18 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x18 13. " DTRF ,DTR Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x18 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
bitfld.long 0x18 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.long 0x18 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " RIIN ,Ring Indicator Input" "Detected,Not detected"
|
|
bitfld.long 0x18 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.long 0x18 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed"
|
|
bitfld.long 0x18 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected"
|
|
eventfld.long 0x18 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x18 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.long 0x18 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
eventfld.long 0x18 1. " ORE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x18 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
;group 0x9c++0x03
|
|
line.long 0x1C "UESC5,UART5 Escape Character Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
;group 0xa0++0x03
|
|
line.long 0x20 "UTIM5,UART5 Escape Timer Register"
|
|
hexmask.long.word 0x20 0.--11. 1. " TIM ,UART Escape Timer"
|
|
;group 0xa4++0x03
|
|
line.long 0x24 "UBIR5,UART5 BRM Incremental Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " INC ,Incremental Numerator"
|
|
;group 0xa8++0x03
|
|
line.long 0x28 "UBMR5,UART5 BRM Modulator Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup 0xac++0x03
|
|
line.long 0x00 "UBRC5,UART5 Baud Rate Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group 0xb0--0xb7
|
|
line.long 0x00 "ONEMS5,UART5 One Millisecond Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
;group 0xb4++0x03
|
|
line.long 0x04 "UTS5,UART5 Test Register 1"
|
|
bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.long 0x04 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.long 0x04 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.long 0x04 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xf
|
|
tree.end
|
|
tree.end
|
|
tree "USBOTG (USB On-The-Go)"
|
|
base asd:0x43f88000
|
|
width 12.
|
|
if ((data.long(asd:0x43f88600)&0x1)==0x1)
|
|
group 0x600++0x03
|
|
line.long 0x00 "USBCONTROL,USB Control Register"
|
|
bitfld.long 0x00 31. " OWIR ,OTG Wake up Interrupt Request" "Not requested,Requested"
|
|
bitfld.long 0x00 29.--30. " OSIC ,OTG Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OUIE ,OTG ULPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " OWIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " OBPVAL1 ,OTG Bypass Value for RxDB" "0,1"
|
|
bitfld.long 0x00 25. " OBPVAL0 ,OTG Bypass Value for RxDm" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " OPM ,OTG Power Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " H2WIR ,Host 2 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " H2SIC ,Host 2 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
bitfld.long 0x00 20. " H2UIE ,Host 2 ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " H2WIE ,Host 2 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " H2PM ,Host 2 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " H1WIR ,Host 1 Wake-up Interrupt Request" "Not requested,Requested"
|
|
bitfld.long 0x00 13.--14. " H1SIC ,Host 1 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 11. " H1WIE ,Host 1 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " H1BPVAL1 ,HOST 1 Bypass Value for RxDB" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " H1BPVAL1 ,HOST 1 Bypass Value for RxDm" "0,1"
|
|
bitfld.long 0x00 8. " H1PM ,Host 1 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " H2DT ,Host 2 TLL Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " H1DT ,Host 1 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BPE ,Bypass Enable" "Disabled,Enabled"
|
|
else
|
|
group 0x600++0x03
|
|
line.long 0x00 "USBCONTROL,USB Control Register"
|
|
bitfld.long 0x00 31. " OWIR ,OTG Wake up Interrupt Request" "Not requested,Requested"
|
|
bitfld.long 0x00 29.--30. " OSIC ,OTG Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OUIE ,OTG ULPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " OWIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " OPM ,OTG Power Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " H2WIR ,Host 2 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " H2SIC ,Host 2 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
bitfld.long 0x00 20. " H2UIE ,Host 2 ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " H2WIE ,Host 2 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " H2PM ,Host 2 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " H1WIR ,Host 1 Wake-up Interrupt Request" "Not requested,Requested"
|
|
bitfld.long 0x00 13.--14. " H1SIC ,Host 1 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 11. " H1WIE ,Host 1 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " H1PM ,Host 1 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " H2DT ,Host 2 TLL Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " H1DT ,Host 1 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BPE ,Bypass Enable" "Disabled,Enabled"
|
|
endif
|
|
group 0x604++0x03
|
|
line.long 0x00 "OTGMIRROR,OTG Port Mirror Register"
|
|
bitfld.long 0x00 4. " SESEND ,B Device Session End" "Active,End"
|
|
bitfld.long 0x00 3. " VBUSVLD ,Vbus Valid" "Invalid,Valid"
|
|
bitfld.long 0x00 2. " BSESVLD ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASESVLD ,A Session Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " IDIDG ,OTG ID-pin Status" "Low(A-device),High(B-device)"
|
|
width 22.
|
|
tree "OTG USB"
|
|
rgroup 0x00--0x17
|
|
line.long 0x00 "UOG_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "UOG_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
;rgroup 0x08++0x03
|
|
line.long 0x08 "UOG_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
;rgroup 0x0c++0x03
|
|
line.long 0x0c "HWDEVICE,Device Hardware Parameters Register"
|
|
hexmask.long.byte 0x0c 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP"
|
|
bitfld.long 0x0c 0. " DC ,VUSB_HS_DEV" "0,1"
|
|
;rgroup 0x10++0x03
|
|
line.long 0x10 "UOG_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x10 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
;rgroup 0x14++0x03
|
|
line.long 0x14 "UOG_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup 0x100--0x127
|
|
line.byte 0x00 "UOG_CAPLENGTH,EHCI Compliant Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length"
|
|
;rgroup 0x102++0x01
|
|
line.word 0x02 "UOG_HCIVERSION,EHCI Compliant Register"
|
|
hexmask.word 0x02 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "UOG_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x04 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4. " PPC ,Port Power Control" "Not controled,Controled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
;rgroup 0x108++0x03
|
|
line.long 0x08 "UOG_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x08 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
;rgroup 0x120++0x01
|
|
line.word 0x20 "UOG_DCIVERSION,Device Interface Version Number Register"
|
|
hexmask.word 0x20 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number"
|
|
;rgroup 0x124++0x03
|
|
line.long 0x24 "UOG_DCCPARAMS,Device Control Capability Parameters Register"
|
|
bitfld.long 0x24 8. " HC ,Host Capable" "Disabled,Enabled"
|
|
bitfld.long 0x24 7. " DC ,Device Capable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group 0x140--0x14f
|
|
line.long 0x00 "UOG_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 15. " FS2 ,Frame List Size 2" "Cleared,Set"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FS1 ,Frame List Size 1" "Cleared,Set"
|
|
bitfld.long 0x00 2. " FS0 ,Frame List Size 0" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
;group 0x144++0x03
|
|
line.long 0x04 "UOG_USBSTS,USB Status Register"
|
|
bitfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
bitfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SEI ,System Error (Reserved))" "No error,Error"
|
|
bitfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
;group 0x148++0x03
|
|
line.long 0x08 "UOG_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x14c++0x03
|
|
line.long 0x0c "UOG_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--13. 1. " FRINDEX ,Frame Index"
|
|
group 0x150++0x03
|
|
line.long 0x00 "CTRLDSSEGMENT,?..."
|
|
;if for host
|
|
if ((data.long(asd:0x43f881a8)&0x3)==0x3)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UOG_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BASEADR ,Base Address (Low)"
|
|
;if for device
|
|
elif ((data.long(asd:0x43f881a8)&0x3)==0x2)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UOG_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " USBADR ,Device Address"
|
|
else
|
|
hgroup 0x154++0x03
|
|
hide.long 0x00 "UOG_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
endif
|
|
if ((data.long(asd:0x43f881a8)&0x3)==0x3)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UOG_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x00 5.--31. 1. " ASYBASE[31:5] ,Link Pointer Low"
|
|
elif ((data.long(asd:0x43f881a8)&0x3)==0x2)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UOG_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long.tbyte 0x00 11.--31. 1. " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup 0x158++0x03
|
|
hide.long 0x00 "UOG_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group 0x160--0x167
|
|
line.long 0x00 "UOG_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
;group 0x164++0x03
|
|
line.long 0x04 "UOG_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,TXFIFOTHRES"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,TXSCHEALTH"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,TXSCHOH"
|
|
if ((data.long(asd:0x43f88170)&0x20000000)==0x20000000)
|
|
group 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No operation,Write "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
else
|
|
group 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not read,Read "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
endif
|
|
;rgroup 0x180++0x03
|
|
; line.long 0x00 "UOG_CFGFLAG,Config Flag Register (Reserved)"
|
|
;if for host
|
|
if ((data.long(asd:0x43f881a8)&0x3)==0x3)
|
|
group 0x184--0x1a3
|
|
line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x188++0x03
|
|
line.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x18c++0x03
|
|
line.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x190++0x03
|
|
line.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x194++0x03
|
|
line.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x198++0x03
|
|
line.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x19c++0x03
|
|
line.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x1a0++0x03
|
|
line.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;if for device
|
|
elif ((data.long(asd:0x43f881a8)&0x3)==0x2)
|
|
group 0x184++0x03
|
|
line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup 0x184++0x03
|
|
hide.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group 0x1a4++0x03
|
|
line.long 0x00 "UOG_OTGSC,OTG Status Control Register"
|
|
bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " 1MSE ,1 Milisecond Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " 1MSS ,1 Milisecond Timer Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " AVVIS ,A VBus Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled"
|
|
bitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended"
|
|
bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " ID ,USB ID" "A device,B device"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VC ,VBUS Charge" "Not charged,Charged"
|
|
bitfld.long 0x00 0. " VD ,VBUS Discharge" "Not discharged,Discharged"
|
|
group 0x1a8--0x1af
|
|
line.long 0x00 "UOG_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
;group 0x1ac++0x03
|
|
line.long 0x04 "UOG_ENDPTSETUPSTAT,Endpoint Setup Status Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " ENDPTSETUPSTAT[15:0] ,Setup Endpoint Status"
|
|
if ((data.long(asd:0x43f881a8)&0x3)==0x2)
|
|
group 0x1b0--0x1b7
|
|
line.long 0x00 "UOG_ENDPTPRIME,Endpoint Initialization Register"
|
|
bitfld.long 0x00 31. " PETB15 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 30. " PETB14 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 29. " PETB13 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PETB12 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 27. " PETB11 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 26. " PETB10 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PETB9 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 24. " PETB8 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 23. " PETB7 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PETB6 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 21. " PETB5 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 20. " PETB4 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PETB3 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 18. " PETB2 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 17. " PETB1 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PETB0 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 15. " PERB15 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 14. " PERB14 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERB13 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 12. " PERB12 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 11. " PERB11 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERB10 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 9. " PERB9 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 8. " PERB8 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERB7 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 6. " PERB6 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 5. " PERB5 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERB4 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 3. " PERB3 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 2. " PERB2 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERB1 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 0. " PERB0 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
;group 0x1b4++0x03
|
|
line.long 0x04 "UOG_ENDPTFLUSH,Endpoint De-Initialize Register"
|
|
bitfld.long 0x04 31. " FETB15 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 30. " FETB14 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 29. " FETB13 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FETB12 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 27. " FETB11 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 26. " FETB10 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FETB9 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 24. " FETB8 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 23. " FETB7 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FETB6 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 21. " FETB5 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 20. " FETB4 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FETB3 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 18. " FETB2 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 17. " FETB1 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FETB0 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 15. " FERB15 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 14. " FERB14 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FERB13 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 12. " FERB12 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 11. " FERB11 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FERB10 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 9. " FERB9 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 8. " FERB8 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FERB7 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 6. " FERB6 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 5. " FERB5 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FERB4 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 3. " FERB3 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 2. " FERB2 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FERB1 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 0. " FERB0 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
rgroup 0x1b8++0x03
|
|
line.long 0x00 "UOG_ENDPTSTAT,Endpoint Status Register"
|
|
bitfld.long 0x00 31. " ETBR15 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 30. " ETBR14 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 29. " ETBR13 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETBR12 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 27. " ETBR11 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 26. " ETBR10 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETBR9 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 24. " ETBR8 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 23. " ETBR7 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETBR6 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 21. " ETBR5 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " ETBR4 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETBR3 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 18. " ETBR2 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " ETBR1 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETBR0 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 15. " ERBR15 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 14. " ERBR14 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERBR13 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 12. " ERBR12 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 11. " ERBR11 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERBR10 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " ERBR9 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 8. " ERBR8 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERBR7 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " ERBR6 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 5. " ERBR5 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERBR4 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " ERBR3 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 2. " ERBR2 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERBR1 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " ERBR0 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
group 0x1bc++0x03
|
|
line.long 0x00 "UOG_ENDPTCOMPLETE,Endpoint Compete Register"
|
|
bitfld.long 0x00 31. " ETCE15 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " ETCE14 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " ETCE13 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETCE12 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " ETCE11 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " ETCE10 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETCE9 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " ETCE8 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " ETCE7 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETCE6 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " ETCE5 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " ETCE4 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " ERCE15 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " ERCE14 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERCE13 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ERCE12 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ERCE11 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERCE10 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ERCE9 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ERCE8 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERCE4 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
endif
|
|
width 12.
|
|
group 0x1c0--0x1df
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint Control 0 Register"
|
|
bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x4 "ENDPTCTRL1,Endpoint Control 1 Register"
|
|
bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x8 "ENDPTCTRL2,Endpoint Control 2 Register"
|
|
bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0xC "ENDPTCTRL3,Endpoint Control 3 Register"
|
|
bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x10 "ENDPTCTRL4,Endpoint Control 4 Register"
|
|
bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x14 "ENDPTCTRL5,Endpoint Control 5 Register"
|
|
bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x18 "ENDPTCTRL6,Endpoint Control 6 Register"
|
|
bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
;group 0x1c4++0x03
|
|
line.long 0x1C "ENDPTCTRL7,Endpoint Control 7 Register"
|
|
bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x1C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
tree.end
|
|
width 22.
|
|
base asd:0x43f88200
|
|
tree "Host 1"
|
|
rgroup 0x00--0x17
|
|
line.long 0x00 "UH1_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "UH1_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
;rgroup 0x08++0x03
|
|
line.long 0x08 "UH1_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
;rgroup 0x0c++0x03
|
|
line.long 0x0c "HWDEVICE,Device Hardware Parameters Register"
|
|
hexmask.long.byte 0x0c 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP"
|
|
bitfld.long 0x0c 0. " DC ,VUSB_HS_DEV" "0,1"
|
|
;rgroup 0x10++0x03
|
|
line.long 0x10 "UH1_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x10 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
;rgroup 0x14++0x03
|
|
line.long 0x14 "UH1_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup 0x100--0x127
|
|
line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length"
|
|
;rgroup 0x102++0x01
|
|
line.word 0x02 "UH1_HCIVERSION,EHCI Compliant Register"
|
|
hexmask.word 0x02 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "UH1_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x04 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4. " PPC ,Port Power Control" "Not controled,Controled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
;rgroup 0x108++0x03
|
|
line.long 0x08 "UH1_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x08 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
group 0x140--0x14f
|
|
line.long 0x00 "UH1_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 15. " FS2 ,Frame List Size 2" "Cleared,Set"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP1 ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FS1 ,Frame List Size 1" "Cleared,Set"
|
|
bitfld.long 0x00 2. " FS0 ,Frame List Size 0" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
;group 0x144++0x03
|
|
line.long 0x04 "UH1_USBSTS,USB Status Register"
|
|
bitfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
bitfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
bitfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SEI ,System Error (Reserved))" "No error,Error"
|
|
bitfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
;group 0x148++0x03
|
|
line.long 0x08 "UH1_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x14c++0x03
|
|
line.long 0x0c "UH1_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " FRINDEX ,Frame Index"
|
|
if ((data.long(asd:0x43f883a8)&0x3)==0x3)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BASEADR ,Base Address (Low)"
|
|
elif ((data.long(asd:0x43f883a8)&0x3)==0x2)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UH1_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " USBADR ,Device Address"
|
|
elif ((data.long(asd:0x43f883a8)&0x2)==0x0)
|
|
hgroup 0x154++0x03
|
|
hide.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
endif
|
|
if ((data.long(asd:0x43f883a8)&0x3)==0x3)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UH1_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x00 5.--31. 1. " ASYBASE[31:5] ,Link Pointer Low"
|
|
elif ((data.long(asd:0x43f883a8)&0x3)==0x2)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UH1_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long.tbyte 0x00 11.--31. 1. " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup 0x158++0x03
|
|
hide.long 0x00 "UH1_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group 0x160--0x167
|
|
line.long 0x00 "UH1_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
;group 0x164++0x03
|
|
line.long 0x04 "UH1_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,TXFIFOTHRES"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,TXSCHEALTH"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,TXSCHOH"
|
|
width 14.
|
|
;if for host
|
|
if ((data.long(asd:0x43f883a8)&0x3)==0x3)
|
|
group 0x184--0x1a3
|
|
line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x188++0x03
|
|
line.long 0x04 "UH1_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x18c++0x03
|
|
line.long 0x08 "UH1_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x190++0x03
|
|
line.long 0x0c "UH1_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x194++0x03
|
|
line.long 0x10 "UH1_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x198++0x03
|
|
line.long 0x14 "UH1_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x19c++0x03
|
|
line.long 0x18 "UH1_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x1a0++0x03
|
|
line.long 0x1c "UH1_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;if for device
|
|
elif ((data.long(asd:0x43f883a8)&0x3)==0x2)
|
|
group 0x184++0x03
|
|
line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup 0x184++0x03
|
|
hide.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group 0x1a8++0x03
|
|
line.long 0x00 "UH1_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
tree.end
|
|
width 22.
|
|
base asd:0x43f88400
|
|
tree "Host 2"
|
|
rgroup 0x00--0x17
|
|
line.long 0x00 "UH2_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "UH2_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
;rgroup 0x08++0x03
|
|
line.long 0x08 "UH2_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
;rgroup 0x0c++0x03
|
|
line.long 0x0c "HWDEVICE,Device Hardware Parameters Register"
|
|
hexmask.long.byte 0x0c 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP"
|
|
bitfld.long 0x0c 0. " DC ,VUSB_HS_DEV" "0,1"
|
|
;rgroup 0x10++0x03
|
|
line.long 0x10 "UH2_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x10 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
;rgroup 0x14++0x03
|
|
line.long 0x14 "UH2_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup 0x100--0x127
|
|
line.byte 0x00 "UH2_CAPLENGTH,EHCI Compliant Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length"
|
|
;rgroup 0x102++0x01
|
|
line.word 0x02 "UH2_HCIVERSION,EHCI Compliant Register"
|
|
hexmask.word 0x02 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "UH2_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x04 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4. " PPC ,Port Power Control" "Not controled,Controled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
;rgroup 0x108++0x03
|
|
line.long 0x08 "UH2_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x08 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
group 0x140--0x14f
|
|
line.long 0x00 "UH2_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 15. " FS2 ,Frame List Size 2" "Cleared,Set"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP1 ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FS1 ,Frame List Size 1" "Cleared,Set"
|
|
bitfld.long 0x00 2. " FS0 ,Frame List Size 0" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
;group 0x144++0x03
|
|
line.long 0x04 "UH2_USBSTS,USB Status Register"
|
|
bitfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
bitfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
bitfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SEI ,System Error (Reserved))" "No error,Error"
|
|
bitfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
;group 0x148++0x03
|
|
line.long 0x08 "UH2_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x14c++0x03
|
|
line.long 0x0c "UH2_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " FRINDEX ,Frame Index"
|
|
;if for host
|
|
if ((data.long(asd:0x43f885a8)&0x3)==0x3)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UH2_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BASEADR ,Base Address (Low)"
|
|
;if for device
|
|
elif ((data.long(asd:0x43f885a8)&0x3)==0x2)
|
|
group 0x154++0x03
|
|
line.long 0x00 "UH2_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " USBADR ,Device Address"
|
|
hgroup 0x154++0x03
|
|
hide.long 0x00 "UH2_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
endif
|
|
if ((data.long(asd:0x43f885a8)&0x3)==0x3)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UH2_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x00 5.--31. 1. " ASYBASE[31:5] ,Link Pointer Low"
|
|
elif ((data.long(asd:0x43f885a8)&0x3)==0x2)
|
|
group 0x158++0x03
|
|
line.long 0x00 "UH2_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long.tbyte 0x00 11.--31. 1. " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup 0x158++0x03
|
|
hide.long 0x00 "UH2_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group 0x160--0x167
|
|
line.long 0x00 "UH2_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
;group 0x164++0x03
|
|
line.long 0x04 "UH2_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,TXFIFOTHRES"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,TXSCHEALTH"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,TXSCHOH"
|
|
if ((data.long(asd:0x43f88570)&0x20000000)==0x20000000)
|
|
group 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not write ,Write "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
else
|
|
group 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not read,Read "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
endif
|
|
width 12.
|
|
;if for host
|
|
if ((data.long(asd:0x43f885a8)&0x3)==0x3)
|
|
group 0x184--0x1a3
|
|
line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x188++0x03
|
|
line.long 0x04 "UH2_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x18c++0x03
|
|
line.long 0x08 "UH2_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x190++0x03
|
|
line.long 0x0c "UH2_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x194++0x03
|
|
line.long 0x10 "UH2_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x198++0x03
|
|
line.long 0x14 "UH2_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x19c++0x03
|
|
line.long 0x18 "UH2_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;group 0x1a0++0x03
|
|
line.long 0x1c "UH2_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
;if for device
|
|
elif ((data.long(asd:0x43f885a8)&0x3)==0x2)
|
|
group 0x184++0x03
|
|
line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Philips Classic,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_ STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup 0x184--0x1a3
|
|
hide.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group 0x1a8++0x03
|
|
line.long 0x00 "UH2_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
tree.end
|
|
width 20.
|
|
tree.end
|
|
tree "WDOG (Watchdog Timer)"
|
|
base asd:0x53fdc000
|
|
width 0x6
|
|
group 0x00--0x04
|
|
line.word 0x00 "WCR,Watchdog Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WT ,Watchdog Time-Out Field"
|
|
bitfld.word 0x00 6. " WOE ,/WDOG Output Enable" "Tri-stated,Enabled"
|
|
bitfld.word 0x00 5. " WDA ,/Watchdog Assertion" "Asserted ,No effect"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SRS ,/Software Reset Signal" "Reset,No effect"
|
|
bitfld.word 0x00 3. " WRE ,/WDOG Or /WDOG_RESET Enable" "Reset,/WDOG"
|
|
bitfld.word 0x00 2. " WDE ,Watchdog Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " WDBG ,Watchdog DEBUG Enable" "Disabled,Suspend watchdog"
|
|
bitfld.word 0x00 0. " WDZST ,Watchdog Low Power" "Disabled,Enabled"
|
|
;group 0x02++0x01
|
|
line.word 0x02 "WSR,Watchdog Service Register"
|
|
hexmask.word 0x02 0.--15. 1. " WSR ,Watchdog Service"
|
|
rgroup 0x04++0x01
|
|
line.word 0x00 "WRSR,Watchdog Reset Status Register"
|
|
bitfld.word 0x00 5. " JRST ,JTAG Reset" "No reset,Reset"
|
|
bitfld.word 0x00 4. " PWR ,Power-On Reset" "No power-on reset,Power-on reset"
|
|
bitfld.word 0x00 3. " EXT ,External Reset" "No external reset,External reset"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CMON ,Clock Monitor" "No clock monitor reset,Clock monitor reset"
|
|
bitfld.word 0x00 1. " TOUT ,Time-Out" "No WDOG time-out,WDOG time-out"
|
|
bitfld.word 0x00 0. " SFTW ,Software Reset" "No software reset,Software reset"
|
|
width 0x16
|
|
tree.end
|
|
tree "ESDCTL (Enhanced SDRAM Controller)"
|
|
base asd:0xb8001000
|
|
width 9.
|
|
group 0x00++0x03
|
|
line.long 0x00 "ESDCTL0,Enhanced SDRAM Control Register 0"
|
|
bitfld.long 0x00 31. " SDE ,Enhanced SDRAM Controller Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " SMODE ,SDRAM Controller Operating Mode" "Normal read/write,Precharge,Auto-Refresh,Load Mode Register,Manual Self Refresh,?..."
|
|
bitfld.long 0x00 27. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11,12,13,14,15,?..."
|
|
bitfld.long 0x00 20.--21. " COL ,Column Address Width" "8,9,10,?..."
|
|
bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit/D[31:16],16-bit/D[15:0],32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " SREFR ,SDRAM Refresh Rate" "000,001,010,011,100,101,?..."
|
|
bitfld.long 0x00 10.--11. " PWDT ,Power Down Timer" "00,01,10,11"
|
|
bitfld.long 0x00 8. " FP ,Full Page" "Not full page,Full page"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BL ,Burst Length" "0,1"
|
|
hexmask.long.byte 0x00 0.--5. 1. " PRCT ,Precharge Timer"
|
|
group 0x08++0x03
|
|
line.long 0x00 "ESDCTL1,Enhanced SDRAM Control Register 1"
|
|
bitfld.long 0x00 31. " SDE ,Enhanced SDRAM Controller Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " SMODE ,SDRAM Controller Operating Mode" "Normal read/write,Precharge,Auto-Refresh,Load Mode Register,Manual Self Refresh,?..."
|
|
bitfld.long 0x00 27. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11,12,13,14,15,?..."
|
|
bitfld.long 0x00 20.--21. " COL ,Column Address Width" "8,9,10,?..."
|
|
bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit/D[31:16],16-bit/D[15:0],32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " SREFR ,SDRAM Refresh Rate" "000,001,010,011,100,101,?..."
|
|
bitfld.long 0x00 10.--11. " PWDT ,Power Down Timer" "00,01,10,11"
|
|
bitfld.long 0x00 8. " FP ,Full Page" "Not full page,Full page"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BL ,Burst Length" "0,1"
|
|
hexmask.long.byte 0x00 0.--5. 1. " PRCT ,Precharge Timer"
|
|
if ((data.long(asd:0xb8001010)&0x4)==0x4)
|
|
group 0x04++0x03
|
|
line.long 0x00 "ESDCFG0,ESDRAMC Configuration Register 0"
|
|
bitfld.long 0x00 21.--22. " TXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " TWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " TRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " TWR ,SDRAM WRITE to PRECHARGE Command" "2 clocks,3 clocks"
|
|
bitfld.long 0x00 12.--14. " TRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " TCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " TRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "ESDCFG1,ESDRAMC Configuration Register 1"
|
|
bitfld.long 0x00 21.--22. " TXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " TWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " TRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " TWR ,SDRAM WRITE to PRECHARGE Command" "2 clocks,3 clocks"
|
|
bitfld.long 0x00 12.--14. " TRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " TCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " TRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
else
|
|
group 0x04++0x03
|
|
line.long 0x00 "ESDCFG0,ESDRAMC Configuration Register 0"
|
|
bitfld.long 0x00 21.--22. " TXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " TWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " TRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " TWR ,SDRAM WRITE to PRECHARGE Command" "1 clock,2 clocks"
|
|
bitfld.long 0x00 12.--14. " TRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " TCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " TRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "ESDCFG1,ESDRAMC Configuration Register 1"
|
|
bitfld.long 0x00 21.--22. " TXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " TWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " TRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " TWR ,SDRAM WRITE to PRECHARGE Command" "1 clock,2 clocks"
|
|
bitfld.long 0x00 12.--14. " TRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " TCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " TRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
endif
|
|
group 0x10++0x03
|
|
line.long 0x00 "ESDMISC,ESDMISC Miscellaneous Register"
|
|
bitfld.long 0x00 31. " SDRAMRDY ,External SDRAM/LPDDR Device Status" "Not ready,Ready"
|
|
bitfld.long 0x00 5. " LHD ,Latency Hiding Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " MDDR_MDIS ,LPDDR Delay Line Measure Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MDDR_DL_RST ,LPDDR Delay Line Soft Reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " MDDREN ,Enable Mobile/Low Power DDR SDRAM" "SDR,DDR"
|
|
bitfld.long 0x00 1. " RST ,Software Initiated Local Module Reset" "Disabled,Initiated"
|
|
group 0x20--0x33
|
|
line.long 0x0 "ESDCDLY1,MDDR Delay Line 1 Configuration Debug Register"
|
|
bitfld.long 0x0 31. " SEL_DLY_REG_1 ,Bit Selects the Delay Used by Delay Line 1" "Quarter of a cycle - factor,Value"
|
|
hexmask.long.word 0x0 16.--26. 1. " DLY_CORR_1 ,Delay Line 1 Correction Factor"
|
|
hexmask.long.word 0x0 0.--10. 1. " DLY_REG_1 ,Number of Inverters Units"
|
|
line.long 0x4 "ESDCDLY2,MDDR Delay Line 2 Configuration Debug Register"
|
|
bitfld.long 0x4 31. " SEL_DLY_REG_2 ,Bit Selects the Delay Used by Delay Line 2" "Quarter of a cycle - factor,Value"
|
|
hexmask.long.word 0x4 16.--26. 1. " DLY_CORR_2 ,Delay Line 2 Correction Factor"
|
|
hexmask.long.word 0x4 0.--10. 1. " DLY_REG_2 ,Number of Inverters Units"
|
|
line.long 0x8 "ESDCDLY3,MDDR Delay Line 3 Configuration Debug Register"
|
|
bitfld.long 0x8 31. " SEL_DLY_REG_3 ,Bit Selects the Delay Used by Delay Line 3" "Quarter of a cycle - factor,Value"
|
|
hexmask.long.word 0x8 16.--26. 1. " DLY_CORR_3 ,Delay Line 3 Correction Factor"
|
|
hexmask.long.word 0x8 0.--10. 1. " DLY_REG_3 ,Number of Inverters Units"
|
|
line.long 0xC "ESDCDLY4,MDDR Delay Line 4 Configuration Debug Register"
|
|
bitfld.long 0xC 31. " SEL_DLY_REG_4 ,Bit Selects the Delay Used by Delay Line 4" "Quarter of a cycle - factor,Value"
|
|
hexmask.long.word 0xC 16.--26. 1. " DLY_CORR_4 ,Delay Line 4 Correction Factor"
|
|
hexmask.long.word 0xC 0.--10. 1. " DLY_REG_4 ,Number of Inverters Units"
|
|
line.long 0x10 "ESDCDLY5,MDDR Delay Line 5 Configuration Debug Register"
|
|
bitfld.long 0x10 31. " SEL_DLY_REG_5 ,Bit Selects the Delay Used by Delay Line 5" "Quarter of a cycle - factor,Value"
|
|
hexmask.long.word 0x10 16.--26. 1. " DLY_CORR_5 ,Delay Line 5 Correction Factor"
|
|
hexmask.long.word 0x10 0.--10. 1. " DLY_REG_5 ,Number of Inverters Units"
|
|
rgroup 0x34++0x03
|
|
line.long 0x00 "ESDCDLYL,MDDR Delay Line Cycle Length Debug Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " DLY_CYCLE_LENGTH ,Number of Inverters"
|
|
width 14.
|
|
tree.end
|
|
tree "WEIM (Wireless External Interface Module)"
|
|
base asd:0xb8002000
|
|
width 5.
|
|
group 0x60++0x03
|
|
line.long 0x00 "WCR,CSPI Configuration Register"
|
|
bitfld.long 0x00 2. " BCM ,Burst Clock Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MAS ,Merged Address Space" "Standard,Merged"
|
|
width 8.
|
|
tree "WEIM 0"
|
|
if (((data.long(asd:(0xb8002000)+0x0)&0x200000)==0x200000))
|
|
group (0x00+0x0)++0x03
|
|
line.long 0x00 "CSCR0U,Chip Select 0 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x0)++0x03
|
|
line.long 0x00 "CSCR0U,Chip Select 0 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x0)&0x8000)==0x8000))
|
|
group (0x04+0x0)++0x03
|
|
line.long 0x00 "CSCR0L,Chip Select 0 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x0)++0x03
|
|
line.long 0x00 "CSCR0A,Chip Select 0 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x0)++0x03
|
|
line.long 0x00 "CSCR0L,Chip Select 0 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x0)++0x03
|
|
line.long 0x00 "CSCR0A,Chip Select 0 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
tree "WEIM 1"
|
|
if (((data.long(asd:(0xb8002000)+0x10)&0x200000)==0x200000))
|
|
group (0x00+0x10)++0x03
|
|
line.long 0x00 "CSCR1U,Chip Select 1 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x10)++0x03
|
|
line.long 0x00 "CSCR1U,Chip Select 1 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x10)&0x8000)==0x8000))
|
|
group (0x04+0x10)++0x03
|
|
line.long 0x00 "CSCR1L,Chip Select 1 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x10)++0x03
|
|
line.long 0x00 "CSCR1A,Chip Select 1 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x10)++0x03
|
|
line.long 0x00 "CSCR1L,Chip Select 1 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x10)++0x03
|
|
line.long 0x00 "CSCR1A,Chip Select 1 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
tree "WEIM 2"
|
|
if (((data.long(asd:(0xb8002000)+0x20)&0x200000)==0x200000))
|
|
group (0x00+0x20)++0x03
|
|
line.long 0x00 "CSCR2U,Chip Select 2 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x20)++0x03
|
|
line.long 0x00 "CSCR2U,Chip Select 2 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x20)&0x8000)==0x8000))
|
|
group (0x04+0x20)++0x03
|
|
line.long 0x00 "CSCR2L,Chip Select 2 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x20)++0x03
|
|
line.long 0x00 "CSCR2A,Chip Select 2 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x20)++0x03
|
|
line.long 0x00 "CSCR2L,Chip Select 2 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x20)++0x03
|
|
line.long 0x00 "CSCR2A,Chip Select 2 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
tree "WEIM 3"
|
|
if (((data.long(asd:(0xb8002000)+0x30)&0x200000)==0x200000))
|
|
group (0x00+0x30)++0x03
|
|
line.long 0x00 "CSCR3U,Chip Select 3 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x30)++0x03
|
|
line.long 0x00 "CSCR3U,Chip Select 3 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x30)&0x8000)==0x8000))
|
|
group (0x04+0x30)++0x03
|
|
line.long 0x00 "CSCR3L,Chip Select 3 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x30)++0x03
|
|
line.long 0x00 "CSCR3A,Chip Select 3 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x30)++0x03
|
|
line.long 0x00 "CSCR3L,Chip Select 3 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x30)++0x03
|
|
line.long 0x00 "CSCR3A,Chip Select 3 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
tree "WEIM 4"
|
|
if (((data.long(asd:(0xb8002000)+0x40)&0x200000)==0x200000))
|
|
group (0x00+0x40)++0x03
|
|
line.long 0x00 "CSCR4U,Chip Select 4 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x40)++0x03
|
|
line.long 0x00 "CSCR4U,Chip Select 4 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x40)&0x8000)==0x8000))
|
|
group (0x04+0x40)++0x03
|
|
line.long 0x00 "CSCR4L,Chip Select 4 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x40)++0x03
|
|
line.long 0x00 "CSCR4A,Chip Select 4 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x40)++0x03
|
|
line.long 0x00 "CSCR4L,Chip Select 4 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x40)++0x03
|
|
line.long 0x00 "CSCR4A,Chip Select 4 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
tree "WEIM 5"
|
|
if (((data.long(asd:(0xb8002000)+0x50)&0x200000)==0x200000))
|
|
group (0x00+0x50)++0x03
|
|
line.long 0x00 "CSCR5U,Chip Select 5 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group (0x00+0x50)++0x03
|
|
line.long 0x00 "CSCR5U,Chip Select 5 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(asd:(0xb8002008)+0x50)&0x8000)==0x8000))
|
|
group (0x04+0x50)++0x03
|
|
line.long 0x00 "CSCR5L,Chip Select 5 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved1,8-bit port[15:8],8-bit port[7:0],16-bit port [15:0],16-bit port [15:0],32-bit port [31:0],111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x50)++0x03
|
|
line.long 0x00 "CSCR5A,Chip Select 5 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group (0x04+0x50)++0x03
|
|
line.long 0x00 "CSCR5L,Chip Select 5 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "000,001,8-bit port,8-bit port,100,16-bit port,110,111"
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group (0x08+0x50)++0x03
|
|
line.long 0x00 "CSCR5A,Chip Select 5 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree.end
|
|
tree "NANDFC (NAND Flash Controller)"
|
|
base asd:0xb8000e00
|
|
width 28.
|
|
rgroup 0x00--0x01
|
|
line.word 0x00 "NFC_BUFSIZE,Internal SRAM SIZE"
|
|
bitfld.word 0x00 0.--3. " BUFSIZE ,Buffer Size" "1 kb,2 kb,?..."
|
|
group 0x04--0x0b
|
|
line.word 0x00 "RAM_BUFFER_ADDRESS,Buffer Number for Page Data Transfer"
|
|
bitfld.word 0x00 0.--3. " RBA ,RAM Buffer Address" "1st,2nd,3rd,4th,?..."
|
|
line.word 0x02 "NAND_FLASH_ADD,NAND Flash Address"
|
|
hexmask.word 0x02 0.--15. 1. " ADD ,NAND Flash Address"
|
|
line.word 0x04 "NAND_Flash_CMD,NAND Flash Command"
|
|
hexmask.word 0x04 0.--15. 1. " CMD ,NAND Flash Command"
|
|
line.word 0x06 "NFC_CONFIGURATION,NFC Internal Buffer Lock Control"
|
|
bitfld.word 0x06 0.--1. " BLS ,Buffer Lock Set" "Locked,Locked,Unlocked,Locked"
|
|
rgroup 0x0c--0x11
|
|
line.word 0x00 "ECC_STATUS_RESULT,Controller Status/Result of Flash Operation"
|
|
bitfld.word 0x00 2.--3. " ERM ,ECC Error for Main Area Data" "No error,1-bit error,2-bits error,?..."
|
|
bitfld.word 0x00 0.--1. " ERS ,ECC Error for Spare Area Data" "No error,1-bit error,2-bits error,?..."
|
|
line.word 0x02 "ECC_RSLT_MAIN_AREA_8-BIT,ECC Error Position Of Main Area Data Error (8-bit NAND Flash)"
|
|
hexmask.word.byte 0x02 3.--11. 1. " ECC_RESULT_1 ,ECC Result 1"
|
|
hexmask.word.byte 0x02 0.--2. 1. " ECC_RESULT_2 ,ECC Result 2"
|
|
line.word 0x02 "ECC_RSLT_MAIN_AREA_16-BIT,ECC Error Position Of Main Area Data Error (16-bit NAND Flash)"
|
|
hexmask.word.byte 0x02 4.--11. 1. " ECC_RESULT_1 ,ECC Result 1"
|
|
hexmask.word.byte 0x02 0.--3. 1. " ECC_RESULT_2 ,ECC Result 2"
|
|
line.word 0x04 "ECC_RSLT_SPARE_AREA_8-BIT,ECC Error Position of Spare Area Data Error (8-bit NAND Flash)"
|
|
hexmask.word.byte 0x04 3.--4. 1. " ECC_RESULT_4 ,ECC Result 4"
|
|
hexmask.word.byte 0x04 0.--2. 1. " ECC_RESULT_3 ,ECC Result 3"
|
|
line.word 0x04 "ECC_RSLT_SPARE_AREA_16-BIT,ECC Error Position of Spare Area Data Error (16-bit NAND Flash)"
|
|
bitfld.word 0x04 4. " ECC_RESULT_4 ,ECC Error Address Of Spare Area Register" "0,1"
|
|
hexmask.word 0x0 0.--3. 1. " ECC_RESULT_3 ,ECC Error Address of Spare area Register"
|
|
group 0x12--0x17
|
|
line.word 0x00 "NF_WR_PROT,Nand Flash Write Protection"
|
|
bitfld.long 0x00 0.--2. " WPC ,Write Protection Command" "Reserved,Lock-tight,Lock all,Reserved,Unlock,?..."
|
|
line.word 0x02 "UNLOCK_START_BLK_ADD,Address to Unlock in Write Protection Mode - Start"
|
|
hexmask.word 0x02 0.--15. 1. " USBA ,Unlock Start Block Address"
|
|
line.word 0x04 "UNLOCK_END_BLK_ADD,Address to Unlock in Write Protection Mode - End"
|
|
hexmask.word 0x04 0.--15. 1. " UEBA ,Unlock End Block Address"
|
|
rgroup 0x18--0x19
|
|
line.word 0x00 "NAND_FLASH_WR_PR_ST,NAND Flash Write Protection Status"
|
|
bitfld.word 0x00 2. " US ,Unlocked Status" "Not unlocked,Unlocked"
|
|
bitfld.word 0x00 1. " LS ,Locked Status" "Not all,All"
|
|
bitfld.word 0x00 0. " LTS ,Lock-Tighten Status" "Not lock-tightened,Lock-tightened"
|
|
group 0x1a--0x1d
|
|
line.word 0x00 "NAND_FLASH_CONFIG1,NAND Flash Operation Configuration"
|
|
bitfld.word 0x00 7. " NF_/CE ,NAND Flash Force CE" "Normal,/CE asserted"
|
|
bitfld.word 0x00 6. " NFC_RST ,NFC Reset" "Not reset,Reset"
|
|
bitfld.word 0x00 5. " NF_BIG ,NAND FLASH Big Endian Mode" "Little endian,Big endian"
|
|
textline " "
|
|
bitfld.word 0x00 4. " INT_MASK ,Interrupt Mask" "Unmask,Mask"
|
|
bitfld.word 0x00 3. " ECC_EN ,ECC Operation Enable" "Bypassed,Executed"
|
|
bitfld.word 0x00 2. " SP_EN ,Spare Area Enable" "Main and spare,Spare only "
|
|
line.word 0x02 "NAND_FLASH_CONFIG2,NAND Flash Operation Configuration (Configuration 2)"
|
|
bitfld.word 0x02 15. " INT ,Interrupt" "Still running,Done"
|
|
bitfld.word 0x02 3.--5. " FDO ,NAND Flash Data Output" "One page data out,Reserved,NAND Flash ID,Reserved,NAND Flash status,?..."
|
|
bitfld.word 0x02 2. " FDI ,NAND Flash Data Input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 1. " FADD ,NAND Flash Address Input" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " FCMD ,NAND Flash Command Input" "Disabled,Enabled"
|
|
width 0x16
|
|
tree.end
|
|
tree "PCMCIA (Personal Computer Memory Card International Association Controller)"
|
|
base asd:0xb8004000
|
|
width 0x7
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "PIPR,PCMCIA Input Pins Register"
|
|
bitfld.long 0x00 8. " POWERON ,Power On" "Off,On"
|
|
bitfld.long 0x00 7. " RDY ,PC Card Ready/Busy" "Busy,Ready"
|
|
bitfld.long 0x00 5.--6. " BVD ,Battery Voltage Detect 1/STSCHG In" "Batery empty,Batery empty,Warning,Batery OK"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CD ,Card Detect 1 And Card Detect 2" "Card inserted,Inserted improperly,Inserted improperly,Card not detected"
|
|
bitfld.long 0x00 2. " WP ,Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " VS ,Voltage Sense" "0,1,2,3"
|
|
group 0x04++0x03
|
|
line.long 0x00 "PSCR,PCMCIA Status Change Register"
|
|
eventfld.long 0x00 11. " POWC ,The POWERON Signal from the Card Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 10. " RDYR ,Ready / Interupt Request Rising Edge" "Not detected,Detected"
|
|
eventfld.long 0x00 9. " RDYF ,Ready / Interupt Request Falling Edge" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RDYH ,Ready / Interupt Request High" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 7. " RDYL ,Ready / Interupt Request Low" "Not detected,Detected"
|
|
eventfld.long 0x00 6. " BVDC2 ,Battery Voltage Detect 2/SPKR In Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 5. " BVDC1 ,Battery Voltage Detect 1/STSCHG Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 4. " CDC2 ,Card Detect 2 Changed" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 3. " CDC1 ,Card Detect 1 Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 2. " WPC ,Write Protect Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 1. " VSC2 ,Voltage Sense 2 Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 0. " VSC1 ,Voltage Sense 1 Changed" "Not changed,Changed"
|
|
group 0x08--0x68
|
|
line.long 0x00 "PER,PCMCIA Enable Register"
|
|
bitfld.long 0x00 12. " ERRINTEN ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " POWERONEN ,Power On Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RDYRE ,RDY /IREQ Pin Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RDYFE ,RDY /IREQ Pin Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RDYHE ,RDY /IREQ High Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RDYLE ,RDY /IREQ Low Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BVDE2 ,Battery Voltage 2/SPKR In Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " BVDE1 ,Battery Voltage 1/STSCHG Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CDE2 ,Card Detect 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CDE1 ,Card Detect 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WPE ,Write Protect Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " VSE2 ,Voltage Sense 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VSE1 ,Voltage Sense 2 Interrupt Enable" "Disabled,Enabled"
|
|
;group 0x0c++0x03
|
|
line.long 0x04 "PBR0,PCMCIA Base Register 0"
|
|
hexmask.long 0x04 0.--25. 1. " PBA ,Base Register Address"
|
|
;group 0x10++0x03
|
|
line.long 0x08 "PBR1,PCMCIA Base Register 1"
|
|
hexmask.long 0x08 0.--25. 1. " PBA ,Base Register Address"
|
|
;group 0x14++0x03
|
|
line.long 0x0c "PBR2,PCMCIA Base Register 2"
|
|
hexmask.long 0x0c 0.--25. 1. " PBA ,Base Register Address"
|
|
;group 0x18++0x03
|
|
line.long 0x10 "PBR3,PCMCIA Base Register 3"
|
|
hexmask.long 0x10 0.--25. 1. " PBA ,Base Register Address"
|
|
;group 0x1c++0x03
|
|
line.long 0x14 "PBR4,PCMCIA Base Register 4"
|
|
hexmask.long 0x14 0.--25. 1. " PBA ,Base Register Address"
|
|
;group 0x28++0x03
|
|
line.long 0x20 "POR0,PCMCIA Option Register 0"
|
|
bitfld.long 0x20 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x20 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x20 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x20 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x20 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x20 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
hexmask.long.byte 0x20 11.--16. 1. " PSST ,PCMCIA Strobe Setup Time"
|
|
hexmask.long.byte 0x20 5.--10. 1. " PSHT ,PCMCIA Strobe Hold Time"
|
|
hexmask.long.byte 0x20 0.--3. 1. " BSIZE ,PCMCIA Bank Size"
|
|
;group 0x2c++0x03
|
|
line.long 0x24 "POR1,PCMCIA Option Register 1"
|
|
bitfld.long 0x24 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x24 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x24 27. " WP ,PCMCIA Write Protect Enable" "Not write protected,Write protected"
|
|
textline " "
|
|
bitfld.long 0x24 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x24 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x24 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
hexmask.long.byte 0x24 11.--16. 1. " PSST ,PCMCIA Strobe Setup Time"
|
|
hexmask.long.byte 0x24 05.--10. 1. " PSHT ,PCMCIA Strobe Hold Time"
|
|
hexmask.long.byte 0x24 00.--3. 1. " BSIZE ,PCMCIA Bank Size"
|
|
;group 0x30++0x03
|
|
line.long 0x28 "POR2,PCMCIA Option Register 2"
|
|
bitfld.long 0x28 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x28 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x28 27. " WP ,PCMCIA Write Protect Enable" "Not write protected,Write protected"
|
|
textline " "
|
|
bitfld.long 0x28 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x28 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x28 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
hexmask.long.byte 0x28 11.--16. 1. " PSST ,PCMCIA Strobe Setup Time"
|
|
hexmask.long.byte 0x28 05.--10. 1. " PSHT ,PCMCIA Strobe Hold Time"
|
|
hexmask.long.byte 0x28 00.--3. 1. " BSIZE ,PCMCIA Bank Size"
|
|
;group 0x34++0x03
|
|
line.long 0x2c "POR3,PCMCIA Option Register 3"
|
|
bitfld.long 0x2c 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x2c 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x2c 27. " WP ,PCMCIA Write Protect Enable" "Not write protected,Write protected"
|
|
textline " "
|
|
bitfld.long 0x2c 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x2c 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x2c 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
hexmask.long.byte 0x2c 11.--16. 1. " PSST ,PCMCIA Strobe Setup Time"
|
|
hexmask.long.byte 0x2c 5.--10. 1. " PSHT ,PCMCIA Strobe Hold Time"
|
|
hexmask.long.byte 0x2c 0.--3. 1. " BSIZE ,PCMCIA Bank Size"
|
|
;group 0x38++0x03
|
|
line.long 0x30 "POR4,PCMCIA Option Register 4"
|
|
bitfld.long 0x30 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x30 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x30 27. " WP ,PCMCIA Write Protect Enable" "Not write protected,Write protected"
|
|
textline " "
|
|
bitfld.long 0x30 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x30 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x30 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
hexmask.long.byte 0x30 11.--16. 1. " PSST ,PCMCIA Strobe Setup Time"
|
|
hexmask.long.byte 0x30 5.--10. 1. " PSHT ,PCMCIA Strobe Hold Time"
|
|
hexmask.long.byte 0x30 0.--3. 1. " BSIZE ,PCMCIA Bank Size"
|
|
;group 0x44++0x03
|
|
line.long 0x3c "POFR0,PCMCIA Offsett Register 0"
|
|
hexmask.long 0x3c 00.--25. 1. " POFA ,PCMCIA Offset Address"
|
|
;group 0x48++0x03
|
|
line.long 0x40 "POFR1,PCMCIA Offsett Register 1"
|
|
hexmask.long 0x40 00.--25. 1. " POFA ,PCMCIA Offset Address"
|
|
;group 0x4c++0x03
|
|
line.long 0x44 "POFR2,PCMCIA Offsett Register 2"
|
|
hexmask.long 0x44 00.--25. 1. " POFA ,PCMCIA Offset Address"
|
|
;group 0x50++0x03
|
|
line.long 0x48 "POFR3,PCMCIA Offsett Register 3"
|
|
hexmask.long 0x48 00.--25. 1. " POFA ,PCMCIA Offset Address"
|
|
;group 0x54++0x03
|
|
line.long 0x4c "POFR4,PCMCIA Offsett Register 4"
|
|
hexmask.long 0x4c 00.--25. 1. " POFA ,PCMCIA Offset Address"
|
|
;group 0x60++0x03
|
|
line.long 0x58 "PGCR,PCMCIA General Control Register"
|
|
bitfld.long 0x58 3. " LPMEN ,Low Power Mode Enable" "Normal,Low power"
|
|
bitfld.long 0x58 2. " SPKREN ,SPKROUT Routing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 1. " POE ,Controller Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 0. " RESET ,Card Reset" "No reset,Reset"
|
|
;group 0x64++0x03
|
|
line.long 0x5c "PGSR,PCMCIA General Status Register"
|
|
bitfld.long 0x5c 4. " NWINE ,No Window Error" "No error,Error"
|
|
bitfld.long 0x5c 3. " LPE ,Low Power Error" "No error,Error"
|
|
bitfld.long 0x5c 2. " SE ,Size Error" "No error,Error"
|
|
bitfld.long 0x5c 1. " CDE ,Card Detect Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x5c 0. " WPE ,Write Protect Error" "No error,Error"
|
|
width 0xf
|
|
tree.end
|
|
tree "M3IF (Multi-Master Memory Interface)"
|
|
base asd:0xb8003000
|
|
width 11.
|
|
group 0x00++0x03
|
|
line.long 0x00 "M3IFCTL,M3IF Control Register"
|
|
bitfld.long 0x00 31. " SDA ,SDRAM/MDDR Memory Active" "Not active,Active"
|
|
bitfld.long 0x00 11. " MLSD_EN ,Master Lock SDRAM/MDDR Access" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " MLSD ,Master Lock SDRAM/MDDR Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MRRP7 ,Master Round Robin Priority 7" "Not on list,On list"
|
|
bitfld.long 0x00 6. " MRRP6 ,Master Round Robin Priority 6" "Not on list,On list"
|
|
bitfld.long 0x00 5. " MRRP5 ,Master Round Robin Priority 5" "Not on list,On list"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MRRP4 ,Master Round Robin Priority 4" "Not on list,On list"
|
|
bitfld.long 0x00 3. " MRRP3 ,Master Round Robin Priority 3" "Not on list,On list"
|
|
bitfld.long 0x00 2. " MRRP2 ,Master Round Robin Priority 2" "Not on list,On list"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRRP1 ,Master Round Robin Priority 1" "Not on list,On list"
|
|
bitfld.long 0x00 0. " MRRP0 ,Master Round Robin Priority 0" "Not on list,On list"
|
|
group 0x28--0x3d
|
|
line.long 0x00 "M3IFSCFG0,M3IF Snooping Configuration Register 0"
|
|
hexmask.long.tbyte 0x00 11.--31. 1. " SWBA ,Snooping Window Base Address"
|
|
bitfld.long 0x00 1.--4. " SWSZ ,Snooping Window Size" "2 KByte,4 KByte,8 KByte,16 KByte,32 KByte,64 KByte,128 KByte,256 KByte,512 KByte,1 MByte,2 MByte,4 MByte,8 MByte,16 MByte,?..."
|
|
bitfld.long 0x00 0. " SE ,Snooping Enable" "Disabled,Enabled"
|
|
;group 0x2c++0x03
|
|
line.long 0x04 "M3IFSCFG1,M3IF Snooping Configuration Register 1"
|
|
bitfld.long 0x04 31. " SSE0_31 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " SSE0_30 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " SSE0_29 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SSE0_28 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " SSE0_27 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " SSE0_26 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SSE0_25 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " SSE0_24 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SSE0_23 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SSE0_22 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " SSE0_21 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SSE0_20 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SSE0_19 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " SSE0_18 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SSE0_17 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SSE0_16 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " SSE0_15 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SSE0_14 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SSE0_13 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " SSE0_12 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SSE0_11 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SSE0_10 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SSE0_9 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SSE0_8 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SSE0_7 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SSE0_6 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SSE0_5 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SSE0_4 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " SSE0_3 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SSE0_2 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SSE0_1 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SSE0_0 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
;group 0x30++0x03
|
|
line.long 0x08 "M3IFSCFG2,M3IF Snooping Configuration Register 2"
|
|
bitfld.long 0x08 31. " SSE1_31 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " SSE1_30 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " SSE1_29 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SSE1_28 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " SSE1_27 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " SSE1_26 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SSE1_25 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " SSE1_24 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SSE1_23 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SSE1_22 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " SSE1_21 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " SSE1_20 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SSE1_19 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " SSE1_18 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " SSE1_17 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SSE1_16 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " SSE1_15 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " SSE1_14 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SSE1_13 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SSE1_12 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " SSE1_11 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SSE1_10 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SSE1_9 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SSE1_8 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SSE1_7 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SSE1_6 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SSE1_5 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SSE1_4 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " SSE1_3 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " SSE1_2 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SSE1_1 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SSE1_0 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
;group 0x34++0x03
|
|
line.long 0x0c "M3IFSSR0,M3IF Snooping Status Register 0"
|
|
bitfld.long 0x0c 31. " SSS0_31 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 30. " SSS0_30 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 29. " SSS0_29 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " SSS0_28 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 27. " SSS0_27 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 26. " SSS0_26 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SSS0_25 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 24. " SSS0_24 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 23. " SSS0_23 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SSS0_22 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 21. " SSS0_21 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 20. " SSS0_20 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SSS0_19 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 18. " SSS0_18 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 17. " SSS0_17 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SSS0_16 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 15. " SSS0_15 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 14. " SSS0_14 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " SSS0_13 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 12. " SSS0_12 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 11. " SSS0_11 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " SSS0_10 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 9. " SSS0_9 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 8. " SSS0_8 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SSS0_7 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 6. " SSS0_6 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 5. " SSS0_5 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SSS0_4 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 3. " SSS0_3 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 2. " SSS0_2 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SSS0_1 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 0. " SSS0_0 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
;group 0x38++0x03
|
|
line.long 0x10 "M3IFSSR1,M3IF Snooping Status Register 1"
|
|
bitfld.long 0x10 31. " SSS1_31 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 30. " SSS1_30 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 29. " SSS1_29 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SSS1_28 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 27. " SSS1_27 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 26. " SSS1_26 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SSS1_25 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 24. " SSS1_24 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 23. " SSS1_23 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SSS1_22 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 21. " SSS1_21 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 20. " SSS1_20 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SSS1_19 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 18. " SSS1_18 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 17. " SSS1_17 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SSS1_16 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 15. " SSS1_15 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 14. " SSS1_14 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SSS1_13 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 12. " SSS1_12 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 11. " SSS1_11 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SSS1_10 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 9. " SSS1_9 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 8. " SSS1_8 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SSS1_7 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 6. " SSS1_6 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 5. " SSS1_5 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SSS1_4 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 3. " SSS1_3 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 2. " SSS1_2 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SSS1_1 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 0. " SSS1_0 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
group 0x40--0x57
|
|
line.long 0x0 "M3IFMLWE0,M3IF Master Lock WEIM CS0 Register"
|
|
bitfld.long 0x0 31. " WEMA0 ,WEIM CS0 Memory Active" "Not active,Active"
|
|
bitfld.long 0x0 3. " MLWE0_EN ,Master Lock WEIM CS0 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--2. " MLWE0 ,Master Lock WEIM CS0 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x4 "M3IFMLWE1,M3IF Master Lock WEIM CS1 Register"
|
|
bitfld.long 0x4 31. " WEMA1 ,WEIM CS1 Memory Active" "Not active,Active"
|
|
bitfld.long 0x4 3. " MLWE1_EN ,Master Lock WEIM CS1 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--2. " MLWE1 ,Master Lock WEIM CS1 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x8 "M3IFMLWE2,M3IF Master Lock WEIM CS2 Register"
|
|
bitfld.long 0x8 31. " WEMA2 ,WEIM CS2 Memory Active" "Not active,Active"
|
|
bitfld.long 0x8 3. " MLWE2_EN ,Master Lock WEIM CS2 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--2. " MLWE2 ,Master Lock WEIM CS2 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0xC "M3IFMLWE3,M3IF Master Lock WEIM CS3 Register"
|
|
bitfld.long 0xC 31. " WEMA3 ,WEIM CS3 Memory Active" "Not active,Active"
|
|
bitfld.long 0xC 3. " MLWE3_EN ,Master Lock WEIM CS3 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--2. " MLWE3 ,Master Lock WEIM CS3 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x10 "M3IFMLWE4,M3IF Master Lock WEIM CS4 Register"
|
|
bitfld.long 0x10 31. " WEMA4 ,WEIM CS4 Memory Active" "Not active,Active"
|
|
bitfld.long 0x10 3. " MLWE4_EN ,Master Lock WEIM CS4 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--2. " MLWE4 ,Master Lock WEIM CS4 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x14 "M3IFMLWE5,M3IF Master Lock WEIM CS5 Register"
|
|
bitfld.long 0x14 31. " WEMA5 ,WEIM CS5 Memory Active" "Not active,Active"
|
|
bitfld.long 0x14 3. " MLWE5_EN ,Master Lock WEIM CS5 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--2. " MLWE5 ,Master Lock WEIM CS5 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
width 15.
|
|
tree.end
|
|
tree.open "GPIO (General Purpose Input/Output)"
|
|
tree "GPIO 1"
|
|
base asd:0x53fcc000
|
|
width 6.
|
|
group 0x00--0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DR ,Data Bits"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR31 ,GPIO 31 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 30. " GDIR30 ,GPIO 30 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 29. " GDIR29 ,GPIO 29 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GDIR28 ,GPIO 28 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 27. " GDIR27 ,GPIO 27 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 26. " GDIR26 ,GPIO 26 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GDIR25 ,GPIO 25 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 24. " GDIR24 ,GPIO 24 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 23. " GDIR23 ,GPIO 23 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GDIR22 ,GPIO 22 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 21. " GDIR21 ,GPIO 21 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 20. " GDIR20 ,GPIO 20 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GDIR19 ,GPIO 19 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 18. " GDIR18 ,GPIO 18 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 17. " GDIR17 ,GPIO 17 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GDIR16 ,GPIO 16 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 15. " GDIR15 ,GPIO 15 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 14. " GDIR14 ,GPIO 14 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GDIR13 ,GPIO 13 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 12. " GDIR12 ,GPIO 12 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 11. " GDIR11 ,GPIO 11 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GDIR10 ,GPIO 10 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 9. " GDIR9 ,GPIO 9 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 8. " GDIR8 ,GPIO 8 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GDIR7 ,GPIO 7 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 6. " GDIR6 ,GPIO 6 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 5. " GDIR5 ,GPIO 5 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GDIR4 ,GPIO 4 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 3. " GDIR3 ,GPIO 3 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 2. " GDIR2 ,GPIO 2 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GDIR1 ,GPIO 1 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 0. " GDIR0 ,GPIO 0 Direction Bit" "Input,Output"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR31 ,GPIO Pad 31 Status Bit" "0,1"
|
|
bitfld.long 0x00 30. " PSR30 ,GPIO Pad 30 Status Bit" "0,1"
|
|
bitfld.long 0x00 29. " PSR29 ,GPIO Pad 29 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PSR28 ,GPIO Pad 28 Status Bit" "0,1"
|
|
bitfld.long 0x00 27. " PSR27 ,GPIO Pad 27 Status Bit" "0,1"
|
|
bitfld.long 0x00 26. " PSR26 ,GPIO Pad 26 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PSR25 ,GPIO Pad 25 Status Bit" "0,1"
|
|
bitfld.long 0x00 24. " PSR24 ,GPIO Pad 24 Status Bit" "0,1"
|
|
bitfld.long 0x00 23. " PSR23 ,GPIO Pad 23 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PSR22 ,GPIO Pad 22 Status Bit" "0,1"
|
|
bitfld.long 0x00 21. " PSR21 ,GPIO Pad 21 Status Bit" "0,1"
|
|
bitfld.long 0x00 20. " PSR20 ,GPIO Pad 20 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PSR19 ,GPIO Pad 19 Status Bit" "0,1"
|
|
bitfld.long 0x00 18. " PSR18 ,GPIO Pad 18 Status Bit" "0,1"
|
|
bitfld.long 0x00 17. " PSR17 ,GPIO Pad 17 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PSR16 ,GPIO Pad 16 Status Bit" "0,1"
|
|
bitfld.long 0x00 15. " PSR15 ,GPIO Pad 15 Status Bit" "0,1"
|
|
bitfld.long 0x00 14. " PSR14 ,GPIO Pad 14 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PSR13 ,GPIO Pad 13 Status Bit" "0,1"
|
|
bitfld.long 0x00 12. " PSR12 ,GPIO Pad 12 Status Bit" "0,1"
|
|
bitfld.long 0x00 11. " PSR11 ,GPIO Pad 11 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PSR10 ,GPIO Pad 10 Status Bit" "0,1"
|
|
bitfld.long 0x00 9. " PSR9 ,GPIO Pad 9 Status Bit" "0,1"
|
|
bitfld.long 0x00 8. " PSR8 ,GPIO Pad 8 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PSR7 ,GPIO Pad 7 Status Bit" "0,1"
|
|
bitfld.long 0x00 6. " PSR6 ,GPIO Pad 6 Status Bit" "0,1"
|
|
bitfld.long 0x00 5. " PSR5 ,GPIO Pad 5 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSR4 ,GPIO Pad 4 Status Bit" "0,1"
|
|
bitfld.long 0x00 3. " PSR3 ,GPIO Pad 3 Status Bit" "0,1"
|
|
bitfld.long 0x00 2. " PSR2 ,GPIO Pad 2 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PSR1 ,GPIO Pad 1 Status Bit" "0,1"
|
|
bitfld.long 0x00 0. " PSR0 ,GPIO Pad 0 Status Bit" "0,1"
|
|
group 0x0c--0x1b
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register1"
|
|
bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x10++0x03
|
|
line.long 0x04 "ICR2,GPIO Interrupt Configuration Register2"
|
|
bitfld.long 0x04 30.--31. " ICR2_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 28.--29. " ICR2_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 26.--27. " ICR2_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 22.--23. " ICR2_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 20.--21. " ICR2_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 16.--17. " ICR2_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 14.--15. " ICR2_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 10.--11. " ICR2_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 8.--9. " ICR2_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 4.--5. " ICR2_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 2.--3. " ICR2_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x14++0x03
|
|
line.long 0x08 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask Bit" "Disabled,Enabled"
|
|
;group 0x18++0x03
|
|
line.long 0x0c "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " IMR31 ,Interrupt 31 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 30. " IMR30 ,Interrupt 30 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 29. " IMR29 ,Interrupt 29 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 28. " IMR28 ,Interrupt 28 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 27. " IMR27 ,Interrupt 27 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 26. " IMR26 ,Interrupt 26 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " IMR25 ,Interrupt 25 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 24. " IMR24 ,Interrupt 24 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 23. " IMR23 ,Interrupt 23 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 22. " IMR22 ,Interrupt 22 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 21. " IMR21 ,Interrupt 21 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 20. " IMR20 ,Interrupt 20 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " IMR19 ,Interrupt 19 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 18. " IMR18 ,Interrupt 18 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 17. " IMR17 ,Interrupt 17 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 16. " IMR16 ,Interrupt 16 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 15. " IMR15 ,Interrupt 15 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 14. " IMR14 ,Interrupt 14 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " IMR13 ,Interrupt 13 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 12. " IMR12 ,Interrupt 12 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 11. " IMR11 ,Interrupt 11 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 10. " IMR10 ,Interrupt 10 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 9. " IMR9 ,Interrupt 9 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 8. " IMR8 ,Interrupt 8 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " IMR7 ,Interrupt 7 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 6. " IMR6 ,Interrupt 6 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 5. " IMR5 ,Interrupt 5 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 4. " IMR4 ,Interrupt 4 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 3. " IMR3 ,Interrupt 3 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 2. " IMR2 ,Interrupt 2 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " IMR1 ,Interrupt 1 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 0. " IMR0 ,Interrupt 0 Status Bit" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "GPIO 2"
|
|
base asd:0x53fd0000
|
|
width 6.
|
|
group 0x00--0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DR ,Data Bits"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR31 ,GPIO 31 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 30. " GDIR30 ,GPIO 30 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 29. " GDIR29 ,GPIO 29 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GDIR28 ,GPIO 28 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 27. " GDIR27 ,GPIO 27 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 26. " GDIR26 ,GPIO 26 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GDIR25 ,GPIO 25 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 24. " GDIR24 ,GPIO 24 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 23. " GDIR23 ,GPIO 23 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GDIR22 ,GPIO 22 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 21. " GDIR21 ,GPIO 21 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 20. " GDIR20 ,GPIO 20 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GDIR19 ,GPIO 19 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 18. " GDIR18 ,GPIO 18 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 17. " GDIR17 ,GPIO 17 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GDIR16 ,GPIO 16 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 15. " GDIR15 ,GPIO 15 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 14. " GDIR14 ,GPIO 14 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GDIR13 ,GPIO 13 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 12. " GDIR12 ,GPIO 12 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 11. " GDIR11 ,GPIO 11 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GDIR10 ,GPIO 10 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 9. " GDIR9 ,GPIO 9 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 8. " GDIR8 ,GPIO 8 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GDIR7 ,GPIO 7 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 6. " GDIR6 ,GPIO 6 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 5. " GDIR5 ,GPIO 5 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GDIR4 ,GPIO 4 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 3. " GDIR3 ,GPIO 3 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 2. " GDIR2 ,GPIO 2 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GDIR1 ,GPIO 1 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 0. " GDIR0 ,GPIO 0 Direction Bit" "Input,Output"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR31 ,GPIO Pad 31 Status Bit" "0,1"
|
|
bitfld.long 0x00 30. " PSR30 ,GPIO Pad 30 Status Bit" "0,1"
|
|
bitfld.long 0x00 29. " PSR29 ,GPIO Pad 29 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PSR28 ,GPIO Pad 28 Status Bit" "0,1"
|
|
bitfld.long 0x00 27. " PSR27 ,GPIO Pad 27 Status Bit" "0,1"
|
|
bitfld.long 0x00 26. " PSR26 ,GPIO Pad 26 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PSR25 ,GPIO Pad 25 Status Bit" "0,1"
|
|
bitfld.long 0x00 24. " PSR24 ,GPIO Pad 24 Status Bit" "0,1"
|
|
bitfld.long 0x00 23. " PSR23 ,GPIO Pad 23 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PSR22 ,GPIO Pad 22 Status Bit" "0,1"
|
|
bitfld.long 0x00 21. " PSR21 ,GPIO Pad 21 Status Bit" "0,1"
|
|
bitfld.long 0x00 20. " PSR20 ,GPIO Pad 20 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PSR19 ,GPIO Pad 19 Status Bit" "0,1"
|
|
bitfld.long 0x00 18. " PSR18 ,GPIO Pad 18 Status Bit" "0,1"
|
|
bitfld.long 0x00 17. " PSR17 ,GPIO Pad 17 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PSR16 ,GPIO Pad 16 Status Bit" "0,1"
|
|
bitfld.long 0x00 15. " PSR15 ,GPIO Pad 15 Status Bit" "0,1"
|
|
bitfld.long 0x00 14. " PSR14 ,GPIO Pad 14 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PSR13 ,GPIO Pad 13 Status Bit" "0,1"
|
|
bitfld.long 0x00 12. " PSR12 ,GPIO Pad 12 Status Bit" "0,1"
|
|
bitfld.long 0x00 11. " PSR11 ,GPIO Pad 11 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PSR10 ,GPIO Pad 10 Status Bit" "0,1"
|
|
bitfld.long 0x00 9. " PSR9 ,GPIO Pad 9 Status Bit" "0,1"
|
|
bitfld.long 0x00 8. " PSR8 ,GPIO Pad 8 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PSR7 ,GPIO Pad 7 Status Bit" "0,1"
|
|
bitfld.long 0x00 6. " PSR6 ,GPIO Pad 6 Status Bit" "0,1"
|
|
bitfld.long 0x00 5. " PSR5 ,GPIO Pad 5 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSR4 ,GPIO Pad 4 Status Bit" "0,1"
|
|
bitfld.long 0x00 3. " PSR3 ,GPIO Pad 3 Status Bit" "0,1"
|
|
bitfld.long 0x00 2. " PSR2 ,GPIO Pad 2 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PSR1 ,GPIO Pad 1 Status Bit" "0,1"
|
|
bitfld.long 0x00 0. " PSR0 ,GPIO Pad 0 Status Bit" "0,1"
|
|
group 0x0c--0x1b
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register1"
|
|
bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x10++0x03
|
|
line.long 0x04 "ICR2,GPIO Interrupt Configuration Register2"
|
|
bitfld.long 0x04 30.--31. " ICR2_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 28.--29. " ICR2_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 26.--27. " ICR2_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 22.--23. " ICR2_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 20.--21. " ICR2_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 16.--17. " ICR2_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 14.--15. " ICR2_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 10.--11. " ICR2_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 8.--9. " ICR2_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 4.--5. " ICR2_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 2.--3. " ICR2_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x14++0x03
|
|
line.long 0x08 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask Bit" "Disabled,Enabled"
|
|
;group 0x18++0x03
|
|
line.long 0x0c "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " IMR31 ,Interrupt 31 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 30. " IMR30 ,Interrupt 30 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 29. " IMR29 ,Interrupt 29 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 28. " IMR28 ,Interrupt 28 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 27. " IMR27 ,Interrupt 27 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 26. " IMR26 ,Interrupt 26 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " IMR25 ,Interrupt 25 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 24. " IMR24 ,Interrupt 24 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 23. " IMR23 ,Interrupt 23 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 22. " IMR22 ,Interrupt 22 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 21. " IMR21 ,Interrupt 21 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 20. " IMR20 ,Interrupt 20 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " IMR19 ,Interrupt 19 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 18. " IMR18 ,Interrupt 18 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 17. " IMR17 ,Interrupt 17 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 16. " IMR16 ,Interrupt 16 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 15. " IMR15 ,Interrupt 15 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 14. " IMR14 ,Interrupt 14 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " IMR13 ,Interrupt 13 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 12. " IMR12 ,Interrupt 12 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 11. " IMR11 ,Interrupt 11 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 10. " IMR10 ,Interrupt 10 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 9. " IMR9 ,Interrupt 9 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 8. " IMR8 ,Interrupt 8 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " IMR7 ,Interrupt 7 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 6. " IMR6 ,Interrupt 6 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 5. " IMR5 ,Interrupt 5 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 4. " IMR4 ,Interrupt 4 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 3. " IMR3 ,Interrupt 3 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 2. " IMR2 ,Interrupt 2 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " IMR1 ,Interrupt 1 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 0. " IMR0 ,Interrupt 0 Status Bit" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "GPIO 3"
|
|
base asd:0x53fa4000
|
|
width 6.
|
|
group 0x00--0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DR ,Data Bits"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR31 ,GPIO 31 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 30. " GDIR30 ,GPIO 30 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 29. " GDIR29 ,GPIO 29 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GDIR28 ,GPIO 28 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 27. " GDIR27 ,GPIO 27 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 26. " GDIR26 ,GPIO 26 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GDIR25 ,GPIO 25 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 24. " GDIR24 ,GPIO 24 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 23. " GDIR23 ,GPIO 23 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GDIR22 ,GPIO 22 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 21. " GDIR21 ,GPIO 21 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 20. " GDIR20 ,GPIO 20 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GDIR19 ,GPIO 19 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 18. " GDIR18 ,GPIO 18 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 17. " GDIR17 ,GPIO 17 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GDIR16 ,GPIO 16 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 15. " GDIR15 ,GPIO 15 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 14. " GDIR14 ,GPIO 14 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GDIR13 ,GPIO 13 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 12. " GDIR12 ,GPIO 12 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 11. " GDIR11 ,GPIO 11 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GDIR10 ,GPIO 10 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 9. " GDIR9 ,GPIO 9 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 8. " GDIR8 ,GPIO 8 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GDIR7 ,GPIO 7 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 6. " GDIR6 ,GPIO 6 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 5. " GDIR5 ,GPIO 5 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GDIR4 ,GPIO 4 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 3. " GDIR3 ,GPIO 3 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 2. " GDIR2 ,GPIO 2 Direction Bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GDIR1 ,GPIO 1 Direction Bit" "Input,Output"
|
|
bitfld.long 0x04 0. " GDIR0 ,GPIO 0 Direction Bit" "Input,Output"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR31 ,GPIO Pad 31 Status Bit" "0,1"
|
|
bitfld.long 0x00 30. " PSR30 ,GPIO Pad 30 Status Bit" "0,1"
|
|
bitfld.long 0x00 29. " PSR29 ,GPIO Pad 29 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PSR28 ,GPIO Pad 28 Status Bit" "0,1"
|
|
bitfld.long 0x00 27. " PSR27 ,GPIO Pad 27 Status Bit" "0,1"
|
|
bitfld.long 0x00 26. " PSR26 ,GPIO Pad 26 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PSR25 ,GPIO Pad 25 Status Bit" "0,1"
|
|
bitfld.long 0x00 24. " PSR24 ,GPIO Pad 24 Status Bit" "0,1"
|
|
bitfld.long 0x00 23. " PSR23 ,GPIO Pad 23 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PSR22 ,GPIO Pad 22 Status Bit" "0,1"
|
|
bitfld.long 0x00 21. " PSR21 ,GPIO Pad 21 Status Bit" "0,1"
|
|
bitfld.long 0x00 20. " PSR20 ,GPIO Pad 20 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PSR19 ,GPIO Pad 19 Status Bit" "0,1"
|
|
bitfld.long 0x00 18. " PSR18 ,GPIO Pad 18 Status Bit" "0,1"
|
|
bitfld.long 0x00 17. " PSR17 ,GPIO Pad 17 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PSR16 ,GPIO Pad 16 Status Bit" "0,1"
|
|
bitfld.long 0x00 15. " PSR15 ,GPIO Pad 15 Status Bit" "0,1"
|
|
bitfld.long 0x00 14. " PSR14 ,GPIO Pad 14 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PSR13 ,GPIO Pad 13 Status Bit" "0,1"
|
|
bitfld.long 0x00 12. " PSR12 ,GPIO Pad 12 Status Bit" "0,1"
|
|
bitfld.long 0x00 11. " PSR11 ,GPIO Pad 11 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PSR10 ,GPIO Pad 10 Status Bit" "0,1"
|
|
bitfld.long 0x00 9. " PSR9 ,GPIO Pad 9 Status Bit" "0,1"
|
|
bitfld.long 0x00 8. " PSR8 ,GPIO Pad 8 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PSR7 ,GPIO Pad 7 Status Bit" "0,1"
|
|
bitfld.long 0x00 6. " PSR6 ,GPIO Pad 6 Status Bit" "0,1"
|
|
bitfld.long 0x00 5. " PSR5 ,GPIO Pad 5 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PSR4 ,GPIO Pad 4 Status Bit" "0,1"
|
|
bitfld.long 0x00 3. " PSR3 ,GPIO Pad 3 Status Bit" "0,1"
|
|
bitfld.long 0x00 2. " PSR2 ,GPIO Pad 2 Status Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PSR1 ,GPIO Pad 1 Status Bit" "0,1"
|
|
bitfld.long 0x00 0. " PSR0 ,GPIO Pad 0 Status Bit" "0,1"
|
|
group 0x0c--0x1b
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register1"
|
|
bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x10++0x03
|
|
line.long 0x04 "ICR2,GPIO Interrupt Configuration Register2"
|
|
bitfld.long 0x04 30.--31. " ICR2_15 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 28.--29. " ICR2_14 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 26.--27. " ICR2_13 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2_12 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 22.--23. " ICR2_11 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 20.--21. " ICR2_10 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2_9 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 16.--17. " ICR2_8 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 14.--15. " ICR2_7 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2_6 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 10.--11. " ICR2_5 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 8.--9. " ICR2_4 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2_3 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 4.--5. " ICR2_2 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
bitfld.long 0x04 2.--3. " ICR2_1 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2_0 ,Interrupt Configuration 1 Bit" "Low-level,High-level,Rise-edge,Fall-edge"
|
|
;group 0x14++0x03
|
|
line.long 0x08 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask Bit" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask Bit" "Disabled,Enabled"
|
|
;group 0x18++0x03
|
|
line.long 0x0c "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " IMR31 ,Interrupt 31 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 30. " IMR30 ,Interrupt 30 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 29. " IMR29 ,Interrupt 29 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 28. " IMR28 ,Interrupt 28 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 27. " IMR27 ,Interrupt 27 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 26. " IMR26 ,Interrupt 26 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " IMR25 ,Interrupt 25 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 24. " IMR24 ,Interrupt 24 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 23. " IMR23 ,Interrupt 23 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 22. " IMR22 ,Interrupt 22 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 21. " IMR21 ,Interrupt 21 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 20. " IMR20 ,Interrupt 20 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " IMR19 ,Interrupt 19 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 18. " IMR18 ,Interrupt 18 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 17. " IMR17 ,Interrupt 17 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 16. " IMR16 ,Interrupt 16 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 15. " IMR15 ,Interrupt 15 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 14. " IMR14 ,Interrupt 14 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " IMR13 ,Interrupt 13 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 12. " IMR12 ,Interrupt 12 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 11. " IMR11 ,Interrupt 11 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 10. " IMR10 ,Interrupt 10 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 9. " IMR9 ,Interrupt 9 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 8. " IMR8 ,Interrupt 8 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " IMR7 ,Interrupt 7 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 6. " IMR6 ,Interrupt 6 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 5. " IMR5 ,Interrupt 5 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 4. " IMR4 ,Interrupt 4 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 3. " IMR3 ,Interrupt 3 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 2. " IMR2 ,Interrupt 2 Status Bit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " IMR1 ,Interrupt 1 Status Bit" "Not occurred,Occurred"
|
|
eventfld.long 0x0c 0. " IMR0 ,Interrupt 0 Status Bit" "Not occurred,Occurred"
|
|
tree.end
|
|
tree.end
|
|
textline ""
|